From patchwork Tue Feb 7 10:29:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 53817 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2769182wrn; Tue, 7 Feb 2023 02:30:12 -0800 (PST) X-Google-Smtp-Source: AK7set/D2yqJbl82JA6/jxiwNDCgEDQnaxtfCE07kZ3P4irVw9aqrCDn+kbanBH72VLLpUnnmI+p X-Received: by 2002:a17:906:a189:b0:87b:db62:d659 with SMTP id s9-20020a170906a18900b0087bdb62d659mr2919656ejy.19.1675765812016; Tue, 07 Feb 2023 02:30:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675765812; cv=none; d=google.com; s=arc-20160816; b=e1LIfYErUK46wqqP1LUkBNSDqK8UtZK3TvK2mVkaWgErf8fjt/7ApeI2d1lwmxJ8Io 9j0l8sVd8qjT4m95OGmgTbEGZEMAGkkZhK44ubhalnfOrc6PhBSYe87xHFFfj5S24Lb4 BFsgCQ/1zGxkN1QYY2hLgla8Mm1SXkHJqi8cRANPnUhlq6ZoEJmKD5VZjkz/JNDhwU9g O2+im09nNCFOrxMRwXpNaNB3aytIL2CkrtokzRh5SvHRXltmILB0M/OakyuGBIiTNF9W TnWqkbtUwmApDYcrhJmx4eEo1JMfjhlJlb3SPC17zZerKFRTVwAJVbcchN2Y6GewxxEF XZ9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence:mime-version :user-agent:message-id:date:subject:mail-followup-to:to:dmarc-filter :delivered-to:dkim-signature:dkim-filter; bh=xpmS/PR1ciuNdy48u80jcSstDuf9yBU/1ZYaiH5VMAA=; b=chfPHX2vHLrrMPh8wn1c/O3Rpa4ApwelgzoLxhOvH7DoUqanVftb1qficTQrERtDiV tFnv4fLHtmy77FbcbTzynuigKT/s0DsoVq/7EdULFdh9JsEvp+nU61gwv55gcNykfmX5 Gl4ozsJw3DnBXvIH7Lbhq3IIG4DMKsZBieVPf6Ktloa5yDEcPfWUJovDkHVONcAHvOLT A7JDm5xK6Bb6QvbyVUu5s2FpH1iZ60JgIjmrNmfxNSinYys4IKfKgnQ00HI8Hzje5EOD SkhpfHSrnvQcrJsLRwTodelcU+u94C1ih8DklQJgJZrg3W0iv/1OqiE6THhH6xyWV+mu 0oNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=em7n0J2P; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id vw13-20020a170907058d00b0088e824d1cacsi13737122ejb.154.2023.02.07.02.30.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Feb 2023 02:30:11 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=em7n0J2P; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 068093858C62 for ; Tue, 7 Feb 2023 10:30:11 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 068093858C62 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1675765811; bh=xpmS/PR1ciuNdy48u80jcSstDuf9yBU/1ZYaiH5VMAA=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=em7n0J2PLrTlDCRktGBCv8KERc7oEp00vRgQ1pYosPw5thDj0VGxT7VTckfE7dC0a pBXHlMjnP+PM47cl5iAEFF0/wm5s4F04SVkro3K3znzPrJCRI6xtsFULG5uRoezaKT /ejUl/6y+DsXTJEDvbtzVMSxb6FecfbM5nNRDK4g= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 67EFC3858D33 for ; Tue, 7 Feb 2023 10:29:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 67EFC3858D33 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 64B42106F for ; Tue, 7 Feb 2023 02:30:10 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.99.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ACD273F8C6 for ; Tue, 7 Feb 2023 02:29:27 -0800 (PST) To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [PATCH] lra: Replace subregs in bare uses & clobbers [PR108681] Date: Tue, 07 Feb 2023 10:29:26 +0000 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-35.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Sandiford via Gcc-patches From: Richard Sandiford Reply-To: Richard Sandiford Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757167812078249136?= X-GMAIL-MSGID: =?utf-8?q?1757167812078249136?= In this PR we had a write to one vector of a 4-vector tuple. The vector had mode V1DI, and the target doesn't provide V1DI moves, so this was converted into: (clobber (subreg:V1DI (reg/v:V4x1DI 92 [ b ]) 24)) followed by a DImode move. (The clobber isn't really necessary or helpful for a single word, but would be for wider moves.) The subreg in the clobber survived until after RA: (clobber (subreg:V1DI (reg/v:V4x1DI 34 v2 [orig:92 b ] [92]) 24)) IMO this isn't well-formed. If a subreg of a hard register simplifies to a hard register, it should be replaced by the hard register. If the subreg doesn't simplify, then target-independent code can't be sure which parts of the register are affected and which aren't. A clobber of such a subreg isn't useful and (again IMO) should just be removed. Conversely, a use of such a subreg is effectively a use of the whole inner register. LRA has code to simplify subregs of hard registers, but it didn't handle bare uses and clobbers. The patch extends it to do that. One question was whether the final_p argument to alter_subregs should be true or false. True is IMO dangerous, since it forces replacements that might not be valid from a dataflow perspective, and uses and clobbers only exist for dataflow. As said above, I think the correct way of handling a failed simplification would be to delete clobbers and replace uses of subregs with uses of the inner register. But I didn't want to write untested code to do that. In the PR, the clobber caused an infinite loop in DCE, because of a disagreement about what effect the clobber had. But for the reasons above, I think that was GIGO rather than a bug in DF or DCE. Tested on aarch64-linux-gnu & x86_64-linux-gnu. OK to install? Richard gcc/ PR rtl-optimization/108681 * lra-spills.cc (lra_final_code_change): Extend subreg replacement code to handle bare uses and clobbers. gcc/testsuite/ PR rtl-optimization/108681 * gcc.target/aarch64/pr108681.c: New test. --- gcc/lra-spills.cc | 3 +++ gcc/testsuite/gcc.target/aarch64/pr108681.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/pr108681.c diff --git a/gcc/lra-spills.cc b/gcc/lra-spills.cc index a8d7e60acd3..4af85c49d43 100644 --- a/gcc/lra-spills.cc +++ b/gcc/lra-spills.cc @@ -860,6 +860,9 @@ lra_final_code_change (void) lra_update_dup (id, i); insn_change_p = true; } + if ((GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) + && alter_subregs (&XEXP (pat, 0), false)) + insn_change_p = true; if (insn_change_p) lra_update_operator_dups (id); diff --git a/gcc/testsuite/gcc.target/aarch64/pr108681.c b/gcc/testsuite/gcc.target/aarch64/pr108681.c new file mode 100644 index 00000000000..2391eaac2f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr108681.c @@ -0,0 +1,15 @@ +/* { dg-options "-O" } */ + +#pragma GCC aarch64 "arm_neon.h" +typedef __Int64x1_t int64x1_t; +void foo (int64x1x4_t); + +void +bar (int64x1_t a) +{ + for (;;) { + int64x1x4_t b; + b.val[3] = a; + foo (b); + } +}