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[2620:137:e000::1:20]) by mx.google.com with ESMTP id wl16-20020a170907311000b00888099f2020si12825445ejb.412.2023.02.06.18.36.45; Mon, 06 Feb 2023 18:37:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229931AbjBGCfa (ORCPT + 99 others); Mon, 6 Feb 2023 21:35:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229665AbjBGCfW (ORCPT ); Mon, 6 Feb 2023 21:35:22 -0500 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 68B1D2BF2B; Mon, 6 Feb 2023 18:35:20 -0800 (PST) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 07 Feb 2023 11:35:20 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 2FB502058B4F; Tue, 7 Feb 2023 11:35:20 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 7 Feb 2023 11:35:30 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id C03FEA8556; Tue, 7 Feb 2023 11:35:19 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 1/8] ARM: dts: uniphier: Align node names for SoC-dependent controller and PHYs with bindings Date: Tue, 7 Feb 2023 11:35:07 +0900 Message-Id: <20230207023514.29783-2-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> References: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757138049658791137?= X-GMAIL-MSGID: =?utf-8?q?1757138049658791137?= The node names for SoC-dependent controllers and PHYs should be generic ones according to the DT schemas. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-ld4.dtsi | 22 +++++++-------- arch/arm/boot/dts/uniphier-pro4.dtsi | 36 ++++++++++++------------ arch/arm/boot/dts/uniphier-pro5.dtsi | 36 ++++++++++++------------ arch/arm/boot/dts/uniphier-pxs2.dtsi | 42 ++++++++++++++-------------- arch/arm/boot/dts/uniphier-sld8.dtsi | 22 +++++++-------- 5 files changed, 79 insertions(+), 79 deletions(-) diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi index 9dceff12a633..06b9571345a2 100644 --- a/arch/arm/boot/dts/uniphier-ld4.dtsi +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi @@ -207,33 +207,33 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - mioctrl@59810000 { + syscon@59810000 { compatible = "socionext,uniphier-ld4-mioctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x800>; - mio_clk: clock { + mio_clk: clock-controller { compatible = "socionext,uniphier-ld4-mio-clock"; #clock-cells = <1>; }; - mio_rst: reset { + mio_rst: reset-controller { compatible = "socionext,uniphier-ld4-mio-reset"; #reset-cells = <1>; }; }; - perictrl@59820000 { + syscon@59820000 { compatible = "socionext,uniphier-ld4-perictrl", "simple-mfd", "syscon"; reg = <0x59820000 0x200>; - peri_clk: clock { + peri_clk: clock-controller { compatible = "socionext,uniphier-ld4-peri-clock"; #clock-cells = <1>; }; - peri_rst: reset { + peri_rst: reset-controller { compatible = "socionext,uniphier-ld4-peri-reset"; #reset-cells = <1>; }; @@ -334,7 +334,7 @@ usb2: usb@5a820100 { has-transaction-translator; }; - soc-glue@5f800000 { + syscon@5f800000 { compatible = "socionext,uniphier-ld4-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -344,7 +344,7 @@ pinctrl: pinctrl { }; }; - soc-glue@5f900000 { + syscon@5f900000 { compatible = "socionext,uniphier-ld4-soc-glue-debug", "simple-mfd"; #address-cells = <1>; @@ -393,17 +393,17 @@ aidet: interrupt-controller@61830000 { #interrupt-cells = <2>; }; - sysctrl@61840000 { + syscon@61840000 { compatible = "socionext,uniphier-ld4-sysctrl", "simple-mfd", "syscon"; reg = <0x61840000 0x10000>; - sys_clk: clock { + sys_clk: clock-controller { compatible = "socionext,uniphier-ld4-clock"; #clock-cells = <1>; }; - sys_rst: reset { + sys_rst: reset-controller { compatible = "socionext,uniphier-ld4-reset"; #reset-cells = <1>; }; diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index a309e64c57c8..064f98b61525 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -241,33 +241,33 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - mioctrl@59810000 { + syscon@59810000 { compatible = "socionext,uniphier-pro4-mioctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x800>; - mio_clk: clock { + mio_clk: clock-controller { compatible = "socionext,uniphier-pro4-mio-clock"; #clock-cells = <1>; }; - mio_rst: reset { + mio_rst: reset-controller { compatible = "socionext,uniphier-pro4-mio-reset"; #reset-cells = <1>; }; }; - perictrl@59820000 { + syscon@59820000 { compatible = "socionext,uniphier-pro4-perictrl", "simple-mfd", "syscon"; reg = <0x59820000 0x200>; - peri_clk: clock { + peri_clk: clock-controller { compatible = "socionext,uniphier-pro4-peri-clock"; #clock-cells = <1>; }; - peri_rst: reset { + peri_rst: reset-controller { compatible = "socionext,uniphier-pro4-peri-reset"; #reset-cells = <1>; }; @@ -375,7 +375,7 @@ usb3: usb@5a810100 { has-transaction-translator; }; - soc_glue: soc-glue@5f800000 { + soc_glue: syscon@5f800000 { compatible = "socionext,uniphier-pro4-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -384,7 +384,7 @@ pinctrl: pinctrl { compatible = "socionext,uniphier-pro4-pinctrl"; }; - usb-controller { + usb-hub { compatible = "socionext,uniphier-pro4-usb2-phy"; #address-cells = <1>; #size-cells = <0>; @@ -412,13 +412,13 @@ usb_phy3: phy@3 { }; }; - sg_clk: clock { + sg_clk: clock-controller { compatible = "socionext,uniphier-pro4-sg-clock"; #clock-cells = <1>; }; }; - soc-glue@5f900000 { + syscon@5f900000 { compatible = "socionext,uniphier-pro4-soc-glue-debug", "simple-mfd"; #address-cells = <1>; @@ -480,17 +480,17 @@ intc: interrupt-controller@60001000 { interrupt-controller; }; - sysctrl@61840000 { + syscon@61840000 { compatible = "socionext,uniphier-pro4-sysctrl", "simple-mfd", "syscon"; reg = <0x61840000 0x10000>; - sys_clk: clock { + sys_clk: clock-controller { compatible = "socionext,uniphier-pro4-clock"; #clock-cells = <1>; }; - sys_rst: reset { + sys_rst: reset-controller { compatible = "socionext,uniphier-pro4-reset"; #reset-cells = <1>; }; @@ -549,7 +549,7 @@ ahci0_rst: reset-controller@0 { #reset-cells = <1>; }; - ahci0_phy: sata-phy@10 { + ahci0_phy: phy@10 { compatible = "socionext,uniphier-pro4-ahci-phy"; reg = <0x10 0x40>; clock-names = "link", "gio"; @@ -595,7 +595,7 @@ ahci1_rst: reset-controller@0 { #reset-cells = <1>; }; - ahci1_phy: sata-phy@10 { + ahci1_phy: phy@10 { compatible = "socionext,uniphier-pro4-ahci-phy"; reg = <0x10 0x40>; clock-names = "link", "gio"; @@ -642,7 +642,7 @@ usb0_vbus: regulator@0 { resets = <&sys_rst 12>, <&sys_rst 14>; }; - usb0_ssphy: ss-phy@10 { + usb0_ssphy: phy@10 { compatible = "socionext,uniphier-pro4-usb3-ssphy"; reg = <0x10 0x10>; #phy-cells = <0>; @@ -653,7 +653,7 @@ usb0_ssphy: ss-phy@10 { vbus-supply = <&usb0_vbus>; }; - usb0_rst: reset@40 { + usb0_rst: reset-controller@40 { compatible = "socionext,uniphier-pro4-usb3-reset"; reg = <0x40 0x4>; #reset-cells = <1>; @@ -696,7 +696,7 @@ usb1_vbus: regulator@0 { resets = <&sys_rst 12>, <&sys_rst 15>; }; - usb1_rst: reset@40 { + usb1_rst: reset-controller@40 { compatible = "socionext,uniphier-pro4-usb3-reset"; reg = <0x40 0x4>; #reset-cells = <1>; diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi index 100edd7438d8..2af4fa19bf14 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -341,39 +341,39 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - sdctrl@59810000 { + syscon@59810000 { compatible = "socionext,uniphier-pro5-sdctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x400>; - sd_clk: clock { + sd_clk: clock-controller { compatible = "socionext,uniphier-pro5-sd-clock"; #clock-cells = <1>; }; - sd_rst: reset { + sd_rst: reset-controller { compatible = "socionext,uniphier-pro5-sd-reset"; #reset-cells = <1>; }; }; - perictrl@59820000 { + syscon@59820000 { compatible = "socionext,uniphier-pro5-perictrl", "simple-mfd", "syscon"; reg = <0x59820000 0x200>; - peri_clk: clock { + peri_clk: clock-controller { compatible = "socionext,uniphier-pro5-peri-clock"; #clock-cells = <1>; }; - peri_rst: reset { + peri_rst: reset-controller { compatible = "socionext,uniphier-pro5-peri-reset"; #reset-cells = <1>; }; }; - soc-glue@5f800000 { + syscon@5f800000 { compatible = "socionext,uniphier-pro5-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -383,7 +383,7 @@ pinctrl: pinctrl { }; }; - soc-glue@5f900000 { + syscon@5f900000 { compatible = "socionext,uniphier-pro5-soc-glue-debug", "simple-mfd"; #address-cells = <1>; @@ -455,17 +455,17 @@ intc: interrupt-controller@60001000 { interrupt-controller; }; - sysctrl@61840000 { + syscon@61840000 { compatible = "socionext,uniphier-pro5-sysctrl", "simple-mfd", "syscon"; reg = <0x61840000 0x10000>; - sys_clk: clock { + sys_clk: clock-controller { compatible = "socionext,uniphier-pro5-clock"; #clock-cells = <1>; }; - sys_rst: reset { + sys_rst: reset-controller { compatible = "socionext,uniphier-pro5-reset"; #reset-cells = <1>; }; @@ -493,7 +493,7 @@ usb-controller@65b00000 { #size-cells = <1>; ranges = <0 0x65b00000 0x400>; - usb0_rst: reset@0 { + usb0_rst: reset-controller@0 { compatible = "socionext,uniphier-pro5-usb3-reset"; reg = <0x0 0x4>; #reset-cells = <1>; @@ -512,7 +512,7 @@ usb0_vbus0: regulator@100 { resets = <&sys_rst 12>, <&sys_rst 14>; }; - usb0_hsphy0: hs-phy@280 { + usb0_hsphy0: phy@280 { compatible = "socionext,uniphier-pro5-usb3-hsphy"; reg = <0x280 0x10>; #phy-cells = <0>; @@ -523,7 +523,7 @@ usb0_hsphy0: hs-phy@280 { vbus-supply = <&usb0_vbus0>; }; - usb0_ssphy0: ss-phy@380 { + usb0_ssphy0: phy@380 { compatible = "socionext,uniphier-pro5-usb3-ssphy"; reg = <0x380 0x10>; #phy-cells = <0>; @@ -557,7 +557,7 @@ usb-controller@65d00000 { #size-cells = <1>; ranges = <0 0x65d00000 0x400>; - usb1_rst: reset@0 { + usb1_rst: reset-controller@0 { compatible = "socionext,uniphier-pro5-usb3-reset"; reg = <0x0 0x4>; #reset-cells = <1>; @@ -585,7 +585,7 @@ usb1_vbus1: regulator@110 { resets = <&sys_rst 12>, <&sys_rst 15>; }; - usb1_hsphy0: hs-phy@280 { + usb1_hsphy0: phy@280 { compatible = "socionext,uniphier-pro5-usb3-hsphy"; reg = <0x280 0x10>; #phy-cells = <0>; @@ -596,7 +596,7 @@ usb1_hsphy0: hs-phy@280 { vbus-supply = <&usb1_vbus0>; }; - usb1_hsphy1: hs-phy@290 { + usb1_hsphy1: phy@290 { compatible = "socionext,uniphier-pro5-usb3-hsphy"; reg = <0x290 0x10>; #phy-cells = <0>; @@ -607,7 +607,7 @@ usb1_hsphy1: hs-phy@290 { vbus-supply = <&usb1_vbus1>; }; - usb1_ssphy0: ss-phy@380 { + usb1_ssphy0: phy@380 { compatible = "socionext,uniphier-pro5-usb3-ssphy"; reg = <0x380 0x10>; #phy-cells = <0>; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index ca4dccf56a67..050e9b7c83f1 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -422,33 +422,33 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - sdctrl@59810000 { + syscon@59810000 { compatible = "socionext,uniphier-pxs2-sdctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x400>; - sd_clk: clock { + sd_clk: clock-controller { compatible = "socionext,uniphier-pxs2-sd-clock"; #clock-cells = <1>; }; - sd_rst: reset { + sd_rst: reset-controller { compatible = "socionext,uniphier-pxs2-sd-reset"; #reset-cells = <1>; }; }; - perictrl@59820000 { + syscon@59820000 { compatible = "socionext,uniphier-pxs2-perictrl", "simple-mfd", "syscon"; reg = <0x59820000 0x200>; - peri_clk: clock { + peri_clk: clock-controller { compatible = "socionext,uniphier-pxs2-peri-clock"; #clock-cells = <1>; }; - peri_rst: reset { + peri_rst: reset-controller { compatible = "socionext,uniphier-pxs2-peri-reset"; #reset-cells = <1>; }; @@ -488,7 +488,7 @@ sd: mmc@5a400000 { sd-uhs-sdr50; }; - soc_glue: soc-glue@5f800000 { + soc_glue: syscon@5f800000 { compatible = "socionext,uniphier-pxs2-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -498,7 +498,7 @@ pinctrl: pinctrl { }; }; - soc-glue@5f900000 { + syscon@5f900000 { compatible = "socionext,uniphier-pxs2-soc-glue-debug", "simple-mfd"; #address-cells = <1>; @@ -555,17 +555,17 @@ intc: interrupt-controller@60001000 { interrupt-controller; }; - sysctrl@61840000 { + syscon@61840000 { compatible = "socionext,uniphier-pxs2-sysctrl", "simple-mfd", "syscon"; reg = <0x61840000 0x10000>; - sys_clk: clock { + sys_clk: clock-controller { compatible = "socionext,uniphier-pxs2-clock"; #clock-cells = <1>; }; - sys_rst: reset { + sys_rst: reset-controller { compatible = "socionext,uniphier-pxs2-reset"; #reset-cells = <1>; }; @@ -628,7 +628,7 @@ ahci_rst: reset-controller@0 { #reset-cells = <1>; }; - ahci_phy: sata-phy@10 { + ahci_phy: phy@10 { compatible = "socionext,uniphier-pxs2-ahci-phy"; reg = <0x10 0x10>; clock-names = "link"; @@ -662,7 +662,7 @@ usb-controller@65b00000 { #size-cells = <1>; ranges = <0 0x65b00000 0x400>; - usb0_rst: reset@0 { + usb0_rst: reset-controller@0 { compatible = "socionext,uniphier-pxs2-usb3-reset"; reg = <0x0 0x4>; #reset-cells = <1>; @@ -690,7 +690,7 @@ usb0_vbus1: regulator@110 { resets = <&sys_rst 14>; }; - usb0_hsphy0: hs-phy@200 { + usb0_hsphy0: phy@200 { compatible = "socionext,uniphier-pxs2-usb3-hsphy"; reg = <0x200 0x10>; #phy-cells = <0>; @@ -701,7 +701,7 @@ usb0_hsphy0: hs-phy@200 { vbus-supply = <&usb0_vbus0>; }; - usb0_hsphy1: hs-phy@210 { + usb0_hsphy1: phy@210 { compatible = "socionext,uniphier-pxs2-usb3-hsphy"; reg = <0x210 0x10>; #phy-cells = <0>; @@ -712,7 +712,7 @@ usb0_hsphy1: hs-phy@210 { vbus-supply = <&usb0_vbus1>; }; - usb0_ssphy0: ss-phy@300 { + usb0_ssphy0: phy@300 { compatible = "socionext,uniphier-pxs2-usb3-ssphy"; reg = <0x300 0x10>; #phy-cells = <0>; @@ -723,7 +723,7 @@ usb0_ssphy0: ss-phy@300 { vbus-supply = <&usb0_vbus0>; }; - usb0_ssphy1: ss-phy@310 { + usb0_ssphy1: phy@310 { compatible = "socionext,uniphier-pxs2-usb3-ssphy"; reg = <0x310 0x10>; #phy-cells = <0>; @@ -757,7 +757,7 @@ usb-controller@65d00000 { #size-cells = <1>; ranges = <0 0x65d00000 0x400>; - usb1_rst: reset@0 { + usb1_rst: reset-controller@0 { compatible = "socionext,uniphier-pxs2-usb3-reset"; reg = <0x0 0x4>; #reset-cells = <1>; @@ -785,7 +785,7 @@ usb1_vbus1: regulator@110 { resets = <&sys_rst 15>; }; - usb1_hsphy0: hs-phy@200 { + usb1_hsphy0: phy@200 { compatible = "socionext,uniphier-pxs2-usb3-hsphy"; reg = <0x200 0x10>; #phy-cells = <0>; @@ -796,7 +796,7 @@ usb1_hsphy0: hs-phy@200 { vbus-supply = <&usb1_vbus0>; }; - usb1_hsphy1: hs-phy@210 { + usb1_hsphy1: phy@210 { compatible = "socionext,uniphier-pxs2-usb3-hsphy"; reg = <0x210 0x10>; #phy-cells = <0>; @@ -807,7 +807,7 @@ usb1_hsphy1: hs-phy@210 { vbus-supply = <&usb1_vbus1>; }; - usb1_ssphy0: ss-phy@300 { + usb1_ssphy0: phy@300 { compatible = "socionext,uniphier-pxs2-usb3-ssphy"; reg = <0x300 0x10>; #phy-cells = <0>; diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi index 67b12dfe513b..b4453f9fe981 100644 --- a/arch/arm/boot/dts/uniphier-sld8.dtsi +++ b/arch/arm/boot/dts/uniphier-sld8.dtsi @@ -211,33 +211,33 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - mioctrl@59810000 { + syscon@59810000 { compatible = "socionext,uniphier-sld8-mioctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x800>; - mio_clk: clock { + mio_clk: clock-controller { compatible = "socionext,uniphier-sld8-mio-clock"; #clock-cells = <1>; }; - mio_rst: reset { + mio_rst: reset-controller { compatible = "socionext,uniphier-sld8-mio-reset"; #reset-cells = <1>; }; }; - perictrl@59820000 { + syscon@59820000 { compatible = "socionext,uniphier-sld8-perictrl", "simple-mfd", "syscon"; reg = <0x59820000 0x200>; - peri_clk: clock { + peri_clk: clock-controller { compatible = "socionext,uniphier-sld8-peri-clock"; #clock-cells = <1>; }; - peri_rst: reset { + peri_rst: reset-controller { compatible = "socionext,uniphier-sld8-peri-reset"; #reset-cells = <1>; }; @@ -338,7 +338,7 @@ usb2: usb@5a820100 { has-transaction-translator; }; - soc-glue@5f800000 { + syscon@5f800000 { compatible = "socionext,uniphier-sld8-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -348,7 +348,7 @@ pinctrl: pinctrl { }; }; - soc-glue@5f900000 { + syscon@5f900000 { compatible = "socionext,uniphier-sld8-soc-glue-debug", "simple-mfd"; #address-cells = <1>; @@ -397,17 +397,17 @@ aidet: interrupt-controller@61830000 { #interrupt-cells = <2>; }; - sysctrl@61840000 { + syscon@61840000 { compatible = "socionext,uniphier-sld8-sysctrl", "simple-mfd", "syscon"; reg = <0x61840000 0x10000>; - sys_clk: clock { + sys_clk: clock-controller { compatible = "socionext,uniphier-sld8-clock"; #clock-cells = <1>; }; - sys_rst: reset { + sys_rst: reset-controller { compatible = "socionext,uniphier-sld8-reset"; #reset-cells = <1>; }; From patchwork Tue Feb 7 02:35:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 53598 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2602589wrn; Mon, 6 Feb 2023 18:37:02 -0800 (PST) X-Google-Smtp-Source: AK7set+fjMXHdadlo7LRgjncQAiMSnkwLJdXKmQmZK/NF0Y277ZW4xS+IW30ZHbVoREE35fllD93 X-Received: by 2002:a17:906:d28e:b0:878:7449:429f with SMTP id ay14-20020a170906d28e00b008787449429fmr1640493ejb.16.1675737422523; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id by12-20020a0564021b0c00b004aa9f524da2si9831331edb.2.2023.02.06.18.36.38; Mon, 06 Feb 2023 18:37:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229727AbjBGCf2 (ORCPT + 99 others); Mon, 6 Feb 2023 21:35:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229640AbjBGCfW (ORCPT ); Mon, 6 Feb 2023 21:35:22 -0500 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 42F9D34020; Mon, 6 Feb 2023 18:35:21 -0800 (PST) Received: from unknown (HELO kinkan2-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 07 Feb 2023 11:35:20 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan2-ex.css.socionext.com (Postfix) with ESMTP id ABBF62020780; Tue, 7 Feb 2023 11:35:20 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 7 Feb 2023 11:35:31 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id EBDDCA6B9C; Tue, 7 Feb 2023 11:35:19 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 2/8] ARM: dts: uniphier: Add missing reg properties for glue layer Date: Tue, 7 Feb 2023 11:35:08 +0900 Message-Id: <20230207023514.29783-3-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> References: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757138043503267294?= X-GMAIL-MSGID: =?utf-8?q?1757138043503267294?= The nodes for glue layers should include "reg" property. Add the property according to the DT schema. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-ld4.dtsi | 1 + arch/arm/boot/dts/uniphier-pro4.dtsi | 5 +++++ arch/arm/boot/dts/uniphier-pro5.dtsi | 3 +++ arch/arm/boot/dts/uniphier-pxs2.dtsi | 4 ++++ arch/arm/boot/dts/uniphier-sld8.dtsi | 1 + 5 files changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi index 06b9571345a2..da2e3e0ffafd 100644 --- a/arch/arm/boot/dts/uniphier-ld4.dtsi +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi @@ -347,6 +347,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-ld4-soc-glue-debug", "simple-mfd"; + reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x5f900000 0x2000>; diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index 064f98b61525..048f4606fbae 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -421,6 +421,7 @@ sg_clk: clock-controller { syscon@5f900000 { compatible = "socionext,uniphier-pro4-soc-glue-debug", "simple-mfd"; + reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x5f900000 0x2000>; @@ -535,6 +536,7 @@ ahci0: sata@65600000 { sata-controller@65700000 { compatible = "socionext,uniphier-pxs2-ahci-glue", "simple-mfd"; + reg = <0x65700000 0x100>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65700000 0x100>; @@ -581,6 +583,7 @@ ahci1: sata@65800000 { sata-controller@65900000 { compatible = "socionext,uniphier-pro4-ahci-glue", "simple-mfd"; + reg = <0x65900000 0x100>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65900000 0x100>; @@ -629,6 +632,7 @@ usb0: usb@65a00000 { usb-controller@65b00000 { compatible = "socionext,uniphier-pro4-dwc3-glue", "simple-mfd"; + reg = <0x65b00000 0x100>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65b00000 0x100>; @@ -683,6 +687,7 @@ usb1: usb@65c00000 { usb-controller@65d00000 { compatible = "socionext,uniphier-pro4-dwc3-glue", "simple-mfd"; + reg = <0x65d00000 0x100>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65d00000 0x100>; diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi index 2af4fa19bf14..f4c87a100095 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -386,6 +386,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-pro5-soc-glue-debug", "simple-mfd"; + reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x5f900000 0x2000>; @@ -489,6 +490,7 @@ usb0: usb@65a00000 { usb-controller@65b00000 { compatible = "socionext,uniphier-pro5-dwc3-glue", "simple-mfd"; + reg = <0x65b00000 0x400>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65b00000 0x400>; @@ -553,6 +555,7 @@ usb1: usb@65c00000 { usb-controller@65d00000 { compatible = "socionext,uniphier-pro5-dwc3-glue", "simple-mfd"; + reg = <0x65d00000 0x400>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65d00000 0x400>; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 050e9b7c83f1..1442320747ec 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -501,6 +501,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-pxs2-soc-glue-debug", "simple-mfd"; + reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x5f900000 0x2000>; @@ -614,6 +615,7 @@ ahci: sata@65600000 { sata-controller@65700000 { compatible = "socionext,uniphier-pxs2-ahci-glue", "simple-mfd"; + reg = <0x65700000 0x100>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65700000 0x100>; @@ -658,6 +660,7 @@ usb0: usb@65a00000 { usb-controller@65b00000 { compatible = "socionext,uniphier-pxs2-dwc3-glue", "simple-mfd"; + reg = <0x65b00000 0x400>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65b00000 0x400>; @@ -753,6 +756,7 @@ usb1: usb@65c00000 { usb-controller@65d00000 { compatible = "socionext,uniphier-pxs2-dwc3-glue", "simple-mfd"; + reg = <0x65d00000 0x400>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65d00000 0x400>; diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi index b4453f9fe981..c79c9bfef3ec 100644 --- a/arch/arm/boot/dts/uniphier-sld8.dtsi +++ b/arch/arm/boot/dts/uniphier-sld8.dtsi @@ -351,6 +351,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-sld8-soc-glue-debug", "simple-mfd"; + reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x5f900000 0x2000>; From patchwork Tue Feb 7 02:35:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 53603 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2603235wrn; Mon, 6 Feb 2023 18:38:51 -0800 (PST) X-Google-Smtp-Source: AK7set/Lt3gxJF9+Ats13szZYzzFWp6ukMoYIx9LBFvM0FWPQW7Hs/DqMjbv2zhrwG8aw9Hj2/l0 X-Received: by 2002:a17:907:2495:b0:878:7eb7:3488 with SMTP id zg21-20020a170907249500b008787eb73488mr1606326ejb.21.1675737531510; Mon, 06 Feb 2023 18:38:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675737531; cv=none; d=google.com; s=arc-20160816; b=lMGd6ksf5rRXaDLVlgYLXL7AeANLdX2ep8orGIKIg/lWKpYp+BNYtt4Ao4aTlLzLd3 8Vrya33L+vrxV/tSjlUhzU3CxRaKH9Qs8vN2NfbndCEV8onTRndcpFrDa+ACmPKQ/Vsh +zE8osyLOMH7+LN/9weLPsgUCvGmF05EVwtGkZHCwxHu4Rm0bKSft7B5XTkVi4SIzaej pgDPGy9aow8cx1p92lWDFdGbgbCtN6JATBfBQwUOXKech0aizmsVMP8m88bzqTQa6nTo QIE3sOIrkm5R22BEaDQYKBztdiDz9Mwb9Jzm+Y82sdkoPrdG1Oebnefy/o74UW6ZS4Lx U9EQ== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e14-20020a056402088e00b004596d6e78e3si11506315edy.144.2023.02.06.18.38.28; Mon, 06 Feb 2023 18:38:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230025AbjBGCfg (ORCPT + 99 others); Mon, 6 Feb 2023 21:35:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229698AbjBGCfY (ORCPT ); Mon, 6 Feb 2023 21:35:24 -0500 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id A713B144BD; Mon, 6 Feb 2023 18:35:22 -0800 (PST) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 07 Feb 2023 11:35:20 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id D78512058B4F; Tue, 7 Feb 2023 11:35:20 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 7 Feb 2023 11:35:14 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 279CCA8556; Tue, 7 Feb 2023 11:35:20 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 3/8] ARM: dts: uniphier: Add syscon compatible string to soc-glue-debug Date: Tue, 7 Feb 2023 11:35:09 +0900 Message-Id: <20230207023514.29783-4-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> References: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757138158002208954?= X-GMAIL-MSGID: =?utf-8?q?1757138158002208954?= Add "syscon" compatible string to the nodes for soc-glue-debug according to the DT schema. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-ld4.dtsi | 2 +- arch/arm/boot/dts/uniphier-pro4.dtsi | 2 +- arch/arm/boot/dts/uniphier-pro5.dtsi | 2 +- arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 +- arch/arm/boot/dts/uniphier-sld8.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi index da2e3e0ffafd..df2de7a40211 100644 --- a/arch/arm/boot/dts/uniphier-ld4.dtsi +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi @@ -346,7 +346,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-ld4-soc-glue-debug", - "simple-mfd"; + "simple-mfd", "syscon"; reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index 048f4606fbae..c28071a08e3a 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -420,7 +420,7 @@ sg_clk: clock-controller { syscon@5f900000 { compatible = "socionext,uniphier-pro4-soc-glue-debug", - "simple-mfd"; + "simple-mfd", "syscon"; reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi index f4c87a100095..a2000cfe9272 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -385,7 +385,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-pro5-soc-glue-debug", - "simple-mfd"; + "simple-mfd", "syscon"; reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 1442320747ec..55a298552bec 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -500,7 +500,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-pxs2-soc-glue-debug", - "simple-mfd"; + "simple-mfd", "syscon"; reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi index c79c9bfef3ec..27aa55bb7f32 100644 --- a/arch/arm/boot/dts/uniphier-sld8.dtsi +++ b/arch/arm/boot/dts/uniphier-sld8.dtsi @@ -350,7 +350,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-sld8-soc-glue-debug", - "simple-mfd"; + "simple-mfd", "syscon"; reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; From patchwork Tue Feb 7 02:35:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 53600 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2602680wrn; Mon, 6 Feb 2023 18:37:15 -0800 (PST) X-Google-Smtp-Source: AK7set+HmKw5Sdcv8OuhGkFXXqVgSny6FY9hZtdKFfSOI8ntb+3eYV3ArjH/nujarS+FJoZzOVAk X-Received: by 2002:a17:907:7211:b0:88d:ba89:184f with SMTP id dr17-20020a170907721100b0088dba89184fmr21373020ejc.32.1675737435216; Mon, 06 Feb 2023 18:37:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675737435; cv=none; d=google.com; s=arc-20160816; b=XBoXn8Vmf95ac/GktzGYJkPT5n2qqaW7ucPIVnVKBJsVkN5t6i01MfwrAC+Flj+dSX vtM1umft1FRwENcqIaCFLpJDpQvAY+6H0fO6UQD+ntpeolHwyMxuHQ+KCk6e9h6kmlgs ziFcxNDY7AkYZP3KiMgNhsXTQ2Chhh5GRgXC7Q3y8HNM80pP/TTN7vK5E/usplu4C2Gy UAKfqqlvMcXbohuBGnjWkpAqHpYOnvt2KOiK91nUXO0L5zUUqZrdtOBvJBeuvXD2b12Q jV3jGNqgkh5txc4Vz9eahk7snMGtgGc5ep2/RwwSuUZCO2PGjF8iSmTS5TKSuhHbftiu qs9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=xM2XPdlq3l3nv5MNiTBZPhWX3JEu319GmU2AzBQljmE=; b=wGRBvL8+KPFkpS3YRPtaRZp3fUbGsUvL2UbPggqZjaurOVAZjIxGFtInjwuvo93ydc 61zXkkTd9Pc6MUSTabbVP9yUAEVWkPHKffr7Ewhz1yZifFLD+Dr1WwbY+79CPWbmGXLD V990FFr9zrS5/6Mo2gBlpQvimMQcajJjeLuW20ki3TygH28Q/fH2rGfzImUB9mOQIcqb kKuWbolG+i/IWBZ6Db0tWXkEJn/gkEN8JNLiMZmgnda/kvm4fn4YjHambUGxW1pHO7Pg mh1WHw+ibSJYLVr66x8M26RWT8t6gIGHIQgGx0lslbAeWDZZwaICnaDtu+PuQTThhGu4 Y2hg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id fp10-20020a1709069e0a00b0089094eae192si9962764ejc.765.2023.02.06.18.36.52; Mon, 06 Feb 2023 18:37:15 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229967AbjBGCfc (ORCPT + 99 others); Mon, 6 Feb 2023 21:35:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229517AbjBGCfX (ORCPT ); Mon, 6 Feb 2023 21:35:23 -0500 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7884B3430F; Mon, 6 Feb 2023 18:35:21 -0800 (PST) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 07 Feb 2023 11:35:20 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id AB8B42058B4F; Tue, 7 Feb 2023 11:35:20 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 7 Feb 2023 11:35:31 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 57A327368; Tue, 7 Feb 2023 11:35:20 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 4/8] ARM: dts: uniphier: Add syscon-uhs-mode to SD node Date: Tue, 7 Feb 2023 11:35:10 +0900 Message-Id: <20230207023514.29783-5-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> References: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757138057085870039?= X-GMAIL-MSGID: =?utf-8?q?1757138057085870039?= Add sociopnext,syscon-uhs-mode prpperty to the SD node to refer the handle of the control logic node. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pro4.dtsi | 3 ++- arch/arm/boot/dts/uniphier-pro5.dtsi | 3 ++- arch/arm/boot/dts/uniphier-pxs2.dtsi | 3 ++- arch/arm/boot/dts/uniphier-sld8.dtsi | 3 ++- 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index c28071a08e3a..ba55af30e904 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -241,7 +241,7 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - syscon@59810000 { + mioctrl: syscon@59810000 { compatible = "socionext,uniphier-pro4-mioctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x800>; @@ -307,6 +307,7 @@ sd: mmc@5a400000 { sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; + socionext,syscon-uhs-mode = <&mioctrl 0>; }; emmc: mmc@5a500000 { diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi index a2000cfe9272..2d8591cdddb8 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -341,7 +341,7 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - syscon@59810000 { + sdctrl: syscon@59810000 { compatible = "socionext,uniphier-pro5-sdctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x400>; @@ -699,6 +699,7 @@ sd: mmc@68800000 { sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; + socionext,syscon-uhs-mode = <&sdctrl 0>; }; }; }; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 55a298552bec..f97a57222101 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -422,7 +422,7 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - syscon@59810000 { + sdctrl: syscon@59810000 { compatible = "socionext,uniphier-pxs2-sdctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x400>; @@ -486,6 +486,7 @@ sd: mmc@5a400000 { sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; + socionext,syscon-uhs-mode = <&sdctrl 0>; }; soc_glue: syscon@5f800000 { diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi index 27aa55bb7f32..f876282760e9 100644 --- a/arch/arm/boot/dts/uniphier-sld8.dtsi +++ b/arch/arm/boot/dts/uniphier-sld8.dtsi @@ -211,7 +211,7 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - syscon@59810000 { + mioctrl: syscon@59810000 { compatible = "socionext,uniphier-sld8-mioctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x800>; @@ -276,6 +276,7 @@ sd: mmc@5a400000 { sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; + socionext,syscon-uhs-mode = <&mioctrl 0>; }; emmc: mmc@5a500000 { From patchwork Tue Feb 7 02:35:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 53604 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2603255wrn; Mon, 6 Feb 2023 18:38:54 -0800 (PST) X-Google-Smtp-Source: AK7set8joHCgJNNym/iRlfcKHNvaoPwd9PgZWY7CHVHKKIR1zYruHKlIC0mZyywF7wzunKf7X4ow X-Received: by 2002:a17:906:3159:b0:88f:a23e:6f0d with SMTP id e25-20020a170906315900b0088fa23e6f0dmr1740980eje.37.1675737534450; Mon, 06 Feb 2023 18:38:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675737534; cv=none; d=google.com; s=arc-20160816; b=c+KMUpZabeO5SOo1bYaKctSVrObmYTprLRnqxRBkwCd/EvDl0UcASYtpg80BQ4uhaJ zJdepnkab9TelVP+1xx3UBwJn7XX4Jmads0Xh03+ckPZiFUY2vFFF8C9MiuRGl0fFZg8 FsupIqHQhclvAEAGSdVjDiZF7vrQAdeP2O5HK6J2OID1A9PPuAl4/iCe6tajnNuNlzHm 866yv8NeRHkUSjU3Nfg57hZhBxg1FZ8coCZYwOvPZ+xlIV0Tum8ehSaT9ldQT6va5kXs Hii1GL1vYqKLpQ1vom8AvdI2/91cHrxbh8FhojLVAw84AVwBLPW5/WRGMFqB2ZosAFbg LRvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=XjN/Ft3PsN6F/kUhfmxECPxjV2Lus/OwtO1Thk8KmDA=; b=K3sz54hNqTqzz6joA0/PKrlQuJE5z57g7ipF3tkve2b7FXh36o6XpkOiwjnm5Wy1V1 kfHkfKTv1GS4yAJoHq3964oEn+MWiLisJ9Eh9m/RCrsBFiqQfpNwgbqp3ZTmlvUWl0gx bxjUpARxKixMSEplKPaiVy+dmixOSsAMcwLoaGWg29F2VB3FqZuN1FdUC2hDZzWGmA9E lG5nFn1cIwKMW+C/BezYq1h8m3pExj4xlf1tDqWvwxPiFdbmsFhr7ceQ5XjTVT9+jxFk fFziRh0GOmHmRAnxYWw21Tc121Ph/bQPrzJfKZivjzuZckdw5FXUjvvwhBhrj9O1hgO3 OXsg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h13-20020a17090791cd00b00870729e3e1asi13317583ejz.467.2023.02.06.18.38.31; Mon, 06 Feb 2023 18:38:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230045AbjBGCfm (ORCPT + 99 others); Mon, 6 Feb 2023 21:35:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35754 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229608AbjBGCf1 (ORCPT ); Mon, 6 Feb 2023 21:35:27 -0500 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4500034C1B; Mon, 6 Feb 2023 18:35:23 -0800 (PST) Received: from unknown (HELO kinkan2-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 07 Feb 2023 11:35:21 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan2-ex.css.socionext.com (Postfix) with ESMTP id 31FC12020780; Tue, 7 Feb 2023 11:35:21 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 7 Feb 2023 11:35:31 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 87232A8556; Tue, 7 Feb 2023 11:35:20 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 5/8] arm64: dts: uniphier: Align node names for SoC-dependent controller and PHYs with bindings Date: Tue, 7 Feb 2023 11:35:11 +0900 Message-Id: <20230207023514.29783-6-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> References: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757138160876207560?= X-GMAIL-MSGID: =?utf-8?q?1757138160876207560?= The node names for SoC-dependent controllers and PHYs should be generic ones according to the DT schemas. Signed-off-by: Kunihiko Hayashi --- .../boot/dts/socionext/uniphier-ld11.dtsi | 32 +++++++-------- .../boot/dts/socionext/uniphier-ld20.dtsi | 40 +++++++++---------- .../boot/dts/socionext/uniphier-pxs3.dtsi | 40 +++++++++---------- 3 files changed, 56 insertions(+), 56 deletions(-) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 1c76b4375b2e..148d9092572a 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -313,12 +313,12 @@ evea_hp: endpoint { }; }; - adamv@57920000 { + syscon@57920000 { compatible = "socionext,uniphier-ld11-adamv", "simple-mfd", "syscon"; reg = <0x57920000 0x1000>; - adamv_rst: reset { + adamv_rst: reset-controller { compatible = "socionext,uniphier-ld11-adamv-reset"; #reset-cells = <1>; }; @@ -417,28 +417,28 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - sdctrl@59810000 { + syscon@59810000 { compatible = "socionext,uniphier-ld11-sdctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x400>; - sd_rst: reset { + sd_rst: reset-controller { compatible = "socionext,uniphier-ld11-sd-reset"; #reset-cells = <1>; }; }; - perictrl@59820000 { + syscon@59820000 { compatible = "socionext,uniphier-ld11-perictrl", "simple-mfd", "syscon"; reg = <0x59820000 0x200>; - peri_clk: clock { + peri_clk: clock-controller { compatible = "socionext,uniphier-ld11-peri-clock"; #clock-cells = <1>; }; - peri_rst: reset { + peri_rst: reset-controller { compatible = "socionext,uniphier-ld11-peri-reset"; #reset-cells = <1>; }; @@ -511,24 +511,24 @@ usb2: usb@5a820100 { has-transaction-translator; }; - mioctrl@5b3e0000 { + syscon@5b3e0000 { compatible = "socionext,uniphier-ld11-mioctrl", "simple-mfd", "syscon"; reg = <0x5b3e0000 0x800>; - mio_clk: clock { + mio_clk: clock-controller { compatible = "socionext,uniphier-ld11-mio-clock"; #clock-cells = <1>; }; - mio_rst: reset { + mio_rst: reset-controller { compatible = "socionext,uniphier-ld11-mio-reset"; #reset-cells = <1>; resets = <&sys_rst 7>; }; }; - soc_glue: soc-glue@5f800000 { + soc_glue: syscon@5f800000 { compatible = "socionext,uniphier-ld11-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -537,7 +537,7 @@ pinctrl: pinctrl { compatible = "socionext,uniphier-ld11-pinctrl"; }; - usb-controller { + usb-hub { compatible = "socionext,uniphier-ld11-usb2-phy"; #address-cells = <1>; #size-cells = <0>; @@ -559,7 +559,7 @@ usb_phy2: phy@2 { }; }; - soc-glue@5f900000 { + syscon@5f900000 { compatible = "socionext,uniphier-ld11-soc-glue-debug", "simple-mfd"; #address-cells = <1>; @@ -601,17 +601,17 @@ gic: interrupt-controller@5fe00000 { interrupts = ; }; - sysctrl@61840000 { + syscon@61840000 { compatible = "socionext,uniphier-ld11-sysctrl", "simple-mfd", "syscon"; reg = <0x61840000 0x10000>; - sys_clk: clock { + sys_clk: clock-controller { compatible = "socionext,uniphier-ld11-clock"; #clock-cells = <1>; }; - sys_rst: reset { + sys_rst: reset-controller { compatible = "socionext,uniphier-ld11-reset"; #reset-cells = <1>; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 9308458f9611..c83265c9b520 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -444,12 +444,12 @@ evea_hp: endpoint { }; }; - adamv@57920000 { + syscon@57920000 { compatible = "socionext,uniphier-ld20-adamv", "simple-mfd", "syscon"; reg = <0x57920000 0x1000>; - adamv_rst: reset { + adamv_rst: reset-controller { compatible = "socionext,uniphier-ld20-adamv-reset"; #reset-cells = <1>; }; @@ -548,33 +548,33 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - sdctrl@59810000 { + syscon@59810000 { compatible = "socionext,uniphier-ld20-sdctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x400>; - sd_clk: clock { + sd_clk: clock-controller { compatible = "socionext,uniphier-ld20-sd-clock"; #clock-cells = <1>; }; - sd_rst: reset { + sd_rst: reset-controller { compatible = "socionext,uniphier-ld20-sd-reset"; #reset-cells = <1>; }; }; - perictrl@59820000 { + syscon@59820000 { compatible = "socionext,uniphier-ld20-perictrl", "simple-mfd", "syscon"; reg = <0x59820000 0x200>; - peri_clk: clock { + peri_clk: clock-controller { compatible = "socionext,uniphier-ld20-peri-clock"; #clock-cells = <1>; }; - peri_rst: reset { + peri_rst: reset-controller { compatible = "socionext,uniphier-ld20-peri-reset"; #reset-cells = <1>; }; @@ -613,7 +613,7 @@ sd: mmc@5a400000 { cap-sd-highspeed; }; - soc_glue: soc-glue@5f800000 { + soc_glue: syscon@5f800000 { compatible = "socionext,uniphier-ld20-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -623,7 +623,7 @@ pinctrl: pinctrl { }; }; - soc-glue@5f900000 { + syscon@5f900000 { compatible = "socionext,uniphier-ld20-soc-glue-debug", "simple-mfd"; #address-cells = <1>; @@ -709,17 +709,17 @@ gic: interrupt-controller@5fe00000 { interrupts = ; }; - sysctrl@61840000 { + syscon@61840000 { compatible = "socionext,uniphier-ld20-sysctrl", "simple-mfd", "syscon"; reg = <0x61840000 0x10000>; - sys_clk: clock { + sys_clk: clock-controller { compatible = "socionext,uniphier-ld20-clock"; #clock-cells = <1>; }; - sys_rst: reset { + sys_rst: reset-controller { compatible = "socionext,uniphier-ld20-reset"; #reset-cells = <1>; }; @@ -782,7 +782,7 @@ usb-controller@65b00000 { #size-cells = <1>; ranges = <0 0x65b00000 0x400>; - usb_rst: reset@0 { + usb_rst: reset-controller@0 { compatible = "socionext,uniphier-ld20-usb3-reset"; reg = <0x0 0x4>; #reset-cells = <1>; @@ -828,7 +828,7 @@ usb_vbus3: regulator@130 { resets = <&sys_rst 14>; }; - usb_hsphy0: hs-phy@200 { + usb_hsphy0: phy@200 { compatible = "socionext,uniphier-ld20-usb3-hsphy"; reg = <0x200 0x10>; #phy-cells = <0>; @@ -842,7 +842,7 @@ usb_hsphy0: hs-phy@200 { <&usb_hs_i0>; }; - usb_hsphy1: hs-phy@210 { + usb_hsphy1: phy@210 { compatible = "socionext,uniphier-ld20-usb3-hsphy"; reg = <0x210 0x10>; #phy-cells = <0>; @@ -856,7 +856,7 @@ usb_hsphy1: hs-phy@210 { <&usb_hs_i0>; }; - usb_hsphy2: hs-phy@220 { + usb_hsphy2: phy@220 { compatible = "socionext,uniphier-ld20-usb3-hsphy"; reg = <0x220 0x10>; #phy-cells = <0>; @@ -870,7 +870,7 @@ usb_hsphy2: hs-phy@220 { <&usb_hs_i2>; }; - usb_hsphy3: hs-phy@230 { + usb_hsphy3: phy@230 { compatible = "socionext,uniphier-ld20-usb3-hsphy"; reg = <0x230 0x10>; #phy-cells = <0>; @@ -884,7 +884,7 @@ usb_hsphy3: hs-phy@230 { <&usb_hs_i2>; }; - usb_ssphy0: ss-phy@300 { + usb_ssphy0: phy@300 { compatible = "socionext,uniphier-ld20-usb3-ssphy"; reg = <0x300 0x10>; #phy-cells = <0>; @@ -895,7 +895,7 @@ usb_ssphy0: ss-phy@300 { vbus-supply = <&usb_vbus0>; }; - usb_ssphy1: ss-phy@310 { + usb_ssphy1: phy@310 { compatible = "socionext,uniphier-ld20-usb3-ssphy"; reg = <0x310 0x10>; #phy-cells = <0>; diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index b0c29510a7da..dd60cc04d6fb 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -370,33 +370,33 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - sdctrl@59810000 { + syscon@59810000 { compatible = "socionext,uniphier-pxs3-sdctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x400>; - sd_clk: clock { + sd_clk: clock-controller { compatible = "socionext,uniphier-pxs3-sd-clock"; #clock-cells = <1>; }; - sd_rst: reset { + sd_rst: reset-controller { compatible = "socionext,uniphier-pxs3-sd-reset"; #reset-cells = <1>; }; }; - perictrl@59820000 { + syscon@59820000 { compatible = "socionext,uniphier-pxs3-perictrl", "simple-mfd", "syscon"; reg = <0x59820000 0x200>; - peri_clk: clock { + peri_clk: clock-controller { compatible = "socionext,uniphier-pxs3-peri-clock"; #clock-cells = <1>; }; - peri_rst: reset { + peri_rst: reset-controller { compatible = "socionext,uniphier-pxs3-peri-reset"; #reset-cells = <1>; }; @@ -439,7 +439,7 @@ sd: mmc@5a400000 { sd-uhs-sdr50; }; - soc_glue: soc-glue@5f800000 { + soc_glue: syscon@5f800000 { compatible = "socionext,uniphier-pxs3-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -449,7 +449,7 @@ pinctrl: pinctrl { }; }; - soc-glue@5f900000 { + syscon@5f900000 { compatible = "socionext,uniphier-pxs3-soc-glue-debug", "simple-mfd"; #address-cells = <1>; @@ -535,17 +535,17 @@ gic: interrupt-controller@5fe00000 { interrupts = ; }; - sysctrl@61840000 { + syscon@61840000 { compatible = "socionext,uniphier-pxs3-sysctrl", "simple-mfd", "syscon"; reg = <0x61840000 0x10000>; - sys_clk: clock { + sys_clk: clock-controller { compatible = "socionext,uniphier-pxs3-clock"; #clock-cells = <1>; }; - sys_rst: reset { + sys_rst: reset-controller { compatible = "socionext,uniphier-pxs3-reset"; #reset-cells = <1>; }; @@ -707,7 +707,7 @@ usb-controller@65b00000 { #size-cells = <1>; ranges = <0 0x65b00000 0x400>; - usb0_rst: reset@0 { + usb0_rst: reset-controller@0 { compatible = "socionext,uniphier-pxs3-usb3-reset"; reg = <0x0 0x4>; #reset-cells = <1>; @@ -735,7 +735,7 @@ usb0_vbus1: regulator@110 { resets = <&sys_rst 12>; }; - usb0_hsphy0: hs-phy@200 { + usb0_hsphy0: phy@200 { compatible = "socionext,uniphier-pxs3-usb3-hsphy"; reg = <0x200 0x10>; #phy-cells = <0>; @@ -749,7 +749,7 @@ usb0_hsphy0: hs-phy@200 { <&usb_hs_i0>; }; - usb0_hsphy1: hs-phy@210 { + usb0_hsphy1: phy@210 { compatible = "socionext,uniphier-pxs3-usb3-hsphy"; reg = <0x210 0x10>; #phy-cells = <0>; @@ -763,7 +763,7 @@ usb0_hsphy1: hs-phy@210 { <&usb_hs_i0>; }; - usb0_ssphy0: ss-phy@300 { + usb0_ssphy0: phy@300 { compatible = "socionext,uniphier-pxs3-usb3-ssphy"; reg = <0x300 0x10>; #phy-cells = <0>; @@ -774,7 +774,7 @@ usb0_ssphy0: ss-phy@300 { vbus-supply = <&usb0_vbus0>; }; - usb0_ssphy1: ss-phy@310 { + usb0_ssphy1: phy@310 { compatible = "socionext,uniphier-pxs3-usb3-ssphy"; reg = <0x310 0x10>; #phy-cells = <0>; @@ -809,7 +809,7 @@ usb-controller@65d00000 { #size-cells = <1>; ranges = <0 0x65d00000 0x400>; - usb1_rst: reset@0 { + usb1_rst: reset-controller@0 { compatible = "socionext,uniphier-pxs3-usb3-reset"; reg = <0x0 0x4>; #reset-cells = <1>; @@ -837,7 +837,7 @@ usb1_vbus1: regulator@110 { resets = <&sys_rst 13>; }; - usb1_hsphy0: hs-phy@200 { + usb1_hsphy0: phy@200 { compatible = "socionext,uniphier-pxs3-usb3-hsphy"; reg = <0x200 0x10>; #phy-cells = <0>; @@ -852,7 +852,7 @@ usb1_hsphy0: hs-phy@200 { <&usb_hs_i2>; }; - usb1_hsphy1: hs-phy@210 { + usb1_hsphy1: phy@210 { compatible = "socionext,uniphier-pxs3-usb3-hsphy"; reg = <0x210 0x10>; #phy-cells = <0>; @@ -867,7 +867,7 @@ usb1_hsphy1: hs-phy@210 { <&usb_hs_i2>; }; - usb1_ssphy0: ss-phy@300 { + usb1_ssphy0: phy@300 { compatible = "socionext,uniphier-pxs3-usb3-ssphy"; reg = <0x300 0x10>; #phy-cells = <0>; From patchwork Tue Feb 7 02:35:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 53601 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2602873wrn; Mon, 6 Feb 2023 18:37:48 -0800 (PST) X-Google-Smtp-Source: AK7set9LmIzXkFe3HK4X7zlTyFOJw8xenuMRyOBIZrN/hqzUr+Te1OxNjN3uGDmQ8kHA7qygymBq X-Received: by 2002:a17:906:1182:b0:86f:e30c:72c1 with SMTP id n2-20020a170906118200b0086fe30c72c1mr1619512eja.8.1675737467844; Mon, 06 Feb 2023 18:37:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675737467; cv=none; d=google.com; s=arc-20160816; b=bqfCewzezgPWUZA6kB+5AvrxIU9xmp4mTYQhlr3AtDmQlO/m5h8MQFUXSIgzpKFeaP nfHP90dJTrxJRm/x7igu/xb2qr8tEgIDaKGgW9kJDCPGmdVXy2hF17WLXEFvMvpkWq8/ wxH8bLyBSnUeQdDoHkA/lA+mAumHQQrs3meX7E6yU8MwoRVwIFCiUk8ct58Y0ztl9F9i HQ/K+7jMBc+aKkpJTxapicDKMTPdo/FouoBLoJDGyIWz+fWoYqcyYIxPNihzNthQ5BJL YULRaxV6ZMZKM77Z3jmW1fZNUHjCM/cb4Zfk+t3zo8B7DMFiKT1Ef3/NxrH0vRd553cy jWxw== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id gk19-20020a17090790d300b0087760357eacsi14264131ejb.949.2023.02.06.18.37.25; Mon, 06 Feb 2023 18:37:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230016AbjBGCff (ORCPT + 99 others); Mon, 6 Feb 2023 21:35:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbjBGCfY (ORCPT ); Mon, 6 Feb 2023 21:35:24 -0500 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E37382BF2B; Mon, 6 Feb 2023 18:35:22 -0800 (PST) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 07 Feb 2023 11:35:21 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 3316F2058B4F; Tue, 7 Feb 2023 11:35:21 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 7 Feb 2023 11:35:31 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id B9E627368; Tue, 7 Feb 2023 11:35:20 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 6/8] arm64: dts: uniphier: Add missing reg properties for glue layer nodes Date: Tue, 7 Feb 2023 11:35:12 +0900 Message-Id: <20230207023514.29783-7-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> References: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757138090704739125?= X-GMAIL-MSGID: =?utf-8?q?1757138090704739125?= The nodes for some glue layers don't include necessary reg properties. Add the properties according to the DT schema. Signed-off-by: Kunihiko Hayashi --- arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 1 + arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++ arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 5 +++++ 3 files changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 148d9092572a..45004b0ae3eb 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -562,6 +562,7 @@ usb_phy2: phy@2 { syscon@5f900000 { compatible = "socionext,uniphier-ld11-soc-glue-debug", "simple-mfd"; + reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x5f900000 0x2000>; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index c83265c9b520..d70929b26a2a 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -626,6 +626,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-ld20-soc-glue-debug", "simple-mfd"; + reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x5f900000 0x2000>; @@ -778,6 +779,7 @@ usb: usb@65a00000 { usb-controller@65b00000 { compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd"; + reg = <0x65b00000 0x400>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65b00000 0x400>; diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index dd60cc04d6fb..4d200fec23fe 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -452,6 +452,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-pxs3-soc-glue-debug", "simple-mfd"; + reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x5f900000 0x2000>; @@ -619,6 +620,7 @@ ahci0: sata@65600000 { sata-controller@65700000 { compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd"; + reg = <0x65700000 0x100>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65700000 0x100>; @@ -659,6 +661,7 @@ ahci1: sata@65800000 { sata-controller@65900000 { compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd"; + reg = <0x65900000 0x100>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65900000 0x100>; @@ -703,6 +706,7 @@ usb0: usb@65a00000 { usb-controller@65b00000 { compatible = "socionext,uniphier-pxs3-dwc3-glue", "simple-mfd"; + reg = <0x65b00000 0x400>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65b00000 0x400>; @@ -805,6 +809,7 @@ usb1: usb@65c00000 { usb-controller@65d00000 { compatible = "socionext,uniphier-pxs3-dwc3-glue", "simple-mfd"; + reg = <0x65d00000 0x400>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x65d00000 0x400>; From patchwork Tue Feb 7 02:35:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 53602 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2603223wrn; Mon, 6 Feb 2023 18:38:49 -0800 (PST) X-Google-Smtp-Source: AK7set8W+HJ3I+ThudMgSE6jjk/dLOQx0lMpAuPHc4oxB976iRv8JyYf5SgWjWNIeB+VqzN26G5/ X-Received: by 2002:a17:907:96a2:b0:89f:1a76:e2dc with SMTP id hd34-20020a17090796a200b0089f1a76e2dcmr2436460ejc.0.1675737529392; Mon, 06 Feb 2023 18:38:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675737529; cv=none; d=google.com; s=arc-20160816; b=FUtzB0BpkSOXEz3EsJbtNM9z6z7lD7olJhX8Ro3SffhcHeKB4WGG3VtGAPjOLqFQF+ 4NU5TjZ77YlbmsBQ/1o5w8d7BgR63oZcMeVpP8sc4qRGR+4NZlmmPsbsKVdn7UaPNyWA UxlBFnXoGecSvQU1nAGZV2gf9IcEjlvVRtO7fmElj1if1SnxBwoz4ybnm0TZlpKaQPGr dH1AA0Tn1a2P+2aZWQESlhsXrcQjUW5DAlGlmU2NHVytB/wmBQbFOSFOIRRi5elaYH54 ZNdogVB0QRo+F7HrjMGEVB76s82DNcAcxCWDqtfxXoCqKfWALqmXZwkSjjujSkUEbkV+ hkbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Vq3GERq5wnpBYYqUgmKluv/Ds4xS0An0smV0j5Fpvx4=; b=DkR7YMsqmEaK2cXz5JjbuONPNli+Vtf28dwFwYgSz/TKHvfnnJ7eFcqbmiXpmszAlV EX0Xfm9CJtfYFKIFCj4O9NTKyMfa/VmbZAgBOPLO91m4hwKv6Ij63hPqNWe6AkzjQDKc dC1hj4d9Esm7Iwf0STQzvBRQajq9V2JINXz3WqAiU5Z7IW1tAjyhcwAEljvKP/vKi8Tp eRanys3xpq1eLVP5YCJmw8iD8FfWqgjEgVnF/gZk2OzdrfeD4gSlcc0Ksa+WI0TKUPt0 Ssger1VFiWW+RO7wc/nx12HpOq1USaMt4T39gkcp4XZYGBefU5+YIlopvn7vsz8ML4qL o3DQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h11-20020a170906530b00b0088b7b6e6ab4si16039171ejo.81.2023.02.06.18.38.26; Mon, 06 Feb 2023 18:38:49 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230034AbjBGCfj (ORCPT + 99 others); Mon, 6 Feb 2023 21:35:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229724AbjBGCfZ (ORCPT ); Mon, 6 Feb 2023 21:35:25 -0500 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6B88334C3C; Mon, 6 Feb 2023 18:35:24 -0800 (PST) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 07 Feb 2023 11:35:21 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 386FE2006E5A; Tue, 7 Feb 2023 11:35:21 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 7 Feb 2023 11:35:31 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id E9B6FA8556; Tue, 7 Feb 2023 11:35:20 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 7/8] arm64: dts: uniphier: Add syscon compatible string to soc-glue-debug Date: Tue, 7 Feb 2023 11:35:13 +0900 Message-Id: <20230207023514.29783-8-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> References: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757138155822463059?= X-GMAIL-MSGID: =?utf-8?q?1757138155822463059?= Add "syscon" compatible string to the nodes for soc-glue-debug according to the DT schema. Signed-off-by: Kunihiko Hayashi --- arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 2 +- arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 +- arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 45004b0ae3eb..7bb36b071475 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -561,7 +561,7 @@ usb_phy2: phy@2 { syscon@5f900000 { compatible = "socionext,uniphier-ld11-soc-glue-debug", - "simple-mfd"; + "simple-mfd", "syscon"; reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index d70929b26a2a..5dace1137cd1 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -625,7 +625,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-ld20-soc-glue-debug", - "simple-mfd"; + "simple-mfd", "syscon"; reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index 4d200fec23fe..f62e3048d4dc 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -451,7 +451,7 @@ pinctrl: pinctrl { syscon@5f900000 { compatible = "socionext,uniphier-pxs3-soc-glue-debug", - "simple-mfd"; + "simple-mfd", "syscon"; reg = <0x5f900000 0x2000>; #address-cells = <1>; #size-cells = <1>; From patchwork Tue Feb 7 02:35:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 53605 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2603626wrn; Mon, 6 Feb 2023 18:40:08 -0800 (PST) X-Google-Smtp-Source: AK7set9pj3Ho8g3qwsrqpeNhpS1SEvBqMhIH7mmFVseda2FJ7FWKQPJPubYaJH7bUFDbuKJkx98L X-Received: by 2002:a17:907:1c18:b0:878:481c:c49b with SMTP id nc24-20020a1709071c1800b00878481cc49bmr2127187ejc.1.1675737608166; Mon, 06 Feb 2023 18:40:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675737608; cv=none; d=google.com; s=arc-20160816; b=ogsw8uyp46QhZNF7JQ/ZN4iZVRsjgKb1pC/TuDbyidqX04dzPNZbrrIGa9xbAiDI58 NA+UMqIFnyUGYtQjzpr/C+E0XSi7g2B17ip3ZMxj2yzuv4bROAf9aUh4aqqJFp72KFJn 3MX1WxgKf/6unZa0zlNNES0ybS0T+MH9sENwH+XGmy1OThgYVrHsjVwJ/4H0pUafMp4t Mt51eGIHeNUufPfw5cRb9O55bqTCL80kHwk7E89HgBQ0bl47CyoqeVNmkWHTTeqIwU2j i7ppS4hWDY+dIcQKxztSSvGKC5PpaU0xGER4L2oHuccDWYm+JAs/oddQ9LzF7RKuKSJi 8Dtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=mYeb7ZD1EoiqVhF8mOJL9J44Jc8uC3K3ak9TnYJl81U=; b=OzYCQKOQXfRZoTWSu4mggJMoB7jjAW7LU4sl0Ysda7CZGlYLrLU6HIHne1/drXLsX+ oUgX37F7ndGYSPW6iKFr+AXWkRwbBsqHNF7Qf+M5Xj5SMmvUi23vM5gNK6EaabNmd/Sx 5m+V4FNZO3MYcT3HG6MQXk7xEjRjbMYXu1GKBp22BMMtNX4OxPx5iZmTE3UGoKD1K1sv yW+d5+fEVHQ+9rio1GlESXgyo3aR2NlfRrCWD2WW9Wf5JxSWRPHjgAK911J6TFh5l0Ho /afG8C4TX5d7Nc3dM1WCat865G0Co6n+5UpTbv0b4BxPSHJu42Y8q44EQrbMvVjRDN5O yxYg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r5-20020a170906a20500b008784bf181ebsi15667141ejy.147.2023.02.06.18.39.45; Mon, 06 Feb 2023 18:40:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230064AbjBGCfo (ORCPT + 99 others); Mon, 6 Feb 2023 21:35:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35754 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229872AbjBGCf1 (ORCPT ); Mon, 6 Feb 2023 21:35:27 -0500 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E7E2E360B3; Mon, 6 Feb 2023 18:35:25 -0800 (PST) Received: from unknown (HELO kinkan2-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 07 Feb 2023 11:35:21 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan2-ex.css.socionext.com (Postfix) with ESMTP id 613CC2020780; Tue, 7 Feb 2023 11:35:21 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 7 Feb 2023 11:35:14 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 2486F7368; Tue, 7 Feb 2023 11:35:21 +0900 (JST) From: Kunihiko Hayashi To: soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 8/8] arm64: dts: uniphier: Add syscon-uhs-mode to SD node Date: Tue, 7 Feb 2023 11:35:14 +0900 Message-Id: <20230207023514.29783-9-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> References: <20230207023514.29783-1-hayashi.kunihiko@socionext.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757138237922982297?= X-GMAIL-MSGID: =?utf-8?q?1757138237922982297?= Add sociopnext,syscon-uhs-mode prpperty to the SD node to refer the handle of the control logic node. Signed-off-by: Kunihiko Hayashi --- arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 3 ++- arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 5dace1137cd1..4e2171630272 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -548,7 +548,7 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - syscon@59810000 { + sdctrl: syscon@59810000 { compatible = "socionext,uniphier-ld20-sdctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x400>; @@ -611,6 +611,7 @@ sd: mmc@5a400000 { resets = <&sd_rst 0>; bus-width = <4>; cap-sd-highspeed; + socionext,syscon-uhs-mode = <&sdctrl 0>; }; soc_glue: syscon@5f800000 { diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index f62e3048d4dc..38ccfb46ea42 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -370,7 +370,7 @@ smpctrl@59801000 { reg = <0x59801000 0x400>; }; - syscon@59810000 { + sdctrl: syscon@59810000 { compatible = "socionext,uniphier-pxs3-sdctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x400>; @@ -437,6 +437,7 @@ sd: mmc@5a400000 { sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; + socionext,syscon-uhs-mode = <&sdctrl 0>; }; soc_glue: syscon@5f800000 {