From patchwork Fri Feb 3 08:19:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 52406 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp710983wrn; Fri, 3 Feb 2023 00:22:43 -0800 (PST) X-Google-Smtp-Source: AK7set9ulKp+rOKp1uZDcS+bLsSt1/LpCsRLDWXnGWmX7/h/wFQ8VqyyY2yrtTQU6vluRShpRGhT X-Received: by 2002:a17:906:8da:b0:87b:db53:3829 with SMTP id o26-20020a17090608da00b0087bdb533829mr9355819eje.46.1675412563730; Fri, 03 Feb 2023 00:22:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675412563; cv=none; d=google.com; s=arc-20160816; b=LJuANDQg1OTK0mSZgYCkBx98uqPggCXfzNCGgkrjswOOG3XcD1mgSnUVh5c1AkzZCl 3xUrFOH20feGqP8DsGHm9qz7uaPuDTSXh2aq8283hysCqTHjSc7fC22lPC5CV7JnuK5F SI4yvQgzlfzyvrjcnJ+YKIDgtbLWYeYkuRbiBxuQQcPS1m8o90f7+EDG7OKgBx7M+Fes 0rUXtiNje11hKcdIMdaZ4gpw71XFHJwBjz5sA+pi/oIxTnkOC86cmrhOGeZw0qAApNkd aI1eXM9Jcb2yVFk/TgmqcBCeZBh38koWhKjckd/QYZF2Rtnrg07s5wUy5Jrrv2UxQDfp Elcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=QqPxXR4JAtigXeDLTXgFP3FDXh7pDb0YhsVIHnjRATA=; b=FZ8QbAHQOj2K9YKp/x93XU6uItDEIhTnvUqQ2X3S+nzUsnXzKRYES8dgjLywTNiqek QhXJIeHQ/wgjFGxM6OrX9Iovu93MWGLoier0Y3cIFg28PmUPbc3l8xGdIobaw9Ag8RAd MBq3uUG9LuOOxXTstyxyjh4k7sWL14wtoJePugIi3QiAugM7YDt4CCFZEMMTzLX4b9sG 96T66p2kNXGRoPfNp8kw0TUbOs/0J8ZaAVqUdzY8K5dUqEtzISxFoM3X2WnnFh2d4ZbC lqg8ypnQ2YiCV0NQXgUcSfgbOl9crRqNzxyLVTxqC6IwLvUElB3Pk2MQkqpgUbFlwMZl 5sKw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h22-20020a17090791d600b008888f4120basi2164601ejz.688.2023.02.03.00.22.20; Fri, 03 Feb 2023 00:22:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232822AbjBCIVc convert rfc822-to-8bit (ORCPT + 99 others); Fri, 3 Feb 2023 03:21:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232600AbjBCIVJ (ORCPT ); Fri, 3 Feb 2023 03:21:09 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D52A22822D; Fri, 3 Feb 2023 00:19:40 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 86E4024E1D4; Fri, 3 Feb 2023 16:19:15 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 3 Feb 2023 16:19:15 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 3 Feb 2023 16:19:14 +0800 From: William Qiu To: , , CC: Rob Herring , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , William Qiu , Subject: [PATCH v3 1/3] dt-bindings: mmc: Add StarFive MMC module Date: Fri, 3 Feb 2023 16:19:11 +0800 Message-ID: <20230203081913.81968-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203081913.81968-1-william.qiu@starfivetech.com> References: <20230203081913.81968-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H2, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756797404245140824?= X-GMAIL-MSGID: =?utf-8?q?1756797404245140824?= Add documentation to describe StarFive designware mobile storage host controller driver. Signed-off-by: William Qiu Reviewed-by: Krzysztof Kozlowski --- .../bindings/mmc/starfive,jh7110-mmc.yaml | 77 +++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml diff --git a/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml b/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml new file mode 100644 index 000000000000..deacf8e9cfb2 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/starfive,jh7110-mmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive Designware Mobile Storage Host Controller + +description: + StarFive uses the Synopsys designware mobile storage host controller + to interface a SoC with storage medium such as eMMC or SD/MMC cards. + +allOf: + - $ref: synopsys-dw-mshc-common.yaml# + +maintainers: + - William Qiu + +properties: + compatible: + const: starfive,jh7110-mmc + + reg: + maxItems: 1 + + clocks: + items: + - description: biu clock + - description: ciu clock + + clock-names: + items: + - const: biu + - const: ciu + + interrupts: + maxItems: 1 + + starfive,sysreg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to System Register Controller syscon node + - description: offset of SYS_SYSCONSAIF__SYSCFG register for MMC controller + - description: shift of SYS_SYSCONSAIF__SYSCFG register for MMC controller + - description: mask of SYS_SYSCONSAIF__SYSCFG register for MMC controller + description: + Should be four parameters, the phandle to System Register Controller + syscon node and the offset/shift/mask of SYS_SYSCONSAIF__SYSCFG register + for MMC controller. + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - starfive,sysreg + +unevaluatedProperties: false + +examples: + - | + mmc@16010000 { + compatible = "starfive,jh7110-mmc"; + reg = <0x16010000 0x10000>; + clocks = <&syscrg 91>, + <&syscrg 93>; + clock-names = "biu","ciu"; + resets = <&syscrg 64>; + reset-names = "reset"; + interrupts = <74>; + fifo-depth = <32>; + fifo-watermark-aligned; + data-addr = <0>; + starfive,sysreg = <&sysreg 0x14 0x1a 0x7c000000>; + }; From patchwork Fri Feb 3 08:19:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 52408 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp711127wrn; Fri, 3 Feb 2023 00:23:09 -0800 (PST) X-Google-Smtp-Source: AK7set/T67gQ+cdfUw/RWZWz3ZLHsMjHGvp2S+QVGLHEYkkBfwT4EeXkcoLV06t6x235LpnXph4U X-Received: by 2002:a17:906:c30b:b0:878:7cf3:a9e7 with SMTP id s11-20020a170906c30b00b008787cf3a9e7mr9739488ejz.65.1675412589342; Fri, 03 Feb 2023 00:23:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675412589; cv=none; d=google.com; s=arc-20160816; b=lXs5VOlix2ij30Lu1OI2rJGFR1kRKmqaMOaPOLPxNCi6jMwX42Svt8hYejPXpgQC5+ z5WjwzfVM8KNt/IP4jgSMV+8YKX/s1qQvPSwAMGbhMTSQRuzMeagYrZKSdn6Bs44ZOA8 NySQFQez9/n0B3yjP3vA7FaYNIdLRIvxFHC4ecUeEtfITti6ikhsB5GSBoti05XqPFS8 C+aHFArZnMOLg/sIfNwPDeQd492jHO9Z79h6MKlw9oLCL0TLRUO/6ZzdGX02Fxn6Gc8V WoBmvUS6SWYwzvmF9wev1qckkveLFOyQUz3q3V1zdoBrMdejFNOS9nms8hNGGSNI5Z9F snig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=6VTNCDtBpUuGrvI45x9dRCR1u4YlPmKByy/47CPhsBc=; b=lMAqUjZ1XvnmETCiM59NqItgugAel/KzuczmgiJVhb59ofFSxXgg8GiG6gUJCYnknY mp7j2Z8mlgDPWlT/WrELK+oYcLHq8FRha4SgbtS8rO5JieWyNSPaU7yLONuEeGYH2bDd nZ5IQvAyT8y2m011oo/jdyms3GmOaYN4t/4zHylHN+fbU3M2DseyCzQDaKluZFHIytc3 sjcSFhN7gwdVMQjKsC20TLHR6NW7zwhsQ+7qmO6uW0oGPx7gisn6sd5ujJLPuzRs3Qi2 Z3L4XM548SB7h74Xw4FGC1+aG04vVKF3b32o4z0/Lz6SfutIjbJJ5H7LZUpF0SwlXPIO XRTQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id et10-20020a170907294a00b00889e8de7ce2si2282023ejc.787.2023.02.03.00.22.46; Fri, 03 Feb 2023 00:23:09 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233054AbjBCIVg convert rfc822-to-8bit (ORCPT + 99 others); Fri, 3 Feb 2023 03:21:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232000AbjBCIVL (ORCPT ); Fri, 3 Feb 2023 03:21:11 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16A3C6ACA0; Fri, 3 Feb 2023 00:19:43 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 254F524E289; Fri, 3 Feb 2023 16:19:16 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 3 Feb 2023 16:19:16 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 3 Feb 2023 16:19:15 +0800 From: William Qiu To: , , CC: Rob Herring , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , William Qiu , Subject: [PATCH v3 2/3] mmc: starfive: Add sdio/emmc driver support Date: Fri, 3 Feb 2023 16:19:12 +0800 Message-ID: <20230203081913.81968-3-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203081913.81968-1-william.qiu@starfivetech.com> References: <20230203081913.81968-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756797431356220257?= X-GMAIL-MSGID: =?utf-8?q?1756797431356220257?= Add sdio/emmc driver support for StarFive JH7110 soc. Tested-by: Conor Dooley Signed-off-by: William Qiu --- MAINTAINERS | 6 + drivers/mmc/host/Kconfig | 10 ++ drivers/mmc/host/Makefile | 1 + drivers/mmc/host/dw_mmc-starfive.c | 185 +++++++++++++++++++++++++++++ 4 files changed, 202 insertions(+) create mode 100644 drivers/mmc/host/dw_mmc-starfive.c diff --git a/MAINTAINERS b/MAINTAINERS index 85e8f83161d7..0ff348da6463 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19659,6 +19659,12 @@ F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml F: drivers/reset/starfive/reset-starfive-jh71* F: include/dt-bindings/reset/starfive?jh71*.h +STARFIVE JH7110 MMC/SD/SDIO DRIVER +M: William Qiu +S: Maintained +F: Documentation/devicetree/bindings/mmc/starfive* +F: drivers/mmc/dw_mmc-starfive.c + STATIC BRANCH/CALL M: Peter Zijlstra M: Josh Poimboeuf diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index fb1062a6394c..b87262503403 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -871,6 +871,16 @@ config MMC_DW_ROCKCHIP Synopsys DesignWare Memory Card Interface driver. Select this option for platforms based on RK3066, RK3188 and RK3288 SoC's. +config MMC_DW_STARFIVE + tristate "StarFive specific extensions for Synopsys DW Memory Card Interface" + depends on SOC_STARFIVE + depends on MMC_DW + select MMC_DW_PLTFM + help + This selects support for StarFive JH7110 SoC specific extensions to the + Synopsys DesignWare Memory Card Interface driver. Select this option + for platforms based on StarFive JH7110 SoC. + config MMC_SH_MMCIF tristate "SuperH Internal MMCIF support" depends on SUPERH || ARCH_RENESAS || COMPILE_TEST diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index 4e4ceb32c4b4..32c0e5564b9a 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_MMC_DW_HI3798CV200) += dw_mmc-hi3798cv200.o obj-$(CONFIG_MMC_DW_K3) += dw_mmc-k3.o obj-$(CONFIG_MMC_DW_PCI) += dw_mmc-pci.o obj-$(CONFIG_MMC_DW_ROCKCHIP) += dw_mmc-rockchip.o +obj-$(CONFIG_MMC_DW_STARFIVE) += dw_mmc-starfive.o obj-$(CONFIG_MMC_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o obj-$(CONFIG_MMC_VUB300) += vub300.o diff --git a/drivers/mmc/host/dw_mmc-starfive.c b/drivers/mmc/host/dw_mmc-starfive.c new file mode 100644 index 000000000000..e4d0bdb40d12 --- /dev/null +++ b/drivers/mmc/host/dw_mmc-starfive.c @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * StarFive Designware Mobile Storage Host Controller Driver + * + * Copyright (c) 2022 StarFive Technology Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "dw_mmc.h" +#include "dw_mmc-pltfm.h" + +#define ALL_INT_CLR 0x1ffff +#define MAX_DELAY_CHAIN 32 + +struct starfive_priv { + struct device *dev; + struct regmap *reg_syscon; + u32 syscon_offset; + u32 syscon_shift; + u32 syscon_mask; +}; + +static void dw_mci_starfive_set_ios(struct dw_mci *host, struct mmc_ios *ios) +{ + int ret; + unsigned int clock; + + if (ios->timing == MMC_TIMING_MMC_DDR52 || ios->timing == MMC_TIMING_UHS_DDR50) { + clock = (ios->clock > 50000000 && ios->clock <= 52000000) ? 100000000 : ios->clock; + ret = clk_set_rate(host->ciu_clk, clock); + if (ret) + dev_dbg(host->dev, "Use an external frequency divider %uHz\n", ios->clock); + host->bus_hz = clk_get_rate(host->ciu_clk); + } else { + dev_dbg(host->dev, "Using the internal divider\n"); + } +} + +static int dw_mci_starfive_execute_tuning(struct dw_mci_slot *slot, + u32 opcode) +{ + static const int grade = MAX_DELAY_CHAIN; + struct dw_mci *host = slot->host; + struct starfive_priv *priv = host->priv; + int rise_point = -1, fall_point = -1; + int err, prev_err; + int i; + bool found = 0; + u32 regval; + + /* Use grade as the max delay chain, and use the rise_point and + * fall_point to ensure the best sampling point of a data input + * signals. + */ + for (i = 0; i < grade; i++) { + regval = i << priv->syscon_shift; + err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, + priv->syscon_mask, regval); + if (err) + return err; + mci_writel(host, RINTSTS, ALL_INT_CLR); + + err = mmc_send_tuning(slot->mmc, opcode, NULL); + if (!err) + found = 1; + + if (i > 0) { + if (err && !prev_err) + fall_point = i - 1; + if (!err && prev_err) + rise_point = i; + } + + if (rise_point != -1 && fall_point != -1) + goto tuning_out; + + prev_err = err; + err = 0; + } + +tuning_out: + if (found) { + if (rise_point == -1) + rise_point = 0; + if (fall_point == -1) + fall_point = grade - 1; + if (fall_point < rise_point) { + if ((rise_point + fall_point) > + (grade - 1)) + i = fall_point / 2; + else + i = (rise_point + grade - 1) / 2; + } else { + i = (rise_point + fall_point) / 2; + } + + regval = i << priv->syscon_shift; + err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, + priv->syscon_mask, regval); + if (err) + return err; + mci_writel(host, RINTSTS, ALL_INT_CLR); + + dev_info(host->dev, "Found valid delay chain! use it [delay=%d]\n", i); + } else { + dev_err(host->dev, "No valid delay chain! use default\n"); + err = -EINVAL; + } + + mci_writel(host, RINTSTS, ALL_INT_CLR); + return err; +} + +static int dw_mci_starfive_parse_dt(struct dw_mci *host) +{ + struct of_phandle_args args; + struct starfive_priv *priv; + int ret; + + priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + ret = of_parse_phandle_with_fixed_args(host->dev->of_node, + "starfive,syscon", 3, 0, &args); + if (ret) { + dev_err(host->dev, "Failed to parse starfive,syscon\n"); + return -EINVAL; + } + + priv->reg_syscon = syscon_node_to_regmap(args.np); + of_node_put(args.np); + if (IS_ERR(priv->reg_syscon)) + return PTR_ERR(priv->reg_syscon); + + priv->syscon_offset = args.args[0]; + priv->syscon_shift = args.args[1]; + priv->syscon_mask = args.args[2]; + + host->priv = priv; + + return 0; +} + +static const struct dw_mci_drv_data starfive_data = { + .common_caps = MMC_CAP_CMD23, + .set_ios = dw_mci_starfive_set_ios, + .parse_dt = dw_mci_starfive_parse_dt, + .execute_tuning = dw_mci_starfive_execute_tuning, +}; + +static const struct of_device_id dw_mci_starfive_match[] = { + { .compatible = "starfive,jh7110-mmc", + .data = &starfive_data }, + {}, +}; +MODULE_DEVICE_TABLE(of, dw_mci_starfive_match); + +static int dw_mci_starfive_probe(struct platform_device *pdev) +{ + return dw_mci_pltfm_register(pdev, &starfive_data);; +} + +static struct platform_driver dw_mci_starfive_driver = { + .probe = dw_mci_starfive_probe, + .remove = dw_mci_pltfm_remove, + .driver = { + .name = "dwmmc_starfive", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = dw_mci_starfive_match, + }, +}; +module_platform_driver(dw_mci_starfive_driver); + +MODULE_DESCRIPTION("StarFive JH7110 Specific DW-MSHC Driver Extension"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:dwmmc_starfive"); From patchwork Fri Feb 3 08:19:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 52407 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp711063wrn; Fri, 3 Feb 2023 00:22:55 -0800 (PST) X-Google-Smtp-Source: AK7set+HAv3ivRdqC/rE/H06hBEkfVdklZB7zzOg0rS6j9azRgZ6H38Qurfep/HmQd6UpGgJCjcv X-Received: by 2002:a17:906:2ad4:b0:871:dd2:4af0 with SMTP id m20-20020a1709062ad400b008710dd24af0mr9411040eje.26.1675412575431; Fri, 03 Feb 2023 00:22:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675412575; cv=none; d=google.com; s=arc-20160816; b=kjSi4IJuazDZC0H+o9gZGIEryXtMiG9usW+52FUlxIPHvAbOG03igGHjcH99mK+Q+9 ynNPH9BQKRINYQAr9nPkwuI1mzMBLSI6cG/DTp9YvsJJ/dR8/bW1hhbEgB6e7BsAIb+M 2/47z1qJVVjeGAPSPEaifYarNYu4zpE6A12R6Z0PMH2rvgthI1cjDuAaTwyLPGm3j8fZ Gdwo/dSlxe16fN52yXOs32EywDz0VIT73mRNZmctUFULsCUa7qDW4ytnG7Ay4XyqdtTH p7Cw5rbJI6JwxOT1KH5EelqBqXtO4M1XHqR8T+foLzLc6umZ9R5aA4L873MW3yLHyTb/ QglQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=mYhwjNYDVkrdpeu4mWw6V339ORRL5bq+HhGy8dQ1hrk=; b=GjOoMcBPIJfueTaKiNkaqeebFwkIQYjkwO03VWHjj/cHY7doX6YMwNaSoi/un2DF8G 63+z+vuHZh3Mu+jL6wAxI/NuCtiUW/SwEE+7i4XbCGbWwHaztnhCo4IoO2CmXu37k2u7 lrzzpNBFQ/xyh8BE08p1pkl9w+mk/FfSohpo8omqSjxxuUbEobbE+SEOx+WLVq+n4d5h tNGLUj1+HOoWYlAif6XkDv+rbsY2AFLsABRy1d91+BgEys3TPcMOecHFRVzHclyskMBq 8bR3P/YTozdrNnb6WySSMmq2ZfSsWN1UO2k0WMFLjku1wuRjyLGVWc+B0tgklRdUeP8U kA3g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 15-20020a17090602cf00b0088b3b09e143si2790096ejk.593.2023.02.03.00.22.32; Fri, 03 Feb 2023 00:22:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232904AbjBCIVe convert rfc822-to-8bit (ORCPT + 99 others); Fri, 3 Feb 2023 03:21:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232749AbjBCIVK (ORCPT ); Fri, 3 Feb 2023 03:21:10 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 184DB6DB2E; Fri, 3 Feb 2023 00:19:43 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id B102024E28F; Fri, 3 Feb 2023 16:19:16 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 3 Feb 2023 16:19:16 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 3 Feb 2023 16:19:15 +0800 From: William Qiu To: , , CC: Rob Herring , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , William Qiu , Subject: [PATCH v3 3/3] riscv: dts: starfive: Add mmc node Date: Fri, 3 Feb 2023 16:19:13 +0800 Message-ID: <20230203081913.81968-4-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203081913.81968-1-william.qiu@starfivetech.com> References: <20230203081913.81968-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756797416575790424?= X-GMAIL-MSGID: =?utf-8?q?1756797416575790424?= This adds the mmc node for the StarFive JH7110 SoC. Set mmco node to emmc and set mmc1 node to sd. Signed-off-by: William Qiu --- .../jh7110-starfive-visionfive-2.dtsi | 23 ++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 37 +++++++++++++++++++ 2 files changed, 60 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index c60280b89c73..e1a0248e907f 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -42,6 +42,29 @@ &rtc_osc { clock-frequency = <32768>; }; +&mmc0 { + max-frequency = <100000000>; + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + cap-mmc-hw-reset; + post-power-on-delay-ms = <200>; + status = "okay"; +}; + +&mmc1 { + max-frequency = <100000000>; + bus-width = <4>; + no-sdio; + no-mmc; + broken-cd; + cap-sd-highspeed; + post-power-on-delay-ms = <200>; + status = "okay"; +}; + &gmac0_rmii_refin { clock-frequency = <50000000>; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 64d260ea1f29..ae1a664e7af5 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -370,6 +370,11 @@ syscrg: clock-controller@13020000 { #reset-cells = <1>; }; + sysreg: syscon@13030000 { + compatible = "starfive,sysreg", "syscon"; + reg = <0x0 0x13030000 0x0 0x1000>; + }; + gpio: gpio@13040000 { compatible = "starfive,jh7110-sys-pinctrl"; reg = <0x0 0x13040000 0x0 0x10000>; @@ -407,5 +412,37 @@ gpioa: gpio@17020000 { gpio-controller; #gpio-cells = <2>; }; + + mmc0: mmc@16010000 { + compatible = "starfive,jh7110-mmc"; + reg = <0x0 0x16010000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_SDIO0_AHB>, + <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; + clock-names = "biu","ciu"; + resets = <&syscrg JH7110_SYSRST_SDIO0_AHB>; + reset-names = "reset"; + interrupts = <74>; + fifo-depth = <32>; + fifo-watermark-aligned; + data-addr = <0>; + starfive,sysreg = <&sysreg 0x14 0x1a 0x7c000000>; + status = "disabled"; + }; + + mmc1: mmc@16020000 { + compatible = "starfive,jh7110-mmc"; + reg = <0x0 0x16020000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_SDIO1_AHB>, + <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; + clock-names = "biu","ciu"; + resets = <&syscrg JH7110_SYSRST_SDIO1_AHB>; + reset-names = "reset"; + interrupts = <75>; + fifo-depth = <32>; + fifo-watermark-aligned; + data-addr = <0>; + starfive,sysreg = <&sysreg 0x9c 0x1 0x3e>; + status = "disabled"; + }; }; };