From patchwork Thu Feb 2 14:52:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 51971 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp283258wrn; Thu, 2 Feb 2023 06:53:46 -0800 (PST) X-Google-Smtp-Source: AK7set/dQYSGG/OHhFFo8je4ya/LrvfTkIQ6WoLNKXvARQHAP7NUiUkI/oXoVgmIF97BGXlpAMdh X-Received: by 2002:a05:6a20:8e08:b0:bc:c9a8:6e08 with SMTP id y8-20020a056a208e0800b000bcc9a86e08mr8579923pzj.48.1675349626094; Thu, 02 Feb 2023 06:53:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675349626; cv=none; d=google.com; s=arc-20160816; b=vlxnsBEy/BOmqHZSSylHdZimDuecG6l7SqhKcHmrJ5tdVG+r9OQhrGiwtN+9iF/tv9 4m31YJyeeW5CQDplw48cYN/B1YiPR2MxlR0WMHvziavbzXSBNw05ahvM2I0jvGs8kiqW gRa3FTLl/KxoshnQBFxPSaY+mVrRhMsmfDWH3hPphWxTM8Ilu1vGccOLJjv/ceFGQoy2 DA1lklNXwOpcEzGR5Tpie7NMjlEMkWDja2EClrWHpe68oMSjht+3pAbG3T4V3O6uWyO5 BlMe7MUB8+Hs8wsSMmnd7RUhtcbVX66XrNZfZPUhLNIWsQzerx1rScAttls8psvitJAp kFEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UGz90dShSyDi0yZp7LaYDJub8mdD5uOjJtAh7ZjBjNs=; b=De0mSCYKiblnlCVUE5xp5K5mfr4O+rrVDJOWLfxBQpPo3XsTpw/TXWMmjBRXtL5vYP 1iX7+PXvBOm+kV/dN2lbDC1M/tK81zZp42GD1KrqScSMjBDAd+4CqJv9na/TsuFlFNJW CxYSbAyX+lSeWYL2PXfTBro1afXUh89DU4kHX84ESE4ZbLt38KMOK5QZVlRZTZigXee/ OgCK3KRci55G6Ew50sdTGA0XV5G3YQVaWVMAoGUnimpYTGvmHmc3vPAi1z2CNe+m+1gQ C8s/BGJGWC0d5O9TDwxMn4o7GhzBuN2FDfzQcZ8uNL6AehWgvXQDdOVdpyYigETko5cl TTig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=nWQiLkDF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w72-20020a62824b000000b0058d8e5bbbc2si22374015pfd.146.2023.02.02.06.53.33; Thu, 02 Feb 2023 06:53:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=nWQiLkDF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231712AbjBBOxK (ORCPT + 99 others); Thu, 2 Feb 2023 09:53:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232287AbjBBOwx (ORCPT ); Thu, 2 Feb 2023 09:52:53 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 83E6859E9; Thu, 2 Feb 2023 06:52:37 -0800 (PST) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 312EVD1K003218; Thu, 2 Feb 2023 14:52:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=UGz90dShSyDi0yZp7LaYDJub8mdD5uOjJtAh7ZjBjNs=; b=nWQiLkDFHfVjmA6zuR2oOI8c4tBmF4Vcjj20HX3DAOgiCYQwL3g8YKwzbQOBi/dovJig BGM5MoI3LpEJbHnFB/l95Uf8BSrf3tFEk4TQ0fx2sO80K/2bD+aOVILOQBD4ldrvKaH8 dHVhGiIEXtFtPCs7cmOfWzuioLq0n9IXWaVbeWJm1QKmqeYoC+7muUF2gyP7ytCyzDBa ai58NYImEfh0LmW43qfBbfZSOY8W8RpCj5D39alp5Ea8VQbI/lF8RwozA9pPI38depw/ 5+yI+hhCR+9c37W5K+sRxFKOy6md4gUZgU/5IhDO0JYAYIzf+stTe77EILfPp9Z97Kzf wA== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3nfkj4bccb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 Feb 2023 14:52:32 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 312EqVMv002950 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 2 Feb 2023 14:52:31 GMT Received: from win-platform-upstream01.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Thu, 2 Feb 2023 06:52:27 -0800 From: Kathiravan T To: , , , , , , , , , , , CC: Kathiravan T Subject: [PATCH 1/6] clk: qcom: apss-ipq-pll: refactor the driver to accommodate different PLL types Date: Thu, 2 Feb 2023 20:22:03 +0530 Message-ID: <20230202145208.2328032-2-quic_kathirav@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230202145208.2328032-1-quic_kathirav@quicinc.com> References: <20230202145208.2328032-1-quic_kathirav@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: nk-UTjWyK2EV2YIDD5VL_HWTy9bfXVj8 X-Proofpoint-ORIG-GUID: nk-UTjWyK2EV2YIDD5VL_HWTy9bfXVj8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-02_04,2023-02-02_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 impostorscore=0 mlxscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 spamscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302020133 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756731409383291850?= X-GMAIL-MSGID: =?utf-8?q?1756731409383291850?= APSS PLL found on the IPQ8074 and IPQ6018 are of type Huayra PLL. But, IPQ5332 APSS PLL is of type Stromer Plus. To accommodate both these PLLs, refactor the driver to take the clk_alpha_pll, alpha_pll_config via device data. Signed-off-by: Kathiravan T --- drivers/clk/qcom/apss-ipq-pll.c | 55 +++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 19 deletions(-) diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c index a5aea27eb867..6e815e8b7fe4 100644 --- a/drivers/clk/qcom/apss-ipq-pll.c +++ b/drivers/clk/qcom/apss-ipq-pll.c @@ -8,20 +8,22 @@ #include "clk-alpha-pll.h" -static const u8 ipq_pll_offsets[] = { - [PLL_OFF_L_VAL] = 0x08, - [PLL_OFF_ALPHA_VAL] = 0x10, - [PLL_OFF_USER_CTL] = 0x18, - [PLL_OFF_CONFIG_CTL] = 0x20, - [PLL_OFF_CONFIG_CTL_U] = 0x24, - [PLL_OFF_STATUS] = 0x28, - [PLL_OFF_TEST_CTL] = 0x30, - [PLL_OFF_TEST_CTL_U] = 0x34, +static const u8 ipq_pll_offsets[][PLL_OFF_MAX_REGS] = { + [CLK_ALPHA_PLL_TYPE_HUAYRA] = { + [PLL_OFF_L_VAL] = 0x08, + [PLL_OFF_ALPHA_VAL] = 0x10, + [PLL_OFF_USER_CTL] = 0x18, + [PLL_OFF_CONFIG_CTL] = 0x20, + [PLL_OFF_CONFIG_CTL_U] = 0x24, + [PLL_OFF_STATUS] = 0x28, + [PLL_OFF_TEST_CTL] = 0x30, + [PLL_OFF_TEST_CTL_U] = 0x34, + }, }; -static struct clk_alpha_pll ipq_pll = { +static struct clk_alpha_pll ipq_pll_huayra = { .offset = 0x0, - .regs = ipq_pll_offsets, + .regs = ipq_pll_offsets[CLK_ALPHA_PLL_TYPE_HUAYRA], .flags = SUPPORTS_DYNAMIC_UPDATE, .clkr = { .enable_reg = 0x0, @@ -61,6 +63,21 @@ static const struct alpha_pll_config ipq8074_pll_config = { .test_ctl_hi_val = 0x4000, }; +struct apss_pll_data { + struct clk_alpha_pll *pll; + const struct alpha_pll_config *pll_config; +}; + +static struct apss_pll_data ipq8074_pll_data = { + .pll = &ipq_pll_huayra, + .pll_config = &ipq8074_pll_config, +}; + +static struct apss_pll_data ipq6018_pll_data = { + .pll = &ipq_pll_huayra, + .pll_config = &ipq6018_pll_config, +}; + static const struct regmap_config ipq_pll_regmap_config = { .reg_bits = 32, .reg_stride = 4, @@ -71,7 +88,7 @@ static const struct regmap_config ipq_pll_regmap_config = { static int apss_ipq_pll_probe(struct platform_device *pdev) { - const struct alpha_pll_config *ipq_pll_config; + const struct apss_pll_data *data; struct device *dev = &pdev->dev; struct regmap *regmap; void __iomem *base; @@ -85,23 +102,23 @@ static int apss_ipq_pll_probe(struct platform_device *pdev) if (IS_ERR(regmap)) return PTR_ERR(regmap); - ipq_pll_config = of_device_get_match_data(&pdev->dev); - if (!ipq_pll_config) + data = of_device_get_match_data(&pdev->dev); + if (!data) return -ENODEV; - clk_alpha_pll_configure(&ipq_pll, regmap, ipq_pll_config); + clk_alpha_pll_configure(data->pll, regmap, data->pll_config); - ret = devm_clk_register_regmap(dev, &ipq_pll.clkr); + ret = devm_clk_register_regmap(dev, &data->pll->clkr); if (ret) return ret; return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, - &ipq_pll.clkr.hw); + &data->pll->clkr.hw); } static const struct of_device_id apss_ipq_pll_match_table[] = { - { .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_config }, - { .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_config }, + { .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_data }, + { .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_data }, { } }; MODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table); From patchwork Thu Feb 2 14:52:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 51973 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp283438wrn; Thu, 2 Feb 2023 06:54:07 -0800 (PST) X-Google-Smtp-Source: AK7set+jJcP8EEzymUVArABUuTpTZo2V9zPkO80K4Ji3CTijkELnmNwvoNjvoW+rJ1m/mLnwB8GH X-Received: by 2002:a17:90b:3847:b0:22c:58dc:505c with SMTP id nl7-20020a17090b384700b0022c58dc505cmr6650806pjb.30.1675349647573; Thu, 02 Feb 2023 06:54:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675349647; cv=none; d=google.com; s=arc-20160816; b=gLhqbLKGOjB6z9wtVbNmmYQm7SGIJ/XUmAxNvdlK0NzAGyayoqHIae3i4UIEZx17zj ATKQ0PDfMtkw0XJNjYW4LqCB0C0OcSO9WA8ziY6fy4qlbcwf5yDQj1e3hBZBf7QmGn8v DCfk9LRutX00v0rYa0DHLjffXEC2Git71bMH8VLSj6PVTle1Fe4/UgSH78MNUTOPMlR8 6mZlegAYUVekeRk9exB6qzIuYXkFVjHZ315i5YOt3rorhc1Tc2EdbeTvwWwfvt2fO7Vo 5mzqp9bXyG3ejTCf/UmxOznJ7ILlqGvhLLA2/7cWBq6HFbdLixGSK6ehqTVsCD+SGmHN 6kCQ== ARC-Message-Signature: i=1; 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Signed-off-by: Kathiravan T Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/clock/qcom,a53pll.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml index 525ebaa93c85..3b6169f30154 100644 --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml @@ -16,6 +16,7 @@ description: properties: compatible: enum: + - qcom,ipq5332-a53pll - qcom,ipq6018-a53pll - qcom,ipq8074-a53pll - qcom,msm8916-a53pll From patchwork Thu Feb 2 14:52:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 51974 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp283456wrn; Thu, 2 Feb 2023 06:54:09 -0800 (PST) X-Google-Smtp-Source: AK7set/TY96WAbZ4kdfKvGE5jkqNvAaH2OtiHrXCFUk4SXQqEU03emI8Qjhk4Tj7c90xVlz/aIV2 X-Received: by 2002:a05:6a20:d693:b0:bf:45d7:6d0b with SMTP id it19-20020a056a20d69300b000bf45d76d0bmr6106276pzb.33.1675349649126; Thu, 02 Feb 2023 06:54:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675349649; cv=none; d=google.com; s=arc-20160816; b=rU+JrAPH3T9PPfYJWSJ84FdJSb977nxq9NzvdANexLGy1lyataqKbnI+2GIkGRRcHo Jkt/r2CwQ1fZZVR+XNxr0mH/DeDxykk9tv8KzwfWsdO3aDXmQftY7YliVwszZ2d5byMU rgaDIHIjxRUrxMqPRNRLuKFSGNfJ/k+zwCIOciffvHm3qYttrvkyA0sRQ3uVSeMY6UBZ 9y81h4Zsvch4MawgHdmb6SNCDa2fay6B+FTUTiE9Iid+k6kx5P7LhSwKHC7kMfaa2B1V RLZ6CI2eoZBcshZNY/gEucQP2gJK15+iNZMz7CnQjZMNpIA1HBZt3sgigVZ4rhQaHBlk abkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bdgK5SOH3aihuDMEqBQrs9Qku/i3zw0lLU2xV96Mpbg=; b=CZnaLtSGx5pNwqpxJjlb1Qf7cDvlnJZtbfnnDUj7Va72VNE1Zm0+40qlJRt2T4V1I7 mrz5f9mDbO3FOkMfGulayAHkx8vfMfLsOmAUe6TLnWpaIbN+St04o4O64oym6c0Yi06S g1edbOxXVm2viCSSb38cPLAhehzRH5sr5sxfvuqUARPOziIr0ejjd99yQ8YkooGsXBMc auGl3XfpjBb2II43rWEklBpiFRDENdWn53cq4VYKrjaswsUO+CddLGsogWVaiLYg/0bZ QGNwY/8JboYERlY6E/I/o8pWJ1mrdu+23MGNtdMkQp/bymm14sWm6mC8qYlSauHtsslm +kbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=bUwEOGqc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Add support for the same. To configure the stromer plus PLL separate API (clock_stromer_pll_configure) to be used. To achieve this, introduce the new member pll_type in device data structure and call the appropriate function based on this. Signed-off-by: Kathiravan T --- drivers/clk/qcom/apss-ipq-pll.c | 58 ++++++++++++++++++++++++++++++++- 1 file changed, 57 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c index 6e815e8b7fe4..023a854f2c21 100644 --- a/drivers/clk/qcom/apss-ipq-pll.c +++ b/drivers/clk/qcom/apss-ipq-pll.c @@ -19,6 +19,17 @@ static const u8 ipq_pll_offsets[][PLL_OFF_MAX_REGS] = { [PLL_OFF_TEST_CTL] = 0x30, [PLL_OFF_TEST_CTL_U] = 0x34, }, + [CLK_ALPHA_PLL_TYPE_STROMER_PLUS] = { + [PLL_OFF_L_VAL] = 0x08, + [PLL_OFF_ALPHA_VAL] = 0x10, + [PLL_OFF_ALPHA_VAL_U] = 0x14, + [PLL_OFF_USER_CTL] = 0x18, + [PLL_OFF_USER_CTL_U] = 0x1c, + [PLL_OFF_CONFIG_CTL] = 0x20, + [PLL_OFF_STATUS] = 0x28, + [PLL_OFF_TEST_CTL] = 0x30, + [PLL_OFF_TEST_CTL_U] = 0x34, + }, }; static struct clk_alpha_pll ipq_pll_huayra = { @@ -39,6 +50,38 @@ static struct clk_alpha_pll ipq_pll_huayra = { }, }; +static struct clk_alpha_pll ipq_pll_stromer_plus = { + .offset = 0x0, + .regs = ipq_pll_offsets[CLK_ALPHA_PLL_TYPE_STROMER_PLUS], + .flags = SUPPORTS_DYNAMIC_UPDATE, + .clkr = { + .enable_reg = 0x0, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "a53pll", + .parent_data = &(const struct clk_parent_data) { + .fw_name = "xo", + }, + .num_parents = 1, + .ops = &clk_alpha_pll_stromer_ops, + }, + }, +}; + +static const struct alpha_pll_config ipq5332_pll_config = { + .l = 0x3e, + .config_ctl_val = 0x4001075b, + .config_ctl_hi_val = 0x304, + .main_output_mask = BIT(0), + .aux_output_mask = BIT(1), + .early_output_mask = BIT(3), + .alpha_en_mask = BIT(24), + .status_val = 0x3, + .status_mask = GENMASK(10, 8), + .lock_det = BIT(2), + .test_ctl_hi_val = 0x00400003, +}; + static const struct alpha_pll_config ipq6018_pll_config = { .l = 0x37, .config_ctl_val = 0x240d4828, @@ -64,16 +107,25 @@ static const struct alpha_pll_config ipq8074_pll_config = { }; struct apss_pll_data { + int pll_type; struct clk_alpha_pll *pll; const struct alpha_pll_config *pll_config; }; +static struct apss_pll_data ipq5332_pll_data = { + .pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS, + .pll = &ipq_pll_stromer_plus, + .pll_config = &ipq5332_pll_config, +}; + static struct apss_pll_data ipq8074_pll_data = { + .pll_type = CLK_ALPHA_PLL_TYPE_HUAYRA, .pll = &ipq_pll_huayra, .pll_config = &ipq8074_pll_config, }; static struct apss_pll_data ipq6018_pll_data = { + .pll_type = CLK_ALPHA_PLL_TYPE_HUAYRA, .pll = &ipq_pll_huayra, .pll_config = &ipq6018_pll_config, }; @@ -106,7 +158,10 @@ static int apss_ipq_pll_probe(struct platform_device *pdev) if (!data) return -ENODEV; - clk_alpha_pll_configure(data->pll, regmap, data->pll_config); + if (data->pll_type == CLK_ALPHA_PLL_TYPE_HUAYRA) + clk_alpha_pll_configure(data->pll, regmap, data->pll_config); + else if (data->pll_type == CLK_ALPHA_PLL_TYPE_STROMER_PLUS) + clk_stromer_pll_configure(data->pll, regmap, data->pll_config); ret = devm_clk_register_regmap(dev, &data->pll->clkr); if (ret) @@ -117,6 +172,7 @@ static int apss_ipq_pll_probe(struct platform_device *pdev) } static const struct of_device_id apss_ipq_pll_match_table[] = { + { .compatible = "qcom,ipq5332-a53pll", .data = &ipq5332_pll_data }, { .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_data }, { .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_data }, { } From patchwork Thu Feb 2 14:52:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 51972 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp283385wrn; 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Signed-off-by: Kathiravan T --- .../devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 943f9472ae10..8d8cd1bbe67e 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -18,6 +18,7 @@ properties: oneOf: - items: - enum: + - qcom,ipq5332-apcs-apps-global - qcom,ipq6018-apcs-apps-global - qcom,ipq8074-apcs-apps-global - qcom,msm8976-apcs-kpss-global @@ -111,6 +112,7 @@ allOf: properties: compatible: enum: + - qcom,ipq5332-apcs-apps-global - qcom,ipq6018-apcs-apps-global - qcom,ipq8074-apcs-apps-global then: @@ -127,6 +129,7 @@ allOf: properties: compatible: enum: + - qcom,ipq5332-apcs-apps-global - qcom,ipq6018-apcs-apps-global - qcom,ipq8074-apcs-apps-global then: From patchwork Thu Feb 2 14:52:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 51975 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp283602wrn; Thu, 2 Feb 2023 06:54:29 -0800 (PST) X-Google-Smtp-Source: AK7set+kgIFMHbTj1n5BMj/aYuqfTxJ56IfhknryO8UGoHAlRJKslb7AKDH5VDnuKI9piK6KaFBN X-Received: by 2002:a05:6a21:100f:b0:bf:f8a:330b with SMTP id nk15-20020a056a21100f00b000bf0f8a330bmr1769490pzb.10.1675349668920; Thu, 02 Feb 2023 06:54:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675349668; cv=none; d=google.com; s=arc-20160816; b=pKjKN82q6ZZUokmxyntl5DO4EbvB04qUKCjKj1aC+Q+Gvv7rjxaf+QsLL4c3PDvozM H0VoLVdhePBzgrEHne8TwwXCaduoCox7KuhiDEezsYCJ62GMLc8t68pkrqYHhmTqm10r 0OrYR8czq1gnRwZGXBGZRQHG+25QEsx7E65A2SWgdUhBWGS6vtWiaR3unWLTh4qA0LWr 9URKqCL2K3X8uAEL71dmr52agI3PFWwRZda6K1XZbKGxXq8BeLHmqpxa1OcD3SzdkdwR sZly5VKEuij3gxI9pC+Z/4bKYOIg6wfqIkJQe09PyzQO+LPEVUy9zNNVUON+vPgcFxwu A4nA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uFfF4B2nQ6jBS6GS8F+og0BZ7KOkr+lMqtYkgCo0BFQ=; b=uz3PXrieUuJ+Vi/c3VUJn1gTjJrTLorzlyWPWlPQccGjYdI1cv/v1zhFl1TgJyL7l6 v7Tt5Cu2UoBz6pnRjEnpbuIBdKUX74e8RDgo2SlA9M3Q7NUq4A56UXAWRLEAUbKTL5/n THY5/3/Jx5dUOv8HLwLSdU2SDYtQwUGKfcOevJSfEu58EidR0wnRlqC5L95HtYQjqpP7 xx9Cg9aKOXzYwUkIbTcjJ/Xkj7EFC1REwTp50kfrORho9flVcDtRdPwexd6F2hy19+g3 82KHJT/mp51+DZgcaX4JPnkH0Hs8o7FWBlwaYP/nB7x9GmhtJ+pGLE999si4ncsPp8X+ d+CQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=MeZDxpNu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Like IPQ6018, the same controller and driver is used, so utilize IPQ6018 match data for IPQ5332. Signed-off-by: Kathiravan T Reviewed-by: Konrad Dybcio --- drivers/mailbox/qcom-apcs-ipc-mailbox.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c index 0e9f9cba8668..9d1f1b8671fc 100644 --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c @@ -141,6 +141,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev) /* .data is the offset of the ipc register within the global block */ static const struct of_device_id qcom_apcs_ipc_of_match[] = { + { .compatible = "qcom,ipq5332-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data }, From patchwork Thu Feb 2 14:52:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 51976 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp283999wrn; Thu, 2 Feb 2023 06:55:17 -0800 (PST) X-Google-Smtp-Source: AK7set/0p7kLDszaBrB8f3oy3Em6lT6t87asMz1Y/NmZ9slsGVLR71auloMCPfyazQBfyt9ApTbX X-Received: by 2002:a05:6a20:ce47:b0:bc:60bb:9b23 with SMTP id id7-20020a056a20ce4700b000bc60bb9b23mr6518647pzb.0.1675349716853; Thu, 02 Feb 2023 06:55:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675349716; cv=none; d=google.com; s=arc-20160816; b=yZCAexaTSfyFNvpcPa9VQFZmiS51nVLxYCEt9adRzxvyTHNIpcQAZmH3lB8PZP0Tyw U1pYdwSkc7aZiyn/sr4fblPtLEIK2cWTTPyo4Zmvzt7Kg0OcGB9fiFlh9JruMaXdcDUF J0UzZyZrKXYGU+G7DWyavIIzvcPffDV/vhYh5JqinvZX3whusUvt6LNgfHoLhgEJTMm7 5Ug8qXBKP5lATV4AS0qlTnmoUCVQinBqSRfJVI/JP4FM1N1G8eaNy2PoQ5Kx2JPpKygc Cf0ahozRgveDDS0c0R4vmYgqB1o6NSOSbmq+XRu7ek9j1wTcpvSHU2M0CW3j1Q1YOI3f ISYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=NKg+buQ61NH+8eNOC2tz/6bTj6nJ7m3J/rWhZSWO/5Q=; b=V9Qi4rrw/6TR7mya9X2RCOoi3TS6cuXbMmAyHI9WGuBD4kf998JTbEuXEAXcyHbgPe kmr4Ezyi2b1njdv9BmQIE3Gyel4mHLcQTmEzHSMb5wdmOqPoE6uOCA8IKELa043Q0L4Z dVifgGGs5lKtrJRui/VpNsrS9VqDJCgot9VOCDG4xqC8+yzq0GeWkMclyqt6lZn+DtRr fq4CfBxOJAIFW/AO6wPPoPF0cR6GgXFXEQ/XJUWstrpp3bYI5vOTIvfO//Npi+BOnACL AEYL3dXFrY8DHYnXVfQAT2FOSShuqEWISwxC3GdLD0KxeeWE3vqLHFE5/HsLOlMqUUTR ExFg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=fN4Lgw9f; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Kathiravan T --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 36 +++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 7f0ba2ec339c..483bd89817b6 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -5,6 +5,7 @@ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include #include #include @@ -35,6 +36,8 @@ CPU0: cpu@0 { reg = <0x0>; enable-method = "psci"; next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + operating-points-v2 = <&cpu_opp_table>; }; CPU1: cpu@1 { @@ -43,6 +46,8 @@ CPU1: cpu@1 { reg = <0x1>; enable-method = "psci"; next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + operating-points-v2 = <&cpu_opp_table>; }; CPU2: cpu@2 { @@ -51,6 +56,8 @@ CPU2: cpu@2 { reg = <0x2>; enable-method = "psci"; next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + operating-points-v2 = <&cpu_opp_table>; }; CPU3: cpu@3 { @@ -59,6 +66,8 @@ CPU3: cpu@3 { reg = <0x3>; enable-method = "psci"; next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + operating-points-v2 = <&cpu_opp_table>; }; L2_0: l2-cache { @@ -67,6 +76,16 @@ L2_0: l2-cache { }; }; + cpu_opp_table: opp-table-cpu{ + compatible = "operating-points-v2"; + opp-shared; + + opp-1488000000 { + opp-hz = /bits/ 64 <1488000000>; + clock-latency-ns = <200000>; + }; + }; + firmware { scm { compatible = "qcom,scm-ipq5332", "qcom,scm"; @@ -203,6 +222,23 @@ v2m2: v2m@2 { }; }; + apcs_glb: mailbox@b111000 { + compatible = "qcom,ipq5332-apcs-apps-global"; + reg = <0x0b111000 0x1000>; + #clock-cells = <1>; + clocks = <&a53pll>, <&xo_board>; + clock-names = "pll", "xo"; + #mbox-cells = <1>; + }; + + a53pll: clock@b116000 { + compatible = "qcom,ipq5332-a53pll"; + reg = <0x0b116000 0x40>; + #clock-cells = <0>; + clocks = <&xo_board>; + clock-names = "xo"; + }; + timer@b120000 { compatible = "arm,armv7-timer-mem"; reg = <0x0b120000 0x1000>;