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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Jisheng Zhang Subject: [PATCH 01/24] riscv: move sbi_init() earlier before jump_label_init() Date: Mon, 30 Jan 2023 23:52:02 +0530 Message-Id: <20230130182225.2471414-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756472994295625435?= X-GMAIL-MSGID: =?utf-8?q?1756472994295625435?= From: Jisheng Zhang We call jump_label_init() in setup_arch() is to use static key mechanism earlier, but riscv jump label relies on the sbi functions, If we enable static key before sbi_init(), the code path looks like: static_branch_enable() .. arch_jump_label_transform() patch_text_nosync() flush_icache_range() flush_icache_all() sbi_remote_fence_i() for CONFIG_RISCV_SBI case __sbi_rfence() Since sbi isn't initialized, so NULL deference! Here is a typical panic log: [ 0.000000] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 [ 0.000000] Oops [#1] [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.18.0-rc7+ #79 [ 0.000000] Hardware name: riscv-virtio,qemu (DT) [ 0.000000] epc : 0x0 [ 0.000000] ra : sbi_remote_fence_i+0x1e/0x26 [ 0.000000] epc : 0000000000000000 ra : ffffffff80005826 sp : ffffffff80c03d50 [ 0.000000] gp : ffffffff80ca6178 tp : ffffffff80c0ad80 t0 : 6200000000000000 [ 0.000000] t1 : 0000000000000000 t2 : 62203a6b746e6972 s0 : ffffffff80c03d60 [ 0.000000] s1 : ffffffff80001af6 a0 : 0000000000000000 a1 : 0000000000000000 [ 0.000000] a2 : 0000000000000000 a3 : 0000000000000000 a4 : 0000000000000000 [ 0.000000] a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000080200 [ 0.000000] s2 : ffffffff808b3e48 s3 : ffffffff808bf698 s4 : ffffffff80cb2818 [ 0.000000] s5 : 0000000000000001 s6 : ffffffff80c9c345 s7 : ffffffff80895aa0 [ 0.000000] s8 : 0000000000000001 s9 : 000000000000007f s10: 0000000000000000 [ 0.000000] s11: 0000000000000000 t3 : ffffffff80824d08 t4 : 0000000000000022 [ 0.000000] t5 : 000000000000003d t6 : 0000000000000000 [ 0.000000] status: 0000000000000100 badaddr: 0000000000000000 cause: 000000000000000c [ 0.000000] ---[ end trace 0000000000000000 ]--- [ 0.000000] Kernel panic - not syncing: Attempted to kill the idle task! [ 0.000000] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]--- Fix this issue by moving sbi_init() earlier before jump_label_init() Signed-off-by: Jisheng Zhang --- arch/riscv/kernel/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 86acd690d529..4335f08ffaf2 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -270,6 +270,7 @@ void __init setup_arch(char **cmdline_p) *cmdline_p = boot_command_line; early_ioremap_setup(); + sbi_init(); jump_label_init(); parse_early_param(); @@ -287,7 +288,6 @@ void __init setup_arch(char **cmdline_p) misc_mem_init(); init_resources(); - sbi_init(); #ifdef CONFIG_KASAN kasan_init(); From patchwork Mon Jan 30 18:22:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50398 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2330977wrn; Mon, 30 Jan 2023 10:26:27 -0800 (PST) X-Google-Smtp-Source: AK7set9+uAhvAO46fh94BzivPI1DJLdCUWK81YmVXpKox6HNMxTK2KQv1QrvfZxCulyL1d8Dxo9g X-Received: by 2002:a17:906:5601:b0:885:1a9f:1a6d with SMTP id f1-20020a170906560100b008851a9f1a6dmr7901910ejq.18.1675103187759; Mon, 30 Jan 2023 10:26:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103187; cv=none; d=google.com; s=arc-20160816; b=cRIBenRDd5xO1ysu5hcA54y9EcRZUnN0y50/FLJFqRcmzRgwAA2q8Tf2uPELWcjM32 uw8GfJo1Gz3IL7O5KPCUGa1pAlb6RJI3p4tBeGAOkhC7Buv/JO5KIP/W8R5nCfEskCRX xe3ntxRhzNM1qpjqzsLAvVAwijR3/j6UFpgi5o2Mb7s0xG3uG7PYBBpTPeCo40lAbM40 pFHRqG1rJ/Aon0RtPRtP+SPwwnLWj1D+CaIrDy+I58/Pl3M4jViFIVaehnuPBodLXyrc 9uL1zUVbsoX/ca+XHVQ3cSMHByWC+BqZf8T+nn4WesFJamcBW3Uu9GsSVtq14mnXqKLs vWcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uV9EY4GcIdMg2ei4Z2c7LvEp7Me6Q3TdFGwPQrDSIKc=; b=pUyHCfpXoWFDZF5ltzvijhe8eFtA70zomDWpPOx6YJufi19GIgvwTRtlVnSPHr3SRj NhKVKkZwSSKyGlUvw962oRlE7xbEV9EYCg1p651vzUxj619JTaiJnMZImcCpymWtMgMe CBX5oSe3wH3sNwozdKqSvG7QTzKgu/7u4nIqAmwYpYzb9Ma+J4NDfagAhHLzKfFaLEFe 7cvfiVbyM6Cr0iSb9Ztnj+fx4ud/2TWbM5U02WfpxwUWnhqIq4oVueADZIKUIHnVu1rY ydgFgzhO2huT4AWPVjSFGNSrWpR2YDJJ05a++5roEEkumOyWZDPQyqXDsEhnxqrvM/t/ lDxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=HnFGgGXu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L , Robert Moore , acpica-devel@lists.linuxfoundation.org Subject: [PATCH 02/24] ACPICA: MADT: Add RISC-V INTC interrupt controller Date: Mon, 30 Jan 2023 23:52:03 +0530 Message-Id: <20230130182225.2471414-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756472999949330670?= X-GMAIL-MSGID: =?utf-8?q?1756472999949330670?= The ECR to add RISC-V INTC interrupt controller is approved by the UEFI forum and will be availabl in the next revision of the ACPI specification. This patch is not yet merged in ACPICA but a PR is raised. ACPICA PR: https://github.com/acpica/acpica/pull/804 Reference: Mantis ID: 2348 Cc: Robert Moore Cc: acpica-devel@lists.linuxfoundation.org Signed-off-by: Sunil V L --- include/acpi/actbl2.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h index b2973dbe37ee..c432fd15db65 100644 --- a/include/acpi/actbl2.h +++ b/include/acpi/actbl2.h @@ -891,7 +891,8 @@ enum acpi_madt_type { ACPI_MADT_TYPE_MSI_PIC = 21, ACPI_MADT_TYPE_BIO_PIC = 22, ACPI_MADT_TYPE_LPC_PIC = 23, - ACPI_MADT_TYPE_RESERVED = 24, /* 24 to 0x7F are reserved */ + ACPI_MADT_TYPE_RINTC = 24, + ACPI_MADT_TYPE_RESERVED = 25, /* 25 to 0x7F are reserved */ ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ }; @@ -1250,6 +1251,24 @@ enum acpi_madt_lpc_pic_version { ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ }; +/* 24: RISC-V INTC */ +struct acpi_madt_rintc { + struct acpi_subtable_header header; + u8 version; + u8 reserved; + u32 flags; + u64 hart_id; + u32 uid; /* ACPI processor UID */ +}; + +/* Values for RISC-V INTC Version field above */ + +enum acpi_madt_rintc_version { + ACPI_MADT_RINTC_VERSION_NONE = 0, + ACPI_MADT_RINTC_VERSION_V1 = 1, + ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ +}; + /* 80: OEM data */ struct acpi_madt_oem_data { From patchwork Mon Jan 30 18:22:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50401 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331210wrn; Mon, 30 Jan 2023 10:27:02 -0800 (PST) X-Google-Smtp-Source: AK7set8oB95AofEkUDkvIRo3mit+kPenj5B7gejO4q44geKXvv/CIAsvmC2pzwx+jAqM8K+rZOIv X-Received: by 2002:a17:907:98af:b0:883:3c6e:23eb with SMTP id ju15-20020a17090798af00b008833c6e23ebmr9974885ejc.42.1675103222148; Mon, 30 Jan 2023 10:27:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103222; cv=none; d=google.com; s=arc-20160816; b=RQJID5ysc0Lb9sFzzqecV6kwS//FTV0naLfFbOyyalm/FNIKAqLWyEVvLpDAINdjos mk84gDPDYJZGfstrInOFcVCZIH2FKbvBp5dRZX762Ed1CsYh0pbSt9JRnUCM1xxsL7nu mIWRkCNfxbad97PNf5YPmuMR5doV+bBK0iLRhor0OJIbGlwd9opzV9Mf0mSGY7umDOfY vSHX0L12kVoSMtBiW48811Uczc/eExYtPGsZH1qHxu1Pob6UWac4gEng73EOVSWcks6U G62MS/ABcbQnXODuCybtIRyWqCd9bDQtpgP4cyIOE8KFlEIqXBSR0S54JLDaEiR1ZQEy ZJWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PQmlSJt1mKnn8ZkMRDOuhHD/tvDeAwvwL75cA/i0XSQ=; b=KrShte+n3Nx8Ora/q1Bmc6BKdZv9uFwvfnXlCoLvd8MxT/ds6mnmITjMMaC6etyteV t/74Cs9DKSmXhUpLZtncCdqVYR8jPVl5+TdiexivQ4K4O8AYD/y7pdRHh/O6M1KyCOw5 J/naIrpJPgCcW49jjvKeYJGGxUAMsRFVfZD0Cv4Q1wkEGYwfT8TxJs9HVXKeLcRJFWs2 Q6BB4d9Fr8c94d/KnW3fE+NGm24LRMftUH3us7+XV0SNtZGZG9598hs83ag4t0/qe9DL y5o3AatdHRX2hrDOZtQ7jYPcj6ez3paCUfg40vum2ya+Fo1KZxjyugteJqQEn+Houump Zzbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=QbvfBF3x; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L , Robert Moore , acpica-devel@lists.linuxfoundation.org Subject: [PATCH 03/24] ACPICA: Add structure definitions for RISC-V RHCT Date: Mon, 30 Jan 2023 23:52:04 +0530 Message-Id: <20230130182225.2471414-4-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473036381622112?= X-GMAIL-MSGID: =?utf-8?q?1756473036381622112?= RISC-V Hart Capabilities Table (RHCT) is a new static table. The ECR to add RHCT is approved by the UEFI forum and will be available in the next version of the ACPI spec. This patch is not yet merged in ACPICA but a PR is raised. ACPICA PR: https://github.com/acpica/acpica/pull/804 Reference: Mantis: 2349 Cc: Robert Moore Cc: acpica-devel@lists.linuxfoundation.org Signed-off-by: Sunil V L --- include/acpi/actbl2.h | 48 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h index c432fd15db65..86bb79fdfa62 100644 --- a/include/acpi/actbl2.h +++ b/include/acpi/actbl2.h @@ -47,6 +47,7 @@ #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ +#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ @@ -2604,6 +2605,53 @@ enum acpi_rgrt_image_type { ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ }; +/******************************************************************************* + * + * RHCT - RISC-V Hart Capabilities Table + * Version 1 + * + ******************************************************************************/ + +struct acpi_table_rhct { + struct acpi_table_header header; /* Common ACPI table header */ + u32 reserved; + u64 time_base_freq; + u32 node_count; + u32 node_offset; +}; + +/* + * RHCT subtables + */ +struct acpi_rhct_node_header { + u16 type; + u16 length; + u16 revision; +}; + +/* Values for RHCT subtable Type above */ + +enum acpi_rhct_node_type { + ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, + ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, +}; + +/* + * RHCT node specific subtables + */ + +/* ISA string node structure */ +struct acpi_rhct_isa_string { + u16 isa_length; + char isa[]; +}; + +/* Hart Info node structure */ +struct acpi_rhct_hart_info { + u16 num_offsets; + u32 uid; /* ACPI processor UID */ +}; + /******************************************************************************* * * SBST - Smart Battery Specification Table From patchwork Mon Jan 30 18:22:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50403 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331247wrn; Mon, 30 Jan 2023 10:27:06 -0800 (PST) X-Google-Smtp-Source: AK7set+A5A+3WwFziC46uE1kLizGr3ETu/JtQWFg6ihSe6CJcKWg+BUYzhfIM82rbaJOODcX7/ZC X-Received: by 2002:aa7:df15:0:b0:4a2:2d5c:9b06 with SMTP id c21-20020aa7df15000000b004a22d5c9b06mr10046654edy.17.1675103226118; Mon, 30 Jan 2023 10:27:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103226; cv=none; d=google.com; s=arc-20160816; b=GRDmmnsYWt2M2rcilD8yp6KpFM/+ZN0LDKqdKb7f552TpZPQavgTRxjO12Au6gEA4i /fN+CcmQo92BHdt6buRNnv+HkfJgNbi+DgHF8KsoaaSvY4bbqNcYmDkqaXst7b3T0llw d2sgJ4U+LQFTFVgtVe2rkj7/K+myF+c1UggEgAUYHKgBPKLzn9B+HhtYq4n8qnh7tvGb cbm8wE1cgYmrBgjxlftre6mjTnE3ftgRsg9z/yhHkIAESAjCS1wNk2cfFSSrAWxk0P0K Bhitzlsqwad3wEYVYGKTrd0YMyP6MktmkdeZVmFr6+TPGCnN893bSzl3YhiCuyPg4WPh WnYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4Gxugdzqzv74vjLFN2TZ8EvRMhrnTxWt9U64bf/S3Oc=; b=0aNObCi0EpiwY2/SGPioak/2tZ2BRGHioV1y1tUYpvpnsDZHEjTYpekNQ5fpuKWPUK PwxvFxeLaFn4Jzn9ghpS32cy9ljcHmSlDddmZFoalD5ukf9q4BzlssHfwNifgLcq995f 3Ph/a85mCPLo5CwMvzkI3VIJaVZLsuCAFkk1+ZmQbFMbC6kKG6BBbJmYqMs/DpkRQZLf QIVAz9vuy6fJoPlEGb+CY0YEkYmCtRApqUGvkmTZ01sRR7VKDL5RVuaHFwq1f6ZB2vR8 +IsmFTlQbWOkwRTbFNcbhPP6/SchH2tziN3TUDgOzGP+Zg5nSrGgGpqRRE4j17wF1uGz aJUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=HoT+WfLC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 04/24] RISC-V: ACPI: Add empty headers to enable ACPI core Date: Mon, 30 Jan 2023 23:52:05 +0530 Message-Id: <20230130182225.2471414-5-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473040419518233?= X-GMAIL-MSGID: =?utf-8?q?1756473040419518233?= Few header files are required unconditionally by ACPI core. So add empty header files for now and update it when needed. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acenv.h | 17 +++++++++++++++++ arch/riscv/include/asm/cpu.h | 9 +++++++++ 2 files changed, 26 insertions(+) create mode 100644 arch/riscv/include/asm/acenv.h create mode 100644 arch/riscv/include/asm/cpu.h diff --git a/arch/riscv/include/asm/acenv.h b/arch/riscv/include/asm/acenv.h new file mode 100644 index 000000000000..bbc38ecdf753 --- /dev/null +++ b/arch/riscv/include/asm/acenv.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * RISC-V specific ACPICA environments and implementation + * + * Copyright (C) 2014, Linaro Ltd. + * Author: Hanjun Guo + * Author: Graeme Gregory + * Copyright (C) 2023, Ventana Micro Systems Inc. + * Author: Sunil V L + */ + +#ifndef _ASM_ACENV_H +#define _ASM_ACENV_H + +/* It is required unconditionally by ACPI core, update it when needed. */ + +#endif /* _ASM_ACENV_H */ diff --git a/arch/riscv/include/asm/cpu.h b/arch/riscv/include/asm/cpu.h new file mode 100644 index 000000000000..51ec1a89a7a9 --- /dev/null +++ b/arch/riscv/include/asm/cpu.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2014 ARM Ltd. + * Copyright (C) 2023 Ventana Micro Systems Inc. + */ +#ifndef __ASM_CPU_H +#define __ASM_CPU_H + +#endif /* __ASM_CPU_H */ From patchwork Mon Jan 30 18:22:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50399 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331075wrn; Mon, 30 Jan 2023 10:26:43 -0800 (PST) X-Google-Smtp-Source: AK7set+8Pu3RFzWYuDUgFU7ooBqGLMtn2T8eqF28Gp272ZnKLP4QG18UM3kfetebaAlqfhAHBqxL X-Received: by 2002:aa7:c0ca:0:b0:4a2:2ebc:e2e6 with SMTP id j10-20020aa7c0ca000000b004a22ebce2e6mr8711458edp.13.1675103202951; Mon, 30 Jan 2023 10:26:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103202; cv=none; d=google.com; s=arc-20160816; b=jvexkkqujDPz5nZ1EQ0dqMRC/5k0chjVXGmI6hxjZ8mxet+qRg9hs0FVQrmnr8XIBw sMeR1WiJutwEjRVhvMVyTVB+KfNA+qzlIBhWLebJdHPGt17W22kbvXDADAG5EQqXIua/ A13uo3WE2Ihv8Msv+8eVHv1MrpzEY4wSYqsCl6suE9JWxd6vSmChuada/JtnAhw982Bi x1vxXuDR3HZPNKYLWSdWyWv0CMNb9Z+OQugQofLkxSPexDuzyC8cHJhVuaXkMaH+Tj+b dsiJz0NHthYdbjVmsL65eAILQQVTYceL8tdxUifXW/vXSG4oTUYz/5/Of/fhiWpI1ki1 sLWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pahRB1MQHdCryYbha4Boa/nOVNVdk2R7FujvNvjh3AA=; b=L+JEKv0tEK+PiPvGs8e7Rp6yB8vC2rB0Lkbfz9yvCISJf7mZhuT3PIADRsxauKw/1r 5hdkPVvIvfU/g5DNlD9eSkJeFKczcgoswc96dQSNjvNhmRVD9MsSvcLu5cGRoG7vht4k mQjkF1mVXU6czESxkankySg5OC3csQtF4Cmci7lnusUZEpWMLjPAhbDPZkN0Uw9sqmpX FqzxMaiRih3eEMHy/8PqDVJ3DEac9EC/yn0Vohbnb90KsYqEZ2P+IfMaWILdnJ3jvswf DoXs+oFDM/MHHd6xnGlaoPOtm5uQ76uQr4BvFhbSt0EDaOVgQjJ3REYANBexya5/xxCa Crug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=MhntFhnn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 05/24] RISC-V: ACPI: Add basic functions to build ACPI core Date: Mon, 30 Jan 2023 23:52:06 +0530 Message-Id: <20230130182225.2471414-6-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473016521703888?= X-GMAIL-MSGID: =?utf-8?q?1756473016521703888?= Introduce acpi.c and its related header files to provide fundamental needs of extern variables and functions for ACPI core. - asm/acpi.h for arch specific variables and functions needed by ACPI driver core; - acpi.c - Add function to initialize ACPI tables. - acpi.c for RISC-V related ACPI implementation for ACPI driver core; Code is mostly leveraged from ARM64. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acpi.h | 60 ++++++++++++ arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/acpi.c | 178 ++++++++++++++++++++++++++++++++++ 3 files changed, 240 insertions(+) create mode 100644 arch/riscv/include/asm/acpi.h create mode 100644 arch/riscv/kernel/acpi.c diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h new file mode 100644 index 000000000000..8b9babaf3f25 --- /dev/null +++ b/arch/riscv/include/asm/acpi.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2013-2014, Linaro Ltd. + * Author: Al Stone + * Author: Graeme Gregory + * Author: Hanjun Guo + * + * Copyright (C) 2021-2023, Ventana Micro Systems Inc. + * Author: Sunil V L + */ + +#ifndef _ASM_ACPI_H +#define _ASM_ACPI_H + +/* Basic configuration for ACPI */ +#ifdef CONFIG_ACPI + +/* ACPI table mapping after acpi_permanent_mmap is set */ +void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); +#define acpi_os_ioremap acpi_os_ioremap + +#define acpi_strict 1 /* No out-of-spec workarounds on RISC-V */ +extern int acpi_disabled; +extern int acpi_noirq; +extern int acpi_pci_disabled; +static inline void disable_acpi(void) +{ + acpi_disabled = 1; + acpi_pci_disabled = 1; + acpi_noirq = 1; +} + +static inline void enable_acpi(void) +{ + acpi_disabled = 0; + acpi_pci_disabled = 0; + acpi_noirq = 0; +} + +/* + * The ACPI processor driver for ACPI core code needs this macro + * to find out this cpu was already mapped (mapping from CPU hardware + * ID to CPU logical ID) or not. + */ +#define cpu_physical_id(cpu) cpuid_to_hartid_map(cpu) + +/* + * It's used from ACPI core in kdump to boot UP system with SMP kernel. + * Since MADT must provide at least one IMSIC structure for AIA + * initialization, CPU will be always available in MADT on RISC-V. + */ +static inline bool acpi_has_cpu_in_madt(void) +{ + return true; +} + +static inline void arch_fix_phys_package_id(int num, u32 slot) { } +#endif + +#endif /*_ASM_ACPI_H*/ diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 67f542be1bea..f979dc8cf47d 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -90,3 +90,5 @@ obj-$(CONFIG_EFI) += efi.o obj-$(CONFIG_COMPAT) += compat_syscall_table.o obj-$(CONFIG_COMPAT) += compat_signal.o obj-$(CONFIG_COMPAT) += compat_vdso/ + +obj-$(CONFIG_ACPI) += acpi.o diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c new file mode 100644 index 000000000000..9c1aa57bf4f7 --- /dev/null +++ b/arch/riscv/kernel/acpi.c @@ -0,0 +1,178 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * RISC-V Specific Low-Level ACPI Boot Support + * + * Copyright (C) 2013-2014, Linaro Ltd. + * Author: Al Stone + * Author: Graeme Gregory + * Author: Hanjun Guo + * Author: Tomasz Nowicki + * Author: Naresh Bhat + * + * Copyright (C) 2021-2023, Ventana Micro Systems Inc. + * Author: Sunil V L + */ + +#include +#include +#include +#include +#include +#include + +int acpi_noirq = 1; /* skip ACPI IRQ initialization */ +int acpi_disabled = 1; +EXPORT_SYMBOL(acpi_disabled); + +int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */ +EXPORT_SYMBOL(acpi_pci_disabled); + +static bool param_acpi_off __initdata; +static bool param_acpi_on __initdata; +static bool param_acpi_force __initdata; + +static int __init parse_acpi(char *arg) +{ + if (!arg) + return -EINVAL; + + /* "acpi=off" disables both ACPI table parsing and interpreter */ + if (strcmp(arg, "off") == 0) + param_acpi_off = true; + else if (strcmp(arg, "on") == 0) /* prefer ACPI over DT */ + param_acpi_on = true; + else if (strcmp(arg, "force") == 0) /* force ACPI to be enabled */ + param_acpi_force = true; + else + return -EINVAL; /* Core will print when we return error */ + + return 0; +} +early_param("acpi", parse_acpi); + +/* + * __acpi_map_table() will be called before page_init(), so early_ioremap() + * or early_memremap() should be called here to for ACPI table mapping. + */ +void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size) +{ + if (!size) + return NULL; + + return early_memremap(phys, size); +} + +void __init __acpi_unmap_table(void __iomem *map, unsigned long size) +{ + if (!map || !size) + return; + + early_memunmap(map, size); +} + +void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) +{ + return memremap(phys, size, MEMREMAP_WB); +} + +/* + * acpi_fadt_sanity_check() - Check FADT presence and carry out sanity + * checks on it + * + * Return 0 on success, <0 on failure + */ +static int __init acpi_fadt_sanity_check(void) +{ + struct acpi_table_header *table; + struct acpi_table_fadt *fadt; + acpi_status status; + int ret = 0; + + /* + * FADT is required on riscv; retrieve it to check its presence + * and carry out revision and ACPI HW reduced compliancy tests + */ + status = acpi_get_table(ACPI_SIG_FADT, 0, &table); + if (ACPI_FAILURE(status)) { + const char *msg = acpi_format_exception(status); + + pr_err("Failed to get FADT table, %s\n", msg); + return -ENODEV; + } + + fadt = (struct acpi_table_fadt *)table; + + /* + * TODO: Should we add FADT version checks? + */ + + if (!(fadt->flags & ACPI_FADT_HW_REDUCED)) { + pr_err("FADT not ACPI hardware reduced compliant\n"); + ret = -EINVAL; + } + + /* + * acpi_get_table() creates FADT table mapping that + * should be released after parsing and before resuming boot + */ + acpi_put_table(table); + return ret; +} + +/* + * acpi_boot_table_init() called from setup_arch(), always. + * 1. find RSDP and get its address, and then find XSDT + * 2. extract all tables and checksums them all + * 3. check ACPI FADT revision + * 4. check ACPI FADT HW reduced flag + * + * We can parse ACPI boot-time tables such as MADT after + * this function is called. + * + * On return ACPI is enabled if either: + * + * - ACPI tables are initialized and sanity checks passed + * - acpi=force was passed in the command line and ACPI was not disabled + * explicitly through acpi=off command line parameter + * + * ACPI is disabled on function return otherwise + */ +void __init acpi_boot_table_init(void) +{ + /* + * Enable ACPI instead of device tree unless + * - ACPI has been disabled explicitly (acpi=off), or + * - firmware has not populated ACPI ptr in EFI system table + */ + + if (param_acpi_off || (efi.acpi20 == EFI_INVALID_TABLE_ADDR)) + goto done; + /* + * ACPI is disabled at this point. Enable it in order to parse + * the ACPI tables and carry out sanity checks + */ + enable_acpi(); + + /* + * If ACPI tables are initialized and FADT sanity checks passed, + * leave ACPI enabled and carry on booting; otherwise disable ACPI + * on initialization error. + * If acpi=force was passed on the command line it forces ACPI + * to be enabled even if its initialization failed. + */ + if (acpi_table_init() || acpi_fadt_sanity_check()) { + pr_err("Failed to init ACPI tables\n"); + if (!param_acpi_force) + disable_acpi(); + } + +done: + if (acpi_disabled) { + if (earlycon_acpi_spcr_enable) + early_init_dt_scan_chosen_stdout(); + } else { + acpi_parse_spcr(earlycon_acpi_spcr_enable, true); + if (IS_ENABLED(CONFIG_ACPI_BGRT)) + acpi_table_parse(ACPI_SIG_BGRT, acpi_parse_bgrt); + } +} From patchwork Mon Jan 30 18:22:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50406 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331273wrn; Mon, 30 Jan 2023 10:27:11 -0800 (PST) X-Google-Smtp-Source: AMrXdXtXP9Z6wYVF8KHaJLzITUFgBPsMZkvFOIwPSdWq9nfQWT8/7G9Ono0Uz2DzW9qy1SPZALXc X-Received: by 2002:a17:906:7050:b0:872:b17a:9b59 with SMTP id r16-20020a170906705000b00872b17a9b59mr51436484ejj.38.1675103231779; Mon, 30 Jan 2023 10:27:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103231; cv=none; d=google.com; s=arc-20160816; b=oaziQaj0TNE8OD22P1tap1ZzIydC8RxEQlPFk7iCC+NX0uHmzkZq5/sGx/2F4aQEbb KOIMK+WJAw3Vl3Tb7t+F43JoKqPjYxIHy5CX7SohaWLOXVeY5Ilc4M4BpNbPdBiDD6eS 4zc4DuIvGBSWe2DmpXIReF8Aq7fOEI8jA/UeriLEdhNQN7vYj4oThrrFipa2aw3lwOz7 ZbeIT/r4yiQcku89fuoeXVYG+RDwrF6acnezaVePazd8o9fGjfDhMnhKUfIkjrg9KunH xRuMaISr/+tA8ZcMW0hNnlQe7C3o0YzEtm+84yXSHMvqa4oJlCLYmo5OLfbva/uQi4oF Fp9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ez9zOMlap25JS09j6G2VSm957wPlmGGDqcc/YOqCD/M=; b=Oupn2cHRFxVJMU5cGvpI7wIjcjJRngvAv8mr9MfGxjxbXdbIHJNut5LnK39OONnIr8 1K2bxzeUaD5neiF9plris25V/pLM/CgYVWbhK/kJYpbctRHeCSTwHUy8qG8G3UvYuIJy pIix1QuSupQFzf7J0VEUoA+SsStYSk9pssADPRKGanGAml0qB75ZJQtzYTERXAoZoCWT Rp0U7/fpGrpzkabG+PVJyP1l7XCJ8Gcs5WgWhyCszPUtnt7hzIp1fDS6pMVMTrF4FoOd eC0KscAxz2gSFACasgNzpv578dCvpmDSaJhiI3Ti4fh4+5Unl2Hr33K+ohxq11KkAA9O EWlw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=ZALYsSd6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 06/24] RISC-V: ACPI: Add PCI functions to build ACPI core Date: Mon, 30 Jan 2023 23:52:07 +0530 Message-Id: <20230130182225.2471414-7-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473046536398859?= X-GMAIL-MSGID: =?utf-8?q?1756473046536398859?= When CONFIG_PCI is enabled, ACPI core expects few arch functions related to PCI. Add those functions so that ACPI core gets build. These are levraged from arm64. Signed-off-by: Sunil V L Reviewed-by: Conor Dooley --- arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/pci.c | 173 +++++++++++++++++++++++++++++++++++++ 2 files changed, 174 insertions(+) create mode 100644 arch/riscv/kernel/pci.c diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index f979dc8cf47d..e9d37639751d 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -92,3 +92,4 @@ obj-$(CONFIG_COMPAT) += compat_signal.o obj-$(CONFIG_COMPAT) += compat_vdso/ obj-$(CONFIG_ACPI) += acpi.o +obj-$(CONFIG_PCI) += pci.o diff --git a/arch/riscv/kernel/pci.c b/arch/riscv/kernel/pci.c new file mode 100644 index 000000000000..3388af3a67a0 --- /dev/null +++ b/arch/riscv/kernel/pci.c @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Code borrowed from ARM64 + * + * Copyright (C) 2003 Anton Blanchard , IBM + * Copyright (C) 2014 ARM Ltd. + * Copyright (C) 2022-2023 Ventana Micro System Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ACPI + +/* + * raw_pci_read/write - Platform-specific PCI config space access. + */ +int raw_pci_read(unsigned int domain, unsigned int bus, + unsigned int devfn, int reg, int len, u32 *val) +{ + struct pci_bus *b = pci_find_bus(domain, bus); + + if (!b) + return PCIBIOS_DEVICE_NOT_FOUND; + return b->ops->read(b, devfn, reg, len, val); +} + +int raw_pci_write(unsigned int domain, unsigned int bus, + unsigned int devfn, int reg, int len, u32 val) +{ + struct pci_bus *b = pci_find_bus(domain, bus); + + if (!b) + return PCIBIOS_DEVICE_NOT_FOUND; + return b->ops->write(b, devfn, reg, len, val); +} + + +struct acpi_pci_generic_root_info { + struct acpi_pci_root_info common; + struct pci_config_window *cfg; /* config space mapping */ +}; + +int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) +{ + struct pci_config_window *cfg = bus->sysdata; + struct acpi_device *adev = to_acpi_device(cfg->parent); + struct acpi_pci_root *root = acpi_driver_data(adev); + + return root->segment; +} + +static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci) +{ + struct resource_entry *entry, *tmp; + int status; + + status = acpi_pci_probe_root_resources(ci); + resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { + if (!(entry->res->flags & IORESOURCE_WINDOW)) + resource_list_destroy_entry(entry); + } + return status; +} + +/* + * Lookup the bus range for the domain in MCFG, and set up config space + * mapping. + */ +static struct pci_config_window * +pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) +{ + struct device *dev = &root->device->dev; + struct resource *bus_res = &root->secondary; + u16 seg = root->segment; + const struct pci_ecam_ops *ecam_ops; + struct resource cfgres; + struct acpi_device *adev; + struct pci_config_window *cfg; + int ret; + + ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops); + if (ret) { + dev_err(dev, "%04x:%pR ECAM region not found\n", seg, bus_res); + return NULL; + } + + adev = acpi_resource_consumer(&cfgres); + if (adev) + dev_info(dev, "ECAM area %pR reserved by %s\n", &cfgres, + dev_name(&adev->dev)); + else + dev_warn(dev, FW_BUG "ECAM area %pR not reserved in ACPI namespace\n", + &cfgres); + + cfg = pci_ecam_create(dev, &cfgres, bus_res, ecam_ops); + if (IS_ERR(cfg)) { + dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, + PTR_ERR(cfg)); + return NULL; + } + + return cfg; +} + +/* release_info: free resources allocated by init_info */ +static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci) +{ + struct acpi_pci_generic_root_info *ri; + + ri = container_of(ci, struct acpi_pci_generic_root_info, common); + pci_ecam_free(ri->cfg); + kfree(ci->ops); + kfree(ri); +} + + +/* Interface called from ACPI code to setup PCI host controller */ +struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) +{ + struct acpi_pci_generic_root_info *ri; + struct pci_bus *bus, *child; + struct acpi_pci_root_ops *root_ops; + struct pci_host_bridge *host; + + ri = kzalloc(sizeof(*ri), GFP_KERNEL); + if (!ri) + return NULL; + + root_ops = kzalloc(sizeof(*root_ops), GFP_KERNEL); + if (!root_ops) { + kfree(ri); + return NULL; + } + + ri->cfg = pci_acpi_setup_ecam_mapping(root); + if (!ri->cfg) { + kfree(ri); + kfree(root_ops); + return NULL; + } + + root_ops->release_info = pci_acpi_generic_release_info; + root_ops->prepare_resources = pci_acpi_root_prepare_resources; + root_ops->pci_ops = (struct pci_ops *)&ri->cfg->ops->pci_ops; + bus = acpi_pci_root_create(root, root_ops, &ri->common, ri->cfg); + if (!bus) + return NULL; + + /* If we must preserve the resource configuration, claim now */ + host = pci_find_host_bridge(bus); + if (host->preserve_config) + pci_bus_claim_resources(bus); + + /* + * Assign whatever was left unassigned. If we didn't claim above, + * this will reassign everything. + */ + pci_assign_unassigned_root_bus_resources(bus); + + list_for_each_entry(child, &bus->children, node) + pcie_bus_configure_settings(child); + + return bus; +} + +#endif From patchwork Mon Jan 30 18:22:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50400 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331173wrn; Mon, 30 Jan 2023 10:26:56 -0800 (PST) X-Google-Smtp-Source: AK7set8ghEEmk9JC2FSXiJIqpNoPXHpAnTZsmoyFP/B3QAENtOvjqtOWYRXxPTzSePe3eTgoPx3L X-Received: by 2002:a17:906:344d:b0:878:a893:48db with SMTP id d13-20020a170906344d00b00878a89348dbmr13879555ejb.65.1675103216719; Mon, 30 Jan 2023 10:26:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103216; cv=none; d=google.com; s=arc-20160816; b=h37vBJQVvykkUeiArUAM4n4l8gaUWnzaFcFzz7TCZmbW6vgySlr0v0/5A6Ll2KyWsF RRCzX1TLSCp5CQD1NcxLZoNaz00LGgv1SS5yFMygtmahhQuDIn432tNtFrcgWKBVk2/8 UcSTtRLZtWX6FEGerVymlgQppZGWJTRXmaKUboA+nKA6tj3MuBiiyVtFMLdDEF8RTwFJ D0dLxkktPujcOKsSlSDz07uwi/FVVnNUBFeONJ3ZqU435u7Q9XZ76Kzla6FyXh61/jID XTYiSm/7MOI5qyWBzeSfFs6VDLcYLfch3XKq0xGCa4I5BwOH+vIdG2vSvzwEc9Kf5HOf n5Tg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ucIkerkqr4QmI5UkdMXW8uEBrl0PvtR2G4Rv/JZMzew=; b=kxjksKM1dzNDF1Y951ptQmWMYzGt14H0ZShhMX9RreHUS+q9fOyY7hlA0Vwb9ONpjy HPtNYw1R4B/alqpvA6bqqkkG+Q6fKhD1T2r7uqDJC+HMj33W9NdtI3kCzkMvsWk4kB7Q w19lrpo4SaTQfLDqQlAmg21GBoTQbnvMIGkpt4VCq/+BA5kYtTEDOLaoIloYQVAuIUGX TpVSbWFw5RgM5u/nbqxhc8YOTqXR3vsaipCmcX7O1DBKnJoYUC9sbiizmtYRuI/I2o9S qlSutanHM9iKNDBwiIzYi05txt4L3ZBlUmgHY4+wMh5fX7VvGaiIjqsRVGuv5NqEIigI LEjg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=GhrwpBT3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 07/24] RISC-V: ACPI: Enable ACPI build infrastructure Date: Mon, 30 Jan 2023 23:52:08 +0530 Message-Id: <20230130182225.2471414-8-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473030934850443?= X-GMAIL-MSGID: =?utf-8?q?1756473030934850443?= Enable build infrastructure to add ACPI support for RISC-V. Signed-off-by: Sunil V L --- arch/riscv/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d153e1cd890b..f664350679bc 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -12,6 +12,9 @@ config 32BIT config RISCV def_bool y + select ACPI_GENERIC_GSI if ACPI + select ACPI_MCFG if (ACPI && PCI) + select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ARCH_CLOCKSOURCE_INIT select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 @@ -598,6 +601,7 @@ config EFI_STUB config EFI bool "UEFI runtime support" depends on OF && !XIP_KERNEL + select ARCH_SUPPORTS_ACPI if 64BIT select LIBFDT select UCS2_STRING select EFI_PARAMS_FROM_FDT @@ -703,3 +707,4 @@ source "drivers/cpufreq/Kconfig" endmenu # "CPU Power Management" source "arch/riscv/kvm/Kconfig" +source "drivers/acpi/Kconfig" From patchwork Mon Jan 30 18:22:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50402 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331241wrn; Mon, 30 Jan 2023 10:27:05 -0800 (PST) X-Google-Smtp-Source: AK7set/C2051IMBJBuLZdPXDd3dk331WH9jdIxLkGGFvVm8YyDnCXThgAcCwvtmsyaUosrJFJ3RI X-Received: by 2002:a17:907:7f25:b0:86c:13ca:9c90 with SMTP id qf37-20020a1709077f2500b0086c13ca9c90mr628336ejc.59.1675103225393; Mon, 30 Jan 2023 10:27:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103225; cv=none; d=google.com; s=arc-20160816; b=ZGilLrFBBTMzQHUiGExhkpf7R2eVNmWiOU2yzOL85hnjXwEn4lOackPvTS0F9KCvAN UmgFzJOEnF36610AzgGKh+I2D0pPXIwh4nQf2Z6HP8+Ll+m7YdHdpa4s/gkTnD45EIzw saPGHC+CUX12JzsZz8jQGluzHP4xJzQ4qqDIJte4rZ3SD6fomySoXMNJI+/D+wfedqT5 +QNql9KndlRf9qEg7g6HGQr8bt7pb1HJb8Qi77q37RS9bFsNa8Rzcsa9cy5og0baoufa FobrFC7rbyVVPnQTyVjWRZzr3IuwbnPdWpTmBMdz271Rd5VXw1TBDBUjo7feifvJBvKX YPJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tPNO/SxCaad+QHrUHg1W5XYbXIP+iBGVf1xglNrkc7w=; b=N6x8jbt8ZISQtWD/KLvm4/YKN52ZSSic9sEGW3PKBiqbmmusMhadFFomdYcA4hiHLS 6SKVSzZxwAP1d8bQGNQqxszZ/W1jCkmViG/kEsvnIo9rXZRUjc/NnLc9M3Uvgi39iJU9 El299ufXkVU89WuSH3waGCTqBBxL9Wq7qWMxDpxnRpWsnW3ALuRjK/6VQzkFOtDICpFi 6JeJGsAup6aHNV/5cqlM20KP1ljPQcZ7MZnkYJjtiSjQ1Rf4/dLCUeIVhjoDUGLYVBRa PGVK6gyE4lhTh53BPE5qJPXFsl1EBVfJLqPxdULHslI0HB2CgL6J4nysQ7DxyPrhkT+7 fz/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=WAt9qxmL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 08/24] ACPI: Enable ACPI_PROCESSOR for RISC-V Date: Mon, 30 Jan 2023 23:52:09 +0530 Message-Id: <20230130182225.2471414-9-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473039680996198?= X-GMAIL-MSGID: =?utf-8?q?1756473039680996198?= The ACPI processor driver is not currently enabled for RISC-V. Enable it Signed-off-by: Sunil V L --- drivers/acpi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index ccbeab9500ec..b44ac8e55b54 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -281,7 +281,7 @@ config ACPI_CPPC_LIB config ACPI_PROCESSOR tristate "Processor" - depends on X86 || IA64 || ARM64 || LOONGARCH + depends on X86 || IA64 || ARM64 || LOONGARCH || RISCV select ACPI_PROCESSOR_IDLE select ACPI_CPU_FREQ_PSS if X86 || IA64 || LOONGARCH select THERMAL From patchwork Mon Jan 30 18:22:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50404 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331252wrn; Mon, 30 Jan 2023 10:27:07 -0800 (PST) X-Google-Smtp-Source: AK7set8uRg1xbHesIy9rKiOcGQV3IR38ZFQlBrstL1L0TqUwJoFHa5Zh23F7VwxPJeAqG/mKPnl8 X-Received: by 2002:a17:907:75ed:b0:88a:a09d:e64a with SMTP id jz13-20020a17090775ed00b0088aa09de64amr2544408ejc.60.1675103226948; Mon, 30 Jan 2023 10:27:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103226; cv=none; d=google.com; s=arc-20160816; b=Jr4KJrG2TOUy554bM/7yRELdAfQB9K7WzqBffUGHwwMuzD5qw/pTfYcgNyTVs7eZqX 0Q7sf8eOExK6qw8ZZ4gR5TygTx7ng/SFb7BtJWrK3A16W7NkrkPfuQW62I4uFKmje/x4 ANK2jziw16qkKeYQZNCR2/yjkPes5Mcz74+/rTHZvNBpCGEcIc7+rNXNKoivdUzq3FeN GfocCGTVEMtO0eHyEcVJvMRymIJzjdr3O4mBlA4mgc1PhLN2Xj/wGydiwinyCXuEQ8bS eFlEpWu69ndpcgEZ7ekoeD3Rzh56gEVKTGIcv+ariy3LlO9LpAH6+E2U4ECrCluJbXFp dlFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Civb8WSgZLaGjy3GsEK+VfCJoO5XDczMEZxaUDDoy9s=; b=xEvFR5ZZ4NV1pitcJHzQ9nk/+ryRPepRkBRz2Rx18uCWj4mUxLhV9ZnEC2+7r1Ppr3 CRcWrkwhrdUFXlFJS/pr/BBw6DP6jRJE1sUZMRrSVkdR5+598J6rUVao4v4h598ShR9Y D73hkbXfVCv7oiF2OW+XFedzBWjyMsE5jD/JHkF2Wy+juIKYK3Qm45x7eZ6U8fA/6U9p Hcz4fMiuScyN/bdQkqmn7s0DVmcTs/q0Q8NFn+EVAUk9Vn5D0N7pzBc/lgc77NpLdNBK Oa6ILqnumfJoYa7RUTRo4dTspUHrI/7IG0MKeQhrTYnfn5JcwCYCHqQIndASMt8821bo 61Gg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=PSgeKdeh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 09/24] ACPI: OSL: Make should_use_kmap() 0 for RISC-V. Date: Mon, 30 Jan 2023 23:52:10 +0530 Message-Id: <20230130182225.2471414-10-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473041620586278?= X-GMAIL-MSGID: =?utf-8?q?1756473041620586278?= Without this, if the tables are larger than 4K, acpi_map() will fail. Signed-off-by: Sunil V L --- drivers/acpi/osl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c index 3269a888fb7a..f725813d0cce 100644 --- a/drivers/acpi/osl.c +++ b/drivers/acpi/osl.c @@ -276,7 +276,7 @@ acpi_map_lookup_virt(void __iomem *virt, acpi_size size) return NULL; } -#if defined(CONFIG_IA64) || defined(CONFIG_ARM64) +#if defined(CONFIG_IA64) || defined(CONFIG_ARM64) || defined(CONFIG_RISCV) /* ioremap will take care of cache attributes */ #define should_use_kmap(pfn) 0 #else From patchwork Mon Jan 30 18:22:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50408 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331455wrn; Mon, 30 Jan 2023 10:27:38 -0800 (PST) X-Google-Smtp-Source: AK7set93WQRcylthYFJhcBw2h6l8d0HAM21cIHX9bkxlJvLL8rTp7rPstN1BTS7ncSudsRW+XoeX X-Received: by 2002:a17:906:694d:b0:878:7f6f:b1d with SMTP id c13-20020a170906694d00b008787f6f0b1dmr15307007ejs.67.1675103258564; Mon, 30 Jan 2023 10:27:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103258; cv=none; d=google.com; s=arc-20160816; b=nmdEweqlYLvejuF3fd2vBdeP4UX/9cpT3/k/6VPYjECIfdvfd2l4E6NKAe16K6Q0FT 5WPYwNeLXOhA5WsrrrAE9FDHVeJ/tjnExTVGIyZKVZZvx6CHy3G/Dmzj2tvhNU/QxR3q EKxVMeZI2VfkyWT6brZxgbMPZykBYlKziSZbUhNQJkqb/XzpAwp/8l43hsxLT6PIX7F+ WeMQj+1QJufBdj8iUc8OMuTaCc6QLqXXGGkwCJBR/0G6V+4tnOVyNuQeY1CgIBaG9SwH zg7wFdxRY/3H97AOl3+lE60sABuddBdDTqNq58cPpkzLC7HPeO4uv8oXER8B5Of2dVyq HHPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=USVS3mywTvdLvSTJeGXikExLlXPpzcs14a2ZRggZ7wY=; b=lQ5Dm8LWWDE4XlZmX/njwbGUcstdnhP2jaeau776inPhsWYBIH/V9ZhOW+W9x4fxhf thl/gbc69PI1V4pM/K/W/X9aG0ZBTOpRKQzb3f+SNbLOpg8g+D0EMxmQQMHLvG4OP4sq BxKY7Rdg+a0CAGiWBkWQDDWsjrn4LcHyNHMnUXi+iXTQRk9+5oQC6+NPEfK1+lM9auNd HkQseXIDLTJjcwMYqNdWsjKQApXzL+ZP+AmkDb7jAT+3svs3K7d0RaQDh10lgIy7X3Yq xiFcoXMyPKc69Ra/KLjT8rIaqWPwrHx69JWlGEa6ALXXHk9+mPcHZ2pKRrl8KDls6jhi JqSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=AdzPUrbp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 10/24] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid Date: Mon, 30 Jan 2023 23:52:11 +0530 Message-Id: <20230130182225.2471414-11-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473074341244366?= X-GMAIL-MSGID: =?utf-8?q?1756473074341244366?= processor_core needs arch specific functions to map the ACPI ID to the physical ID. In RISC-V platforms, hartid is the physical id and RINTC structure in MADT provides this mapping. Add arch specific function to get this mapping from RINTC. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acpi.h | 3 +++ drivers/acpi/processor_core.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index 8b9babaf3f25..c5cb9f96d404 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -15,6 +15,9 @@ /* Basic configuration for ACPI */ #ifdef CONFIG_ACPI +typedef u64 phys_cpuid_t; +#define PHYS_CPUID_INVALID INVALID_HARTID + /* ACPI table mapping after acpi_permanent_mmap is set */ void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); #define acpi_os_ioremap acpi_os_ioremap diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c index 2ac48cda5b20..889f495b3481 100644 --- a/drivers/acpi/processor_core.c +++ b/drivers/acpi/processor_core.c @@ -106,6 +106,31 @@ static int map_gicc_mpidr(struct acpi_subtable_header *entry, return -EINVAL; } +/* + * Retrieve the RISC-V hartid for the processor + */ +static int map_rintc_hartid(struct acpi_subtable_header *entry, + int device_declaration, u32 acpi_id, phys_cpuid_t *hartid) +{ + struct acpi_madt_rintc *rintc = + container_of(entry, struct acpi_madt_rintc, header); + + if (!(rintc->flags & ACPI_MADT_ENABLED)) + return -ENODEV; + + /* device_declaration means Device object in DSDT, in the + * RISC-V, logical processors are required to + * have a Processor Device object in the DSDT, so we should + * check device_declaration here + */ + if (device_declaration && (rintc->uid == acpi_id)) { + *hartid = rintc->hart_id; + return 0; + } + + return -EINVAL; +} + static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, int type, u32 acpi_id) { @@ -136,6 +161,9 @@ static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, } else if (header->type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) { if (!map_gicc_mpidr(header, type, acpi_id, &phys_id)) break; + } else if (header->type == ACPI_MADT_TYPE_RINTC) { + if (!map_rintc_hartid(header, type, acpi_id, &phys_id)) + break; } entry += header->length; } From patchwork Mon Jan 30 18:22:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50405 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331268wrn; Mon, 30 Jan 2023 10:27:10 -0800 (PST) X-Google-Smtp-Source: AMrXdXvb/oW54phNTtRXcfWuib6TbBtAR8Nl91ptfL/dFYuoETYWl2apwxNTVq/W8nzGe2g374JZ X-Received: by 2002:aa7:cc81:0:b0:465:f6a9:cb7b with SMTP id p1-20020aa7cc81000000b00465f6a9cb7bmr53789537edt.12.1675103230232; Mon, 30 Jan 2023 10:27:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103230; cv=none; d=google.com; s=arc-20160816; b=U6MchT7cZNlDPmE1GmjgciSDDCpxB/xRZPVsUCUcf2gW2wCSqZGIO9KXhTemo9oP1A Q3u4Agc4zWH1qKR7qz449qhvzUdD5iPM1eqy1UF5ZE91tig7lhgJWWIkwEnm3n29BJOu X+WWxeyw/pFGWCkR90yP/klT1UnoGygwtWsvm+mhjH4JvH8fhuN1ytsG8dRPiDIULc/W plyJQcL803G8s0SSuVApp2ijh+9sYlt/DiRs90GTk+0CZUcQrbsGUGDZ+bhRrYVzQbsL Fkpa4g4rD2emOkgjNTYNVPI5q1CzWIF45sFCUBZ+Vja3mFAUvm+UeMRBm70KaTq53ie5 qWXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9/7p8mpWwrRZDJ0Ssv5B2rQ0QEcsG8FyQnZGa88XnoU=; b=rsEXaqKmMR6g6tiVwRyw6yOsuVgF8wDeila/GqfQmGVH/2cl1aAgYhEeQ0fe7X1Ehm EQNtGxnfUaCxXKuWOr2dQKkCmNH9nuUP1iM+MGAxZlZQi8gBERoVv1UovrVtJx+fjcSy ExAjf6aZR4Xkc6jpNx9j1qKO80213t23Vh67nLxVVCzlpwLoco3MLIK1fTvj+EQANlYR SKJPKY7IMTRfcdHDR5WzMgcO6OrXyM2iGYHzK+sDImtpRKxNt3Rzowu6I97Zv2uIZBc7 /2n+nvUpw2IFaBl2NGu2cPcHooQ1/awenmrnV6rt/2AnXETYkN7jQaCSyi1Nxx/OfdBl Qpbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=PW+JkRB4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 11/24] RISC-V: ACPI: irqchip/riscv-intc: Add ACPI support Date: Mon, 30 Jan 2023 23:52:12 +0530 Message-Id: <20230130182225.2471414-12-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473044484338637?= X-GMAIL-MSGID: =?utf-8?q?1756473044484338637?= Add support for initializing the RISC-V INTC driver on ACPI based platforms. Signed-off-by: Sunil V L --- drivers/irqchip/irq-riscv-intc.c | 79 +++++++++++++++++++++++++++----- 1 file changed, 67 insertions(+), 12 deletions(-) diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index f229e3e66387..044ec92fcba7 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -6,6 +6,7 @@ */ #define pr_fmt(fmt) "riscv-intc: " fmt +#include #include #include #include @@ -112,6 +113,30 @@ static struct fwnode_handle *riscv_intc_hwnode(void) return intc_domain->fwnode; } +static int __init riscv_intc_init_common(struct fwnode_handle *fn) +{ + int rc; + + intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG, + &riscv_intc_domain_ops, NULL); + if (!intc_domain) { + pr_err("unable to add IRQ domain\n"); + return -ENXIO; + } + + rc = set_handle_irq(&riscv_intc_irq); + if (rc) { + pr_err("failed to set irq handler\n"); + return rc; + } + + riscv_set_intc_hwnode_fn(riscv_intc_hwnode); + + pr_info("%d local interrupts mapped\n", BITS_PER_LONG); + + return 0; +} + static int __init riscv_intc_init(struct device_node *node, struct device_node *parent) { @@ -133,24 +158,54 @@ static int __init riscv_intc_init(struct device_node *node, if (riscv_hartid_to_cpuid(hartid) != smp_processor_id()) return 0; - intc_domain = irq_domain_add_linear(node, BITS_PER_LONG, - &riscv_intc_domain_ops, NULL); - if (!intc_domain) { - pr_err("unable to add IRQ domain\n"); - return -ENXIO; - } - - rc = set_handle_irq(&riscv_intc_irq); + rc = riscv_intc_init_common(of_node_to_fwnode(node)); if (rc) { - pr_err("failed to set irq handler\n"); + pr_err("failed to initialize INTC\n"); return rc; } - riscv_set_intc_hwnode_fn(riscv_intc_hwnode); + return 0; +} - pr_info("%d local interrupts mapped\n", BITS_PER_LONG); +IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init); + +#ifdef CONFIG_ACPI + +static int __init +riscv_intc_acpi_init(union acpi_subtable_headers *header, + const unsigned long end) +{ + int rc; + struct fwnode_handle *fn; + struct acpi_madt_rintc *rintc; + + rintc = (struct acpi_madt_rintc *)header; + + /* + * The ACPI MADT will have one INTC for each CPU (or HART) + * so riscv_intc_acpi_init() function will be called once + * for each INTC. We only need to do INTC initialization + * for the INTC belonging to the boot CPU (or boot HART). + */ + if (riscv_hartid_to_cpuid(rintc->hart_id) != smp_processor_id()) + return 0; + + fn = irq_domain_alloc_named_fwnode("RISCV-INTC"); + WARN_ON(fn == NULL); + if (!fn) { + pr_err("unable to allocate INTC FW node\n"); + return -1; + } + + rc = riscv_intc_init_common(fn); + if (rc) { + pr_err("failed to initialize INTC\n"); + return rc; + } return 0; } -IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init); +IRQCHIP_ACPI_DECLARE(riscv_intc, ACPI_MADT_TYPE_RINTC, + NULL, 1, riscv_intc_acpi_init); +#endif From patchwork Mon Jan 30 18:22:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50407 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331382wrn; Mon, 30 Jan 2023 10:27:28 -0800 (PST) X-Google-Smtp-Source: AK7set/UCXDSdAAxUaa2+qeOurNuNNjjR8zPz/ZCBbhZd37K1lVimvEk9W3AngIwqVo8RffhMr5x X-Received: by 2002:a17:907:20b9:b0:887:9007:bdcf with SMTP id pw25-20020a17090720b900b008879007bdcfmr5454362ejb.41.1675103247870; Mon, 30 Jan 2023 10:27:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103247; cv=none; d=google.com; s=arc-20160816; b=NPkyPp2N9D+Y4qoVCaj+44iaMzhO3SZ/yRKU3WZio0avulhMBFoYZN4VnSquQMOikj qk9Srl86jNQ5xK1eSN2f2gFQqd8GprjosDiofeSaut7rxuw2U3uPRNj+m4s2qZJqhWaz Q1H3B+t3FQ3mK+Nos8M8ZRsdXTUoTchTfB+7dFxBVr9p+V3oKYOY4/uoF42SQuhZkGDX qG9CT8Kx/0RBiWUxn/ZI2+GvPdQ2uayClHU4woIEamAEBF4rtILawgITB2OhUlf+rfHG Vn+z1qNkf7Lbkp0zF3VgfEt9G3I5Basur0M0Uy/Q5w2d+kyeYzGepeY3ETDgvpGGRO2o rKxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2V4bEO8aGCUnvICkvYFTtflr32JlbC6lkp0g+wowtbM=; b=Tx1BH+YoBPjB+UvvpJ+iB8pKOiWVWq3upeP1CtFpaPf7ESW4uHrgsB+yo/O6mQHRs2 6ylA2jQjZu9yn45cHQXms5+KRs43MzEon/4gLVQkao/DdZFUpvumFx4B7Tb5ZmvxSBTo C3Crr/aktzM6X3wM+2l0/dTDtkhEzmQ3mpT/Yum4ZkcDaXKmqE2vMGnu22QeoYPDk9OU G0FHhYcvN/EVOtkWfkfacxIWhk1ihl9BeT3hptZIiim1JDaHgkBMyajvWrYC055k2r8R 1uMaoarwfNxVeUqTJB0auZ2sb6ORgAbFdCJI9bzjePYOZi+73SFvbzs9vSAg2YWYweCP +Udw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=lk2FS4bi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 12/24] RISC-V: ACPI: smpboot: Create wrapper smp_setup() Date: Mon, 30 Jan 2023 23:52:13 +0530 Message-Id: <20230130182225.2471414-13-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473062962697273?= X-GMAIL-MSGID: =?utf-8?q?1756473062962697273?= smp_setup() currently assumes DT based platforms. To enable ACPI, first make this as a wrapper function and move existing code to a separate DT specific function. Signed-off-by: Sunil V L Reviewed-by: Conor Dooley --- arch/riscv/kernel/smpboot.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 00b53913d4c6..26214ddefaa4 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -70,7 +70,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) } } -void __init setup_smp(void) +static void __init of_parse_and_init_cpus(void) { struct device_node *dn; unsigned long hart; @@ -116,6 +116,11 @@ void __init setup_smp(void) } } +void __init setup_smp(void) +{ + of_parse_and_init_cpus(); +} + static int start_secondary_cpu(int cpu, struct task_struct *tidle) { if (cpu_ops[cpu]->cpu_start) From patchwork Mon Jan 30 18:22:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50420 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2333452wrn; Mon, 30 Jan 2023 10:32:05 -0800 (PST) X-Google-Smtp-Source: AK7set/Eemd0o4fIqziBga6G2gwGljjyA7YIxWCxDthbeVst6AJboo+wE+Uj0Bx10slZHf9WojHi X-Received: by 2002:a05:6a20:c114:b0:bc:92cd:1536 with SMTP id bh20-20020a056a20c11400b000bc92cd1536mr7940947pzb.61.1675103525045; Mon, 30 Jan 2023 10:32:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103525; cv=none; d=google.com; s=arc-20160816; b=E4ZjpwW0WCwfOhXSOctqjx58N0tVCFklueUYu+dZOKxjKwFCB1rs0+cZyT4t2a49gg GWuV2ko5gVy98hR+9O2Xud6Pc2VAdlnD1VMULuN0btHrqO974IHhqnwGxY2G8mVlEwj6 Sx6l5DwUsysLViDFm8ESgYBVE66v0bapuethtVVBwsbs5VgXJ57+wg19tX5vV2h/i7Pv tCHtof0UzIm8MAXe68L51HGGSiUrjcGk/sSvAwrwvnJLoD+whbHYjuEOCTA0nyiGBXeW mGnAZxN1+k2nIizbsWGVhT3LOVGWCcOsTEa9EtjRhnqIq6wU0mT3UfpmOdAuWKN29bRp NO0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Tmqm1KrH8Rx3qerFslFMAYGwIdVV+GEj7SnscFfXmQ0=; b=xL2LfyWZHbSMD1aaXmBdq7OWhfKsVfYPqcdF+87EudWnyTMQRA/uUuNN/JjSkIPUUk f6ARwBizznShNA9wEJuq3gOa2TV65TGaDyjh0Pjy0lP7uuBBgASMkL1fepBGUMVlfYxk FF2sS+eOrFjqJaYTO2p4O7TjYIdG82Cfhlx7uLxST1I9yN5x9hZCu4iQmKvf2UB6ZnSD orXo6WnfYraXLcrtb0IrhQ/cnl2CsQYUqxchrT3VrsB1LnU+VS/VzZPOcPOtFfZUWobR z05f2HFb8RuVq6/kxbXuUqPuHuduEzlfz9bp3dpMQucibIlzfXa/BjbjYVS9PG8IfMeX ql/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=cPqIpB8p; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 13/24] RISC-V: ACPI: smpboot: Add ACPI support in smp_setup() Date: Mon, 30 Jan 2023 23:52:14 +0530 Message-Id: <20230130182225.2471414-14-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473354109449019?= X-GMAIL-MSGID: =?utf-8?q?1756473354109449019?= Add function to parse the RINTC structure in the MADT table and create the required initializations to enable SMP boot on ACPI based platforms. Signed-off-by: Sunil V L Reviewed-by: Conor Dooley --- arch/riscv/include/asm/acpi.h | 7 ++++ arch/riscv/kernel/smpboot.c | 73 ++++++++++++++++++++++++++++++++++- 2 files changed, 79 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index c5cb9f96d404..d1f1e53ec657 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -58,6 +58,13 @@ static inline bool acpi_has_cpu_in_madt(void) } static inline void arch_fix_phys_package_id(int num, u32 slot) { } + +#ifdef CONFIG_ACPI_NUMA +int acpi_numa_get_nid(unsigned int cpu); +#else +static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; } +#endif /* CONFIG_ACPI_NUMA */ + #endif #endif /*_ASM_ACPI_H*/ diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 26214ddefaa4..e48cf88d0bc1 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -8,6 +8,7 @@ * Copyright (C) 2017 SiFive */ +#include #include #include #include @@ -70,6 +71,73 @@ void __init smp_prepare_cpus(unsigned int max_cpus) } } +#ifdef CONFIG_ACPI +static unsigned int cpu_count = 1; + +static int __init +acpi_parse_rintc(union acpi_subtable_headers *header, + const unsigned long end) +{ + unsigned long hart; + bool found_boot_cpu = false; + + struct acpi_madt_rintc *processor; + + processor = (struct acpi_madt_rintc *)header; + + /* RINTC entry which has !ACPI_MADT_ENABLED is not enabled so skip */ + if (!(processor->flags & ACPI_MADT_ENABLED)) + return 0; + + hart = processor->hart_id; + if (hart < 0) + return 0; + if (hart == cpuid_to_hartid_map(0)) { + BUG_ON(found_boot_cpu); + found_boot_cpu = 1; + early_map_cpu_to_node(0, acpi_numa_get_nid(cpu_count)); + return 0; + } + if (cpu_count >= NR_CPUS) { + pr_warn("Invalid cpuid [%d] for hartid [%lu]\n", + cpu_count, hart); + return 0; + } + + cpuid_to_hartid_map(cpu_count) = hart; + early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count)); + cpu_count++; + return 0; +} + +static void __init acpi_parse_and_init_cpus(void) +{ + int cpuid; + + cpu_set_ops(0); + /* + * do a walk of MADT to determine how many CPUs + * we have including disabled CPUs, and get information + * we need for SMP init. + */ + acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, + acpi_parse_rintc, 0); + + /* + * NUMA - TODO + */ + + for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { + if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { + cpu_set_ops(cpuid); + set_cpu_possible(cpuid, true); + } + } +} +#else +#define acpi_parse_and_init_cpus(...) do { } while (0) +#endif + static void __init of_parse_and_init_cpus(void) { struct device_node *dn; @@ -118,7 +186,10 @@ static void __init of_parse_and_init_cpus(void) void __init setup_smp(void) { - of_parse_and_init_cpus(); + if (acpi_disabled) + of_parse_and_init_cpus(); + else + acpi_parse_and_init_cpus(); } static int start_secondary_cpu(int cpu, struct task_struct *tidle) From patchwork Mon Jan 30 18:22:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50410 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331672wrn; Mon, 30 Jan 2023 10:28:10 -0800 (PST) X-Google-Smtp-Source: AK7set9xua5aeJzlsou3c9iq4yZolDFqCNCVZ73RRIr/7TUBdrj/dU0/rz4SlM+fVJbClEu+OzXU X-Received: by 2002:a05:6402:2707:b0:4a0:f786:d887 with SMTP id y7-20020a056402270700b004a0f786d887mr467508edd.35.1675103289940; Mon, 30 Jan 2023 10:28:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103289; cv=none; d=google.com; s=arc-20160816; b=vtA+cubKJeLjAWSNNjUgz7IHZNkib5UydnISApPU/sCPBwdeyPUdbEkjKTH+c6E0+1 9E9CWmoiSGw0ZjU8yZzO/GhjJrU7FrRDN1w7hW5ZAJ70NgNU+Kyo396dwWAnl4Ag0Zm9 OZ7uHmeMgiF/WuWtERrJxBxW5fIpkz2DAgCHT9diT0qvdZtnEshSGB6MLb3EP8iH/1He uY4AawNvWeyGi5qRVEcncWuOvz+868QT4Z3JUcAVQVEeyp5yR/mXRNdyoLDqF2NzmCoV O/ZQOUWAtK7+2FVfsFujylg94U+YFHWwp++0rhcAgmUIuvY/97AuYN3FybZApuwn4oDe DHgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RoNsoxjlD8YqMSH0pVqFEhvuCFLj9XoDBF5p4r2NIfw=; b=ShXyVCqx2MxMfrG9LjWDJroENSE5VYgZ2CEZeB+L9uyWdrLargenQXIJObWL+td8Lt B/jJQ2kdkgjYqZrVXRCTfHmEB9Ccb4tR0YooPiTGiKQdXoxkvg5cOEMCur3c+CxaG2kF M6tVhbb2HcT2po5H0oZZq7nlRecfSUaiAByFVgidU19IpEsuXgOmGDuo65CT55YP3LPZ N/BnWl8iiSRxJa4ASxXl6JPl66CyJ6fxAHyAFwM4Li8NbCNVfYqZYUdY2ogIBJcobfLO VJkYkw7MJWQhq9bBRAltYqqUXKfijB9c/OZFDGH1I9Ylhjf+TXXIre4T9+9trWHJTQvv szSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=iDP9c7Ap; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 14/24] RISC-V: ACPI: smpboot: Add function to retrieve the hartid Date: Mon, 30 Jan 2023 23:52:15 +0530 Message-Id: <20230130182225.2471414-15-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473107745603354?= X-GMAIL-MSGID: =?utf-8?q?1756473107745603354?= hartid is in RINTC structuire in MADT table. Instead of parsing the ACPI table every time we need for a cpu, cache it and provide a function to read it. This is similar to acpi_get_madt_gicc() in arm64. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acpi.h | 14 +++++++++++++- arch/riscv/kernel/smpboot.c | 21 +++++++++++++++++++++ 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index d1f1e53ec657..69a880b7257a 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -65,6 +65,18 @@ int acpi_numa_get_nid(unsigned int cpu); static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; } #endif /* CONFIG_ACPI_NUMA */ -#endif +struct acpi_madt_rintc *acpi_get_madt_rintc(int cpu); +struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu); +static inline u32 get_acpi_id_for_cpu(int cpu) +{ + return acpi_cpu_get_madt_rintc(cpu)->uid; +} +#else +static inline u32 get_acpi_id_for_cpu(int cpu) +{ + return -1; +} + +#endif /* CONFIG_ACPI */ #endif /*_ASM_ACPI_H*/ diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index e48cf88d0bc1..3a8b7a9eb5ac 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -73,6 +73,25 @@ void __init smp_prepare_cpus(unsigned int max_cpus) #ifdef CONFIG_ACPI static unsigned int cpu_count = 1; +static unsigned int intc_count; +static struct acpi_madt_rintc cpu_madt_rintc[NR_CPUS]; + +struct acpi_madt_rintc *acpi_get_madt_rintc(int cpu) +{ + return &cpu_madt_rintc[cpu]; +} + +struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu) +{ + int i; + + for (i = 0; i < NR_CPUS; i++) { + if (riscv_hartid_to_cpuid(cpu_madt_rintc[i].hart_id) == cpu) + return &cpu_madt_rintc[i]; + } + return NULL; +} +EXPORT_SYMBOL_GPL(acpi_cpu_get_madt_rintc); static int __init acpi_parse_rintc(union acpi_subtable_headers *header, @@ -92,6 +111,8 @@ acpi_parse_rintc(union acpi_subtable_headers *header, hart = processor->hart_id; if (hart < 0) return 0; + + cpu_madt_rintc[intc_count++] = *processor; if (hart == cpuid_to_hartid_map(0)) { BUG_ON(found_boot_cpu); found_boot_cpu = 1; From patchwork Mon Jan 30 18:22:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50409 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331648wrn; Mon, 30 Jan 2023 10:28:05 -0800 (PST) X-Google-Smtp-Source: AK7set/BfctIAE36dvJqbxz/px7ravQAdAtN4kze8Rg8y1UR6Sx9ble3gDdF8FB2QPajMEIJ2TjG X-Received: by 2002:a17:907:7b8b:b0:88b:ce27:f51e with SMTP id ne11-20020a1709077b8b00b0088bce27f51emr243173ejc.29.1675103285658; Mon, 30 Jan 2023 10:28:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103285; cv=none; d=google.com; s=arc-20160816; b=Rsrh7uXDyuQ/GJlJEiS3FEyatZ3e6XY5IGscwhsdwOGDANvr/RMw6nVKY+ex0c6Ehi LogS9goVCqFcH3iUb7c59xp8uV309KtbVzOL2DLRCJHTFNx8wYXzcqhq/7/9WUg0lOku SeQvjEr9deww8msR3TIcBlAr7pqyszACb6TlwB28oFgXXbPZzPcUbSyhBXwS4hFUQmgl VqR5EsGPEbvPVKwG1Hk6CZmGB7pzd8ZytW16m71bnlLWoJ1QFbTkD+ubYlb8Erqh4lD2 nPCePGF3YL2B9EnNT2FH2FU2nLP9sjbe7Gcvg6vc8TM01QiconEE6j9In4v0RQQ8/HE6 /2wA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RjjcPypQMXaOislrOYJ95mTwSGDcKCLLP/xnE1MVdDc=; b=SU0NfBINY1IK0TVVngCpZlShMG6ELDIj9TIVPBR+HtSpCwXbDGb0eME8K2adbYFtoa o/FZeEinvmNIQ+E9gF6IDUAj0IZGxw8OWvhDS/CYZEe4H6yVX042CAYi32VpZpqVv4dT Sg8UC2nad2V7NHs+q+oLppmTj9ZprN9jGb/BFV93BhtjMz5ucKgPV8O46AvXuOv5BVSh RTUB/rmHLI3wFgmxx6fzqHbMFnoWqp/Urw7hS3G74c3oMBSo9gXMEClA3Gatun6mBs0I s46nfQwgcp+L/A1BnFpqeDmZFBdcL/9LM/5Jl9H0XQdcuZ11QGyYmC/UpZasOJ7kcSAI +H6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=AGORcmtB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 15/24] clocksource/timer-riscv: Refactor riscv_timer_init_dt() Date: Mon, 30 Jan 2023 23:52:16 +0530 Message-Id: <20230130182225.2471414-16-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473102592164441?= X-GMAIL-MSGID: =?utf-8?q?1756473102592164441?= Refactor the timer init function such that few things can be shared by both DT and ACPI based platforms. Signed-off-by: Anup Patel Signed-off-by: Sunil V L --- drivers/clocksource/timer-riscv.c | 79 +++++++++++++++---------------- 1 file changed, 37 insertions(+), 42 deletions(-) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 1b4b36df5484..4016c065a01c 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -119,61 +119,28 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static int __init riscv_timer_init_dt(struct device_node *n) +static int __init riscv_timer_init_common(void) { - int cpuid, error; - unsigned long hartid; - struct device_node *child; - struct irq_domain *domain; - - error = riscv_of_processor_hartid(n, &hartid); - if (error < 0) { - pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n", - n, hartid); - return error; - } - - cpuid = riscv_hartid_to_cpuid(hartid); - if (cpuid < 0) { - pr_warn("Invalid cpuid for hartid [%lu]\n", hartid); - return cpuid; - } - - if (cpuid != smp_processor_id()) - return 0; + int error; + struct fwnode_handle *intc_fwnode = riscv_get_intc_hwnode(); + struct irq_domain *domain = NULL; - child = of_find_compatible_node(NULL, NULL, "riscv,timer"); - if (child) { - riscv_timer_cannot_wake_cpu = of_property_read_bool(child, - "riscv,timer-cannot-wake-cpu"); - of_node_put(child); - } - domain = NULL; - child = of_get_compatible_child(n, "riscv,cpu-intc"); - if (!child) { - pr_err("Failed to find INTC node [%pOF]\n", n); - return -ENODEV; - } - domain = irq_find_host(child); - of_node_put(child); + domain = irq_find_matching_fwnode(intc_fwnode, DOMAIN_BUS_ANY); if (!domain) { - pr_err("Failed to find IRQ domain for node [%pOF]\n", n); + pr_err("Failed to find INTC node [%pfwP]\n", intc_fwnode); return -ENODEV; } riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER); if (!riscv_clock_event_irq) { - pr_err("Failed to map timer interrupt for node [%pOF]\n", n); - return -ENODEV; + pr_err("Failed to map timer interrupt for node [%pfwP]\n", + intc_fwnode); } - pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n", - __func__, cpuid, hartid); error = clocksource_register_hz(&riscv_clocksource, riscv_timebase); if (error) { - pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", - error, cpuid); + pr_err("clocksource register failed [%d]\n", error); return error; } @@ -199,7 +166,35 @@ static int __init riscv_timer_init_dt(struct device_node *n) static_branch_enable(&riscv_sstc_available); } + pr_info("timer registered using %s\n", + (static_branch_likely(&riscv_sstc_available)) ? + "RISC-V Sstc" : "RISC-V SBI"); + return error; } +static int __init riscv_timer_init_dt(struct device_node *n) +{ + int cpuid, error; + unsigned long hartid; + + error = riscv_of_processor_hartid(n, &hartid); + if (error < 0) { + pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n", + n, hartid); + return error; + } + + cpuid = riscv_hartid_to_cpuid(hartid); + if (cpuid < 0) { + pr_warn("Invalid cpuid for hartid [%lu]\n", hartid); + return cpuid; + } + + if (cpuid != smp_processor_id()) + return 0; + + return riscv_timer_init_common(); +} + TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt); From patchwork Mon Jan 30 18:22:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50411 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331755wrn; Mon, 30 Jan 2023 10:28:24 -0800 (PST) X-Google-Smtp-Source: AK7set+yOgC8CKFwVfOBf423ndVtvW/lTrwc306BT+BlO3QXISKxBFF2HkAJz+Fkf8Ea8NS7dvLN X-Received: by 2002:a17:906:544e:b0:7b2:c227:126d with SMTP id d14-20020a170906544e00b007b2c227126dmr377179ejp.20.1675103304731; Mon, 30 Jan 2023 10:28:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103304; cv=none; d=google.com; s=arc-20160816; b=tNVpMNk2/UQEPUuGTmT6K2KALokLf94JIHQHZDj3Mrr3r9iNSXbQ3kC1vvNQuZiRij kjOdzpRD+9sQ3GmvcfF0Iih+XdcfMkRIZ7qJJN5CaK/X0SZh9urQGYG0r1UatbkXW1m/ EMW6X6zWmTiPAfwsjUHzyBC2keLnE9Pvs4qbWmkIIkIdYhKlu/Gm3lfKXxWM+IzWEVst 40blGygiv4EosmuIfjaDU4rd0QSd67h6QLL8reuha45BdICQ2FLavbibO95MnwEbC9Xp LP17MvclnZUpavCOgcJq/4NCP6a/A5cIlJDyOLq5/RrBXVMu6gBEuiO02r8qIBZW5zu3 vMDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2cCnuU35jZVdGCs4yph98OuVncVWSdeJqbA2ZAZB9Sg=; b=U8ahz2tb6PiBHR7iHbTCc12jqGsx5gD1GnuBaaRfVcjQLAYXFh9YEwOLFw6Bx8yC9T JraIWA1cEKgrxra5bdjLtW4nCnWb98qCRIpwZo3fi0gU7tB5OK9MLgZ2JRdTncWNUqoh 2fu8t9egQ/ARl48CmxekVsxVo+mjrdVQBDAwZslAqB+uO3L6H3+AGkSrJkauokFAwzkW 0RTyh08ikJHe1uGVxjv80hY939taaxPbsudPuGM3Hv22Aj2HPOZEfd7Eguoe9Nu0RZ0E EQ2+f1MtZMwT6qYjkBp0wJISP3Fukda7U7jab+VDozejimUo/+VMkC2w32tgHcDEqk+y ovBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=NVtPhRYV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 16/24] RISC-V: ACPI: clocksource/timer-riscv: Add ACPI support Date: Mon, 30 Jan 2023 23:52:17 +0530 Message-Id: <20230130182225.2471414-17-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473122954874771?= X-GMAIL-MSGID: =?utf-8?q?1756473122954874771?= timer-riscv driver needs to get the timebase-frequency from RISC-V Hart Capabilities Table (RHCT) on ACPI platforms. Add support to read the information from RHCT. Signed-off-by: Sunil V L --- drivers/clocksource/timer-riscv.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 4016c065a01c..8079666753a6 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -10,6 +10,7 @@ #define pr_fmt(fmt) "riscv-timer: " fmt +#include #include #include #include @@ -198,3 +199,11 @@ static int __init riscv_timer_init_dt(struct device_node *n) } TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt); + +#ifdef CONFIG_ACPI +static int __init riscv_timer_acpi_init(struct acpi_table_header *table) +{ + return riscv_timer_init_common(); +} +TIMER_ACPI_DECLARE(aclint_mtimer, ACPI_SIG_RHCT, riscv_timer_acpi_init); +#endif From patchwork Mon Jan 30 18:22:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50412 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2331852wrn; Mon, 30 Jan 2023 10:28:44 -0800 (PST) X-Google-Smtp-Source: AMrXdXv8W2RQNLf7RPJNjyU8GiJna/IOAk1Q1ZJu4gBazaceKlF5R4J4Xr22M1iUjpOMbnZSRmHU X-Received: by 2002:a17:906:5417:b0:877:5dbc:da84 with SMTP id q23-20020a170906541700b008775dbcda84mr43048736ejo.72.1675103324570; Mon, 30 Jan 2023 10:28:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103324; cv=none; d=google.com; s=arc-20160816; b=L6ayi2pVsEb8khTNZ6cJiimY0vCRyGBbhFERKmZm5DY9hLhJ4NSDtGzy7v5voOH16H dLij1DcoMjCFa3t3wNI+Yxhwr5YV9F7NEpLxCbO92NHEarJrZvCg+DFOEe7ttHQYKxRJ IKz0tG67fPW17lykDZSreTXZSmiF3Y19XNuIRcw2F20RkEtDg+6ZhvBeejbRX9kG50zl y0SYIOVNgDGVEpYDiIth+xzi6a6uhmLtD35nym3SQkTWBTxStg4nn1IaggzMk5scdaOe s1HiXdNvl/xe/15mOiDt7S4ByLLzuAnGVy4UQXIUXAvz538rdrsv14M0+RURAcdlfnat LFvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=oj1LIEiLCoH05jrvnS3NlcMWxNoKVbL+lD4xO5ixkXk=; b=r6g0mEkXwY8OCfYoKkiekJ+iW0hvdnCdzboeXdi7ej3CshSZEO24+Y/Od8ecNtdnRH Sey8car1ZBSXzu4xV8ulpoITz5+2wIiOBYbyqtIq/k1UTquYmmqmvyEuitQEvmsPbx77 7b/BbTPfvo2s1gjD17IKdg59hdVcnSobLGPK0Cpnf5PJb6J2CqBtP8NLT4zaQBAGmeps fu4B1AWv4iFLh8qXUHHsYFpj6l5EDU22m4hX6WsUphN3/TDtESXzlZrWgao+hc1reWeR cY8ktJiSFUtqtQ3ke7BRimJT4iv3GgRoOUaQS5Tk0P5nydJSJfwRjARcpKHMNvMq01e/ /E9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=Fif22sd+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 17/24] ACPI: RISC-V: drivers/acpi: Add RHCT related code Date: Mon, 30 Jan 2023 23:52:18 +0530 Message-Id: <20230130182225.2471414-18-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473143633514677?= X-GMAIL-MSGID: =?utf-8?q?1756473143633514677?= RHCT is a new table defined for RISC-V to communicate the features of the CPU to the OS. Create a new architecture folder in drivers/acpi and add RHCT parsing code. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acpi.h | 5 ++ drivers/acpi/Makefile | 2 + drivers/acpi/riscv/Makefile | 2 + drivers/acpi/riscv/rhct.c | 93 +++++++++++++++++++++++++++++++++++ 4 files changed, 102 insertions(+) create mode 100644 drivers/acpi/riscv/Makefile create mode 100644 drivers/acpi/riscv/rhct.c diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index 69a880b7257a..4fec9ea3b874 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -71,11 +71,16 @@ static inline u32 get_acpi_id_for_cpu(int cpu) { return acpi_cpu_get_madt_rintc(cpu)->uid; } +int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const char **isa); #else static inline u32 get_acpi_id_for_cpu(int cpu) { return -1; } +int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const char **isa) +{ + return -1; +} #endif /* CONFIG_ACPI */ diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index feb36c0b9446..3fc5a0d54f6e 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -131,3 +131,5 @@ obj-y += dptf/ obj-$(CONFIG_ARM64) += arm64/ obj-$(CONFIG_ACPI_VIOT) += viot.o + +obj-$(CONFIG_RISCV) += riscv/ diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile new file mode 100644 index 000000000000..8b3b126e0b94 --- /dev/null +++ b/drivers/acpi/riscv/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += rhct.o diff --git a/drivers/acpi/riscv/rhct.c b/drivers/acpi/riscv/rhct.c new file mode 100644 index 000000000000..7c64be64d9d9 --- /dev/null +++ b/drivers/acpi/riscv/rhct.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022-2023, Ventana Micro Systems Inc + * Author: Sunil V L + * + */ + +#define pr_fmt(fmt) "ACPI: RHCT: " fmt + +#include + +static void acpi_rhct_warn_missing(void) +{ + pr_warn_once("No RHCT table found\n"); +} + +static struct acpi_table_header *acpi_get_rhct(void) +{ + static struct acpi_table_header *rhct; + acpi_status status; + + /* + * RHCT will be used at runtime on every CPU, so we + * don't need to call acpi_put_table() to release the table mapping. + */ + if (!rhct) { + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct); + if (ACPI_FAILURE(status)) + acpi_rhct_warn_missing(); + } + + return rhct; +} + +/* + * During early boot, the caller should call acpi_get_table() and pass its pointer to + * these functions(and free up later). At run time, since this table can be used + * multiple times, pass NULL so that the table remains in memory + */ +int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int acpi_cpu_id, const char **isa) +{ + struct acpi_rhct_node_header *node, *ref_node, *end; + struct acpi_table_rhct *rhct; + struct acpi_rhct_hart_info *hart_info; + struct acpi_rhct_isa_string *isa_node; + u32 *hart_info_node_offset; + int i, j; + + if (acpi_disabled) { + pr_debug("%s: acpi is disabled\n", __func__); + return -1; + } + + if (!table) { + rhct = (struct acpi_table_rhct *)acpi_get_rhct(); + if (!rhct) + return -ENOENT; + } else { + rhct = (struct acpi_table_rhct *)table; + } + + node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset); + end = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->header.length); + + for (i = 0; i < rhct->node_count; i++) { + if (node >= end) + break; + switch (node->type) { + case ACPI_RHCT_NODE_TYPE_HART_INFO: + hart_info = ACPI_ADD_PTR(struct acpi_rhct_hart_info, node, + sizeof(struct acpi_rhct_node_header)); + hart_info_node_offset = ACPI_ADD_PTR(u32, hart_info, + sizeof(struct acpi_rhct_hart_info)); + if (acpi_cpu_id != hart_info->uid) + break; + for (j = 0; j < hart_info->num_offsets; j++) { + ref_node = ACPI_ADD_PTR(struct acpi_rhct_node_header, + rhct, hart_info_node_offset[j]); + if (ref_node->type == ACPI_RHCT_NODE_TYPE_ISA_STRING) { + isa_node = ACPI_ADD_PTR(struct acpi_rhct_isa_string, + ref_node, + sizeof(struct acpi_rhct_node_header)); + *isa = isa_node->isa; + return 0; + } + } + break; + } + node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node, node->length); + } + + return -1; +} From patchwork Mon Jan 30 18:22:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50413 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2332127wrn; Mon, 30 Jan 2023 10:29:23 -0800 (PST) X-Google-Smtp-Source: AK7set8gKT9NebU94t4dt42mIpBFPh3M0GIkw5vlXMzP7sb8rwLfrXqn1sPPLoZchgS9u/FMfqX3 X-Received: by 2002:a17:906:db07:b0:881:9531:35a0 with SMTP id xj7-20020a170906db0700b00881953135a0mr14780342ejb.73.1675103363451; Mon, 30 Jan 2023 10:29:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103363; cv=none; d=google.com; s=arc-20160816; b=Fr7In3FQjTa3385YJJmPYTn8WLP3jkequPamHE5fWqLOQOg56Iu98wh5iiJsFOBj9G kFYxpKH1+echTjsWsTC/FFDNlFveO5UuCH5S43onAZUmKo11FYqDttr1ngJ0bTzEu/4Z C+Tk0VOT4UdvqVJAaR8hlRKIUsARTnA/tpsfWoxFwb4Xd9s5Za1AOXYQrwie7x+9qp0Q LH1HsVjunrZFD+nJl4lRIz3msmL7Xm0+HkWsjSz1vAiTY9+bkAU3WW7bs8Epg6ohtEgJ Dr9hKUr8ycsGfYL7AZZSXKv5x1hFFacKum7EYMxUW4YH8IKg35Ey16lM1hALiBATbiuI 2soA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=HjibFpTqTShjczIJbVTkz5RGTuyNmy3y1G35vLo3EEc=; b=F5gAzWkiyr1jrIHQg9/R1I05Rq65B4n+zqYTLCNdKYk8YRgX7p0+w9kMaDtKwLwVdL uQbGych2HOVGpl27z6gix1RDP44R13+6/FHNJuuJcZgmi09fiYBqX8ZUjEh/p2DN+10/ kBadmFRPOcYWOEtp6FE3qTvVmPcCiy7wPlXCrkg5/NfgypwdWbbl727tEBLN46QSWno/ HXjkMLV0u6F7IHevr+kyHS5FL2gQ1qV4/fsraofbKPT3m7wKWAy1+UE5/FbW6oIEccfj dXR46NNHV+wng+ED+x1GiucXksLA9nwyvswLU9L3yNIvxJfbYhTFAV8knKciMsdQnVKo YTAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=JIG4KdNI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 18/24] RISC-V: ACPI: time.c: Add ACPI support for time_init() Date: Mon, 30 Jan 2023 23:52:19 +0530 Message-Id: <20230130182225.2471414-19-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473184169064035?= X-GMAIL-MSGID: =?utf-8?q?1756473184169064035?= On ACPI based platforms, timer related information is available in RHCT. Add ACPI based probe support to the timer initialization. Signed-off-by: Sunil V L --- arch/riscv/kernel/time.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c index 1cf21db4fcc7..e49b897fc657 100644 --- a/arch/riscv/kernel/time.c +++ b/arch/riscv/kernel/time.c @@ -4,6 +4,7 @@ * Copyright (C) 2017 SiFive */ +#include #include #include #include @@ -18,17 +19,29 @@ EXPORT_SYMBOL_GPL(riscv_timebase); void __init time_init(void) { struct device_node *cpu; + struct acpi_table_rhct *rhct; + acpi_status status; u32 prop; - cpu = of_find_node_by_path("/cpus"); - if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop)) - panic(KERN_WARNING "RISC-V system with no 'timebase-frequency' in DTS\n"); - of_node_put(cpu); - riscv_timebase = prop; + if (acpi_disabled) { + cpu = of_find_node_by_path("/cpus"); + if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop)) + panic("RISC-V system with no 'timebase-frequency' in DTS\n"); + of_node_put(cpu); + riscv_timebase = prop; + } else { + status = acpi_get_table(ACPI_SIG_RHCT, 0, (struct acpi_table_header **)&rhct); + if (ACPI_FAILURE(status)) + panic("RISC-V ACPI system with no RHCT table\n"); + riscv_timebase = rhct->time_base_freq; + acpi_put_table((struct acpi_table_header *)rhct); + } lpj_fine = riscv_timebase / HZ; - of_clk_init(NULL); + if (acpi_disabled) + of_clk_init(NULL); + timer_probe(); tick_setup_hrtimer_broadcast(); From patchwork Mon Jan 30 18:22:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50414 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2332278wrn; Mon, 30 Jan 2023 10:29:46 -0800 (PST) X-Google-Smtp-Source: AK7set9YbCkG3UAXq//bKgQ+omxu5L/bOPresGQoMj8uY1JdQRPQVdS8CX2tCqyPDN2foZVT+c7D X-Received: by 2002:a17:906:85c9:b0:878:8073:4915 with SMTP id i9-20020a17090685c900b0087880734915mr376661ejy.15.1675103386228; Mon, 30 Jan 2023 10:29:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103386; cv=none; d=google.com; s=arc-20160816; b=jukOixGcxemMDl5iXP1nc+BFX2C2RarqrZRAXrtvChUZBULTcXT6EFM8GfxCs7zUbe BdDjvvnOVibPop5ZooneNnTjl/e46TFVDQWjWCapYWgPPMRckQ5EHuNrOy2KmuYqRRZX k2Liw5bnzMXziL3NWz6yGmiTLlGXkfgYXGJTz1Eny5FiV7PZ+knLjTEHZXiBAcIbgYoR w4CRMcvvsidenMgPLoEGnO9pNthbTDx9k7Qt/0bckRTuEs/ut0un2ZMUEBWso7tEkaat BYTixzrXDLUJ8XbEO2WoAx2V1UHebN8enP4Zre5i2xB1dh6wzww0Ugh9SFGGNccMg+H/ 3Hvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UhwY+WHgnWrppFtmwiM46uOiQrz563HB2faXGIghFSU=; b=YaDfVSvKedG2VeflNy+LTsT/nFV8lWAkgsc0j+DwJNEttXgh7IzINGzjU9B9uPzarA nw14KI7MRAwGai1PAJHcyqwaN96qAyboZVWkWYHoYQgivFidSJrLgL5FBj8ttFblIvnt Ot3C5DuWVmmsYMKGv8L0Ncj2Sp4qCnBIzIDbFh/oNQyriJn6nyxPEiVYCaXjtlxHg5yP hkDEkA2gYhyy5wk0suZ9XaByfCmakiP5s1S62EYtKaVpDSS32ZEwu9MHTb44GZfugbHY FE5GlMvawOKYzgvP35mqEJO4O8Y83wYfMv4ZCpjtcbbo7yU45mNxNDZqlcThQMpH1TSJ 3iXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=iInNpQ7c; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 19/24] RISC-V: ACPI: cpufeature: Add ACPI support in riscv_fill_hwcap() Date: Mon, 30 Jan 2023 23:52:20 +0530 Message-Id: <20230130182225.2471414-20-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473208693704226?= X-GMAIL-MSGID: =?utf-8?q?1756473208693704226?= On ACPI based systems, the information about the hart like ISA, extesions supported are defined in RISC-V Hart Capabilities Table (RHCT). Enable filling up hwcap structure based on the information in RHCT. Signed-off-by: Sunil V L --- arch/riscv/kernel/cpufeature.c | 45 ++++++++++++++++++++++++++++------ 1 file changed, 38 insertions(+), 7 deletions(-) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 93e45560af30..c10177c608f8 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -6,12 +6,14 @@ * Copyright (C) 2017 SiFive */ +#include #include #include #include #include #include #include +#include #include #include #include @@ -21,6 +23,7 @@ #include #include #include +#include #define NUM_ALPHA_EXTS ('z' - 'a' + 1) @@ -93,7 +96,10 @@ void __init riscv_fill_hwcap(void) char print_str[NUM_ALPHA_EXTS + 1]; int i, j, rc; unsigned long isa2hwcap[26] = {0}; + struct acpi_table_header *rhct; + acpi_status status; unsigned long hartid; + unsigned int cpu; isa2hwcap['i' - 'a'] = COMPAT_HWCAP_ISA_I; isa2hwcap['m' - 'a'] = COMPAT_HWCAP_ISA_M; @@ -106,18 +112,38 @@ void __init riscv_fill_hwcap(void) bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX); - for_each_of_cpu_node(node) { + if (!acpi_disabled) { + + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct); + if (ACPI_FAILURE(status)) + return; + } + + for_each_possible_cpu(cpu) { unsigned long this_hwcap = 0; DECLARE_BITMAP(this_isa, RISCV_ISA_EXT_MAX); const char *temp; - rc = riscv_of_processor_hartid(node, &hartid); - if (rc < 0) - continue; + if (acpi_disabled) { + node = of_cpu_device_node_get(cpu); + if (node) { + rc = riscv_of_processor_hartid(node, &hartid); + if (rc < 0) + continue; - if (of_property_read_string(node, "riscv,isa", &isa)) { - pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); - continue; + if (of_property_read_string(node, "riscv,isa", &isa)) { + pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); + continue; + } + of_node_put(node); + } + } else { + rc = acpi_get_riscv_isa(rhct, get_acpi_id_for_cpu(cpu), &isa); + if (rc < 0) { + pr_warn("Unable to get ISA for the hart - %d\n", + cpu); + continue; + } } temp = isa; @@ -248,6 +274,11 @@ void __init riscv_fill_hwcap(void) bitmap_and(riscv_isa, riscv_isa, this_isa, RISCV_ISA_EXT_MAX); } +#ifdef CONFIG_ACPI + if (!acpi_disabled) + acpi_put_table((struct acpi_table_header *)rhct); +#endif + /* We don't support systems with F but without D, so mask those out * here. */ if ((elf_hwcap & COMPAT_HWCAP_ISA_F) && !(elf_hwcap & COMPAT_HWCAP_ISA_D)) { From patchwork Mon Jan 30 18:22:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50415 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2332851wrn; Mon, 30 Jan 2023 10:30:55 -0800 (PST) X-Google-Smtp-Source: AK7set9FaFRM+R/6qiUhjNbH2EYHK9rHfcFyXjqW9+qI9ly1Ryl8AOaSt31rNzNxhW9wMFUbny+3 X-Received: by 2002:aa7:9011:0:b0:593:903a:17fd with SMTP id m17-20020aa79011000000b00593903a17fdmr8392028pfo.0.1675103455006; Mon, 30 Jan 2023 10:30:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103454; cv=none; d=google.com; s=arc-20160816; b=zxyTBO4tE+rO/Fj/AbhsRhaFdc7pnsL9zT6xJwfcLmoTkP19tEm4OhxnTijBJ2uOca vlwKsrp03jfYuxAOy4JzQVeeZ2I+IJHlZPVMgMD73m82iMPEE/xTBIJMCYMjSakqOeVL +waltNGwUI3b8+7NX01CNuGRvfkXFX2aBvvp2eCVj+NBAZjnR34bLiEtjnXeci27y8TC aSZw8Cun07QBHhVClEAGlHcHWprN6ugho/xEf8nPs1m6qFzWCHV5ATVU37rlVF/ALkNP zw4bHgG37Xjgv/bRgvuXwXVeJAzxvfDq29nheC6vGEKtvIrMo1FFIxZOwASzyqFqw3tW llUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nLT6YVjIMhggeUGxbDKRIEVD6SSgY7IRMPNBstFbaBA=; b=Tul+fiLUKSIyuW0IR7qnFEJjOUJnFT+4KzVSGhNDRm2JxDnVoMG/MxU0me8HQ9/zvB KWpYV0YQlp9IEGDmsh682GxedK7g170fvZk/D9AHdv+EC0URhWYpJs5JUjmoB1Vg0il7 TsXef2JRhvZpWNXP0CE7IYCrZBacUBBo0hQcxaEFRJ+svd6h1fK8MHan6FRMdqDDoxul Vuqd8W34+szulS2Sj2SztwhOKIC4/FiVUWQ3bK4NTxqlcAD/RLB+rZYmLHR08E1LxZcQ orNrpx5Zl8uKzsebYvCIMA5mE2EpGyUFB9spMIait6tKU+A48AjKMpEo24l7XA+q8bvO TDZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=M1QDDILc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 20/24] RISC-V: ACPI: cpu: Enable cpuinfo for ACPI systems Date: Mon, 30 Jan 2023 23:52:21 +0530 Message-Id: <20230130182225.2471414-21-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473280664917954?= X-GMAIL-MSGID: =?utf-8?q?1756473280664917954?= On ACPI based platforms, few details like ISA need to be read from the ACPI table. Enable cpuinfo on ACPI based systems. Signed-off-by: Sunil V L --- arch/riscv/kernel/cpu.c | 36 +++++++++++++++++++++++++++++------- 1 file changed, 29 insertions(+), 7 deletions(-) diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 1b9a5a66e55a..bd6c0fcfe4ce 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2012 Regents of the University of California */ +#include #include #include #include @@ -256,26 +257,47 @@ static void c_stop(struct seq_file *m, void *v) { } +#ifdef CONFIG_ACPI +void acpi_print_hart_info(struct seq_file *m, + unsigned long cpu) +{ + const char *isa; + + if (!acpi_get_riscv_isa(NULL, get_acpi_id_for_cpu(cpu), &isa)) + print_isa(m, isa); + +} +#endif + static int c_show(struct seq_file *m, void *v) { unsigned long cpu_id = (unsigned long)v - 1; - struct device_node *node = of_get_cpu_node(cpu_id, NULL); struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id); + struct device_node *node; const char *compat, *isa; seq_printf(m, "processor\t: %lu\n", cpu_id); seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id)); - if (!of_property_read_string(node, "riscv,isa", &isa)) - print_isa(m, isa); + + if (acpi_disabled) { + node = of_get_cpu_node(cpu_id, NULL); + if (!of_property_read_string(node, "riscv,isa", &isa)) + print_isa(m, isa); + if (!of_property_read_string(node, "compatible", &compat) + && strcmp(compat, "riscv")) + seq_printf(m, "uarch\t\t: %s\n", compat); + of_node_put(node); + } +#ifdef CONFIG_ACPI + else + acpi_print_hart_info(m, cpu_id); +#endif + print_mmu(m); - if (!of_property_read_string(node, "compatible", &compat) - && strcmp(compat, "riscv")) - seq_printf(m, "uarch\t\t: %s\n", compat); seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid); seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid); seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid); seq_puts(m, "\n"); - of_node_put(node); return 0; } From patchwork Mon Jan 30 18:22:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50416 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2333012wrn; Mon, 30 Jan 2023 10:31:13 -0800 (PST) X-Google-Smtp-Source: AK7set/4jp6dW+U4J0CGcAfRRV6IpAKrqO+WAq8Z6Hw+NJGi9RlF72LipIB3zD3ztgwjFaF9tilc X-Received: by 2002:a05:6402:22a7:b0:4a2:2819:ed22 with SMTP id cx7-20020a05640222a700b004a22819ed22mr10641109edb.38.1675103473548; Mon, 30 Jan 2023 10:31:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103473; cv=none; d=google.com; s=arc-20160816; b=YtcbcqbqZXBxTTIj9LCoLjlspwb3E6z627ssuVEX/wnUenzVSO95xAJo/XkXDHYgYo mVVA+hhUQzm4hU2qJXzR9XeJ8VOHL10MWn+Vmx3f9d+Sq/Oeu5/owrspgrxBGEB8Nl26 O5HDkOBhUEA5y7IPWJWUhZ7zGATKilwXemU5aJTy7LP2I47X3P+U6QcooMq0HlRsfF06 kUu4SGxdebYb0T8LSl7EJXFNrWlx6RzG49sLWRq6kf4Vn2BRFdHXgx/Zv6U2uIfHyWaL fxsEP/DA4GteVksozqoBlBn+dyC9uii9aIbM//8Q0sTPkAuAOJrLEKvQKyleoQb5frcH Kteg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=3oZQ53k8sDIi9jBLs3iLBCqJLG9S0A73uETYb1fJYlI=; b=ZMxngElxMeVnorqfkR5AMnuaKf8Fpk2gVtUiNiVGz2d0FEvtBhQj+1IWBovfspIf7j oflrqNoDxHmQmPQAnWniYBk8M7gY4QlRzuIq12giJ5ICNMPel3cwwkLqzv2B4EgFK5he RYD/P3l213RIGaLDewuwPnTsVboBr48DUsIGSAcdcIDf7xKw63PMLdd8+yJc9mcaCR+M 8r4/PUFJ5SebHi1viIrHx/hqo+X3BZ6m6x2DFD54ztOPHtxCQhyhzXlyM+VyQUwh6ejy Bo6V4G9tqDTfc409tzHE4TdVpdHUnUX9MXsG4dfsSu/I9ygh679Mqbp/H/zMGp7QxHrz OgnA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=RORdYgIq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 21/24] RISC-V: ACPI: Add ACPI initialization in setup_arch() Date: Mon, 30 Jan 2023 23:52:22 +0530 Message-Id: <20230130182225.2471414-22-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473299824945235?= X-GMAIL-MSGID: =?utf-8?q?1756473299824945235?= Initialize ACPI tables for RISC-V during boot. Signed-off-by: Sunil V L --- arch/riscv/kernel/setup.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 4335f08ffaf2..5b4ad1baf664 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -8,6 +8,7 @@ * Nick Kossifidis */ +#include #include #include #include @@ -276,14 +277,22 @@ void __init setup_arch(char **cmdline_p) efi_init(); paging_init(); + + /* Parse the ACPI tables for possible boot-time configuration */ + acpi_boot_table_init(); + if (acpi_disabled) { #if IS_ENABLED(CONFIG_BUILTIN_DTB) - unflatten_and_copy_device_tree(); + unflatten_and_copy_device_tree(); #else - if (early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa)))) - unflatten_device_tree(); - else - pr_err("No DTB found in kernel mappings\n"); + if (early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa)))) + unflatten_device_tree(); + else + pr_err("No DTB found in kernel mappings\n"); #endif + } else { + early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa))); + } + early_init_fdt_scan_reserved_mem(); misc_mem_init(); From patchwork Mon Jan 30 18:22:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50417 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2333232wrn; Mon, 30 Jan 2023 10:31:40 -0800 (PST) X-Google-Smtp-Source: AK7set/sIpWKgPD69DOcuCqXFFZmsIhE0jpZWnEjbVJuotYIaqBS148Psr7TMYEIhDMsOcV7AfAY X-Received: by 2002:a05:6a21:3288:b0:bc:50a6:5944 with SMTP id yt8-20020a056a21328800b000bc50a65944mr15125080pzb.38.1675103500472; Mon, 30 Jan 2023 10:31:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103500; cv=none; d=google.com; s=arc-20160816; b=xSZAKz8IGpIE40PGVarPsOO0yjZMmZTDHt9yE/NHQT+DZCmp/yZC7oerNMakmPM4mI rwBUmNnTcdddxOUDqGBMJDo6UcwtkUxFJYOhDRFof9/H4Ax+vmKRJpPmnDlMBNY8IEqE Bprx5j9jkSVwPDq/lHe5Yh9B2N6LRgKJq527iRI3E3C9dL5QOdVNyjItVftbXMdrJqIS g8fQ5THy6+gM+q0jI4diVflFrQ0UtciwEjPOxYW914KTn66H++5k2YiB9jX3hCIJQlCq A8Fduo4/6nY2GtrW70D7mHbsdOdu9hUIV6Yick2jQm2TyEXs+Jxq0Qt8A2nr+fO0slG1 0JzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vkGE01Mpgd0zQdA3GENSlYo9eU6sEMItLJR0OaGMyjQ=; b=Fj0YWvok5sVFzItv/1zQJ9cET1wdOf22ih6mekmsuVrH6Z2J5x0IQCkxoib0I+dujg Q0yq7QA4WEoiAdTicP0gr/FrwD0/B0mbsiZPlSsi9TgOnIAtf2ytzZ1T2JuwTUnx+ddc cfBZKa6H8fng2Q/hLgavDpwbF4MaIvA288Wcz6JVS2E1ufB7r/pZ3FnoCHJGy/dgiCNF 2n4xTD+AqZw5EJX2drudh92LAH/1g14ZNLvlwgELh7ixnt2rnu/n1oUxxuxSn2vluMWJ FTXt6KXl8IwDnXVy+Qs9yFwy0q3llzbv6qAqf1sTICR3RSeVfaWq2gSIjqJvor1OEYBu rTBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=jbIhshr5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 22/24] RISC-V: ACPI: Enable ACPI in defconfig Date: Mon, 30 Jan 2023 23:52:23 +0530 Message-Id: <20230130182225.2471414-23-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473327992985472?= X-GMAIL-MSGID: =?utf-8?q?1756473327992985472?= Add support to build ACPI subsystem in defconfig. Signed-off-by: Sunil V L --- arch/riscv/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 128dcf4c0814..8ce06fb0dde8 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -218,3 +218,7 @@ CONFIG_RCU_EQS_DEBUG=y # CONFIG_FTRACE is not set # CONFIG_RUNTIME_TESTING_MENU is not set CONFIG_MEMTEST=y +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_MCFG=y +# CONFIG_PCI_QUIRKS is not set From patchwork Mon Jan 30 18:22:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50418 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2333262wrn; Mon, 30 Jan 2023 10:31:43 -0800 (PST) X-Google-Smtp-Source: AMrXdXv4hLj/GX5r3yHlYYtt52eFf2X0sKqHMWe/FES0BfhGDuxNH+i1WRqPfN8Sz9PfYXFrHuhU X-Received: by 2002:a05:6a20:9588:b0:b5:c0c1:245c with SMTP id iu8-20020a056a20958800b000b5c0c1245cmr57648470pzb.22.1675103502950; Mon, 30 Jan 2023 10:31:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103502; cv=none; d=google.com; s=arc-20160816; b=FzrgLMlAy9JnWuu1GZCuXCdkegzm09+S11EHbYk3zI7WFhpQ9i7yj1vTx/nawTOYrr OHvTf3Au1vakU3EkDaDTEokZ0gVO2Y4qD4GpPTRWreKGxJ/kraUitJtsdXo59fqxVrU7 WuD6OHtYCEqdKaZE46nYjMDRu43FzWaDvuvRFU2zTrcBFd6KRDRF5mDmtEaFUWfaMQUx i41Pf0+JGMgCeQjOAI6/1exICUIajKXZntKRrwLrPsJlR77u+vYTlL1bfnezymPmjsl6 GlUigL13QA3jyBR+0QTB+K7lh7Mzy25MBuIfzgC8d8MQLII+gO+GNQQfwWxiQ3JAwyYC +uaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0GmsS1bMG3vhs9nYaH5ehvEVh7IMrCbQji3r9uemxws=; b=AUvvA0KhUonHtyMlkhErSrvdQGukmg5nfwliV7fNzKywaI4j8k37JKN3BqS8U+x1at us+2OgTSwE2dm4y+8WqfJ0EzTsB0kHU71ZeK+QqxYFczKWhKB2PxjBcvGnAW1ivQQXVN sOe7664z2a5fqXFITbZAjj770bHy/ZB93t35XKwdbM9dJ/YsGCk8oAIN+yGyb2Us62AL 4N3CBK+g4MeukELGTMPWJQvmTTdJhih1Y8eBCezHgQiR8eBuCbW4bDIoEAZ5ll5Q6paK RDDyOIohngTBqwv7xwNHIq6/QkWlReEwbg/OuDSDftsU1ZLlwO0DGvF1pIh/fl/HyKDs Pz6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=FdQa5Nr8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 23/24] MAINTAINERS: Add entry for drivers/acpi/riscv Date: Mon, 30 Jan 2023 23:52:24 +0530 Message-Id: <20230130182225.2471414-24-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473331086739013?= X-GMAIL-MSGID: =?utf-8?q?1756473331086739013?= ACPI defines few RISC-V specific tables which need parsing code added in drivers/acpi/riscv. Add maintainer entries for this newly created folder. Signed-off-by: Sunil V L --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8a5c25c20d00..b14ceb917a81 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -450,6 +450,13 @@ S: Orphan F: drivers/platform/x86/wmi.c F: include/uapi/linux/wmi.h +ACPI FOR RISC-V (ACPI/riscv) +M: Sunil V L +L: linux-acpi@vger.kernel.org +L: linux-riscv@lists.infradead.org +S: Maintained +F: drivers/acpi/riscv + ACRN HYPERVISOR SERVICE MODULE M: Fei Li L: acrn-dev@lists.projectacrn.org (subscribers-only) From patchwork Mon Jan 30 18:22:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 50419 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2333444wrn; Mon, 30 Jan 2023 10:32:04 -0800 (PST) X-Google-Smtp-Source: AK7set/mEzRpoa9wCT5wavaJMp2zyxi8KYT+OeRwomZos3/526O7zlB+0/TFjQkI1uT4+eLg0eSo X-Received: by 2002:a17:90a:1952:b0:22c:3edd:7e48 with SMTP id 18-20020a17090a195200b0022c3edd7e48mr15223058pjh.32.1675103524120; Mon, 30 Jan 2023 10:32:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675103524; cv=none; d=google.com; s=arc-20160816; b=KAz7TEErMmnO42SeLcdBH+WKXJBdT0aDImCrCVuy2c+rTEgAiZTxJRR4RXlHhyl/cb lMriHOXqU722Pvv9OaKzmP7MyhrCNt7atH1b3BSwRT/ytG4HtDBaNuh/JTDnM6MocNOO /xeujr2pthf/JGPFE7hpCULWG9Pdj05pL0Hn55QN92Y+feCXlVOWGAuQPRp51MonaW70 kv2kfOSONt3WFEc5u2kUmOvN3xj1WuZKdCe2ltDY/WM9dbFzHSGfpXQqlmuAxjXffmEu POB5mwOpn+icQ6+lzoHDLHJmkivRzwayqByTMjYJNKfxfyI3J9BUYMuZNN6PoAKtAYTn E31w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wuVGWrNUUEjIXx2KjigY2fz+dkSBCOERpinGp69EYJM=; b=V4rEoV/NzP7ZFADY9PueY7gxPSsuUCLfBS3HNs5qd1Qs7B9kFPFQS0HAoT+7axKSpV 7Jybui1ufnigauSI2ddx4oN/j7TU5FF40CjyXPafD5gxGMsqf1JgrbFKjnO4IClpqC80 ajlZtWbdKhUWKSJ9jaPcCKdEL8agjnCFE4OBSN3dT5y+4pSmpnlf4zYBZ+IL1nqVz/LE t4ACXMGxJmRaFBC4yC/BEa2VdOrUFREdsrFio8oZXRbU4Vd6X7tefX1+YVRio4N4W4iM IWYFK2nCvmOs5VtwDOJy1jsKiXKtOiZOVV0W1B1hRfp3EaaplLF9poFPf0QmEOreSWoo FkqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=iIZwFAAW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 24/24] Documentation/kernel-parameters.txt: Add RISC-V for ACPI parameter Date: Mon, 30 Jan 2023 23:52:25 +0530 Message-Id: <20230130182225.2471414-25-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756473352780866531?= X-GMAIL-MSGID: =?utf-8?q?1756473352780866531?= With ACPI support added for RISC-V, this kernel parameter also supported on RISC-V. Hence, update the documentation. Signed-off-by: Sunil V L --- Documentation/admin-guide/kernel-parameters.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 6cfa6e3996cf..d9795418aaf8 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1,9 +1,9 @@ - acpi= [HW,ACPI,X86,ARM64] + acpi= [HW,ACPI,X86,ARM64,RISC-V] Advanced Configuration and Power Interface Format: { force | on | off | strict | noirq | rsdt | copy_dsdt } force -- enable ACPI if default was off - on -- enable ACPI but allow fallback to DT [arm64] + on -- enable ACPI but allow fallback to DT [arm64,riscv] off -- disable ACPI if default was on noirq -- do not use ACPI for IRQ routing strict -- Be less tolerant of platforms that are not @@ -12,6 +12,8 @@ copy_dsdt -- copy DSDT to memory For ARM64, ONLY "acpi=off", "acpi=on" or "acpi=force" are available + For RISC-V, ONLY "acpi=off", "acpi=on" or "acpi=force" + are available See also Documentation/power/runtime_pm.rst, pci=noacpi