From patchwork Sat Oct 15 11:46:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2925 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp605549wrs; Sat, 15 Oct 2022 04:51:43 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5h5QxX1FeYKkOlnO68M1GaRHB8EcUqwweqAs0jV+XhmsECRxZHOENgVLo25A8arPyADtPU X-Received: by 2002:a63:c3:0:b0:439:72d7:7e1f with SMTP id 186-20020a6300c3000000b0043972d77e1fmr2248512pga.524.1665834703639; Sat, 15 Oct 2022 04:51:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665834703; cv=none; d=google.com; s=arc-20160816; b=PPjSdSY22lhD9m6N5Yry4N2g4jTov02F4o2G7MXCjZvifmJER16XQO9Lbk6PcW6uQv toQKeJbFPGmwCD6oehmb/YZoJfqAubWQGgWpTmJ6r+U/SXfi9b1SfJwxrA98Dz/SIL/Q J7E/vPEog7h89ijtClIYtABlbBbINBNVfuv4uAG/gHI9UaEB2EgqGJictiIHQgIg/i7k mk4fAnsKiaVovizGrvhFBzxEVtNSuDgOv9VJ2uv3vFZkdTrx2P5dNSPoj2dXsWD/YUsZ B/9cMFDNdyQak+t27GP0VotdZccq6zkJf6ji2iJQZ/yopHL1TcuFc3nCrAR2HX2thKkQ AHaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jnL3Eejj6No3x0u7kQLK+qUsRrn5bHj7kcni5tUirqA=; b=y3cZ20l5EpXfFx5ZQF0rsxbWt3oMHMeoM1ZMkq0vK+lb7MQhjXSkTt7YJNudC98VxV QYKGjF1Xh1x4v4jDFWvfyFju/zXLoFutKHjCbOdAI+bgSAPctk8UbyTAtzannEj6jd4P SoswEpGpQTUin82faggHoF1Zeb7Xj2yS9RLk5MmZCDrvMtOv0JWUDj1YRF9Sm9e3locN nMBhTToGjt3TjbbPeBY0I1Qe95PTnvWf4osALD59BjUlolEs/J+BCq6P78+ssqO9OMZu PMdbz1YjrdeY8tlQS2F7Z4Ht1OtXkALj2hUaFhoCee4zgbV/Y5pn5Jh0ypq87US1ZJte ouJA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=MqyWEche; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. 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Sat, 15 Oct 2022 04:50:02 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 8E74DB80935; Sat, 15 Oct 2022 11:50:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 57760C433B5; Sat, 15 Oct 2022 11:49:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834600; bh=8F+Kx4X5IE8S8oO8XnXHjQy0E8HHBWecQqZQdnIaKB8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MqyWEcheE/ZvrMEMD0IFDaBpYGXQj1yPeDACpfZMhgiVjfrHWDtzJan/M2b5trwub 8XG5lxZwZm4SRXMEyzPVgA3tNMMYwW4ONMFrQTP2kc/vFPgNZ9NwQ3blOD+CC4ebHz qZW310sZiUm6e4qnx+aGHMdTLW20o24rAthVOcETHVCiSD01kcTYK38Pum4QTnJr3R iJNo6sNy9yv0Lc7T4kfPdChSfdTNLJvwkxf3tApe9toeBSeUnl4z7NnYM11akYb6KP 3cskY+BGGrdDqoiLxtNt9ZQLOGOXg9/gYVFRoELXrY0MdxUmqaXH7dm6TGKD6fATp/ LD/cQeL9h3k0A== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , kernel test robot Subject: [PATCH V7 01/12] riscv: elf_kexec: Fixup compile warning Date: Sat, 15 Oct 2022 07:46:51 -0400 Message-Id: <20221015114702.3489989-2-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754289985902494?= X-GMAIL-MSGID: =?utf-8?q?1746754289985902494?= From: Guo Ren If CRYTPO or CRYPTO_SHA256 or KEXE_FILE is not enabled, then: COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash arch/riscv/ ../arch/riscv/kernel/elf_kexec.c: In function 'elf_kexec_load': ../arch/riscv/kernel/elf_kexec.c:185:23: warning: variable 'kernel_start' set but not used [-Wunused-but-set-variable] 185 | unsigned long kernel_start; | ^~~~~~~~~~~~ Fixes: 838b3e28488f ("RISC-V: Load purgatory in kexec_file") Signed-off-by: Guo Ren Signed-off-by: Guo Ren Reviewed-by: Conor Dooley Reported-by: kernel test robot --- arch/riscv/kernel/elf_kexec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/kernel/elf_kexec.c b/arch/riscv/kernel/elf_kexec.c index 0cb94992c15b..4b9264340b78 100644 --- a/arch/riscv/kernel/elf_kexec.c +++ b/arch/riscv/kernel/elf_kexec.c @@ -198,7 +198,7 @@ static void *elf_kexec_load(struct kimage *image, char *kernel_buf, if (ret) goto out; kernel_start = image->start; - pr_notice("The entry point of kernel at 0x%lx\n", image->start); + pr_notice("The entry point of kernel at 0x%lx\n", kernel_start); /* Add the kernel binary to the image */ ret = riscv_kexec_elf_load(image, &ehdr, &elf_info, From patchwork Sat Oct 15 11:46:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2922 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp605385wrs; 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Sat, 15 Oct 2022 04:50:09 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 833F860C61; Sat, 15 Oct 2022 11:50:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EAE75C4347C; Sat, 15 Oct 2022 11:50:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834608; bh=HgttzcB3yLFQv0oTv0xo1/g08wvYrxYqpGbvZbfJF4A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ic+NMMq3DMNQNnLLrBO36Tkg6tOlVpq2B1QsMX7YhyuBvyRQCixjSaWyh5XiGjZ8S pWxp9pr5uHEJgu2IpE1Lp5IvbjD9CDFdFHRwv3VCo2gHSzaztSRaQvOXgZPX1sSzIh eemte3mOtoC6MFO4E2RmGnG2Np7Vmnp/7319Q3XPeSiPMGQjkWDtJRQudFUs+9n5m9 1SvlAv8q8aJ0N/U0kfiD1R+/EbEucpwJCVWYkkA76pSB9lo4L4dQPEiIi8UK27IMuU BIp3Sllxq2k+HvvB0FjHzS2syGXc6cLcq6h5JH4qbL3vK+asaXAwEy0NgRb2sDROLM I7RrpCBNXNCYg== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , kernel test robot Subject: [PATCH V7 02/12] riscv: compat_syscall_table: Fixup compile warning Date: Sat, 15 Oct 2022 07:46:52 -0400 Message-Id: <20221015114702.3489989-3-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754250127527865?= X-GMAIL-MSGID: =?utf-8?q?1746754250127527865?= From: Guo Ren ../arch/riscv/kernel/compat_syscall_table.c:12:41: warning: initialized field overwritten [-Woverride-init] 12 | #define __SYSCALL(nr, call) [nr] = (call), | ^ ../include/uapi/asm-generic/unistd.h:567:1: note: in expansion of macro '__SYSCALL' 567 | __SYSCALL(__NR_semget, sys_semget) Fixes: 59c10c52f573 ("riscv: compat: syscall: Add compat_sys_call_table implementation") Signed-off-by: Guo Ren Signed-off-by: Guo Ren Reviewed-by: Conor Dooley Reported-by: kernel test robot --- arch/riscv/kernel/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index db6e4b1294ba..ab333cb792fd 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -9,6 +9,7 @@ CFLAGS_REMOVE_patch.o = $(CC_FLAGS_FTRACE) CFLAGS_REMOVE_sbi.o = $(CC_FLAGS_FTRACE) endif CFLAGS_syscall_table.o += $(call cc-option,-Wno-override-init,) +CFLAGS_compat_syscall_table.o += $(call cc-option,-Wno-override-init,) ifdef CONFIG_KEXEC AFLAGS_kexec_relocate.o := -mcmodel=medany $(call cc-option,-mno-relax) From patchwork Sat Oct 15 11:46:53 2022 Content-Type: text/plain; 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Sat, 15 Oct 2022 04:50:20 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id E8C6CB8093C; Sat, 15 Oct 2022 11:50:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9C2A0C43141; Sat, 15 Oct 2022 11:50:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834617; bh=thj4lp5B0J2/kj7Zi1BMTTtT9fAnJMteMKwuLQ0ArOk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R5XzLVn076iss7xV1RdKtNLiZpWVefu5jxhiMooWoTaC4VHTPRY1luaFRWXMKLZVi MmDYcowubcRCEsE7oFjuw2RpP85hKcTCC403awmNHMLSwpcD3ovvuqjSmCBkSkPVT6 i4Srn02JPNpmBXMWF0ESAU6cP/9kwrRkhVFqr2S6RYh5V0iaPV0Nm+UjfUZEoIuXs1 hVc2git2QOO/wWil+QlWhKrg/kuAEFGEXmE/MFR5sLtA+qz9HwnESOODwLkwOV1KEQ UAjYJqwOnkgUuEqQiZkdbQT6xKPGNm+keNg4EvkofM2B8n2TJHQGq4n2EEfGH+g/Xr CkQumXMoR/agg== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , Oleg Nesterov Subject: [PATCH V7 03/12] riscv: ptrace: Remove duplicate operation Date: Sat, 15 Oct 2022 07:46:53 -0400 Message-Id: <20221015114702.3489989-4-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754264634282535?= X-GMAIL-MSGID: =?utf-8?q?1746754264634282535?= From: Guo Ren The TIF_SYSCALL_TRACE is controlled by a common code, see kernel/ptrace.c and include/linux/thread.h. clear_task_syscall_work(child, SYSCALL_TRACE); Signed-off-by: Guo Ren Signed-off-by: Guo Ren Reviewed-by: Oleg Nesterov --- arch/riscv/kernel/ptrace.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index 2ae8280ae475..44f4b1ca315d 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -212,7 +212,6 @@ unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n) void ptrace_disable(struct task_struct *child) { - clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); } long arch_ptrace(struct task_struct *child, long request, From patchwork Sat Oct 15 11:46:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2924 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp605497wrs; Sat, 15 Oct 2022 04:51:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4cmOkWGzST9o9PiAVRfIiMZU8hQwhjVYSjf2p5+T+aUrxFewP362DTGfUVhmxY0WS6ujSb X-Received: by 2002:a63:6909:0:b0:41c:9f4f:a63c with SMTP id e9-20020a636909000000b0041c9f4fa63cmr2423794pgc.76.1665834692112; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c13-20020a170902b68d00b0018040bdb798si5684421pls.242.2022.10.15.04.51.19; Sat, 15 Oct 2022 04:51:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="bFDk/wKL"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229791AbiJOLux (ORCPT + 99 others); Sat, 15 Oct 2022 07:50:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229723AbiJOLug (ORCPT ); Sat, 15 Oct 2022 07:50:36 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 103A82980D; Sat, 15 Oct 2022 04:50:29 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 5C3B6B8093B; Sat, 15 Oct 2022 11:50:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4B0FBC433D6; Sat, 15 Oct 2022 11:50:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834627; bh=+RHLFV5pzLwomxBWNfwElTQCJrr1T7IUJgGRxuyfbig=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bFDk/wKL8L2heHLUL+JFQdLtovwC9yEN0lZn8EGMy9/otFEGsIiBALQeSDD5H0uE/ 3+y7t7yVe4qhEvCp0UugE1uJSYvaVJg3HJLC2Tk7cMBywJw74RH32RsBnHSXk3csvE 95k+JsoE2+iG/WRjAA0Kgoyv5O6sJ7NjvhKTELr9lKgqCSIisSPcqHwWp221kFj5ad 8uiX3WSSYs0obeZi9vDEozxWgv+77BAhhcj1s9hfepa64V/eOzl5t2mhDAS2VHhwB/ fj7xb20+tAs12T3G6g5TLOA7zbsuVb8Bo4veLjzFKwbyCRtewNhG5bTOH+mO71B3Fe rUtj2bAv4acfA== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Lai Jiangshan , Borislav Petkov , Miguel Ojeda , Kees Cook , Nick Desaulniers Subject: [PATCH V7 04/12] compiler_types.h: Add __noinstr_section() for noinstr Date: Sat, 15 Oct 2022 07:46:54 -0400 Message-Id: <20221015114702.3489989-5-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754278283661392?= X-GMAIL-MSGID: =?utf-8?q?1746754278283661392?= From: Lai Jiangshan And it will be extended for C entry code. Cc: Borislav Petkov Reviewed-by: Miguel Ojeda Reviewed-by: Kees Cook Suggested-by: Nick Desaulniers Suggested-by: Peter Zijlstra Signed-off-by: Lai Jiangshan --- include/linux/compiler_types.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/include/linux/compiler_types.h b/include/linux/compiler_types.h index eb0466236661..4cf5c90c51d2 100644 --- a/include/linux/compiler_types.h +++ b/include/linux/compiler_types.h @@ -231,11 +231,13 @@ struct ftrace_likely_data { #endif /* Section for code which can't be instrumented at all */ -#define noinstr \ - noinline notrace __attribute((__section__(".noinstr.text"))) \ - __no_kcsan __no_sanitize_address __no_profile __no_sanitize_coverage \ +#define __noinstr_section(section) \ + noinline notrace __section(section) __no_profile \ + __no_kcsan __no_sanitize_address __no_sanitize_coverage \ __no_sanitize_memory +#define noinstr __noinstr_section(".noinstr.text") + #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ From patchwork Sat Oct 15 11:46:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2926 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp605580wrs; Sat, 15 Oct 2022 04:51:49 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5OrLVOAthVYDC9p0WBPbMXPPh7AL6FujIX1UxPaYtDEvK9bCiAlseBY+NGHjPZWffiwrSh X-Received: by 2002:a63:1a07:0:b0:46b:2825:f9cf with SMTP id a7-20020a631a07000000b0046b2825f9cfmr2389770pga.370.1665834708718; Sat, 15 Oct 2022 04:51:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665834708; cv=none; d=google.com; s=arc-20160816; b=E/0Xi26JYjz/lFyqvH2jJfLdjJLgJoOwYgUhVtcE/3015kumSP2r3zvo7J/cNSefse HLp+PoEnTD9Pv4EChCXUkfHzXFQC4ifwQjBpoOUYRmZ6o88VWSKMkIiDVI0znYPEeI/c OHlvFSlESSgeKZXaT54hwx9LLZ29QIUCPcc0bqHGM0SHW0xWNrLUkmYJX6NAioL+Oi5c 4r5Q9ZLnCCGINRA2VoAXeFuVGbpGsaW4ycfwEyzjWT8rcE+PBVc4uVHfhFwbZ6hi2JHZ 5UpyuTdTpiX83vTjaPH5pWILh+ljxLRC0Q9yEHxs/PVi45PDO6NCGpZ9WYuIcRPjgerv gtfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7DUALbwDH7CiKg1qiotXo8D1TY9SIxZA5jetcJ4OK0E=; b=t/AiGxHNdB5mBMOAKuNw34Tb7H3jt9+dGNzUNcpDT0j/yNFY87PCORxdgmw7Z6FZXB bNttidVlh1lI1Z7JCT/YWbyBQemi9WEOavhXdTdtvGSYm70mo8/Rl4hs2io4+AYyQ3Rx VfDG/6W5cTSuWhH9UyENw9t4q0RpFnABY+RUM3MIuwPHyPmnMKC06xfWxvsT948RHana CI/w17mIAEH2XIFoGmKG9FqC0rbINDrVVqsRTosO8mNmUkh9/gzdTm/AY0/Njl3X9OH8 YT15Lfuo47/UEfOUxc6go//aNTES3Yx0XJGmWaOHoPV75HqfrGPXzHKGD4h3p2nOZSUn 7jqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=l8bX6hDb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id mq2-20020a17090b380200b001fe41707a2esi14616525pjb.90.2022.10.15.04.51.36; Sat, 15 Oct 2022 04:51:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=l8bX6hDb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229797AbiJOLvF (ORCPT + 99 others); Sat, 15 Oct 2022 07:51:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229749AbiJOLuk (ORCPT ); Sat, 15 Oct 2022 07:50:40 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CD454360A; Sat, 15 Oct 2022 04:50:38 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D95D6B80939; Sat, 15 Oct 2022 11:50:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AF334C433D7; Sat, 15 Oct 2022 11:50:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834635; bh=KyXvA35NcgjlVfSJ4KXXTHO0QhWLea8Z2lvKUOL8H8c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l8bX6hDbIlcSw8S9tXQ63o9xpdH1Z90MhBNgvQXJebCi9RaTTmqVg1J4xXScMQ4To BulDdlS9dQVILUBhwOQvZhqkDewDO72uRHLsO05TnQU5McxuysrNDq3Og1il2hjVkX 1Ao8CokdKJ3hjinRymxelP7MZI+jB44rN2Gywi8Rf2h7B5CyEku9WN1DoaCPCxcLtZ iFwFS7xE2UrVywbk/NB3I+4EG/ZbhrdVtNhb3TNJB6qIzV08P/Kex4cElWjYsTz90I MGVpehVrgvwm4r1uH5TtLOqf1D7+Hgvoa04kdo0Wy23Flza0yBWqUsVmYPB5G1fSux U9sor1uRgwM1g== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH V7 05/12] riscv: traps: Add noinstr to prevent instrumentation inserted Date: Sat, 15 Oct 2022 07:46:55 -0400 Message-Id: <20221015114702.3489989-6-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754295771400229?= X-GMAIL-MSGID: =?utf-8?q?1746754295771400229?= From: Guo Ren Without noinstr the compiler is free to insert instrumentation (think all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not yet ready to run this early in the entry path, for instance it could rely on RCU which isn't on yet, or expect lockdep state. (by peterz) Link: https://lore.kernel.org/linux-riscv/YxcQ6NoPf3AH0EXe@hirez.programming.kicks-ass.net/raw Suggested-by: Peter Zijlstra Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/kernel/traps.c | 4 ++-- arch/riscv/mm/fault.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index f3e96d60a2ff..f7fa973558bc 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -95,9 +95,9 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code, } #if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_RISCV_ALTERNATIVE) -#define __trap_section __section(".xip.traps") +#define __trap_section __noinstr_section(".xip.traps") #else -#define __trap_section +#define __trap_section noinstr #endif #define DO_ERROR_INFO(name, signo, code, str) \ asmlinkage __visible __trap_section void name(struct pt_regs *regs) \ diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c index d86f7cebd4a7..b26f68eac61c 100644 --- a/arch/riscv/mm/fault.c +++ b/arch/riscv/mm/fault.c @@ -204,7 +204,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma) * This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void do_page_fault(struct pt_regs *regs) +asmlinkage void noinstr do_page_fault(struct pt_regs *regs) { struct task_struct *tsk; struct vm_area_struct *vma; From patchwork Sat Oct 15 11:46:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2927 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp605636wrs; Sat, 15 Oct 2022 04:52:00 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4ffMK7I0Hv6CI2R8Up0skrLtboISy4RdhOgdZ9GqVHvE2Hfe12uP8cuId8W9w3FvD/CaFZ X-Received: by 2002:a05:6a00:1ace:b0:565:f52a:d998 with SMTP id f14-20020a056a001ace00b00565f52ad998mr2671404pfv.25.1665834720324; Sat, 15 Oct 2022 04:52:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665834720; cv=none; d=google.com; s=arc-20160816; b=pRPP1fHxE9z970xsTYxm0d3AiPdRBabGDYVPqe9GGsdS3jSm+qVmrXw5iGEiG9ZJgz RKdXHwptTkN3rx1sm6vuM2lHc3U7K3IiB+yfpbuBvLyLiNQA7q33pIFKiGz56l5wRWXK QOfoxS3U1tJL8DHBb3Uj4Bxaz4OrSbnKiSWu7hfD03ojPdCdm5OX9yYDtMYp9N/YDPb0 MAMcEmPghmhrmssq37G1qktr4uwnGh9JHS/i1w25WtGt6qY/U3cU1p9WzJ8d5N/EbJpz zGRkRrxK9Pqo1+uIb4hBWi3EmU9xvPC1l8aoKTannsukJMkzWbzK6qZyoafl6FTcY9pf xX9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/ujjvUMu8DIPnLVZNa2t3is+83ZsrYEfzjy6As4HnIw=; b=iQfG7QzCYVa3Auoqqag46J0srbCIWBxqIpjd04yDK/wRVyDuOpDHaWPBPfEp1r7MFp F+WGtjwZGVmIye5efElvi6oiExdP0+EQuweSsBXIy0M8mMObPYZ+/fdXHdbD35NQP6Ou sWl2lGgSfLwf4XXMVsy86+8lv6u0us99KNgpe8n5bQFh+I/lrfV9I0OPYamvyI/Ty/1Z xMDbFLsvON9jHMjeU+ZkOPElbRcsCnFTxGfPk7ZzTlLaKIBD+QkhNODsrA+ycm3RAPQq NP+V3duQaFbQPUjqoEVqRQP/W0zwfLwgkcrrvfqHd33H6wwH1MZTWLhlBe6DIzmqNQlD 7qfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=TbdNmPgf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id oc14-20020a17090b1c0e00b0020c4fd9306bsi12257345pjb.166.2022.10.15.04.51.47; Sat, 15 Oct 2022 04:52:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=TbdNmPgf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229782AbiJOLvS (ORCPT + 99 others); Sat, 15 Oct 2022 07:51:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229774AbiJOLut (ORCPT ); Sat, 15 Oct 2022 07:50:49 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B02945058; Sat, 15 Oct 2022 04:50:45 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A6D7B60C88; Sat, 15 Oct 2022 11:50:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 39FD8C43142; Sat, 15 Oct 2022 11:50:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834644; bh=PUHw5AKmuqPjA/jHqQcb1kpUoEKgJvMr42P3y9ayBNA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TbdNmPgf1cmGKrYOmVBk++BtoR6LEhsKmnsnEdASGSHRaW3Y2TVeAncG2zfcJUktW K6JMitmMvHZ+uP8dFy/H7pyCkVCpjvwHn0GMRG+fXQH138st7ul3BJLceeQO4T3PcZ 07XryDaWS+y6Onm5W0nu6mx6I+XFtHL903TcrfstDGt4GyNAcOLAmWBzIA7Ky6xzmz vpvdJOS639PzBmahEV72GFJ5rUhIgR0Okz+QS3qw4UIvdXHXhLkSkJg17M18/698Q/ 1PmEGpFHqCy26XqydpC4mwP7I/SUhRDZ1d8JLYknAYmzf5WURm3Gm3FRwS8rQQ9OsG 83S0VnR4q+PCw== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH V7 06/12] riscv: convert to generic entry Date: Sat, 15 Oct 2022 07:46:56 -0400 Message-Id: <20221015114702.3489989-7-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754307857926829?= X-GMAIL-MSGID: =?utf-8?q?1746754307857926829?= From: Guo Ren This patch converts riscv to use the generic entry infrastructure from kernel/entry/*. The generic entry makes maintainers' work easier and codes more elegant. Here are the changes than before: - More clear entry.S with handle_exception and ret_from_exception - Get rid of complex custom signal implementation - More readable syscall procedure - Little modification on ret_from_fork & ret_from_kernel_thread - Wrap with irqentry_enter/exit and syscall_enter/exit_from_user_mode - Use the standard preemption code instead of custom Signed-off-by: Guo Ren Signed-off-by: Guo Ren Suggested-by: Huacai Chen Tested-by: Yipeng Zou --- arch/riscv/Kconfig | 1 + arch/riscv/include/asm/csr.h | 1 - arch/riscv/include/asm/entry-common.h | 8 + arch/riscv/include/asm/ptrace.h | 10 +- arch/riscv/include/asm/stacktrace.h | 5 + arch/riscv/include/asm/syscall.h | 6 + arch/riscv/include/asm/thread_info.h | 13 +- arch/riscv/kernel/entry.S | 236 ++++---------------------- arch/riscv/kernel/irq.c | 15 ++ arch/riscv/kernel/ptrace.c | 43 ----- arch/riscv/kernel/signal.c | 21 +-- arch/riscv/kernel/sys_riscv.c | 27 +++ arch/riscv/kernel/traps.c | 70 ++++++-- arch/riscv/mm/fault.c | 16 +- 14 files changed, 173 insertions(+), 299 deletions(-) create mode 100644 arch/riscv/include/asm/entry-common.h diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 6b48a3ae9843..7083c7cd20bd 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -57,6 +57,7 @@ config RISCV select GENERIC_ATOMIC64 if !64BIT select GENERIC_CLOCKEVENTS_BROADCAST if SMP select GENERIC_EARLY_IOREMAP + select GENERIC_ENTRY select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO select GENERIC_IDLE_POLL_SETUP select GENERIC_IOREMAP if MMU diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 0e571f6483d9..7c2b8cdb7b77 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -40,7 +40,6 @@ #define SR_UXL _AC(0x300000000, UL) /* XLEN mask for U-mode */ #define SR_UXL_32 _AC(0x100000000, UL) /* XLEN = 32 for U-mode */ #define SR_UXL_64 _AC(0x200000000, UL) /* XLEN = 64 for U-mode */ -#define SR_UXL_SHIFT 32 #endif /* SATP flags */ diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h new file mode 100644 index 000000000000..1636ac2af28e --- /dev/null +++ b/arch/riscv/include/asm/entry-common.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _ASM_RISCV_ENTRY_COMMON_H +#define _ASM_RISCV_ENTRY_COMMON_H + +#include + +#endif /* _ASM_RISCV_ENTRY_COMMON_H */ diff --git a/arch/riscv/include/asm/ptrace.h b/arch/riscv/include/asm/ptrace.h index 6ecd461129d2..b5b0adcc85c1 100644 --- a/arch/riscv/include/asm/ptrace.h +++ b/arch/riscv/include/asm/ptrace.h @@ -53,6 +53,9 @@ struct pt_regs { unsigned long orig_a0; }; +#define PTRACE_SYSEMU 0x1f +#define PTRACE_SYSEMU_SINGLESTEP 0x20 + #ifdef CONFIG_64BIT #define REG_FMT "%016lx" #else @@ -121,8 +124,6 @@ extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr, unsigned long frame_pointer); -int do_syscall_trace_enter(struct pt_regs *regs); -void do_syscall_trace_exit(struct pt_regs *regs); /** * regs_get_register() - get register value from its offset @@ -172,6 +173,11 @@ static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs, return 0; } +static inline int regs_irqs_disabled(struct pt_regs *regs) +{ + return !(regs->status & SR_PIE); +} + #endif /* __ASSEMBLY__ */ #endif /* _ASM_RISCV_PTRACE_H */ diff --git a/arch/riscv/include/asm/stacktrace.h b/arch/riscv/include/asm/stacktrace.h index 3450c1912afd..f7e8ef2418b9 100644 --- a/arch/riscv/include/asm/stacktrace.h +++ b/arch/riscv/include/asm/stacktrace.h @@ -16,4 +16,9 @@ extern void notrace walk_stackframe(struct task_struct *task, struct pt_regs *re extern void dump_backtrace(struct pt_regs *regs, struct task_struct *task, const char *loglvl); +static inline bool on_thread_stack(void) +{ + return !(((unsigned long)(current->stack) ^ current_stack_pointer) & ~(THREAD_SIZE - 1)); +} + #endif /* _ASM_RISCV_STACKTRACE_H */ diff --git a/arch/riscv/include/asm/syscall.h b/arch/riscv/include/asm/syscall.h index 384a63b86420..6c573f18030b 100644 --- a/arch/riscv/include/asm/syscall.h +++ b/arch/riscv/include/asm/syscall.h @@ -74,5 +74,11 @@ static inline int syscall_get_arch(struct task_struct *task) #endif } +static inline bool arch_syscall_is_vdso_sigreturn(struct pt_regs *regs) +{ + return false; +} + asmlinkage long sys_riscv_flush_icache(uintptr_t, uintptr_t, uintptr_t); +asmlinkage void do_sys_ecall_u(struct pt_regs *regs); #endif /* _ASM_RISCV_SYSCALL_H */ diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index 67322f878e0d..7de4fb96f0b5 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -66,6 +66,7 @@ struct thread_info { long kernel_sp; /* Kernel stack pointer */ long user_sp; /* User stack pointer */ int cpu; + unsigned long syscall_work; /* SYSCALL_WORK_ flags */ }; /* @@ -88,26 +89,18 @@ struct thread_info { * - pending work-to-be-done flags are in lowest half-word * - other flags in upper half-word(s) */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ #define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ #define TIF_MEMDIE 5 /* is terminating due to OOM killer */ -#define TIF_SYSCALL_TRACEPOINT 6 /* syscall tracepoint instrumentation */ -#define TIF_SYSCALL_AUDIT 7 /* syscall auditing */ -#define TIF_SECCOMP 8 /* syscall secure computing */ #define TIF_NOTIFY_SIGNAL 9 /* signal notifications exist */ #define TIF_UPROBE 10 /* uprobe breakpoint or singlestep */ #define TIF_32BIT 11 /* compat-mode 32bit process */ -#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) -#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) -#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) -#define _TIF_SECCOMP (1 << TIF_SECCOMP) #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) #define _TIF_UPROBE (1 << TIF_UPROBE) @@ -115,8 +108,4 @@ struct thread_info { (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | _TIF_NEED_RESCHED | \ _TIF_NOTIFY_SIGNAL | _TIF_UPROBE) -#define _TIF_SYSCALL_WORK \ - (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT | _TIF_SYSCALL_AUDIT | \ - _TIF_SECCOMP) - #endif /* _ASM_RISCV_THREAD_INFO_H */ diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index b9eda3fcbd6d..9864e784d6a6 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -14,10 +14,6 @@ #include #include -#if !IS_ENABLED(CONFIG_PREEMPTION) -.set resume_kernel, restore_all -#endif - ENTRY(handle_exception) /* * If coming from userspace, preserve the user thread pointer and load @@ -106,19 +102,8 @@ _save_context: .option norelax la gp, __global_pointer$ .option pop - -#ifdef CONFIG_TRACE_IRQFLAGS - call __trace_hardirqs_off -#endif - -#ifdef CONFIG_CONTEXT_TRACKING_USER - /* If previous state is in user mode, call user_exit_callable(). */ - li a0, SR_PP - and a0, s1, a0 - bnez a0, skip_context_tracking - call user_exit_callable -skip_context_tracking: -#endif + move a0, sp /* pt_regs */ + la ra, ret_from_exception /* * MSB of cause differentiates between @@ -126,134 +111,32 @@ skip_context_tracking: */ bge s4, zero, 1f - la ra, ret_from_exception - /* Handle interrupts */ - move a0, sp /* pt_regs */ - la a1, generic_handle_arch_irq - jr a1 + tail do_riscv_irq 1: - /* - * Exceptions run with interrupts enabled or disabled depending on the - * state of SR_PIE in m/sstatus. - */ - andi t0, s1, SR_PIE - beqz t0, 1f - /* kprobes, entered via ebreak, must have interrupts disabled. */ - li t0, EXC_BREAKPOINT - beq s4, t0, 1f -#ifdef CONFIG_TRACE_IRQFLAGS - call __trace_hardirqs_on -#endif - csrs CSR_STATUS, SR_IE - -1: - la ra, ret_from_exception - /* Handle syscalls */ - li t0, EXC_SYSCALL - beq s4, t0, handle_syscall - /* Handle other exceptions */ slli t0, s4, RISCV_LGPTR la t1, excp_vect_table la t2, excp_vect_table_end - move a0, sp /* pt_regs */ add t0, t1, t0 /* Check if exception code lies within bounds */ - bgeu t0, t2, 1f + bgeu t0, t2, 2f REG_L t0, 0(t0) jr t0 -1: +2: tail do_trap_unknown +END(handle_exception) -handle_syscall: -#ifdef CONFIG_RISCV_M_MODE - /* - * When running is M-Mode (no MMU config), MPIE does not get set. - * As a result, we need to force enable interrupts here because - * handle_exception did not do set SR_IE as it always sees SR_PIE - * being cleared. - */ - csrs CSR_STATUS, SR_IE -#endif -#if defined(CONFIG_TRACE_IRQFLAGS) || defined(CONFIG_CONTEXT_TRACKING_USER) - /* Recover a0 - a7 for system calls */ - REG_L a0, PT_A0(sp) - REG_L a1, PT_A1(sp) - REG_L a2, PT_A2(sp) - REG_L a3, PT_A3(sp) - REG_L a4, PT_A4(sp) - REG_L a5, PT_A5(sp) - REG_L a6, PT_A6(sp) - REG_L a7, PT_A7(sp) -#endif - /* save the initial A0 value (needed in signal handlers) */ - REG_S a0, PT_ORIG_A0(sp) - /* - * Advance SEPC to avoid executing the original - * scall instruction on sret - */ - addi s2, s2, 0x4 - REG_S s2, PT_EPC(sp) - /* Trace syscalls, but only if requested by the user. */ - REG_L t0, TASK_TI_FLAGS(tp) - andi t0, t0, _TIF_SYSCALL_WORK - bnez t0, handle_syscall_trace_enter -check_syscall_nr: - /* Check to make sure we don't jump to a bogus syscall number. */ - li t0, __NR_syscalls - la s0, sys_ni_syscall - /* - * Syscall number held in a7. - * If syscall number is above allowed value, redirect to ni_syscall. - */ - bgeu a7, t0, 3f -#ifdef CONFIG_COMPAT +/* + * The ret_from_exception must be called with interrupt disabled. Here is the + * caller list: + * - handle_exception + * - ret_from_fork + * - ret_from_kernel_thread + */ +ENTRY(ret_from_exception) REG_L s0, PT_STATUS(sp) - srli s0, s0, SR_UXL_SHIFT - andi s0, s0, (SR_UXL >> SR_UXL_SHIFT) - li t0, (SR_UXL_32 >> SR_UXL_SHIFT) - sub t0, s0, t0 - bnez t0, 1f - - /* Call compat_syscall */ - la s0, compat_sys_call_table - j 2f -1: -#endif - /* Call syscall */ - la s0, sys_call_table -2: - slli t0, a7, RISCV_LGPTR - add s0, s0, t0 - REG_L s0, 0(s0) -3: - jalr s0 -ret_from_syscall: - /* Set user a0 to kernel a0 */ - REG_S a0, PT_A0(sp) - /* - * We didn't execute the actual syscall. - * Seccomp already set return value for the current task pt_regs. - * (If it was configured with SECCOMP_RET_ERRNO/TRACE) - */ -ret_from_syscall_rejected: -#ifdef CONFIG_DEBUG_RSEQ - move a0, sp - call rseq_syscall -#endif - /* Trace syscalls, but only if requested by the user. */ - REG_L t0, TASK_TI_FLAGS(tp) - andi t0, t0, _TIF_SYSCALL_WORK - bnez t0, handle_syscall_trace_exit - -ret_from_exception: - REG_L s0, PT_STATUS(sp) - csrc CSR_STATUS, SR_IE -#ifdef CONFIG_TRACE_IRQFLAGS - call __trace_hardirqs_off -#endif #ifdef CONFIG_RISCV_M_MODE /* the MPP value is too large to be used as an immediate arg for addi */ li t0, SR_MPP @@ -261,17 +144,7 @@ ret_from_exception: #else andi s0, s0, SR_SPP #endif - bnez s0, resume_kernel - -resume_userspace: - /* Interrupts must be disabled here so flags are checked atomically */ - REG_L s0, TASK_TI_FLAGS(tp) /* current_thread_info->flags */ - andi s1, s0, _TIF_WORK_MASK - bnez s1, work_pending - -#ifdef CONFIG_CONTEXT_TRACKING_USER - call user_enter_callable -#endif + bnez s0, 1f /* Save unwound kernel stack pointer in thread_info */ addi s0, sp, PT_SIZE_ON_STACK @@ -282,19 +155,7 @@ resume_userspace: * structures again. */ csrw CSR_SCRATCH, tp - -restore_all: -#ifdef CONFIG_TRACE_IRQFLAGS - REG_L s1, PT_STATUS(sp) - andi t0, s1, SR_PIE - beqz t0, 1f - call __trace_hardirqs_on - j 2f 1: - call __trace_hardirqs_off -2: -#endif - REG_L a0, PT_STATUS(sp) /* * The current load reservation is effectively part of the processor's * state, in the sense that load reservations cannot be shared between @@ -315,9 +176,11 @@ restore_all: REG_L a2, PT_EPC(sp) REG_SC x0, a2, PT_EPC(sp) - csrw CSR_STATUS, a0 csrw CSR_EPC, a2 + REG_L a0, PT_STATUS(sp) + csrw CSR_STATUS, a0 + REG_L x1, PT_RA(sp) REG_L x3, PT_GP(sp) REG_L x4, PT_TP(sp) @@ -356,54 +219,10 @@ restore_all: #else sret #endif - -#if IS_ENABLED(CONFIG_PREEMPTION) -resume_kernel: - REG_L s0, TASK_TI_PREEMPT_COUNT(tp) - bnez s0, restore_all - REG_L s0, TASK_TI_FLAGS(tp) - andi s0, s0, _TIF_NEED_RESCHED - beqz s0, restore_all - call preempt_schedule_irq - j restore_all -#endif - -work_pending: - /* Enter slow path for supplementary processing */ - la ra, ret_from_exception - andi s1, s0, _TIF_NEED_RESCHED - bnez s1, work_resched -work_notifysig: - /* Handle pending signals and notify-resume requests */ - csrs CSR_STATUS, SR_IE /* Enable interrupts for do_notify_resume() */ - move a0, sp /* pt_regs */ - move a1, s0 /* current_thread_info->flags */ - tail do_notify_resume -work_resched: - tail schedule - -/* Slow paths for ptrace. */ -handle_syscall_trace_enter: - move a0, sp - call do_syscall_trace_enter - move t0, a0 - REG_L a0, PT_A0(sp) - REG_L a1, PT_A1(sp) - REG_L a2, PT_A2(sp) - REG_L a3, PT_A3(sp) - REG_L a4, PT_A4(sp) - REG_L a5, PT_A5(sp) - REG_L a6, PT_A6(sp) - REG_L a7, PT_A7(sp) - bnez t0, ret_from_syscall_rejected - j check_syscall_nr -handle_syscall_trace_exit: - move a0, sp - call do_syscall_trace_exit - j ret_from_exception +END(ret_from_exception) #ifdef CONFIG_VMAP_STACK -handle_kernel_stack_overflow: +ENTRY(handle_kernel_stack_overflow) la sp, shadow_stack addi sp, sp, SHADOW_OVERFLOW_STACK_SIZE @@ -499,21 +318,24 @@ restore_caller_reg: REG_S s5, PT_TP(sp) move a0, sp tail handle_bad_stack +END(handle_kernel_stack_overflow) #endif -END(handle_exception) - ENTRY(ret_from_fork) + call schedule_tail + move a0, sp /* pt_regs */ la ra, ret_from_exception - tail schedule_tail + tail syscall_exit_to_user_mode ENDPROC(ret_from_fork) ENTRY(ret_from_kernel_thread) call schedule_tail /* Call fn(arg) */ - la ra, ret_from_exception move a0, s1 - jr s0 + jalr s0 + move a0, sp /* pt_regs */ + la ra, ret_from_exception + tail syscall_exit_to_user_mode ENDPROC(ret_from_kernel_thread) @@ -582,7 +404,7 @@ ENTRY(excp_vect_table) RISCV_PTR do_trap_load_fault RISCV_PTR do_trap_store_misaligned RISCV_PTR do_trap_store_fault - RISCV_PTR do_trap_ecall_u /* system call, gets intercepted */ + RISCV_PTR do_sys_ecall_u /* system call */ RISCV_PTR do_trap_ecall_s RISCV_PTR do_trap_unknown RISCV_PTR do_trap_ecall_m diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 7207fa08d78f..24c2e1bd756a 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Christoph Hellwig */ +#include #include #include #include @@ -22,3 +23,17 @@ void __init init_IRQ(void) if (!handle_arch_irq) panic("No interrupt controller found."); } + +asmlinkage void noinstr do_riscv_irq(struct pt_regs *regs) +{ + struct pt_regs *old_regs; + irqentry_state_t state = irqentry_enter(regs); + + irq_enter_rcu(); + old_regs = set_irq_regs(regs); + handle_arch_irq(regs); + set_irq_regs(old_regs); + irq_exit_rcu(); + + irqentry_exit(regs, state); +} diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index 44f4b1ca315d..23c48b14a0e7 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -19,9 +19,6 @@ #include #include -#define CREATE_TRACE_POINTS -#include - enum riscv_regset { REGSET_X, #ifdef CONFIG_FPU @@ -228,46 +225,6 @@ long arch_ptrace(struct task_struct *child, long request, return ret; } -/* - * Allows PTRACE_SYSCALL to work. These are called from entry.S in - * {handle,ret_from}_syscall. - */ -__visible int do_syscall_trace_enter(struct pt_regs *regs) -{ - if (test_thread_flag(TIF_SYSCALL_TRACE)) - if (ptrace_report_syscall_entry(regs)) - return -1; - - /* - * Do the secure computing after ptrace; failures should be fast. - * If this fails we might have return value in a0 from seccomp - * (via SECCOMP_RET_ERRNO/TRACE). - */ - if (secure_computing() == -1) - return -1; - -#ifdef CONFIG_HAVE_SYSCALL_TRACEPOINTS - if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) - trace_sys_enter(regs, syscall_get_nr(current, regs)); -#endif - - audit_syscall_entry(regs->a7, regs->a0, regs->a1, regs->a2, regs->a3); - return 0; -} - -__visible void do_syscall_trace_exit(struct pt_regs *regs) -{ - audit_syscall_exit(regs); - - if (test_thread_flag(TIF_SYSCALL_TRACE)) - ptrace_report_syscall_exit(regs, 0); - -#ifdef CONFIG_HAVE_SYSCALL_TRACEPOINTS - if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) - trace_sys_exit(regs, regs_return_value(regs)); -#endif -} - #ifdef CONFIG_COMPAT static int compat_riscv_gpr_get(struct task_struct *target, const struct user_regset *regset, diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c index 5c591123c440..2e365084417e 100644 --- a/arch/riscv/kernel/signal.c +++ b/arch/riscv/kernel/signal.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -274,7 +275,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) signal_setup_done(ret, ksig, 0); } -static void do_signal(struct pt_regs *regs) +void arch_do_signal_or_restart(struct pt_regs *regs) { struct ksignal ksig; @@ -311,21 +312,3 @@ static void do_signal(struct pt_regs *regs) */ restore_saved_sigmask(); } - -/* - * notification of userspace execution resumption - * - triggered by the _TIF_WORK_MASK flags - */ -asmlinkage __visible void do_notify_resume(struct pt_regs *regs, - unsigned long thread_info_flags) -{ - if (thread_info_flags & _TIF_UPROBE) - uprobe_notify_resume(regs); - - /* Handle pending signal delivery */ - if (thread_info_flags & (_TIF_SIGPENDING | _TIF_NOTIFY_SIGNAL)) - do_signal(regs); - - if (thread_info_flags & _TIF_NOTIFY_RESUME) - resume_user_mode_work(regs); -} diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c index 5d3f2fbeb33c..c86d0eafdf6a 100644 --- a/arch/riscv/kernel/sys_riscv.c +++ b/arch/riscv/kernel/sys_riscv.c @@ -5,8 +5,10 @@ * Copyright (C) 2017 SiFive */ +#include #include #include +#include #include #include @@ -69,3 +71,28 @@ SYSCALL_DEFINE3(riscv_flush_icache, uintptr_t, start, uintptr_t, end, return 0; } + +typedef long (*syscall_t)(ulong, ulong, ulong, ulong, ulong, ulong, ulong); + +asmlinkage void do_sys_ecall_u(struct pt_regs *regs) +{ + syscall_t syscall; + ulong nr = regs->a7; + + regs->epc += 4; + regs->orig_a0 = regs->a0; + regs->a0 = -ENOSYS; + + nr = syscall_enter_from_user_mode(regs, nr); +#ifdef CONFIG_COMPAT + if ((regs->status & SR_UXL) == SR_UXL_32) + syscall = compat_sys_call_table[nr]; + else +#endif + syscall = sys_call_table[nr]; + + if (nr < NR_syscalls) + regs->a0 = syscall(regs->orig_a0, regs->a1, regs->a2, + regs->a3, regs->a4, regs->a5, regs->a6); + syscall_exit_to_user_mode(regs); +} diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index f7fa973558bc..ee9a0ef672e9 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -99,10 +100,19 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code, #else #define __trap_section noinstr #endif -#define DO_ERROR_INFO(name, signo, code, str) \ -asmlinkage __visible __trap_section void name(struct pt_regs *regs) \ -{ \ - do_trap_error(regs, signo, code, regs->epc, "Oops - " str); \ +#define DO_ERROR_INFO(name, signo, code, str) \ +asmlinkage __visible __trap_section void name(struct pt_regs *regs) \ +{ \ + if (user_mode(regs)) { \ + irqentry_enter_from_user_mode(regs); \ + do_trap_error(regs, signo, code, regs->epc, "Oops - " str); \ + irqentry_exit_to_user_mode(regs); \ + } else { \ + irqentry_state_t irq_state = irqentry_nmi_enter(regs); \ + do_trap_error(regs, signo, code, regs->epc, "Oops - " str); \ + irqentry_nmi_exit(regs, irq_state); \ + } \ + BUG_ON(!irqs_disabled()); \ } DO_ERROR_INFO(do_trap_unknown, @@ -126,18 +136,38 @@ int handle_misaligned_store(struct pt_regs *regs); asmlinkage void __trap_section do_trap_load_misaligned(struct pt_regs *regs) { - if (!handle_misaligned_load(regs)) - return; - do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc, - "Oops - load address misaligned"); + if (user_mode(regs)) { + irqentry_enter_from_user_mode(regs); + if (handle_misaligned_load(regs)) + do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc, + "Oops - load address misaligned"); + irqentry_exit_to_user_mode(regs); + } else { + irqentry_state_t irq_state = irqentry_nmi_enter(regs); + if (handle_misaligned_load(regs)) + do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc, + "Oops - load address misaligned"); + irqentry_nmi_exit(regs, irq_state); + } + BUG_ON(!irqs_disabled()); } asmlinkage void __trap_section do_trap_store_misaligned(struct pt_regs *regs) { - if (!handle_misaligned_store(regs)) - return; - do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc, - "Oops - store (or AMO) address misaligned"); + if (user_mode(regs)) { + irqentry_enter_from_user_mode(regs); + if (handle_misaligned_store(regs)) + do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc, + "Oops - store (or AMO) address misaligned"); + irqentry_exit_to_user_mode(regs); + } else { + irqentry_state_t irq_state = irqentry_nmi_enter(regs); + if (handle_misaligned_store(regs)) + do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc, + "Oops - store (or AMO) address misaligned"); + irqentry_nmi_exit(regs, irq_state); + } + BUG_ON(!irqs_disabled()); } #endif DO_ERROR_INFO(do_trap_store_fault, @@ -159,7 +189,7 @@ static inline unsigned long get_break_insn_length(unsigned long pc) return GET_INSN_LENGTH(insn); } -asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs) +static void __do_trap_break(struct pt_regs *regs) { #ifdef CONFIG_KPROBES if (kprobe_single_step_handler(regs)) @@ -189,6 +219,20 @@ asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs) else die(regs, "Kernel BUG"); } + +asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs) +{ + if (user_mode(regs)) { + irqentry_enter_from_user_mode(regs); + __do_trap_break(regs); + irqentry_exit_to_user_mode(regs); + } else { + irqentry_state_t irq_state = irqentry_nmi_enter(regs); + __do_trap_break(regs); + irqentry_nmi_exit(regs, irq_state); + } + BUG_ON(!irqs_disabled()); +} NOKPROBE_SYMBOL(do_trap_break); #ifdef CONFIG_GENERIC_BUG diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c index b26f68eac61c..5cbea6c55a59 100644 --- a/arch/riscv/mm/fault.c +++ b/arch/riscv/mm/fault.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -204,7 +205,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma) * This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void noinstr do_page_fault(struct pt_regs *regs) +static void __do_page_fault(struct pt_regs *regs) { struct task_struct *tsk; struct vm_area_struct *vma; @@ -251,7 +252,7 @@ asmlinkage void noinstr do_page_fault(struct pt_regs *regs) } #endif /* Enable interrupts if they were enabled in the parent context. */ - if (likely(regs->status & SR_PIE)) + if (!regs_irqs_disabled(regs)) local_irq_enable(); /* @@ -351,4 +352,15 @@ asmlinkage void noinstr do_page_fault(struct pt_regs *regs) } return; } + +asmlinkage void noinstr do_page_fault(struct pt_regs *regs) +{ + irqentry_state_t state = irqentry_enter(regs); + + __do_page_fault(regs); + + local_irq_disable(); + + irqentry_exit(regs, state); +} NOKPROBE_SYMBOL(do_page_fault); From patchwork Sat Oct 15 11:46:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2928 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp605691wrs; Sat, 15 Oct 2022 04:52:12 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4aIInPyBLctbWOYTt33SDO6UvsanYm7fAa2YnQxWQ7+yt17/UpE0EoolgAegeayQM2I1pB X-Received: by 2002:a17:90a:a415:b0:20a:f813:83a3 with SMTP id y21-20020a17090aa41500b0020af81383a3mr3094314pjp.238.1665834732114; Sat, 15 Oct 2022 04:52:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665834732; cv=none; d=google.com; s=arc-20160816; b=ckrnhdk4fjfDRyW//p/STyFnaPuO4Blb7Y1793oDEFGSidrG1PxYDcqS0YdFn5/F5S aXJc4GGY5OGW5nIpnpa18fT+SP5RMYtuHdmzj7VaLxxjax1VlYc49KPM4pnwjr5nEfZG pJo/DWHrKFkGBZREPCxKGMKXlkI1BkdxHLziT6iI5pKK3kK2wjlTzKBgKS509VNtJZKK T88yLziZQ8iwP2UYY+nSXVigXEc76jifrGhLpMAmlgyMC5EwoMH8KPvcTMDxk3BmwiND xNDxQocrb0wdwXY35XI5xmVN4jXDCNBCU8XtxJpcJuOzYkYP2QunqGMPiYjyznpFlgcB Ruyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2JX+i9QOQOpBWACaUR2RVqJvCc6hM+b8XMYKvGK6b3I=; b=RmBuoyBb6R07J+Rxj1qo9aNuEuolK3nA4P6t62EgPlUegRbOIuLmiHYj6zj4zMQfQr HX8Ps3zxY57z0QydoP3z9nWfAsonMWt9OIkFQ2PTvtwWToyhGZTgRJ1aX8b8IgG7J4qs SbYaqHPT94UqEm2pQfysyf0LBv1wLStn3cikJU6ZZdcYX81cNaWY18Oyf/JUjR40zQBr FT/n1Ulo4aXuB6NvAMGDltULlne4AkGFDR/J5nFoCVzUrexa8AwwK1Xxnj414y2gw5u5 qHHOXcYnmLtEKu4Bxw5t/6lYaktteeeSzVmL2geS4OLM0KgPLcIRH8HrJFqgFkBVDZvG BN+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=P065BAij; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x13-20020a17090300cd00b001815aaeda55si5368463plc.13.2022.10.15.04.52.00; Sat, 15 Oct 2022 04:52:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=P065BAij; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229821AbiJOLve (ORCPT + 99 others); Sat, 15 Oct 2022 07:51:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229733AbiJOLu4 (ORCPT ); Sat, 15 Oct 2022 07:50:56 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 018CE2A248; Sat, 15 Oct 2022 04:50:55 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id AAB7EB80935; Sat, 15 Oct 2022 11:50:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BA39AC43470; Sat, 15 Oct 2022 11:50:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834652; bh=OUataWC9fARm49pEXA4aATXkLJrVEmd1f27FTiOL3wY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=P065BAijKebt4Z+kEZu4mqHiTux2J18I2fl0VBYxJMiqsBgT+DMc5+NFVUdE5wiBL 6F47C8ZspEvbkino8+me3w9PzKHk3frpVMkznIVpUBlaMkMlGiuFrTVZjdTC/2vant 9vNkoQ+sxWLME2qbc/lNT20ZBGz+acdbl8x687OGA9bFWY1DRLq9SFwmKT5MASycfi feAiHYVGJ9LFq21DZUYkWmqRo45Drru6N4wUz5F0vHiEX8Ae8kVsAwG9eJmQZWnr9r TYYXxdyHOXQ4TB1DlH7bC9jOx0RB6BQyr6+VCEkUKOGaozhwbrCnqMMipKZRVJqM9J 0evsTPWTQLL0A== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH V7 07/12] riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK Date: Sat, 15 Oct 2022 07:46:57 -0400 Message-Id: <20221015114702.3489989-8-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754320312248921?= X-GMAIL-MSGID: =?utf-8?q?1746754320312248921?= From: Guo Ren Add independent irq stacks for percpu to prevent kernel stack overflows. It is also compatible with VMAP_STACK by implementing arch_alloc_vmap_stack. Many architectures have supported HAVE_IRQ_EXIT_ON_IRQ_STACK, riscv should follow up. Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/Kconfig | 8 ++++ arch/riscv/include/asm/thread_info.h | 2 + arch/riscv/include/asm/vmap_stack.h | 28 ++++++++++++ arch/riscv/kernel/irq.c | 66 +++++++++++++++++++++++++++- 4 files changed, 102 insertions(+), 2 deletions(-) create mode 100644 arch/riscv/include/asm/vmap_stack.h diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7083c7cd20bd..e65a9cc0df5d 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -443,6 +443,14 @@ config FPU If you don't know what to do here, say Y. +config IRQ_STACKS + bool "Independent irq stacks" if EXPERT + default y + select HAVE_IRQ_EXIT_ON_IRQ_STACK + help + Add independent irq stacks for percpu to prevent kernel stack overflows. + We may save some memory footprint by disabling IRQ_STACKS. + endmenu # "Platform type" menu "Kernel features" diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index 7de4fb96f0b5..043da8ccc7e6 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -40,6 +40,8 @@ #define OVERFLOW_STACK_SIZE SZ_4K #define SHADOW_OVERFLOW_STACK_SIZE (1024) +#define IRQ_STACK_SIZE THREAD_SIZE + #ifndef __ASSEMBLY__ extern long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE / sizeof(long)]; diff --git a/arch/riscv/include/asm/vmap_stack.h b/arch/riscv/include/asm/vmap_stack.h new file mode 100644 index 000000000000..3fbf481abf4f --- /dev/null +++ b/arch/riscv/include/asm/vmap_stack.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +// Copied from arch/arm64/include/asm/vmap_stack.h. +#ifndef _ASM_RISCV_VMAP_STACK_H +#define _ASM_RISCV_VMAP_STACK_H + +#include +#include +#include +#include +#include +#include + +/* + * To ensure that VMAP'd stack overflow detection works correctly, all VMAP'd + * stacks need to have the same alignment. + */ +static inline unsigned long *arch_alloc_vmap_stack(size_t stack_size, int node) +{ + void *p; + + BUILD_BUG_ON(!IS_ENABLED(CONFIG_VMAP_STACK)); + + p = __vmalloc_node(stack_size, THREAD_ALIGN, THREADINFO_GFP, node, + __builtin_return_address(0)); + return kasan_reset_tag(p); +} + +#endif /* _ASM_RISCV_VMAP_STACK_H */ diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 24c2e1bd756a..5d77f692b198 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -10,6 +10,37 @@ #include #include #include +#include + +#ifdef CONFIG_IRQ_STACKS +static DEFINE_PER_CPU(ulong *, irq_stack_ptr); + +#ifdef CONFIG_VMAP_STACK +static void init_irq_stacks(void) +{ + int cpu; + ulong *p; + + for_each_possible_cpu(cpu) { + p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu)); + per_cpu(irq_stack_ptr, cpu) = p; + } +} +#else +/* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */ +DEFINE_PER_CPU_ALIGNED(ulong [IRQ_STACK_SIZE/sizeof(ulong)], irq_stack); + +static void init_irq_stacks(void) +{ + int cpu; + + for_each_possible_cpu(cpu) + per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu); +} +#endif /* CONFIG_VMAP_STACK */ +#else +static void init_irq_stacks(void) {} +#endif /* CONFIG_IRQ_STACKS */ int arch_show_interrupts(struct seq_file *p, int prec) { @@ -19,21 +50,52 @@ int arch_show_interrupts(struct seq_file *p, int prec) void __init init_IRQ(void) { + init_irq_stacks(); irqchip_init(); if (!handle_arch_irq) panic("No interrupt controller found."); } -asmlinkage void noinstr do_riscv_irq(struct pt_regs *regs) +static void noinstr handle_riscv_irq(struct pt_regs *regs) { struct pt_regs *old_regs; - irqentry_state_t state = irqentry_enter(regs); irq_enter_rcu(); old_regs = set_irq_regs(regs); handle_arch_irq(regs); set_irq_regs(old_regs); irq_exit_rcu(); +} + +asmlinkage void noinstr do_riscv_irq(struct pt_regs *regs) +{ + irqentry_state_t state = irqentry_enter(regs); +#ifdef CONFIG_IRQ_STACKS + if (on_thread_stack()) { + ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id()) + + IRQ_STACK_SIZE/sizeof(ulong); + __asm__ __volatile( + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" ra, (sp) \n" + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" s0, (sp) \n" + "addi s0, sp, 2*"RISCV_SZPTR "\n" + "move sp, %[sp] \n" + "move a0, %[regs] \n" + "call handle_riscv_irq \n" + "addi sp, s0, -2*"RISCV_SZPTR"\n" + REG_L" s0, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + REG_L" ra, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + : + : [sp] "r" (sp), [regs] "r" (regs) + : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", + "t0", "t1", "t2", "t3", "t4", "t5", "t6", + "memory"); + } else +#endif + handle_riscv_irq(regs); irqentry_exit(regs, state); } From patchwork Sat Oct 15 11:46:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2929 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp605783wrs; Sat, 15 Oct 2022 04:52:27 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7SAxLZc+UjIXGgZHJwrFmnC3nH/fqAS1ETqAtM+OZR0y9paZ+Qph6P3K+e1fW8cHEA69cj X-Received: by 2002:a63:8bc9:0:b0:45f:afa8:e686 with SMTP id j192-20020a638bc9000000b0045fafa8e686mr2293355pge.219.1665834746795; Sat, 15 Oct 2022 04:52:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665834746; cv=none; d=google.com; s=arc-20160816; b=AoO2wgeai3U0F+oeaXENhV7lkuLA+owGxrDL2b3CBv0b/MuU6CQ2/OlWXHL0N7aIJM AzbvPU3TN87liDvwcf+J1ah1Q5tnTCmdpzSlsAqeogg8+YFa8JZNHh1SkyNLjRvRHFNX ubicVMZ9uDs63atIBOm12MrE5C7NHoKdVXOVC8bpY9JyzUUWH24+T7QwAakDFdV4fIHm mK5+datrJ61Eo4HIeNbVoFO2mI2HqrgVkzELKg6OjeXRV6UtqaS5guBfAuzVe5iDeHB4 ek+tvyP/RPuA6+LocTvtOp9MW9zGVDS/BGx7EKVaS2D1+GoV9Pikcr6uvFaCM0yu10js CWjQ== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j3-20020a625503000000b00542c772d478si5225297pfb.247.2022.10.15.04.52.14; Sat, 15 Oct 2022 04:52:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=OZFpcuhm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229831AbiJOLvq (ORCPT + 99 others); Sat, 15 Oct 2022 07:51:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229751AbiJOLvE (ORCPT ); Sat, 15 Oct 2022 07:51:04 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C7E0437EC; Sat, 15 Oct 2022 04:51:03 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0BAF9B803F1; Sat, 15 Oct 2022 11:51:02 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 16A4CC43141; Sat, 15 Oct 2022 11:50:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834660; bh=oLo4LwoP9GQ++MbZ72D5YQbDVqlBfgDub+AiMlYcSSI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OZFpcuhmd07fYgBYAS5TwzVG8AehUdodUEadsWOOgzRKzvzuZ+WhZ+ZkaKFNEMD4c LaMoPw3UWjDmcsw1ruVEjKtStM00XBh+pYE4sPERfXlE3qrpE1jEym+BXXToagTHQC butOe4XM7YxAsDaxFsjGhvTk9xqRlMgJ3hs5TbeBZJZzGLiWLsVsV/vCUV9CSDAFje LN0CL+wxleW7fQO9UczP3OTGvx8yaJzWn+uehKcYATYfQHZ40no2TEaPMbxcngQ03c pIbXBAcxkx7RkbbKGUjxNXqp2U0Tw0nb66HD7QIwUvwKqboCNvDaSvt0UXNKBpWOge TxyGFaY2SzC6A== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH V7 08/12] riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK Date: Sat, 15 Oct 2022 07:46:58 -0400 Message-Id: <20221015114702.3489989-9-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754335248717388?= X-GMAIL-MSGID: =?utf-8?q?1746754335248717388?= From: Guo Ren Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. The irq and softirq use the same independent irq_stack of percpu by time division multiplexing. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Cc: Sebastian Andrzej Siewior --- arch/riscv/Kconfig | 7 ++++--- arch/riscv/kernel/irq.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 3 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index e65a9cc0df5d..04d2d20fb0ab 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -444,12 +444,13 @@ config FPU If you don't know what to do here, say Y. config IRQ_STACKS - bool "Independent irq stacks" if EXPERT + bool "Independent irq & softirq stacks" if EXPERT default y select HAVE_IRQ_EXIT_ON_IRQ_STACK + select HAVE_SOFTIRQ_ON_OWN_STACK help - Add independent irq stacks for percpu to prevent kernel stack overflows. - We may save some memory footprint by disabling IRQ_STACKS. + Add independent irq & softirq stacks for percpu to prevent kernel stack + overflows. We may save some memory footprint by disabling IRQ_STACKS. endmenu # "Platform type" diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 5d77f692b198..a6406da34937 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -11,6 +11,7 @@ #include #include #include +#include #ifdef CONFIG_IRQ_STACKS static DEFINE_PER_CPU(ulong *, irq_stack_ptr); @@ -38,6 +39,38 @@ static void init_irq_stacks(void) per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu); } #endif /* CONFIG_VMAP_STACK */ + +#ifdef CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK +void do_softirq_own_stack(void) +{ +#ifdef CONFIG_IRQ_STACKS + if (on_thread_stack()) { + ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id()) + + IRQ_STACK_SIZE/sizeof(ulong); + __asm__ __volatile( + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" ra, (sp) \n" + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" s0, (sp) \n" + "addi s0, sp, 2*"RISCV_SZPTR "\n" + "move sp, %[sp] \n" + "call __do_softirq \n" + "addi sp, s0, -2*"RISCV_SZPTR"\n" + REG_L" s0, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + REG_L" ra, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + : + : [sp] "r" (sp) + : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", + "t0", "t1", "t2", "t3", "t4", "t5", "t6", + "memory"); + } else +#endif + __do_softirq(); +} +#endif /* CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK */ + #else static void init_irq_stacks(void) {} #endif /* CONFIG_IRQ_STACKS */ From patchwork Sat Oct 15 11:46:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2930 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp605848wrs; Sat, 15 Oct 2022 04:52:38 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5B0aggSYv47mVLrRg4vUt6+N6MbsAGy9Gq8PVjyCjue2UP9+/y7vofpMRf/OhQfvJjiqZK X-Received: by 2002:a63:fa17:0:b0:43c:3f26:48e3 with SMTP id y23-20020a63fa17000000b0043c3f2648e3mr2337546pgh.66.1665834757714; Sat, 15 Oct 2022 04:52:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665834757; cv=none; d=google.com; s=arc-20160816; b=KgwAxQrUFzyFosMXX5wdp5ORJSIgGBOfWkr57un60egHdp6htdOYT8PNGimRUxnNIc j3E7lRrecp6/SD5r+0keso5HMFJngoBFMZdxNe/oKmKgwBqV4ACw3Y/MkvrNZC0uEfTS BWG0JhRvaGq443qIHT7eXheew4SxTza2y5eMbN5O2NFpH0HA2cwpIuH6b1jlocVwCSHf 2LDBTFfXdt6w1JUnj0ORe4mCSkYYrdeOuPeFVkSE+4IoNTISY2Rc81IolgJHMoTfufAJ 9HRLE5nKno7PdMIc5GZNU/6+8t9WFOoLeDC+Ovyad/3+RIKnjsvkxgNt5EAu6VWtvVur XJPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=llk3rbB259wn9r+kLBPvfponZpfx92jUBGp7v/5H81I=; b=xlXTvqlhnxV3GUE/dEI/ReqdVvS853CnloKYrAMYzoP5L4XyqIUuC+pdIQFPm20i31 Qu2JiX2nk/yz9gk3V6FDG0ptKTkL7xVze3cDsghx7O+9NO2OIOxvFtCvlqc38UXT2R3u fJCqSiYy7Mc5qgDzNbNAZNrnJKjnSeggyFge3Z0PItMo/7Hl/JxgEPoziuKNtl3sMQCu /Hw6WfgMqClEiEIpksztiJtcaQAli7UR6/nmuawXnKa+pHVYSoZiB06NH40PetVsJZKr HmsVc2P3fMOBhB+2+wRulRx4xlpMidOt42jmjTMYq2H7y4Pdt6Alv0UWg3RnJQMAo+5q 98SA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=IDvgNIHL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h21-20020a170902f7d500b001781675f424si5050036plw.548.2022.10.15.04.52.25; Sat, 15 Oct 2022 04:52:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=IDvgNIHL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229583AbiJOLv6 (ORCPT + 99 others); Sat, 15 Oct 2022 07:51:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229811AbiJOLvR (ORCPT ); Sat, 15 Oct 2022 07:51:17 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DE3D2476EA; Sat, 15 Oct 2022 04:51:10 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 404EE60B10; Sat, 15 Oct 2022 11:51:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 71ECEC4347C; Sat, 15 Oct 2022 11:51:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834669; bh=mGaiEStOgcPC4tu/pIinKmWA56gqdSEPvVhCdyZKWTk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IDvgNIHLV8fI9L7nLFL+j7y9yKvpBlfK2MlciQ9ot5koa0BLLCyCRAM6EqoYXsHHe 1bEkWfARgEqYs7zt3LYRF7zH87QmIsXDAwLp72n+uSPTzTVl4qV1ZeaHvaXRecfNxx 76rXd60vPSe6/x14HmPHF2gmxQN9IhS/DqEoORdo8Q0EyZ0golgMUqZ3JpWXBgTOGx 7ZxBfsyjogieFS57g+3RiIp631o5pxye3Qcrvl0r3BX+pRFFwrjy6762vOC+bb5Sxd RPGckv9iSpPZ+HMk97FO0AUIPINFf86rZOch+9j0Eh55ZXH6DkUBZLQEIOzSRnHjqg dvCz4kOpqJCiQ== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Dao Lu , Xianting Tian , Conor Dooley Subject: [PATCH V7 09/12] riscv: Add support for STACKLEAK gcc plugin Date: Sat, 15 Oct 2022 07:46:59 -0400 Message-Id: <20221015114702.3489989-10-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754347315529545?= X-GMAIL-MSGID: =?utf-8?q?1746754347315529545?= From: Dao Lu Add support for STACKLEAK gcc plugin to riscv based heavily on the arm64 version, and modifying the entry.S. Additionally, this disables the plugin for EFI stub code for riscv. All modifications base on generic_entry. The stackleak_erase_on_task_stack() is called in irq disabled context before return to user space. Here is the test result with LKDTM: echo STACKLEAK_ERASING > /sys/kernel/debug/provoke-crash/DIRECT [ 53.110405] lkdtm: Performing direct entry STACKLEAK_ERASING [ 53.111630] lkdtm: stackleak stack usage: [ 53.111630] high offset: 288 bytes [ 53.111630] current: 592 bytes [ 53.111630] lowest: 1136 bytes [ 53.111630] tracked: 1136 bytes [ 53.111630] untracked: 576 bytes [ 53.111630] poisoned: 14376 bytes [ 53.111630] low offset: 8 bytes [ 53.115078] lkdtm: OK: the rest of the thread stack is properly erased Performance impact (tested on qemu env with 1 riscv64 hart, 1GB mem) hackbench -s 512 -l 200 -g 15 -f 25 -P 2.0% slowdown Signed-off-by: Dao Lu Co-developed-by: Xianting Tian Signed-off-by: Xianting Tian Co-developed-by: Guo Ren Signed-off-by: Guo Ren Cc: Mark Rutland Cc: Conor Dooley --- Dao Lu gave the first patch at [1], and Xianting missed the previous patch and gave the second one [2]. Guo Ren tried to move stackleak into common generic entry codes [3], but Mark Rutland pointed out the problem. Combine the Dao Lu's patch with the GENEIRC_ENTRY patchset series, with some modifications (fit GENEIRC_ENTRY, directly using stackleak_erase_on_task_stack). [1] https://lore.kernel.org/linux-riscv/20220615213834.3116135-1-daolu@rivosinc.com/ [2] https://lore.kernel.org/linux-riscv/20220828135407.3897717-1-xianting.tian@linux.alibaba.com/ [3] https://lore.kernel.org/lkml/20220907014809.919979-1-guoren@kernel.org/ --- arch/riscv/Kconfig | 1 + arch/riscv/kernel/entry.S | 3 +++ drivers/firmware/efi/libstub/Makefile | 2 +- 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 04d2d20fb0ab..7476ce9c72d5 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -83,6 +83,7 @@ config RISCV select HAVE_ARCH_MMAP_RND_BITS if MMU select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT select HAVE_ARCH_SECCOMP_FILTER + select HAVE_ARCH_STACKLEAK select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 9864e784d6a6..167ae41ae4a8 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -145,6 +145,9 @@ ENTRY(ret_from_exception) andi s0, s0, SR_SPP #endif bnez s0, 1f +#ifdef CONFIG_GCC_PLUGIN_STACKLEAK + call stackleak_erase_on_task_stack +#endif /* Save unwound kernel stack pointer in thread_info */ addi s0, sp, PT_SIZE_ON_STACK diff --git a/drivers/firmware/efi/libstub/Makefile b/drivers/firmware/efi/libstub/Makefile index b1601aad7e1a..28170707fa6f 100644 --- a/drivers/firmware/efi/libstub/Makefile +++ b/drivers/firmware/efi/libstub/Makefile @@ -25,7 +25,7 @@ cflags-$(CONFIG_ARM) := $(subst $(CC_FLAGS_FTRACE),,$(KBUILD_CFLAGS)) \ -fno-builtin -fpic \ $(call cc-option,-mno-single-pic-base) cflags-$(CONFIG_RISCV) := $(subst $(CC_FLAGS_FTRACE),,$(KBUILD_CFLAGS)) \ - -fpic + -fpic $(DISABLE_STACKLEAK_PLUGIN) cflags-$(CONFIG_LOONGARCH) := $(subst $(CC_FLAGS_FTRACE),,$(KBUILD_CFLAGS)) \ -fpie From patchwork Sat Oct 15 11:47:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2931 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp605942wrs; Sat, 15 Oct 2022 04:52:53 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5t1GItpFT/ig7iMVdOwGbKOyrkPP68U8gPS1l8YW3x6JlBN9Jvp0KWWk4sVhAdy7hNtFN7 X-Received: by 2002:a05:6402:4444:b0:458:f355:ce04 with SMTP id o4-20020a056402444400b00458f355ce04mr2024482edb.422.1665834773654; Sat, 15 Oct 2022 04:52:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665834773; cv=none; d=google.com; s=arc-20160816; b=tSfQkZftb8RdqyIFjlcbiP5NKNyUkb6ndjySMiSU7vtyVMSIDAp41A+jSK1LG/xOjk 5fYm+IZk4d8HwZ9lcOmDWg2PFm4jdpEHUd8Aep8ZVrWSznf/pPjO7Yyt0oxwwGDm0Xzk qJ65hmJtA5enapgX2Be8lNaLb7hZKHekNVWgl0I1C/s3/09mzMoZ76ElVz2OnQCUWMod rwh2yKodV52ldnen61dHNtBt+iN/De61AZ6bcCubdLZbo/TfFn+a991k9Uoji4Q9blH8 AZx+4jhPx5vv23Ad9FEiZowJomC+7yJyZ7APgzIsIWyp5FOFiAATJn0oF6l17XbOZPYK p7WA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=v0SV2brNcaH2bENkuT/CTmssYxP+glp97ol2/N8+iwM=; b=p3hQz3p8yetRJ5P839kYMw+TPokA4l+3YVTaXeoLoUHRM54TCyTQjC6P21sKwsfc1g 8/Mn5ONSA5s/nJaREaV2ZLu9gK4Jq4ia6OXEgqAbRo37jgp19b2fH2xSO0WVt3xJl5n8 xLNcGlHWhDsZzHE/bNCqkA5IGjG8TEF8yZ41GX/17DbkAB/4sQWYVqPopqdIDHUdW/Rj wne+BmqzlVcFycqAfWoBzUqWDvzJRtK/pKsDfV+f4CyBoUmYFkXXrk0+XF+Bv4l8RpTs aWW+vfEAdGRsUfR2EGj02NfEXPCiHKyt5b1NrDxkBccw7ueArrsIbasTbxBtCLBWns3w IvDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ivRt3FF2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dt5-20020a170907728500b0073d8ccd37c2si4528209ejc.107.2022.10.15.04.52.27; Sat, 15 Oct 2022 04:52:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ivRt3FF2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229673AbiJOLwM (ORCPT + 99 others); Sat, 15 Oct 2022 07:52:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229734AbiJOLve (ORCPT ); Sat, 15 Oct 2022 07:51:34 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B540481DE; Sat, 15 Oct 2022 04:51:21 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 8758BB803F1; Sat, 15 Oct 2022 11:51:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 50F6BC433D6; Sat, 15 Oct 2022 11:51:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834678; bh=TxUjoHq4rCqfK0kNHzvh6xhZsPO6l0oQ3VoILpocI+w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ivRt3FF2vJOnX815vISDKIYI9RuzvRdtpwgrhm6QsjX0vuCqvs0w99kPZzfLraTA+ 6GHrYAqo+JcINqQUHzKwAEEKZ9xO+mgmhbaFEB/lgfGHqbVxGcFNAkCoz7pWtfxzxw 7tPg/4XW/YXny2Uxz02xG+vICFKIYPqzzT8XCvEpdnVNOsLErDWQVHSQNtWzCsajQE heAfZehJLOJIxY8409E9iC7dmjW6tJ+Azayz++fZACnKjWGqnu4lKmgOuXG2IP3ad8 zTLQk6HnU6qC0ekEHDK60opsftgwkRhl8rbygJR+XLu7UpDPfrhWFqBAIrfqGvV6Go O2mr8oIPCdORQ== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , Andreas Schwab Subject: [PATCH V7 10/12] riscv: Add config of thread stack size Date: Sat, 15 Oct 2022 07:47:00 -0400 Message-Id: <20221015114702.3489989-11-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754363801652143?= X-GMAIL-MSGID: =?utf-8?q?1746754363801652143?= From: Guo Ren 0cac21b02ba5 ("risc v: use 16KB kernel stack on 64-bit") increase the thread size mandatory, but some scenarios, such as D1 with a small memory footprint, would suffer from that. After independent irq stack support, let's give users a choice to determine their custom stack size. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Cc: Andreas Schwab --- arch/riscv/Kconfig | 10 ++++++++++ arch/riscv/include/asm/thread_info.h | 12 +----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7476ce9c72d5..2b72541f87b1 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -453,6 +453,16 @@ config IRQ_STACKS Add independent irq & softirq stacks for percpu to prevent kernel stack overflows. We may save some memory footprint by disabling IRQ_STACKS. +config THREAD_SIZE_ORDER + int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT + range 0 4 + default 1 if 32BIT && !KASAN + default 3 if 64BIT && KASAN + default 2 + help + Specify the Pages of thread stack size (from 4KB to 64KB), which also + affects irq stack size, which is equal to thread stack size. + endmenu # "Platform type" menu "Kernel features" diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index 043da8ccc7e6..c970d41dc4c6 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -11,18 +11,8 @@ #include #include -#ifdef CONFIG_KASAN -#define KASAN_STACK_ORDER 1 -#else -#define KASAN_STACK_ORDER 0 -#endif - /* thread information allocation */ -#ifdef CONFIG_64BIT -#define THREAD_SIZE_ORDER (2 + KASAN_STACK_ORDER) -#else -#define THREAD_SIZE_ORDER (1 + KASAN_STACK_ORDER) -#endif +#define THREAD_SIZE_ORDER CONFIG_THREAD_SIZE_ORDER #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) /* From patchwork Sat Oct 15 11:47:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2934 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp633825wrs; Sat, 15 Oct 2022 06:09:22 -0700 (PDT) X-Google-Smtp-Source: AMsMyM41aPkAQHR0N/Bs/TDGg/OJ0iyJeq3Z4LxVLUEkDckK7zPPsUu8Y2boy2EZc+oCMKDttWby X-Received: by 2002:a50:fc85:0:b0:458:e7c6:1cfa with SMTP id f5-20020a50fc85000000b00458e7c61cfamr2291172edq.256.1665839362063; Sat, 15 Oct 2022 06:09:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665839362; cv=none; d=google.com; s=arc-20160816; b=m9Nnsg0h96HSPApJxAs6iW4MyfWCRMxcJNG7jAH6wU2V3ftuF2yE+1NktuSwyHWu2s fo5LZF0Ullj20eQgKLbAfVgj7SaY3VZmtzf1d6MxSdpYan2HVsAxAMr4r6j3+rBhUqk8 rooe8cdPh/lT4X2bFw+sj3bOysm1dAzlxa+VnA6jX86Zch1nMhRcmafGW9ij3jjjVc+k oWzf1ReIufwAhEtoxhGcAtIMiNXvm9yVsIw7Q0DvNrGCw9owxnQcJyDNbE/OZeXM/Z2H G5wbhV17IqZZJWnzdMMHmKNB07vNB91ho30haiPvhrmX1MOi+2vCXYnVVwEQpzoX4kIn takA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=geQlShIttdSOI8VHX6MJnH96EUyPla4ktOZUwHbcAqY=; b=IMb7bZ1TC36Yns4h7s739uKfNmuA+MhSRZRRATyJqW0G3DDmsejcuV9NGL/rigNwZD 0LvMMZuoqp8rz6uDf4JqlQk4MInaP6589gYPA/FJbGLDcs7pEXXuWOANXK1ti8cD4jv0 pXnpM5bdqkufoIQDjgkUjFL+KiKlVT+OX9jA/bpkI11ZgpnTRZ0Pq0wsmK6RVRWwidQZ phinqBSrdo8/g26F1o1o/JlcNc8UutLjrIf1K0ajeGHQkYzDdYoyo2C7d7RtA2+02/8o rEBkjSDUSFKB+MOQhMd6VnvKyyr3zqKShF1MZT5YbVmAhLva/DI20XV+TXKisCo4RUCK 7myQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HzTdACx0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id gb22-20020a170907961600b0072fc714c92fsi5169083ejc.902.2022.10.15.06.08.55; Sat, 15 Oct 2022 06:09:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HzTdACx0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229802AbiJOLwY (ORCPT + 99 others); Sat, 15 Oct 2022 07:52:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229665AbiJOLvx (ORCPT ); Sat, 15 Oct 2022 07:51:53 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFD2E4B992; Sat, 15 Oct 2022 04:51:28 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 85361B80935; Sat, 15 Oct 2022 11:51:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DBAD8C43141; Sat, 15 Oct 2022 11:51:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834686; bh=5BqmCuQp7sHy6nn4kWXkL6Hp/JjWVQuzCirMthcyLmI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HzTdACx03e7sgaFhlHj/RkBPDO3LyYlvaSHbKUvnJhZmbnRosS04kxqClsiCkT8Do NZWAbrv9/mPEWwmITPSvaLLjqcxVciEoSYyriL4RCTEmIydIGbDj/PvprKj5vl6DPf Hs2R4nwHqPRtggH02lze01IZbmJbl1ZEnELCFa/jn+azHVj9tZHjwhmUkwiq5/2TUy xBsf57J2LJSslxI9v+Kwlp1AssO9cT/iv7YuJO651Bic36N4u2fJkdAeaKcz1OD0u4 5IynUkc+GoLmBFuPr6FlMHL6a0oIsmpjPowjdc2mWEjGfH16JQXvJlfR/RZE1qJOaR FQdRjl9vJxh/w== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH V7 11/12] riscv: remove extra level wrappers of trace_hardirqs_{on,off} Date: Sat, 15 Oct 2022 07:47:01 -0400 Message-Id: <20221015114702.3489989-12-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746759175057823361?= X-GMAIL-MSGID: =?utf-8?q?1746759175057823361?= From: Jisheng Zhang Since riscv is converted to generic entry, there's no need for the extra wrappers of trace_hardirqs_{on,off}. Tested with llvm + irqsoff. Signed-off-by: Jisheng Zhang Reviewed-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/kernel/Makefile | 2 -- arch/riscv/kernel/trace_irq.c | 27 --------------------------- arch/riscv/kernel/trace_irq.h | 11 ----------- 3 files changed, 40 deletions(-) delete mode 100644 arch/riscv/kernel/trace_irq.c delete mode 100644 arch/riscv/kernel/trace_irq.h diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index ab333cb792fd..d3b7779f774c 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -69,8 +69,6 @@ obj-$(CONFIG_CPU_PM) += suspend_entry.o suspend.o obj-$(CONFIG_FUNCTION_TRACER) += mcount.o ftrace.o obj-$(CONFIG_DYNAMIC_FTRACE) += mcount-dyn.o -obj-$(CONFIG_TRACE_IRQFLAGS) += trace_irq.o - obj-$(CONFIG_PERF_EVENTS) += perf_callchain.o obj-$(CONFIG_HAVE_PERF_REGS) += perf_regs.o obj-$(CONFIG_RISCV_SBI) += sbi.o diff --git a/arch/riscv/kernel/trace_irq.c b/arch/riscv/kernel/trace_irq.c deleted file mode 100644 index 095ac976d7da..000000000000 --- a/arch/riscv/kernel/trace_irq.c +++ /dev/null @@ -1,27 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2022 Changbin Du - */ - -#include -#include -#include "trace_irq.h" - -/* - * trace_hardirqs_on/off require the caller to setup frame pointer properly. - * Otherwise, CALLER_ADDR1 might trigger an pagging exception in kernel. - * Here we add one extra level so they can be safely called by low - * level entry code which $fp is used for other purpose. - */ - -void __trace_hardirqs_on(void) -{ - trace_hardirqs_on(); -} -NOKPROBE_SYMBOL(__trace_hardirqs_on); - -void __trace_hardirqs_off(void) -{ - trace_hardirqs_off(); -} -NOKPROBE_SYMBOL(__trace_hardirqs_off); diff --git a/arch/riscv/kernel/trace_irq.h b/arch/riscv/kernel/trace_irq.h deleted file mode 100644 index 99fe67377e5e..000000000000 --- a/arch/riscv/kernel/trace_irq.h +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2022 Changbin Du - */ -#ifndef __TRACE_IRQ_H -#define __TRACE_IRQ_H - -void __trace_hardirqs_on(void); -void __trace_hardirqs_off(void); - -#endif /* __TRACE_IRQ_H */ From patchwork Sat Oct 15 11:47:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 2932 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp606768wrs; Sat, 15 Oct 2022 04:56:19 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7cNSDUSj0TheVXggEySZqXzdCBElY8Y7aRGkRw3QybkNRSDhTJJlKf7Xx9/YQ1W/0RFJe8 X-Received: by 2002:a17:907:72c2:b0:78d:9aeb:e4f5 with SMTP id du2-20020a17090772c200b0078d9aebe4f5mr1782404ejc.210.1665834979050; Sat, 15 Oct 2022 04:56:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665834979; cv=none; d=google.com; s=arc-20160816; b=OEwiSGlUr2daJugazINo4TPmvM1LEUS57nGhkml5xnd78awUKuS3BRZ0OpRg/aLYOH GoP74IB7kE8iVznBRIn5WeDBHogVcN0Z67+nqlYf4heJ+zyv0B183EdLh3+PjdhP5TXk IQdfiPgvo4oj95c7KiovLX2sIk1QGlt5t+ipWSEBhQeHOBk4CVonCPJQ8gXrW243Afii +fzlgRhrouXXnbto4xNPXNQtkhwRrvgD7gSlp4MpAPn4sCDF/aAMjG/febAP51nR8J4O +JpA4ZYhEmjNAywYDQYMLGPb7iKVxVhboeFBvRCL14/Gk0fc+woUXJc4rjuwQxvNI4EC pZyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Tfvv2ezpgz1JCwWzdeJlwex6csnRaBKxTzFM/LRo3ak=; b=icOLUQrZ8cDR/q4IwMjDvs6qoux28uTz8P7BmmuXstv1ki0NVuCQBdXwiMihsFinfv 6+uTqF/QKLAz2f7OrT9bNRBd9W+I8YSjNZhE0NxN4nY0Pa1FtIIGYYgKFw591yCnw59Y tkQfBcKKaeE8tPMFO0iduFlYn95EMaodAfCz2HhPrqsfNoiV5s/kGREX7zE2bvRODev4 Nk8q1+Rd8BGfmJRzyBKl4sx+nYmrnCctJgGlc3sUODN7iVyJAgY64TFtJd9oEAnIQ7qL p9VWFS1hnEKn0F8Hx+RexF0hRfVx6+ZDdTd3tB6UEHIuSWEIPwoNuOo+P4vmQcoLtmJo XC9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="Jvax/d0V"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j9-20020a05640211c900b00458c0c36dd3si5673473edw.65.2022.10.15.04.55.54; Sat, 15 Oct 2022 04:56:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="Jvax/d0V"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229876AbiJOLw0 (ORCPT + 99 others); Sat, 15 Oct 2022 07:52:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229770AbiJOLv4 (ORCPT ); Sat, 15 Oct 2022 07:51:56 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE9374BA70; Sat, 15 Oct 2022 04:51:37 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D68A4B803F1; Sat, 15 Oct 2022 11:51:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DD418C4347C; Sat, 15 Oct 2022 11:51:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665834694; bh=fh15OHJHy3R3yR29pio/F1HO3nxfSUxW0UFKeoOvuqA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Jvax/d0VnemxcgAQYxdfl97c3+5pwbgiw0RwzL1R6BR3JazB1Iv59l9B2SqfZ20Pv 3zHqItoiWniPZhIPqC0P6H/O1FOrWHMGmC9VFSWE1MPrk0Nvd4OLYkRQfobrQDTYU9 uKLaIQ8uz2dZoQXFuOw6BGf3zMNFnVQ01/vqdJPMX3529Jq07eSFzvyjOqSjapTSx9 bbcecYUxlwPnDnCJBb7CY0aemxRfQiPl5Rf+ZTDzXcEasdA6eyZYHSh2bTm83PseeX sZY3w62Cglk7kvL8gae55OpoOtOxlpzF0fMmWz0fY1hdgwnoqNQKR1qrt6zjJITvVU y5Y5Xo6psV3Kg== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH V7 12/12] riscv: Typo fixup for addi -> andi in comment Date: Sat, 15 Oct 2022 07:47:02 -0400 Message-Id: <20221015114702.3489989-13-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221015114702.3489989-1-guoren@kernel.org> References: <20221015114702.3489989-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746754579024715876?= X-GMAIL-MSGID: =?utf-8?q?1746754579024715876?= From: Guo Ren Correct typo for addi -> andi in comment, although the immediate[11:0] are the same. Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/kernel/entry.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 167ae41ae4a8..b1babad5f829 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -138,7 +138,7 @@ ENTRY(ret_from_exception) REG_L s0, PT_STATUS(sp) #ifdef CONFIG_RISCV_M_MODE - /* the MPP value is too large to be used as an immediate arg for addi */ + /* the MPP value is too large to be used as an immediate arg for andi */ li t0, SR_MPP and s0, s0, t0 #else