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[2620:137:e000::1:20]) by mx.google.com with ESMTP id gk8-20020a17090790c800b00889c115cf70si674742ejb.190.2023.01.29.19.40.08; Sun, 29 Jan 2023 19:40:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=YhZxEBoN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235444AbjA3DdU (ORCPT + 99 others); Sun, 29 Jan 2023 22:33:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235315AbjA3DdQ (ORCPT ); Sun, 29 Jan 2023 22:33:16 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0CB913D5B; Sun, 29 Jan 2023 19:33:14 -0800 (PST) X-UUID: d0f265b2a04e11eda06fc9ecc4dadd91-20230130 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=S7zFVnLR8eXEvS0Y7l7+sbTIVYZrc5SlkBvc9Y6wViE=; b=YhZxEBoNyySQVS/iNrMJM60UwLc2Jdp8T7jSf3Wk3G/EPjQGQY2BewFBW/YkLe1gkZEkZFrinU9wG6kEV8UxMD4evc95nEWtYMwAJjQ2G6rSfzPmlc0WCxsYlk6UNFmYmDpciTF44EhwE9wU69eY0O87nqghpKjPSNfYUBWnZ1Q=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.18,REQID:89c74771-33d5-4945-b985-f63fbd14af5a,IP:0,U RL:0,TC:0,Content:-25,EDM:-30,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACT ION:release,TS:-55 X-CID-META: VersionHash:3ca2d6b,CLOUDID:2733b355-dd49-462e-a4be-2143a3ddc739,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:2,IP:nil,UR L:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0 X-CID-BVR: 0 X-UUID: d0f265b2a04e11eda06fc9ecc4dadd91-20230130 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1618978660; Mon, 30 Jan 2023 11:33:09 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 30 Jan 2023 11:33:07 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 30 Jan 2023 11:33:07 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , , , Allen-KH Cheng Subject: [PATCH 1/6] media: dt-bindings: media: mediatek: Rename child node names for decoder Date: Mon, 30 Jan 2023 11:33:00 +0800 Message-ID: <20230130033305.31830-2-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> References: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756417261283818143?= X-GMAIL-MSGID: =?utf-8?q?1756417261283818143?= In order to make the names of the child nodes more generic, we rename "vcodec-lat" and "vcodec-core" to "video-codec" for decoder in patternProperties and example. Signed-off-by: Allen-KH Cheng Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- .../media/mediatek,vcodec-subdev-decoder.yaml | 61 ++----------------- 1 file changed, 5 insertions(+), 56 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index c4f20acdc1f8..46308cdaacc0 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -91,12 +91,13 @@ properties: # Required child node: patternProperties: - '^vcodec-lat@[0-9a-f]+$': + '^video-codec@[0-9a-f]+$': type: object properties: compatible: enum: + - mediatek,mtk-vcodec-core - mediatek,mtk-vcodec-lat - mediatek,mtk-vcodec-lat-soc @@ -145,59 +146,6 @@ patternProperties: additionalProperties: false - '^vcodec-core@[0-9a-f]+$': - type: object - - properties: - compatible: - const: mediatek,mtk-vcodec-core - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - iommus: - minItems: 1 - maxItems: 32 - description: | - List of the hardware port in respective IOMMU block for current Socs. - Refer to bindings/iommu/mediatek,iommu.yaml. - - clocks: - maxItems: 5 - - clock-names: - items: - - const: sel - - const: soc-vdec - - const: soc-lat - - const: vdec - - const: top - - assigned-clocks: - maxItems: 1 - - assigned-clock-parents: - maxItems: 1 - - power-domains: - maxItems: 1 - - required: - - compatible - - reg - - interrupts - - iommus - - clocks - - clock-names - - assigned-clocks - - assigned-clock-parents - - power-domains - - additionalProperties: false - required: - compatible - reg @@ -211,6 +159,7 @@ if: compatible: contains: enum: + - mediatek,mtk-vcodec-core - mediatek,mtk-vcodec-lat then: @@ -241,7 +190,7 @@ examples: #size-cells = <2>; ranges = <0 0 0 0x16000000 0 0x40000>; reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */ - vcodec-lat@10000 { + video-codec@10000 { compatible = "mediatek,mtk-vcodec-lat"; reg = <0 0x10000 0 0x800>; interrupts = ; @@ -264,7 +213,7 @@ examples: power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>; }; - vcodec-core@25000 { + video-codec@25000 { compatible = "mediatek,mtk-vcodec-core"; reg = <0 0x25000 0 0x1000>; interrupts = ; From patchwork Mon Jan 30 03:33:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 50105 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1991632wrn; Sun, 29 Jan 2023 19:41:25 -0800 (PST) X-Google-Smtp-Source: AMrXdXsrveXEmNzCovFLeu1/pTSATNb/JRmegHS3EsW+GWzVQHKNcUVUD6LV8u3aoKC+4njUWLnf X-Received: by 2002:a05:6402:360d:b0:46c:2c94:d30b with SMTP id el13-20020a056402360d00b0046c2c94d30bmr57944289edb.33.1675050085146; Sun, 29 Jan 2023 19:41:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675050085; cv=none; d=google.com; s=arc-20160816; b=hFMtTAYYrjrRHnAnQ0K9QeiqRl3FQJQv2rHRvXuz4Fwzx/UImQI97boJEBgvcsEj68 IXhBfOsZpe6VnTb4i0PRUGxb0Y8aYYrIdrLYAgyrvEmTpSWmJqBH7ma8FwGBF+EVfG4y gBC6G2I8auNzYQOMhfMH+2L3/+xJJVzqMDCrX5NixoqpqK6BdQd2D4LRpeqXxe/nG4Jt nzLuhe897ssQxi9jP+HFr5IFToltBx/0gcZman/RyuLgL33i6cesLpLpgCRXlJSEPsmp ypnQywd1BzS0D2vKRNMI0VZwd/ZHg+UeCzubWqeE7cecu7R/Z8u2LOq72t0d65e+5d5K pyGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1G5CgmoJNqi0WF3OrbuFaLqD9wd1bS/NEuB81IeqtVY=; b=QI/9xJ5kpdhY7fNa/6QnczMA/4z556v50mo1HGpkiSZgFAR0j2mPC3pTzjM3ZFmo/d ivtzbjIF/tg34F/htTJav0tFEkHK+PGu93vNiOTZWaMr9UQiC/eEfuJFsI6enqwg8YQq xq6HzMBLCwccplyaj5BEgBSind2b5jaNJ+CovagSlxBT0T/JHPIyf6ZJLLkxVYBI+zCG f0W1lE1s0SkNgiIUsRHp32tw+w83wMgsBiykqkj1+g9vYLA8Vap93dxop2ZZFF3vN6Qh n/sMUGFWsyo+cs+r4aN6qS05NmolR6+kLtWmvIrxXg9So6kAjBT/b9hGFb4uXKNd4nrA Gm5A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=UEXARQcX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v7-20020aa7d807000000b0049e62402a6dsi14378528edq.41.2023.01.29.19.41.02; Sun, 29 Jan 2023 19:41:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=UEXARQcX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235504AbjA3DdX (ORCPT + 99 others); Sun, 29 Jan 2023 22:33:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235398AbjA3DdR (ORCPT ); Sun, 29 Jan 2023 22:33:17 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFBD913DC5; Sun, 29 Jan 2023 19:33:15 -0800 (PST) X-UUID: d1a1ea6ea04e11eda06fc9ecc4dadd91-20230130 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=1G5CgmoJNqi0WF3OrbuFaLqD9wd1bS/NEuB81IeqtVY=; b=UEXARQcXMa9s0mazYRF46jGrYq57E/9RptaPKgZEiCpL47NFlvy9AgnxqgmARmsNPuLX5ooD0diZeqE34Ta9CyXNHb11hCnzK5++fj3r6olh4dY4lbRG1RJ79ZmUfU8q+fAwyZ6RPCVKtZ/KU3cTUruGJw5se0c2ZNyRHeP2CmE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.18,REQID:efeeb72f-02b2-4112-af63-6cb04060abe2,IP:0,U RL:0,TC:0,Content:-5,EDM:-30,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:-35 X-CID-META: VersionHash:3ca2d6b,CLOUDID:f4fe4d8d-8530-4eff-9f77-222cf6e2895b,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:2,IP:nil,UR L:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0 X-CID-BVR: 0 X-UUID: d1a1ea6ea04e11eda06fc9ecc4dadd91-20230130 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 19531071; Mon, 30 Jan 2023 11:33:10 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 30 Jan 2023 11:33:08 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 30 Jan 2023 11:33:08 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , , , Allen-KH Cheng Subject: [PATCH 2/6] media: dt-bindings: media: mediatek: Remove "dma-ranges" property for decoder Date: Mon, 30 Jan 2023 11:33:01 +0800 Message-ID: <20230130033305.31830-3-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> References: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756417317989796916?= X-GMAIL-MSGID: =?utf-8?q?1756417317989796916?= Because the decoder nodes already make use of the iommus property to configure the IOMMU for address translations, having a dma-ranges property makes no sense. In fact, after commit f1ad5338a4d5 ("of: Fix "dma-ranges" handling for bus controllers"), having a dma-ranges property causes IOMMU faults. Remove the dma-ranges property and update the example. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring Reviewed-by: Nícolas F. R. A. Prado --- .../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 7 ------- 1 file changed, 7 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index 46308cdaacc0..7efc70ae4406 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -76,11 +76,6 @@ properties: The node of system control processor (SCP), using the remoteproc & rpmsg framework. - dma-ranges: - maxItems: 1 - description: | - Describes the physical address space of IOMMU maps to memory. - "#address-cells": const: 2 @@ -151,7 +146,6 @@ required: - reg - iommus - mediatek,scp - - dma-ranges - ranges if: @@ -185,7 +179,6 @@ examples: compatible = "mediatek,mt8192-vcodec-dec"; mediatek,scp = <&scp>; iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>; - dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>; #address-cells = <2>; #size-cells = <2>; ranges = <0 0 0 0x16000000 0 0x40000>; From patchwork Mon Jan 30 03:33:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 50106 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1991735wrn; Sun, 29 Jan 2023 19:41:52 -0800 (PST) X-Google-Smtp-Source: AMrXdXtEmJJKktMlVZufZCe79qLRmhHSngicscMrHq9QCNnnrKW2M19kuSqXGlU57axTrykJC/FE X-Received: by 2002:a17:907:6e05:b0:871:dd2:4afb with SMTP id sd5-20020a1709076e0500b008710dd24afbmr69752448ejc.42.1675050112400; Sun, 29 Jan 2023 19:41:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675050112; cv=none; d=google.com; s=arc-20160816; b=kYKGfYRmYic0k9QGuGN0n1Fbg6Q/JsqDjtrivjOu5kCWwfSaNYrC5VTu+cW8fh7Wku 4LKI4Qu0RLd1aKQa3MIOHa/JSd3SNDrtvXxED0CITf1dica/gv3BTSIHdhRTy2ATmki3 xJhtV1PmgIT4/KfhufeZ9luxgWaARA3Hs2q4gBPH61pKVPrXBoZYWakIptAQvzHgWEq3 hiE2H/tx8I32upBqg2IMQf/lv2FXcwy/omjODbqJzfrYzQSuqcQu7qpQIZir067qlLHp rFqPkaosT75yMFY2HUPdYZG1kfw0hqE3iP0xXnPIA90Hxh7PNBlywtBnKAHREowKUJZ7 vgkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8s/AqyTRERfWJlTbr4EDA6icF7A3Ta2JpnFPfdFaA74=; b=rVbfpHIJkAkNtUnwtMMNGAU2c71JSVWu/0yCtDMO1Ay5S7YNyMpWTXuX2gEz8GwRIS Vhy68Jd8F/k+Z3K+z+UYcEEFCqW8l94pYN8HF9fkS4uDCPI4QEiet/qj0uz+pwmhfj4s rLuKQXBATUHS8YAaW7Y4RMXF6+u6zdEif+1EWEZ++y7dcVRDftXFe/lb3HwzLqRn1nW5 3e45g2qwL74awKnNhh/l6vWrqcDOYup/FXkSLbmc8mlYhdkIbgtReMbOKSurVVFVulhJ c4dAAfEKdhY84FKoJSp6sag+n+T4xkF3kh3eAOVnlU3CGHg5fCyoWKpC0faCFgjTMRnN S29g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="krg7yR/f"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 11-20020a170906024b00b0087877581bfesi11480075ejl.428.2023.01.29.19.41.29; Sun, 29 Jan 2023 19:41:52 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="krg7yR/f"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235531AbjA3Dd0 (ORCPT + 99 others); Sun, 29 Jan 2023 22:33:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229476AbjA3DdS (ORCPT ); Sun, 29 Jan 2023 22:33:18 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E10BAEB40; Sun, 29 Jan 2023 19:33:16 -0800 (PST) X-UUID: d220bb28a04e11eda06fc9ecc4dadd91-20230130 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=8s/AqyTRERfWJlTbr4EDA6icF7A3Ta2JpnFPfdFaA74=; b=krg7yR/fxW5b4a9GOZJlZc7vIBi9ck0mk2PWXLEwkdSIvWE+OCQ3Asx9A7iyPQIX9WhN0PghPbgBQx5zUOQtREGhYYlTFo8H45OfEd3ZsJu7d6PHZmFZDYFv4W4XPalj6+U2k1BwhqlsU5JNzOokeZnW1lctlh0r6pf6OWe2dTA=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.18,REQID:045eea9f-7b76-4d24-a526-faf4e1f82240,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:3ca2d6b,CLOUDID:53ff4d8d-8530-4eff-9f77-222cf6e2895b,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0 X-CID-BVR: 0 X-UUID: d220bb28a04e11eda06fc9ecc4dadd91-20230130 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1457082859; Mon, 30 Jan 2023 11:33:11 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 30 Jan 2023 11:33:09 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 30 Jan 2023 11:33:09 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , , , Allen-KH Cheng Subject: [PATCH 3/6] arm64: dts: mt8192: Add video-codec nodes Date: Mon, 30 Jan 2023 11:33:02 +0800 Message-ID: <20230130033305.31830-4-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> References: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756417346487398553?= X-GMAIL-MSGID: =?utf-8?q?1756417346487398553?= Add video-codec lat and core nodes for mt8192 SoC. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Nícolas F. R. A. Prado Tested-by: Nícolas F. R. A. Prado --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 59 ++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index ef4fcefa2bfc..9b51cce4c25d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -1520,6 +1520,65 @@ power-domains = <&spm MT8192_POWER_DOMAIN_ISP2>; }; + vcodec_dec: video-codec@16000000 { + compatible = "mediatek,mt8192-vcodec-dec"; + reg = <0 0x16000000 0 0x1000>; + mediatek,scp = <&scp>; + iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0 0 0x16000000 0 0x26000>; + + video-codec@10000 { + compatible = "mediatek,mtk-vcodec-lat"; + reg = <0x0 0x10000 0 0x800>; + interrupts = ; + iommus = <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_AVC_MV_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_PRED_RD_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_TILE_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_WDMA_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_RG_CTRL_DMA_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_UFO_ENC_EXT>; + clocks = <&topckgen CLK_TOP_VDEC_SEL>, + <&vdecsys_soc CLK_VDEC_SOC_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_LAT>, + <&vdecsys_soc CLK_VDEC_SOC_LARB1>, + <&topckgen CLK_TOP_MAINPLL_D4>; + clock-names = "sel", "soc-vdec", "soc-lat", "vdec", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; + power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>; + }; + + video-codec@25000 { + compatible = "mediatek,mtk-vcodec-core"; + reg = <0 0x25000 0 0x1000>; + interrupts = ; + iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PP_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PRED_RD_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PRED_WR_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PPWRAP_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_TILE_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_VLD_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_VLD2_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_AVC_MV_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_RG_CTRL_DMA_EXT>; + clocks = <&topckgen CLK_TOP_VDEC_SEL>, + <&vdecsys CLK_VDEC_VDEC>, + <&vdecsys CLK_VDEC_LAT>, + <&vdecsys CLK_VDEC_LARB1>, + <&topckgen CLK_TOP_MAINPLL_D4>; + clock-names = "sel", "soc-vdec", "soc-lat", "vdec", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; + power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>; + }; + }; + larb5: larb@1600d000 { compatible = "mediatek,mt8192-smi-larb"; reg = <0 0x1600d000 0 0x1000>; From patchwork Mon Jan 30 03:33:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 50109 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1992544wrn; Sun, 29 Jan 2023 19:45:21 -0800 (PST) X-Google-Smtp-Source: AMrXdXsAD3vQtbQSlfnRdUv9MPBJFKd1poT9ZoA4hdlOJxGUPQbJtMExqLSfu5BklmnsPSwsUxVz X-Received: by 2002:a17:907:1c08:b0:86f:de0b:b066 with SMTP id nc8-20020a1709071c0800b0086fde0bb066mr57695364ejc.76.1675050320961; Sun, 29 Jan 2023 19:45:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675050320; cv=none; d=google.com; s=arc-20160816; b=kn32eFpxKSbzTRYYvALNXNg4kNrq0u6fUlBBYnZoKGe7Toz6ezpBWfgiE6GKmLlJKr iJOYxEGZN7YQajDlaFEHJb+DTcKSAh/ul0xnTSrzBlDiQ8ukWMBJ1pHjUCLJAyApj3cE rS/ZaurPGg0EHojWYRNcEin7oJ6ypGclt/bnz6oHlTn2Mp7qTcZa91YZWv/sNKWGqPEy ZkZF+8cc2aMQDZNuBLyYUA75m+HToJmaFSuUExq759ixgqqCX4cTBdIRerlaghHFAs7v JT6GuQ+km8lJUC9YAXM5OYou4M12BHUsxIT3j158Vs+MNFABEDgpLXmcN8TnN0VJXDbL lYuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=3Ung9oFBm33rXOG7FFhNcYNioi3ccW9m3+5fbEJMqX0=; b=ZkxoAZ/xgzQjrWRGE8Cfx9NzSm3IuoANuc6AbjgdkUlQvGMmhcVbCuZldDrq30liAe OpA8GrJwZJ1Jk9wJP3JM3jFEyd/i649IzlfCfMLZqyx5NoXJfS2bhtCPvFpuI+qp84Tb 1qJwd52H4TnsqZaInL5nrn0HvxjiOfjgmv7lUez/0qyFZLqVCSbNEdL7Deajzg9L9QHR iSjK5R597phhKBExLt9GUvqm4vU+GXZgNQcFb9UbtALMv+XvmdIHbaF9pu2HmnVl8Ucy LiF9KTL9j+2TDDr530a41XQkGx1qNgFCS61DRM3yZaPHOvMd1E1BLt/scqEoXxrzwxSR kVpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="oSZ6y/AD"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 11-20020a170906024b00b0087877581bfesi11480075ejl.428.2023.01.29.19.44.58; Sun, 29 Jan 2023 19:45:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="oSZ6y/AD"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235627AbjA3Dd3 (ORCPT + 99 others); Sun, 29 Jan 2023 22:33:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235438AbjA3DdU (ORCPT ); Sun, 29 Jan 2023 22:33:20 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 044181C336; Sun, 29 Jan 2023 19:33:17 -0800 (PST) X-UUID: d291d010a04e11eda06fc9ecc4dadd91-20230130 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=3Ung9oFBm33rXOG7FFhNcYNioi3ccW9m3+5fbEJMqX0=; b=oSZ6y/ADErueq2lxe2wqgnOpoWh1kmTwu+1DvI+r0EydCZVSFzANq3vhRrlsK97qgRM6pZxFB2CYmI1KcDqRMszqHjvJ/cSpUpyfp2TsNV60eIK5JQ3+3sY6zpiqkahW6VqkQWm/pSvL/fHqDc1qPsa0fDKIebtQpmHdP6UgBgA=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.18,REQID:f7fdc806-bf8d-4786-a0bd-3064080b8b31,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:90 X-CID-INFO: VERSION:1.1.18,REQID:f7fdc806-bf8d-4786-a0bd-3064080b8b31,IP:0,URL :0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:90 X-CID-META: VersionHash:3ca2d6b,CLOUDID:a633b355-dd49-462e-a4be-2143a3ddc739,B ulkID:230130113313494307RR,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0 X-CID-BVR: 0 X-UUID: d291d010a04e11eda06fc9ecc4dadd91-20230130 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1179411382; Mon, 30 Jan 2023 11:33:11 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 30 Jan 2023 11:33:11 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 30 Jan 2023 11:33:10 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , , , Allen-KH Cheng Subject: [PATCH 4/6] media: dt-bindings: media: mediatek: vcodec: adapt to the 'clock-names' of different platforms Date: Mon, 30 Jan 2023 11:33:03 +0800 Message-ID: <20230130033305.31830-5-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> References: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756417565800802462?= X-GMAIL-MSGID: =?utf-8?q?1756417565800802462?= From: Yunfei Dong mt8195 and mt8192 have different clock numbers, separate 'clock-names' according to compatible name. Signed-off-by: Yunfei Dong Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring --- .../media/mediatek,vcodec-subdev-decoder.yaml | 41 ++++++++++++++++--- 1 file changed, 35 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index 7efc70ae4406..51c0ff7baa52 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -110,15 +110,12 @@ patternProperties: Refer to bindings/iommu/mediatek,iommu.yaml. clocks: + minItems: 4 maxItems: 5 clock-names: - items: - - const: sel - - const: soc-vdec - - const: soc-lat - - const: vdec - - const: top + minItems: 4 + maxItems: 5 assigned-clocks: maxItems: 1 @@ -160,6 +157,38 @@ then: required: - interrupts +allOf: + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8192-vcodec-dec + then: + properties: + clock-names: + items: + - const: sel + - const: soc-vdec + - const: soc-lat + - const: vdec + - const: top + + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8195-vcodec-dec + then: + properties: + clock-names: + items: + - const: sel + - const: vdec + - const: lat + - const: top + additionalProperties: false examples: From patchwork Mon Jan 30 03:33:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 50107 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1992377wrn; Sun, 29 Jan 2023 19:44:34 -0800 (PST) X-Google-Smtp-Source: AK7set/tH/NLxIR2G0uVN4yL2wAAlrnCMEisOz+cQZB7BvjOalVaD/+FDDKVMj9oPB/toS57Euem X-Received: by 2002:a17:906:3d7:b0:87d:5ba:c2da with SMTP id c23-20020a17090603d700b0087d05bac2damr8584743eja.41.1675050274678; Sun, 29 Jan 2023 19:44:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675050274; cv=none; d=google.com; s=arc-20160816; b=FQDaEZJlee4wPFZI3AYpByoJgWwdClvm2OvNP06tHJKwWFyBHWMju9Wezz4R0SxM7f /tWNAOnSEEEeCwQpeFiRxVSTat4x/doNe5HqYm0E8ZoaLPdEFElk2nQdA2yKhJaBvjd4 tC+ytfaxeZMl2B5scBOmCKw4JW2F4QBSn2o/CzlztXxKkiA9FP6jr2GLA59KsvDfl3Q2 z88uW+tMwVJ+8OElpLbUNkxItWBPHikkRiptqibHC/oOXIXHJvgvhDRGd8D0qRFBga7T TvU5m5bji4VRXaRoF9xnwXxTZ6JIipzUdm4540GJq5PnJdWf8xbY234ahnuCFM2nDVLO huFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=KEWfprtLcsm395hD7ACF+KmAQ+ogRYh8vluT9gQ1Uyc=; b=LHUs/sCvRL8xZsH0ewAUJ3rMS6Irgm/MaXhokQHguMJdi7XnM0Y0tXDMOEQ4Tk4Mws nCQ/Wi+dQmo6GB/NepgPG8IGeoQnTNe5t0++U/DtnmCjcJAC0jkZ9I5VVHV1ZKxcA/Fo FvswxURyfjA+7AReXd14W4xmlFUzztxodAAvMJPDZIQhCaGs5ArOrsnvb8IQnegwOBck wlayY89j7SrFFqtB8MnXJZDHBmkVeYxPMH+d0DHSUw7V0ojV4/TuVB6YdRIbpwGHhY7r D9PXgQ+ZI1sAqWT0n97qs02L/9QrB+qXUCkZ/YyZ8KHp62sO/vSSY0moeZa7CaPgP9jZ 1FZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="OdBH5p/D"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. 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Changing the max reg value from 1 to 2. Adding the description for VDEC_SYS and VDEC_MISC. Signed-off-by: Yunfei Dong Signed-off-by: Allen-KH Cheng Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index 51c0ff7baa52..cfd13a6b6b68 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -61,7 +61,10 @@ properties: - mediatek,mt8195-vcodec-dec reg: - maxItems: 1 + minItems: 1 + items: + - description: VDEC_SYS register space + - description: VDEC_RACING_CTRL register space iommus: minItems: 1 @@ -98,6 +101,7 @@ patternProperties: reg: maxItems: 1 + description: VDEC_MISC register space interrupts: maxItems: 1 From patchwork Mon Jan 30 03:33:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 50108 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1992413wrn; Sun, 29 Jan 2023 19:44:46 -0800 (PST) X-Google-Smtp-Source: AMrXdXtdMyB/ZXKul68iQv0ED+3974GcHF4PYunO4IYQo9WLGvCO1AdhJtITwJkcjzsXbvkOdOLX X-Received: by 2002:a17:906:60d0:b0:877:612e:516e with SMTP id f16-20020a17090660d000b00877612e516emr143368714ejk.61.1675050275946; Sun, 29 Jan 2023 19:44:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675050275; cv=none; d=google.com; s=arc-20160816; b=aVltPqBsYY7+0TzbjtK+O9eN5B2ah9OyH0YVr48TEkHvoju6zWk9KxEwgA4HaVO5vZ iko7L/toK3F2lrOpKmHMwdfF3LRyBJuwwzjSM6x9Xw+Hq/cW1A88jPQb5OqtSqdtGvL/ ItSWRJ7vnMT3zDAf+bM1bMGi72TOTThQiraX90Gv0MvL3TMBFoSM+XNPH6e2/0wKwvru TIG0WPouUFa4I/rmdbf0COtS5n7ui33GoEsGdfY+ZWEMBEQcXUmKnex53JsJtK7GBS+7 CSOl5RiwgktGTN0gsJKT5k8LvErCblzgPHEGioB4p74YWzQXNUm0hmq/CgpSxrEaE3gO XSRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=by1eY5KmwL6RPgc+Jxj9BAxI9cqcfKeDQSdyxly48P4=; b=Kjo+NvEspMOFJBUpE07S/z+8ec9XygBrY576qkR8uCt6Q/fOXZ7I9GsHIMg6E5GvMo ykGEFOEuZyB+6iIPMNDB0kaFdqLRJogy9zxccKdUXJ33/nNpF7/MRxLIatmaDhuZG6XQ PXDRlFl6y2TyZRxsdQj1ZMXKBvUfYBcJZEHirbOllLr3wTAGsKqu35FrOREJ0VZLGk12 O0eNsv/YPtZFne9oHJLTzdFLe/oUF1kf3QAgWcWWncj7thJ3O6gP/4U9loCnRp/SSX6b Vl+lt/RlM24YLIcVpNoFQuJLmlH78wcUwoRSkZaKths+qNvmrBlrtAJhFheyzxxqsf7C +exQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=DD9xA3As; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l14-20020a170907914e00b0088885a38edcsi1858360ejs.328.2023.01.29.19.44.13; Sun, 29 Jan 2023 19:44:35 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=DD9xA3As; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235657AbjA3Ddg (ORCPT + 99 others); Sun, 29 Jan 2023 22:33:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235529AbjA3DdY (ORCPT ); Sun, 29 Jan 2023 22:33:24 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A00FA21949; Sun, 29 Jan 2023 19:33:20 -0800 (PST) X-UUID: d35f8bfea04e11ed945fc101203acc17-20230130 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=by1eY5KmwL6RPgc+Jxj9BAxI9cqcfKeDQSdyxly48P4=; b=DD9xA3As+1yt1yTWoeKn78KXMcAwY+LlTudth6Z9FjmR9IGAxW0OAUcEfm1zBEgIU34VW5dr4dFwEzjiOP0Xe/hFOjNpnNEONG8pS6vURsK+1Ouk2eMF7CrmUuPUaG8GwsdLCvkcSv+T3Ucdzfh03ise4/BQhXLdkdmXUwr9vF0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.18,REQID:3888990b-3b41-43f8-a2f6-a9bb1db7f57e,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:3ca2d6b,CLOUDID:3c01ddf6-ff42-4fb0-b929-626456a83c14,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0 X-CID-BVR: 0 X-UUID: d35f8bfea04e11ed945fc101203acc17-20230130 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 322740554; Mon, 30 Jan 2023 11:33:13 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Mon, 30 Jan 2023 11:33:12 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 30 Jan 2023 11:33:12 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , "Krzysztof Kozlowski" CC: , , , , , , , "Allen-KH Cheng" Subject: [PATCH 6/6] arm64: dts: mt8195: Add video decoder node Date: Mon, 30 Jan 2023 11:33:05 +0800 Message-ID: <20230130033305.31830-7-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> References: <20230130033305.31830-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756417518572126766?= X-GMAIL-MSGID: =?utf-8?q?1756417518572126766?= From: Yunfei Dong Add video decoder node to mt8195 device tree. Signed-off-by: Yunfei Dong Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 70 ++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 9db5f9157ce3..04abd9a08d15 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -2196,6 +2196,76 @@ power-domains = <&spm MT8195_POWER_DOMAIN_CAM>; }; + video-codec@18000000 { + compatible = "mediatek,mt8195-vcodec-dec"; + mediatek,scp = <&scp>; + iommus = <&iommu_vdo M4U_PORT_L21_VDEC_MC_EXT>; + #address-cells = <2>; + #size-cells = <2>; + reg = <0 0x18000000 0 0x1000>, + <0 0x18004000 0 0x1000>; + ranges = <0 0 0 0x18000000 0 0x26000>; + + video-codec@2000 { + compatible = "mediatek,mtk-vcodec-lat-soc"; + reg = <0 0x2000 0 0x800>; + iommus = <&iommu_vpp M4U_PORT_L23_VDEC_UFO_ENC_EXT>, + <&iommu_vpp M4U_PORT_L23_VDEC_RDMA_EXT>; + clocks = <&topckgen CLK_TOP_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_LAT>, + <&topckgen CLK_TOP_UNIVPLL_D4>; + clock-names = "sel", "vdec", "lat", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; + power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>; + }; + + video-codec@10000 { + compatible = "mediatek,mtk-vcodec-lat"; + reg = <0 0x10000 0 0x800>; + interrupts = ; + iommus = <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_VLD_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_VLD2_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_AVC_MC_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_PRED_RD_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_TILE_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_WDMA_EXT>; + clocks = <&topckgen CLK_TOP_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_LAT>, + <&topckgen CLK_TOP_UNIVPLL_D4>; + clock-names = "sel", "vdec", "lat", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; + power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>; + }; + + video-codec@25000 { + compatible = "mediatek,mtk-vcodec-core"; + reg = <0 0x25000 0 0x1000>; /* VDEC_CORE_MISC */ + interrupts = ; + iommus = <&iommu_vdo M4U_PORT_L21_VDEC_MC_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_UFO_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_PP_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_PRED_RD_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_PRED_WR_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_PPWRAP_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_TILE_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_VLD_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_VLD2_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_AVC_MV_EXT>; + clocks = <&topckgen CLK_TOP_VDEC>, + <&vdecsys CLK_VDEC_VDEC>, + <&vdecsys CLK_VDEC_LAT>, + <&topckgen CLK_TOP_UNIVPLL_D4>; + clock-names = "sel", "vdec", "lat", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; + power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>; + }; + }; + larb24: larb@1800d000 { compatible = "mediatek,mt8195-smi-larb"; reg = <0 0x1800d000 0 0x1000>;