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[194.187.74.233]) by smtp.gmail.com with ESMTPSA id z22-20020a1709067e5600b0087276f66c6asm2600508ejr.115.2023.01.27.09.58.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jan 2023 09:58:40 -0800 (PST) From: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski Cc: Michael Walle , devicetree@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= Subject: [PATCH 1/2] dt-bindings: nvmem: io: new binding for IO accessible NVMEM devices Date: Fri, 27 Jan 2023 18:58:30 +0100 Message-Id: <20230127175831.26753-1-zajec5@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756200380225468640?= X-GMAIL-MSGID: =?utf-8?q?1756200380225468640?= From: Rafał Miłecki With the NVMEM layouts binding in place we should now use: 1. NVMEM device access bindings 2. NVMEM content description bindings This binding allows describing NVMEM devices that can be accessed using IO mappings. Signed-off-by: Rafał Miłecki --- .../devicetree/bindings/nvmem/io.yaml | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/io.yaml diff --git a/Documentation/devicetree/bindings/nvmem/io.yaml b/Documentation/devicetree/bindings/nvmem/io.yaml new file mode 100644 index 000000000000..67e0aae9cd94 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/io.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/io.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IO access based NVMEM + +description: | + This binding describes simple NVMEM devices that can be accessed by simply + mapping a predefined IO address. + + It's a generic solution for providing NVMEM content access. The way of + handling actual content may be device specific and can be described using a + proper layout. + +maintainers: + - Rafał Miłecki + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + const: io-nvmem + + reg: + maxItems: 1 + +unevaluatedProperties: false + +examples: + - | + nvmem@10000 { + compatible = "io-nvmem"; + reg = <0x10000000 0x10000>; + }; From patchwork Fri Jan 27 17:58:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= X-Patchwork-Id: 49559 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp973749wrn; Fri, 27 Jan 2023 10:13:34 -0800 (PST) X-Google-Smtp-Source: AK7set+IVppL/j8tI5KABealVA6iQlp1s8CUSFt9lTIWXVTlhZ69KmtkJ5bmBXiU4UKXUQiRhu2a X-Received: by 2002:a17:902:e5c7:b0:196:e74:6909 with SMTP id u7-20020a170902e5c700b001960e746909mr19315617plf.3.1674843214425; Fri, 27 Jan 2023 10:13:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1674843214; cv=none; d=google.com; s=arc-20160816; b=AOSHTEjxb2zSRBVOhi/wo0AaY0D9A6oiX3EtQjpp+qBBRLmg4EKvHVwUsfmZgBCL5W QPWtVT7AFe4za94hjVphItaHspttfVhpZavw7DZ9LHCjX6fv5Jb7xWwsvnVc2GMl4cTj hcUoLXwTsrQf7rDdck3wMDQdnqMWCJ9vdTJ+pw7W1cQDRSeKwAP9p/BBnfa7gxT8TpqU XSmqx7+5Rt/EdOyZbAdPcwZ/zYVTdiwPGr2beXCDWuTmcoW36rgeveuoh/jM986P9eLR wdTrdEw/DHS7/QTd++vumcsU0wgUXR8O5oLe/JNBjxV6Xe643+5wHDiTiswTIn2wTfrn qSQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=17/xEWC1WmOjlte8h0eDRTmEFdiv+lS1lWx2rWU4nVc=; b=D9/v5tN4JGhHOAaWma0O2qjaeBdWFijXw0GY8bq02Wwgyye+qQVPP+WkmZUevGgUtw oMftA8+Wle/fxXBRDKEw6aw0ikRVHMkEV4d68iKOSFUv9o6SgpQYiGVQra2ywKKjPC+q OBfi+NSz0GjfYI+Ygp4hOW+2M8gvkAtZZ3H7hCgtBBC6KknKtDBn5bhVMu2io8knqEFy vFni28ijnZ31m6asz0cI9F6ZIsNungnf2c4GVL2CgaWU8w90zJrhIs5Ga6yk8EpLYPbj X8VSM5Mo0CpB7wOkl7uQC9nl/vUkwpzjQIiXDq23YXTIO5bTzqRN0NI71aXhO7VXEdjq txgA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=lXG0lVpD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[194.187.74.233]) by smtp.gmail.com with ESMTPSA id z22-20020a1709067e5600b0087276f66c6asm2600508ejr.115.2023.01.27.09.58.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jan 2023 09:58:42 -0800 (PST) From: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski Cc: Michael Walle , devicetree@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= Subject: [PATCH 2/2] nvmem: add generic driver for devices with I/O based access Date: Fri, 27 Jan 2023 18:58:31 +0100 Message-Id: <20230127175831.26753-2-zajec5@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127175831.26753-1-zajec5@gmail.com> References: <20230127175831.26753-1-zajec5@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756200398848015225?= X-GMAIL-MSGID: =?utf-8?q?1756200398848015225?= From: Rafał Miłecki With nvmem layouts in place we should now work on plain content access NVMEM drivers (e.g. IO one). Actual NVMEM content handling should go to layout drivers. Signed-off-by: Rafał Miłecki --- drivers/nvmem/Kconfig | 7 ++++ drivers/nvmem/Makefile | 2 ++ drivers/nvmem/io.c | 79 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 88 insertions(+) create mode 100644 drivers/nvmem/io.c diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index 789729ff7e50..e77bfe6eb52e 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -90,6 +90,13 @@ config NVMEM_IMX_OCOTP_SCU This is a driver for the SCU On-Chip OTP Controller (OCOTP) available on i.MX8 SoCs. +config NVMEM_IO + tristate "IO access based NVMEM support" + depends on HAS_IOMEM + help + This driver provides support for NVMEM devices that can be accessed + using I/O mapping. + config NVMEM_JZ4780_EFUSE tristate "JZ4780 EFUSE Memory Support" depends on MACH_INGENIC || COMPILE_TEST diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 442f9a4876a5..82db0a89c4d6 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -20,6 +20,8 @@ obj-$(CONFIG_NVMEM_IMX_OCOTP) += nvmem-imx-ocotp.o nvmem-imx-ocotp-y := imx-ocotp.o obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU) += nvmem-imx-ocotp-scu.o nvmem-imx-ocotp-scu-y := imx-ocotp-scu.o +obj-$(CONFIG_NVMEM_IO) += nvmem-io.o +nvmem-io-y := io.o obj-$(CONFIG_NVMEM_JZ4780_EFUSE) += nvmem_jz4780_efuse.o nvmem_jz4780_efuse-y := jz4780-efuse.o obj-$(CONFIG_NVMEM_LAN9662_OTPC) += nvmem-lan9662-otpc.o diff --git a/drivers/nvmem/io.c b/drivers/nvmem/io.c new file mode 100644 index 000000000000..307526fda036 --- /dev/null +++ b/drivers/nvmem/io.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023 Rafał Miłecki + */ + +#include +#include +#include +#include +#include +#include +#include + +struct io_nvmem { + void __iomem *base; +}; + +static int io_nvmem_read(void *context, unsigned int offset, void *val, size_t bytes) +{ + struct io_nvmem *priv = context; + u8 *dst = val; + + while (bytes--) + *dst++ = readb(priv->base + offset++); + + return 0; +} + +static int io_nvmem_probe(struct platform_device *pdev) +{ + struct nvmem_config config = { + .name = "io-nvmem", + .reg_read = io_nvmem_read, + }; + struct device *dev = &pdev->dev; + struct resource *res; + struct io_nvmem *priv; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + config.dev = dev; + config.priv = priv; + config.size = resource_size(res); + + if (!device_property_present(dev, "read-only")) + dev_warn(dev, "Writing is not supported yet"); + + return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &config)); +} + +static const struct of_device_id io_nvmem_of_match_table[] = { + { .compatible = "io-nvmem", }, + {}, +}; + +static struct platform_driver io_nvmem_driver = { + .probe = io_nvmem_probe, + .driver = { + .name = "io_nvmem", + .of_match_table = io_nvmem_of_match_table, + }, +}; + +static int __init io_nvmem_init(void) +{ + return platform_driver_register(&io_nvmem_driver); +} + +subsys_initcall_sync(io_nvmem_init); + +MODULE_AUTHOR("Rafał Miłecki"); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(of, io_nvmem_of_match_table);