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[2620:137:e000::1:20]) by mx.google.com with ESMTP id u7-20020a50eac7000000b004580ae4abfcsi2730480edp.460.2022.10.14.13.23.44; Fri, 14 Oct 2022 13:24:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=kD2tnNre; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231147AbiJNUOP (ORCPT + 99 others); Fri, 14 Oct 2022 16:14:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230139AbiJNUOK (ORCPT ); Fri, 14 Oct 2022 16:14:10 -0400 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6664101D2 for ; Fri, 14 Oct 2022 13:14:08 -0700 (PDT) Received: by mail-pj1-x1049.google.com with SMTP id 88-20020a17090a09e100b00208c35d9452so3051637pjo.6 for ; Fri, 14 Oct 2022 13:14:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=xSZQdVus5Bc10Nyq9KzLPWg8hzLcHTiPyHVyqpOguK4=; b=kD2tnNrehBli3cgB0QmimYdhfvTNc37MT2v7KLpXOBTBhb0BLBdEHaiuHQYJ9qaedM Wu3dyR+bDoP4WxYvgg5pmzR8h0c5XrATYiA1Rqo4u8keEfE8ZV3TEqhaHV6RL5HLtEAC ZT0KzCT10tTowbh0A2WW5JPaazN2RXzmLslOBUMsqxsfmWPZzW91OzdYu01JGs3+xnGo pQt+PsxEwOygchY3h0Ikw5gx2rEArPwKo8UqMhgDbyVMCcQXH0hTIk03Vsc3I9Kz/qfF JD23wKrPN3Owdyz3bAiAB4/zHJIksYkPPNqwFKz7QwFUkDE1uMfXbmizikJoE1nUgxyv qCLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=xSZQdVus5Bc10Nyq9KzLPWg8hzLcHTiPyHVyqpOguK4=; b=nnkxhdXis5PE2tYCTib1vLt5bYJbZW7YQiPNdJo9lbZgAEswWSXRzw8gxapE6p8uIh gzF0V6linpAZrs2IXNeWBI/qTWyqL0GtbhN7fdEq0N5CpdLe4EmPiQ5NrLzO/uj+J0x+ M+Gnzmzfgtxvdyb3oimXw85LvNTDYe+hOcq7ZK0h1bK2x1JPySPMyv5zpS5X24WJXRXv 6a067wq5Sua4m6a4VJk5PcjSesPq3z81cL4XSQvU5WmnOjYdAlDaGrf13Iv7RrXyuUVH sAUiDCtMqF9lyiH5PyNn+tjemOX0gwyV/uj+YNETefHj+dqZUKqPaiufjk/2hb0Hh/zQ 5MIQ== X-Gm-Message-State: ACrzQf3DyOPKupy5ZvqbNEyuVxD0Lg62+uquFX9s/ndGNaVgC4H0EGw/ ipTqPDJelEayCAXBDNlaDgpj2y3aMoI1ui9L1nI= X-Received: from ndesaulniers-desktop.svl.corp.google.com ([2620:0:100e:712:2ba5:63af:4077:4515]) (user=ndesaulniers job=sendgmr) by 2002:a17:903:2351:b0:181:68a8:9f9c with SMTP id c17-20020a170903235100b0018168a89f9cmr7043437plh.115.1665778448305; Fri, 14 Oct 2022 13:14:08 -0700 (PDT) Date: Fri, 14 Oct 2022 13:13:51 -0700 In-Reply-To: <20221014201354.3190007-1-ndesaulniers@google.com> Mime-Version: 1.0 References: <20221014201354.3190007-1-ndesaulniers@google.com> X-Developer-Key: i=ndesaulniers@google.com; a=ed25519; pk=UIrHvErwpgNbhCkRZAYSX0CFd/XFEwqX3D0xqtqjNug= X-Developer-Signature: v=1; a=ed25519-sha256; t=1665778433; l=4007; i=ndesaulniers@google.com; s=20220923; h=from:subject; bh=XFiK8v7Ofros3NhMcAkCbMIm1L6g9zzm1gIpb9nZops=; b=UCUZB8NQR1HsjQzqCH+jS/nqSRc0/wpX9vPy7Pb2Ols3E7tqNnIHUsF81BE/YEh0EcS1X2Ky6URN rEa2p/CSCRh53eRwp3EI5XU3oR0m7boibgTA/jRIyZ6/nsDQOts8 X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog Message-ID: <20221014201354.3190007-2-ndesaulniers@google.com> Subject: [PATCH v4 1/4] ARM: remove lazy evaluation in Makefile From: Nick Desaulniers To: Russell King Cc: Arnd Bergmann , Ard Biesheuvel , Masahiro Yamada , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, llvm@lists.linux.dev, Nathan Chancellor , Nick Desaulniers X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746695932874828271?= X-GMAIL-MSGID: =?utf-8?q?1746695932874828271?= arch-y and tune-y used lazy evaluation since they used to contain cc-option checks. They don't any longer, so just eagerly evaluate these command line flags. Signed-off-by: Nick Desaulniers Reviewed-by: Nathan Chancellor --- No change from v3. arch/arm/Makefile | 60 +++++++++++++++++++++-------------------------- 1 file changed, 27 insertions(+), 33 deletions(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index c846119c448f..8dd943b50b7d 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -63,44 +63,38 @@ KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra) # Note that GCC does not numerically define an architecture version # macro, but instead defines a whole series of macros which makes # testing for a specific architecture or later rather impossible. -arch-$(CONFIG_CPU_32v7M) =-D__LINUX_ARM_ARCH__=7 -march=armv7-m -arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 -march=armv7-a -arch-$(CONFIG_CPU_32v6) =-D__LINUX_ARM_ARCH__=6 -march=armv6 -# Only override the compiler option if ARMv6. The ARMv6K extensions are +arch-$(CONFIG_CPU_32v7M) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-m +arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-a +arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 -march=armv6 +# Only override the compiler opt:ion if ARMv6. The ARMv6K extensions are # always available in ARMv7 ifeq ($(CONFIG_CPU_32v6),y) -arch-$(CONFIG_CPU_32v6K) =-D__LINUX_ARM_ARCH__=6 -march=armv6k +arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 -march=armv6k endif -arch-$(CONFIG_CPU_32v5) =-D__LINUX_ARM_ARCH__=5 -march=armv5te -arch-$(CONFIG_CPU_32v4T) =-D__LINUX_ARM_ARCH__=4 -march=armv4t -arch-$(CONFIG_CPU_32v4) =-D__LINUX_ARM_ARCH__=4 -march=armv4 -arch-$(CONFIG_CPU_32v3) =-D__LINUX_ARM_ARCH__=3 -march=armv3m - -# Evaluate arch cc-option calls now -arch-y := $(arch-y) +arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 -march=armv5te +arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t +arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4 +arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3m # This selects how we optimise for the processor. -tune-$(CONFIG_CPU_ARM7TDMI) =-mtune=arm7tdmi -tune-$(CONFIG_CPU_ARM720T) =-mtune=arm7tdmi -tune-$(CONFIG_CPU_ARM740T) =-mtune=arm7tdmi -tune-$(CONFIG_CPU_ARM9TDMI) =-mtune=arm9tdmi -tune-$(CONFIG_CPU_ARM940T) =-mtune=arm9tdmi -tune-$(CONFIG_CPU_ARM946E) =-mtune=arm9e -tune-$(CONFIG_CPU_ARM920T) =-mtune=arm9tdmi -tune-$(CONFIG_CPU_ARM922T) =-mtune=arm9tdmi -tune-$(CONFIG_CPU_ARM925T) =-mtune=arm9tdmi -tune-$(CONFIG_CPU_ARM926T) =-mtune=arm9tdmi -tune-$(CONFIG_CPU_FA526) =-mtune=arm9tdmi -tune-$(CONFIG_CPU_SA110) =-mtune=strongarm110 -tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100 -tune-$(CONFIG_CPU_XSCALE) =-mtune=xscale -tune-$(CONFIG_CPU_XSC3) =-mtune=xscale -tune-$(CONFIG_CPU_FEROCEON) =-mtune=xscale -tune-$(CONFIG_CPU_V6) =-mtune=arm1136j-s -tune-$(CONFIG_CPU_V6K) =-mtune=arm1136j-s - -# Evaluate tune cc-option calls now -tune-y := $(tune-y) +tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi +tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi +tune-$(CONFIG_CPU_ARM740T) :=-mtune=arm7tdmi +tune-$(CONFIG_CPU_ARM9TDMI) :=-mtune=arm9tdmi +tune-$(CONFIG_CPU_ARM940T) :=-mtune=arm9tdmi +tune-$(CONFIG_CPU_ARM946E) :=-mtune=arm9e +tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi +tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi +tune-$(CONFIG_CPU_ARM925T) :=-mtune=arm9tdmi +tune-$(CONFIG_CPU_ARM926T) :=-mtune=arm9tdmi +tune-$(CONFIG_CPU_FA526) :=-mtune=arm9tdmi +tune-$(CONFIG_CPU_SA110) :=-mtune=strongarm110 +tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100 +tune-$(CONFIG_CPU_XSCALE) :=-mtune=xscale +tune-$(CONFIG_CPU_XSC3) :=-mtune=xscale +tune-$(CONFIG_CPU_FEROCEON) :=-mtune=xscale +tune-$(CONFIG_CPU_V6) :=-mtune=arm1136j-s +tune-$(CONFIG_CPU_V6K) :=-mtune=arm1136j-s ifeq ($(CONFIG_AEABI),y) CFLAGS_ABI :=-mabi=aapcs-linux -mfpu=vfp From patchwork Fri Oct 14 20:13:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Desaulniers X-Patchwork-Id: 2810 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp362782wrs; Fri, 14 Oct 2022 13:24:49 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4MyCKzvyqvamoOeucfl4yozn1kC1DF/SR5gGCSufHKzAqSRqReSH/Juhl7cm8HE+wGZykp X-Received: by 2002:a17:907:760b:b0:78d:9d67:83b9 with SMTP id jx11-20020a170907760b00b0078d9d6783b9mr4681296ejc.568.1665779089651; Fri, 14 Oct 2022 13:24:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665779089; cv=none; d=google.com; s=arc-20160816; b=wiyT+CLDFcredpciGfXmb2YnVhvJ5G8PoyxH7CUa/Ls3wRZwBuDRZrhSUTG/LpveSD R5oqtaI9u4fE7x32cGBhrcmUhotelapR0ExIGzGW/LZPfMhNnRLKHE1QGSdniNiHFJ+x NGvXD7Lwc86vitEy1DxUD/zRtmRDCRx91f6VtXrPZgbR/8WAFTukywf7fU2IoRXKGHct wNHYHrFk+FbU7EjvMy/+b+OdxqGfMzbBebpgH1M12mweCfW4ZYfJ+ZM70Ul/IT33fCuf v/j9b3KbHBB0rlg2hb/KbPOcGTSGjomQk8MlkSttnFCtW1ZIXjgpYBHq+dvgp4Bqkrco ADzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=4V1w1ZK85iv+g/osbxdE+4HdIBW8TKuHK7GH5Ncfix4=; b=nOs2lporPzRZZq/dsN8+KUDk85yolIvHU6bNdlfvhziaT7oh3XpeTgSBnOzjqkAY15 Q7IcZeJO/OhjwcyrXG2O0mEVcgBMsqmsJ5lQ8Yb5WwDZu+pDn6SvuMIEw3ahvRE3V6vR j8dBwipeErN0ANCJz1qw6z1EE9xZUs3zA/GuIrMAUi6uIkuMCjEhqg1F6SGOACGSSYWM 72ncOCy6lKs5sWmW3w01DUgv3X1It/X4PdMUyNsoJVI5KPi7aDV9mcGptyLHuZbIpOUe dDu+WQwXmSfz0t8giJ6lUmv4+ZRJqND4nP+Evi9NtiEeJA1s3pgLM+LvDXg9zw0TkDHI Iaqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=UjBn+YBM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y6-20020a50e606000000b004573c1ae3fasi2676529edm.285.2022.10.14.13.24.24; Fri, 14 Oct 2022 13:24:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=UjBn+YBM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230511AbiJNUOS (ORCPT + 99 others); Fri, 14 Oct 2022 16:14:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59090 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230323AbiJNUOM (ORCPT ); Fri, 14 Oct 2022 16:14:12 -0400 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E37D4101D2 for ; Fri, 14 Oct 2022 13:14:10 -0700 (PDT) Received: by mail-pj1-x1049.google.com with SMTP id f9-20020a17090a664900b0020ada57adaeso3049716pjm.7 for ; Fri, 14 Oct 2022 13:14:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=4V1w1ZK85iv+g/osbxdE+4HdIBW8TKuHK7GH5Ncfix4=; b=UjBn+YBMCMvoKokEWmD6iVVb+CmRp8QL3WpqKJ8mv/Tr5MteD0GnXQRW9J3KWJtO+/ Gm9C8BKbLFUNTmZ3JZNTfY/PuAnkARN+kxEyQGoAuriDczy8jUY/VTRYJ1DJK9WQZllV cdJ4SjrA04VVZiu6+gDYU9E+JABdxMrCSyUybd1Ck3JJUyzVKIDfVMVle/cF3ZJWu+BA SR9mGLf52iGHCOdPRhYwkQj08ViJqDkJt+//QFpYhKCyzYa9PUVUs7qm4fy9GxY1vgo2 9WmMSNwUM5PDmsLW7733Ah1n+XOetkkn5BuyX1qEONHh1kRwka+GAYwKWso4JZ97rpO+ u96A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=4V1w1ZK85iv+g/osbxdE+4HdIBW8TKuHK7GH5Ncfix4=; b=CkEQB5uOuinH6h3f2csA2wIVVdDWcJNVHRnYTpTVEU+iwt+I9SwtVcMmzQE4M+LnK5 ZQq0Jxxt49qVi8WcvjAw0yUbyJvrDKfnwetGqNZooDhynBLNw3GgP60MmGvnQKL+JSEW o6Y/fMoX6kUDkpUjGsXNOQd6IX/3EqKtxrai3Bgzgiz2i81uRDHaQzLUm24PcsS+SPyW IQF0Hg1WusnWIHnLIoKdLCRcIT3pZ0SHBLwgSlGVg7/J1N6cD0uaAWGdmXeuTBFiyd9r dpD2VQakAGZnHR8oaHLpcoE7Pt+IkKZNEIlFmBG+f5VfKHznXRRt8RWjdXku9AhC1Tj7 CouA== X-Gm-Message-State: ACrzQf2skpFfcgN1yp+wJftkQSoC7/ilXU6vBVcIju6E2V6IrZcV0YX6 QKQeoNuId30fIZKKHk6ZX9G8popjyy6tMAIsUZA= X-Received: from ndesaulniers-desktop.svl.corp.google.com ([2620:0:100e:712:2ba5:63af:4077:4515]) (user=ndesaulniers job=sendgmr) by 2002:a17:90b:3b47:b0:20d:a991:3f24 with SMTP id ot7-20020a17090b3b4700b0020da9913f24mr10295875pjb.108.1665778450422; Fri, 14 Oct 2022 13:14:10 -0700 (PDT) Date: Fri, 14 Oct 2022 13:13:52 -0700 In-Reply-To: <20221014201354.3190007-1-ndesaulniers@google.com> Mime-Version: 1.0 References: <20221014201354.3190007-1-ndesaulniers@google.com> X-Developer-Key: i=ndesaulniers@google.com; a=ed25519; pk=UIrHvErwpgNbhCkRZAYSX0CFd/XFEwqX3D0xqtqjNug= X-Developer-Signature: v=1; a=ed25519-sha256; t=1665778433; l=22152; i=ndesaulniers@google.com; s=20220923; h=from:subject; bh=+4Yn29WimkqMMpF6pODmaTBXzzr3LxUMjlHYak9mUQ8=; b=WDa29aBJ406/AaI8Ll5V6aeyUH31p7Go0ve9hapjo24wVpzH4c0KrnNBfy/kjrIWPmOEKPzS46Vc ghUUqvN9DBLfSee3EWQ1nr9/A3oNq83M95E3qTpEMgwPv3tld3hS X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog Message-ID: <20221014201354.3190007-3-ndesaulniers@google.com> Subject: [PATCH v4 2/4] ARM: use .arch directives instead of assembler command line flags From: Nick Desaulniers To: Russell King Cc: Arnd Bergmann , Ard Biesheuvel , Masahiro Yamada , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, llvm@lists.linux.dev, Nathan Chancellor , Nick Desaulniers X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746695974941989739?= X-GMAIL-MSGID: =?utf-8?q?1746695974941989739?= Similar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assembler directives instead of assembler arguments"). GCC and GNU binutils support setting the "sub arch" via -march=, -Wa,-march, target function attribute, and .arch assembler directive. Clang was missing support for -Wa,-march=, but this was implemented in clang-13. The behavior of both GCC and Clang is to prefer -Wa,-march= over -march= for assembler and assembler-with-cpp sources, but Clang will warn about the -march= being unused. clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument] Since most assembler is non-conditionally assembled with one sub arch (modulo arch/arm/delay-loop.S which conditionally is assembled as armv4 based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the .arch assembler directive. Add a few more instances found in compile testing as found by Arnd and Nathan. Link: https://github.com/llvm/llvm-project/commit/1d51c699b9e2ebc5bcfdbe85c74cc871426333d4 Link: https://bugs.llvm.org/show_bug.cgi?id=48894 Link: https://github.com/ClangBuiltLinux/linux/issues/1195 Link: https://github.com/ClangBuiltLinux/linux/issues/1315 Suggested-by: Arnd Bergmann Suggested-by: Nathan Chancellor Signed-off-by: Arnd Bergmann Signed-off-by: Nick Desaulniers Tested-by: Nathan Chancellor --- Changes v3 -> v4: * Add .arch armv7-a to arch/arm/mach-tegra/sleep.S as per Nathan. https://github.com/ClangBuiltLinux/linux/issues/1315#issuecomment-1255646893 * Add Nathan's SB tag. arch/arm/boot/compressed/Makefile | 1 - arch/arm/common/Makefile | 2 -- arch/arm/common/mcpm_head.S | 2 ++ arch/arm/common/vlock.S | 2 ++ arch/arm/kernel/Makefile | 2 -- arch/arm/kernel/hyp-stub.S | 2 ++ arch/arm/kernel/swp_emulate.c | 1 + arch/arm/lib/Makefile | 4 ---- arch/arm/lib/delay-loop.S | 4 ++++ arch/arm/mach-at91/Makefile | 3 --- arch/arm/mach-at91/pm_suspend.S | 4 ++++ arch/arm/mach-imx/Makefile | 3 --- arch/arm/mach-imx/headsmp.S | 2 ++ arch/arm/mach-imx/resume-imx6.S | 2 ++ arch/arm/mach-imx/suspend-imx6.S | 2 ++ arch/arm/mach-mvebu/Makefile | 3 --- arch/arm/mach-mvebu/coherency_ll.S | 1 + arch/arm/mach-mvebu/pmsu.c | 1 + arch/arm/mach-npcm/Makefile | 2 -- arch/arm/mach-npcm/headsmp.S | 2 ++ arch/arm/mach-tegra/Makefile | 2 -- arch/arm/mach-tegra/reset-handler.S | 2 ++ arch/arm/mach-tegra/sleep-tegra20.S | 2 ++ arch/arm/mach-tegra/sleep-tegra30.S | 2 ++ arch/arm/mach-tegra/sleep.S | 2 ++ arch/arm/mm/Makefile | 15 --------------- arch/arm/mm/abort-ev6.S | 1 + arch/arm/mm/abort-ev7.S | 1 + arch/arm/mm/cache-v6.S | 2 ++ arch/arm/mm/cache-v7.S | 2 ++ arch/arm/mm/cache-v7m.S | 2 ++ arch/arm/mm/copypage-feroceon.c | 1 + arch/arm/mm/proc-v6.S | 2 ++ arch/arm/mm/proc-v7-2level.S | 2 ++ arch/arm/mm/proc-v7.S | 2 ++ arch/arm/mm/tlb-v6.S | 2 ++ arch/arm/mm/tlb-v7.S | 2 ++ drivers/memory/Makefile | 2 -- drivers/memory/ti-emif-sram-pm.S | 1 + drivers/soc/bcm/brcmstb/pm/Makefile | 1 - drivers/soc/bcm/brcmstb/pm/s2-arm.S | 1 + 41 files changed, 54 insertions(+), 40 deletions(-) diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 41bcbb460fac..e5c80ff42a4f 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -163,4 +163,3 @@ $(obj)/piggy_data: $(obj)/../Image FORCE $(obj)/piggy.o: $(obj)/piggy_data CFLAGS_font.o := -Dstatic= -AFLAGS_hyp-stub.o := -Wa,-march=armv7-a diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 7bae8cbaafe7..9733381074e0 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -13,7 +13,5 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o obj-$(CONFIG_CPU_V7) += secure_cntvoff.o obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o CFLAGS_REMOVE_mcpm_entry.o = -pg -AFLAGS_mcpm_head.o := -march=armv7-a -AFLAGS_vlock.o := -march=armv7-a obj-$(CONFIG_BL_SWITCHER) += bL_switcher.o obj-$(CONFIG_BL_SWITCHER_DUMMY_IF) += bL_switcher_dummy_if.o diff --git a/arch/arm/common/mcpm_head.S b/arch/arm/common/mcpm_head.S index 291d969bc719..299495c43dfd 100644 --- a/arch/arm/common/mcpm_head.S +++ b/arch/arm/common/mcpm_head.S @@ -15,6 +15,8 @@ #include "vlock.h" +.arch armv7-a + .if MCPM_SYNC_CLUSTER_CPUS .error "cpus must be the first member of struct mcpm_sync_struct" .endif diff --git a/arch/arm/common/vlock.S b/arch/arm/common/vlock.S index f1c7fd44f1b1..1fa09c4697ed 100644 --- a/arch/arm/common/vlock.S +++ b/arch/arm/common/vlock.S @@ -12,6 +12,8 @@ #include #include "vlock.h" +.arch armv7-a + /* Select different code if voting flags can fit in a single word. */ #if VLOCK_VOTING_SIZE > 4 #define FEW(x...) diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 48737ec800eb..d53f56d6f840 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -70,7 +70,6 @@ obj-$(CONFIG_HAVE_TCM) += tcm.o obj-$(CONFIG_OF) += devtree.o obj-$(CONFIG_CRASH_DUMP) += crash_dump.o obj-$(CONFIG_SWP_EMULATE) += swp_emulate.o -CFLAGS_swp_emulate.o := -Wa,-march=armv7-a obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o @@ -99,7 +98,6 @@ CFLAGS_head-inflate-data.o := $(call cc-option,-Wframe-larger-than=10240) obj-$(CONFIG_XIP_DEFLATED_DATA) += head-inflate-data.o obj-$(CONFIG_ARM_VIRT_EXT) += hyp-stub.o -AFLAGS_hyp-stub.o :=-Wa,-march=armv7-a ifeq ($(CONFIG_ARM_PSCI),y) obj-$(CONFIG_SMP) += psci_smp.o endif diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S index b699b22a4db1..3a506b9095a5 100644 --- a/arch/arm/kernel/hyp-stub.S +++ b/arch/arm/kernel/hyp-stub.S @@ -9,6 +9,8 @@ #include #include +.arch armv7-a + #ifndef ZIMAGE /* * For the kernel proper, we need to find out the CPU boot mode long after diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c index b74bfcf94fb1..fdce83c95acb 100644 --- a/arch/arm/kernel/swp_emulate.c +++ b/arch/arm/kernel/swp_emulate.c @@ -34,6 +34,7 @@ */ #define __user_swpX_asm(data, addr, res, temp, B) \ __asm__ __volatile__( \ + ".arch armv7-a\n" \ "0: ldrex"B" %2, [%3]\n" \ "1: strex"B" %0, %1, [%3]\n" \ " cmp %0, #0\n" \ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 6d2ba454f25b..42fb75c06647 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -36,10 +36,6 @@ else lib-y += io-readsw-armv4.o io-writesw-armv4.o endif -ifeq ($(CONFIG_ARCH_RPC),y) - AFLAGS_delay-loop.o += -march=armv4 -endif - $(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S $(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S index 3ccade0f8130..3ac05177d097 100644 --- a/arch/arm/lib/delay-loop.S +++ b/arch/arm/lib/delay-loop.S @@ -8,6 +8,10 @@ #include #include +#ifdef CONFIG_ARCH_RPC + .arch armv4 +#endif + .text .LC0: .word loops_per_jiffy diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 0dcc37180588..794bd12ab0a8 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -14,9 +14,6 @@ obj-$(CONFIG_SOC_SAMV7) += samv7.o # Power Management obj-$(CONFIG_ATMEL_PM) += pm.o pm_suspend.o -ifeq ($(CONFIG_CPU_V7),y) -AFLAGS_pm_suspend.o := -march=armv7-a -endif ifeq ($(CONFIG_PM_DEBUG),y) CFLAGS_pm.o += -DDEBUG endif diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index ffed4d949042..78d65809155f 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -12,6 +12,10 @@ #include "pm.h" #include "pm_data-offsets.h" +#ifdef CONFIG_CPU_V7 +.arch armv7-a +#endif + #define SRAMC_SELF_FRESH_ACTIVE 0x01 #define SRAMC_SELF_FRESH_EXIT 0x00 diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 6fb3965b9ae6..5c650bf40e02 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -34,7 +34,6 @@ obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o obj-$(CONFIG_HAVE_IMX_SRC) += src.o ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_IMX7D_CA7)$(CONFIG_SOC_LS1021A),) -AFLAGS_headsmp.o :=-Wa,-march=armv7-a obj-$(CONFIG_SMP) += headsmp.o platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o endif @@ -48,12 +47,10 @@ obj-$(CONFIG_SOC_IMX7D_CM4) += mach-imx7d-cm4.o obj-$(CONFIG_SOC_IMX7ULP) += mach-imx7ulp.o pm-imx7ulp.o ifeq ($(CONFIG_SUSPEND),y) -AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o endif ifeq ($(CONFIG_ARM_CPU_SUSPEND),y) -AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a obj-$(CONFIG_SOC_IMX6) += resume-imx6.o endif obj-$(CONFIG_SOC_IMX6) += pm-imx6.o diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S index fcba58be8e79..5f9c7b48ae80 100644 --- a/arch/arm/mach-imx/headsmp.S +++ b/arch/arm/mach-imx/headsmp.S @@ -8,6 +8,8 @@ #include #include +.arch armv7-a + diag_reg_offset: .word g_diag_reg - . diff --git a/arch/arm/mach-imx/resume-imx6.S b/arch/arm/mach-imx/resume-imx6.S index 5bd1ba7ef15b..2c0c5c771251 100644 --- a/arch/arm/mach-imx/resume-imx6.S +++ b/arch/arm/mach-imx/resume-imx6.S @@ -9,6 +9,8 @@ #include #include "hardware.h" +.arch armv7-a + /* * The following code must assume it is running from physical address * where absolute virtual addresses to the data section have to be diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S index e06f946b75b9..63ccc2d0e920 100644 --- a/arch/arm/mach-imx/suspend-imx6.S +++ b/arch/arm/mach-imx/suspend-imx6.S @@ -9,6 +9,8 @@ #include #include "hardware.h" +.arch armv7-a + /* * ==================== low level suspend ==================== * diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index c21733cbb4fa..569768a69ffc 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -1,9 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 ccflags-y := -I$(srctree)/arch/arm/plat-orion/include -AFLAGS_coherency_ll.o := -Wa,-march=armv7-a -CFLAGS_pmsu.o := -march=armv7-a - obj-$(CONFIG_MACH_MVEBU_ANY) += system-controller.o mvebu-soc-id.o ifeq ($(CONFIG_MACH_MVEBU_V7),y) diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S index eb81656e32d4..35930e03d9c6 100644 --- a/arch/arm/mach-mvebu/coherency_ll.S +++ b/arch/arm/mach-mvebu/coherency_ll.S @@ -20,6 +20,7 @@ #include #include + .arch armv7-a .text /* * Returns the coherency base address in r1 (r0 is untouched), or 0 if diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index af27a7156675..6f366d8c4231 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -291,6 +291,7 @@ int armada_370_xp_pmsu_idle_enter(unsigned long deepidle) /* Test the CR_C bit and set it if it was cleared */ asm volatile( + ".arch armv7-a\n\t" "mrc p15, 0, r0, c1, c0, 0 \n\t" "tst r0, %0 \n\t" "orreq r0, r0, #(1 << 2) \n\t" diff --git a/arch/arm/mach-npcm/Makefile b/arch/arm/mach-npcm/Makefile index 8d61fcd42fb1..ac83e1caf2ee 100644 --- a/arch/arm/mach-npcm/Makefile +++ b/arch/arm/mach-npcm/Makefile @@ -1,6 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -AFLAGS_headsmp.o += -march=armv7-a - obj-$(CONFIG_ARCH_WPCM450) += wpcm450.o obj-$(CONFIG_ARCH_NPCM7XX) += npcm7xx.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o diff --git a/arch/arm/mach-npcm/headsmp.S b/arch/arm/mach-npcm/headsmp.S index c083fe09a07b..84d2b6daaf0b 100644 --- a/arch/arm/mach-npcm/headsmp.S +++ b/arch/arm/mach-npcm/headsmp.S @@ -6,6 +6,8 @@ #include #include +.arch armv7-a + /* * The boot ROM does not start secondary CPUs in SVC mode, so we need to do that * here. diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 07572b5373b8..a2bb55bc0081 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -1,6 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 -asflags-y += -march=armv7-a - obj-y += io.o obj-y += irq.o obj-y += pm.o diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 06ca44b09381..0ea456264f3e 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -19,6 +19,8 @@ #define PMC_SCRATCH41 0x140 +.arch armv7-a + #ifdef CONFIG_PM_SLEEP /* * tegra_resume diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S index a5a36cce142a..d8cd487a8f63 100644 --- a/arch/arm/mach-tegra/sleep-tegra20.S +++ b/arch/arm/mach-tegra/sleep-tegra20.S @@ -47,6 +47,8 @@ #define PLLM_STORE_MASK (1 << 1) #define PLLP_STORE_MASK (1 << 2) +.arch armv7-a + .macro test_pll_state, rd, test_mask ldr \rd, tegra_pll_state tst \rd, #\test_mask diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index 0cc40b6b2ba3..134ea5fe49b2 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -78,6 +78,8 @@ #define PLLX_STORE_MASK (1 << 4) #define PLLM_PMC_STORE_MASK (1 << 5) +.arch armv7-a + .macro emc_device_mask, rd, base ldr \rd, [\base, #EMC_ADR_CFG] tst \rd, #0x1 diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S index 8f88944831c5..945f2c1474f7 100644 --- a/arch/arm/mach-tegra/sleep.S +++ b/arch/arm/mach-tegra/sleep.S @@ -22,6 +22,8 @@ #define CLK_RESET_CCLK_BURST 0x20 #define CLK_RESET_CCLK_DIVIDER 0x24 +.arch armv7-a + #if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP) /* * tegra_disable_clean_inv_dcache diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 3510503bc5e6..71b858c9b10c 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -33,9 +33,6 @@ obj-$(CONFIG_CPU_ABRT_EV5TJ) += abort-ev5tj.o obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o -AFLAGS_abort-ev6.o :=-Wa,-march=armv6k -AFLAGS_abort-ev7.o :=-Wa,-march=armv7-a - obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o @@ -49,10 +46,6 @@ obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o obj-$(CONFIG_CPU_CACHE_NOP) += cache-nop.o obj-$(CONFIG_CPU_CACHE_V7M) += cache-v7m.o -AFLAGS_cache-v6.o :=-Wa,-march=armv6 -AFLAGS_cache-v7.o :=-Wa,-march=armv7-a -AFLAGS_cache-v7m.o :=-Wa,-march=armv7-m - obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o obj-$(CONFIG_CPU_COPY_FEROCEON) += copypage-feroceon.o @@ -62,8 +55,6 @@ obj-$(CONFIG_CPU_XSCALE) += copypage-xscale.o obj-$(CONFIG_CPU_XSC3) += copypage-xsc3.o obj-$(CONFIG_CPU_COPY_FA) += copypage-fa.o -CFLAGS_copypage-feroceon.o := -march=armv5te - obj-$(CONFIG_CPU_TLB_V4WT) += tlb-v4.o obj-$(CONFIG_CPU_TLB_V4WB) += tlb-v4wb.o obj-$(CONFIG_CPU_TLB_V4WBI) += tlb-v4wbi.o @@ -72,9 +63,6 @@ obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o obj-$(CONFIG_CPU_TLB_FA) += tlb-fa.o -AFLAGS_tlb-v6.o :=-Wa,-march=armv6 -AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a - obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o obj-$(CONFIG_CPU_ARM740T) += proc-arm740.o @@ -101,9 +89,6 @@ obj-$(CONFIG_CPU_V6K) += proc-v6.o obj-$(CONFIG_CPU_V7) += proc-v7.o proc-v7-bugs.o obj-$(CONFIG_CPU_V7M) += proc-v7m.o -AFLAGS_proc-v6.o :=-Wa,-march=armv6 -AFLAGS_proc-v7.o :=-Wa,-march=armv7-a - obj-$(CONFIG_OUTER_CACHE) += l2c-common.o obj-$(CONFIG_CACHE_B15_RAC) += cache-b15-rac.o obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S index c58bf8b43fea..836dc1299243 100644 --- a/arch/arm/mm/abort-ev6.S +++ b/arch/arm/mm/abort-ev6.S @@ -16,6 +16,7 @@ * abort here if the I-TLB and D-TLB aren't seeing the same * picture. Unfortunately, this does happen. We live with it. */ + .arch armv6k .align 5 ENTRY(v6_early_abort) mrc p15, 0, r1, c5, c0, 0 @ get FSR diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S index f81bceacc660..53fb41c24774 100644 --- a/arch/arm/mm/abort-ev7.S +++ b/arch/arm/mm/abort-ev7.S @@ -12,6 +12,7 @@ * * Purpose : obtain information about current aborted instruction. */ + .arch armv7-a .align 5 ENTRY(v7_early_abort) mrc p15, 0, r1, c5, c0, 0 @ get FSR diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index f0f65eb073e4..250c83bf7158 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S @@ -19,6 +19,8 @@ #define D_CACHE_LINE_SIZE 32 #define BTB_FLUSH_SIZE 8 +.arch armv6 + /* * v6_flush_icache_all() * diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 7c9499b728c4..127afe2096ba 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -16,6 +16,8 @@ #include "proc-macros.S" +.arch armv7-a + #ifdef CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND .globl icache_size .data diff --git a/arch/arm/mm/cache-v7m.S b/arch/arm/mm/cache-v7m.S index 1bc3a0a50753..eb60b5e5e2ad 100644 --- a/arch/arm/mm/cache-v7m.S +++ b/arch/arm/mm/cache-v7m.S @@ -18,6 +18,8 @@ #include "proc-macros.S" +.arch armv7-m + /* Generic V7M read/write macros for memory mapped cache operations */ .macro v7m_cache_read, rt, reg movw \rt, #:lower16:BASEADDR_V7M_SCB + \reg diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c index 064b19e63571..5fc8ef1e665f 100644 --- a/arch/arm/mm/copypage-feroceon.c +++ b/arch/arm/mm/copypage-feroceon.c @@ -15,6 +15,7 @@ static void feroceon_copy_user_page(void *kto, const void *kfrom) int tmp; asm volatile ("\ +.arch armv5te \n\ 1: ldmia %1!, {r2 - r7, ip, lr} \n\ pld [%1, #0] \n\ pld [%1, #32] \n\ diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index a0618f3e6836..203dff89ab1a 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -32,6 +32,8 @@ #define TTB_FLAGS_SMP TTB_RGN_WBWA|TTB_S #define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S +.arch armv6 + ENTRY(cpu_v6_proc_init) ret lr diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S index 5db029c8f987..0a3083ad19c2 100644 --- a/arch/arm/mm/proc-v7-2level.S +++ b/arch/arm/mm/proc-v7-2level.S @@ -24,6 +24,8 @@ #define TTB_FLAGS_SMP TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA #define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S +.arch armv7-a + /* * cpu_v7_switch_mm(pgd_phys, tsk) * diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 26d726a08a34..6b4ef9539b68 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -24,6 +24,8 @@ #include "proc-v7-2level.S" #endif +.arch armv7-a + ENTRY(cpu_v7_proc_init) ret lr ENDPROC(cpu_v7_proc_init) diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S index 74f4b383afe3..1d91e49b2c2d 100644 --- a/arch/arm/mm/tlb-v6.S +++ b/arch/arm/mm/tlb-v6.S @@ -17,6 +17,8 @@ #define HARVARD_TLB +.arch armv6 + /* * v6wbi_flush_user_tlb_range(start, end, vma) * diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S index 87bf4ab17721..35fd6d4f0d03 100644 --- a/arch/arm/mm/tlb-v7.S +++ b/arch/arm/mm/tlb-v7.S @@ -16,6 +16,8 @@ #include #include "proc-macros.S" +.arch armv7-a + /* * v7wbi_flush_user_tlb_range(start, end, vma) * diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index e148f636c082..ae14ded464a8 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -33,8 +33,6 @@ obj-$(CONFIG_FPGA_DFL_EMIF) += dfl-emif.o ti-emif-sram-objs := ti-emif-pm.o ti-emif-sram-pm.o -AFLAGS_ti-emif-sram-pm.o :=-Wa,-march=armv7-a - $(obj)/ti-emif-sram-pm.o: $(obj)/ti-emif-asm-offsets.h $(obj)/ti-emif-asm-offsets.h: $(obj)/emif-asm-offsets.s FORCE diff --git a/drivers/memory/ti-emif-sram-pm.S b/drivers/memory/ti-emif-sram-pm.S index 9bcac35c3304..d60a8cfd63f3 100644 --- a/drivers/memory/ti-emif-sram-pm.S +++ b/drivers/memory/ti-emif-sram-pm.S @@ -28,6 +28,7 @@ .arm .align 3 + .arch armv7-a ENTRY(ti_emif_sram) diff --git a/drivers/soc/bcm/brcmstb/pm/Makefile b/drivers/soc/bcm/brcmstb/pm/Makefile index 8e10abb14f8b..f849cfa69446 100644 --- a/drivers/soc/bcm/brcmstb/pm/Makefile +++ b/drivers/soc/bcm/brcmstb/pm/Makefile @@ -1,4 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_ARM) += s2-arm.o pm-arm.o -AFLAGS_s2-arm.o := -march=armv7-a obj-$(CONFIG_BMIPS_GENERIC) += s2-mips.o s3-mips.o pm-mips.o diff --git a/drivers/soc/bcm/brcmstb/pm/s2-arm.S b/drivers/soc/bcm/brcmstb/pm/s2-arm.S index 5f0c4a8ae9df..0d693795de27 100644 --- a/drivers/soc/bcm/brcmstb/pm/s2-arm.S +++ b/drivers/soc/bcm/brcmstb/pm/s2-arm.S @@ -8,6 +8,7 @@ #include "pm.h" + .arch armv7-a .text .align 3 From patchwork Fri Oct 14 20:13:53 2022 Content-Type: text/plain; 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Perhaps CFLAGS_ABI can be renamed to CPPFLAGS_ABI to reflect that they will be passed to both the compiler and assembler for sources that require pre-processing. Signed-off-by: Nick Desaulniers Reviewed-by: Nathan Chancellor --- arch/arm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 8dd943b50b7d..ee888070b2ff 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -111,7 +111,7 @@ CFLAGS_ABI += -meabi gnu endif ifeq ($(CONFIG_CURRENT_POINTER_IN_TPIDRURO),y) -CFLAGS_ABI += -mtp=cp15 +KBUILD_CFLAGS += -mtp=cp15 endif # Accept old syntax despite ".syntax unified" From patchwork Fri Oct 14 20:13:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Desaulniers X-Patchwork-Id: 2812 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp362833wrs; Fri, 14 Oct 2022 13:24:55 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6TYTUQbqHPuJHjsqg81pcCrp19UQiMh6G+D5FTEVX35VztLyTOAwzwLxABVaX37RcS4D7L X-Received: by 2002:a17:907:6ea1:b0:783:cc69:342 with SMTP id sh33-20020a1709076ea100b00783cc690342mr4692652ejc.97.1665779095034; Fri, 14 Oct 2022 13:24:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665779095; cv=none; d=google.com; s=arc-20160816; b=uTQqEO1H3B4gN8+g6RWm/QyKYzpSv/RBsUSv4eOT3+JyRvJqnrK0iJOIa/KJiMKxin VLlADvwxP1gHkE8DySpgumlBo8CslvtMtXQp0sr41xhIMjUfWntYV1nFKswy7QFNGJ9I 1c9QIumDD1Rxh/bogHEVemaQx5y0uQOZHGt+JVyNnXpWK4hrtMukOhzerScNRpQ5tLwm EdqIcXsSGo74uYtlc9zqzjFe1OntlnZKmTFJdEDsb9Xo3Go1N28sRugohNyk7hmGAzqQ qbTkmQfjdGl6MC3cTBmfj49HHzRMzw0u1DFHwJg+obIg25Z7TniVtq2tWf5PaR+AiFon nlJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=s1u5FCYn8RsWrm4xJEN7PdURIEcHyxJb/9pj2n8isAA=; b=Bjgp2RdU8to9f07XaDBnWCt8rvA5MvEPiCvhQavg0U94hVE3vqyJ/WnGo3UmksYC4F wzUzcdjdPYr+lBQiG8qgDPtbjhetoslZuzZdinHFBF/2MFu+3PQT2iFzVjVC2Z3ckBVi RQb8YGxvqgoi5wbys8Qlql19QxOBZhfP1+mJOHMeLl7Yz5CmN3lCc7jTD7p74v5IQfw1 Zk173pfbcvkK3LuavnHHZqtbgSkzlx32NI3k5Jmi59Q4fqYVoaTubGOBXNNb0XDvsPYx LJOwqx+0S7RAwTWSBG9W6wwMjXAviOh95k/Eq2SyAJ2gco8Vc4DLdM89G/57OCjCpmV1 Qv4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=fhvrXFoW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q11-20020a056402248b00b0044e8fe826a0si2841409eda.156.2022.10.14.13.24.30; Fri, 14 Oct 2022 13:24:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=fhvrXFoW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230111AbiJNUO2 (ORCPT + 99 others); Fri, 14 Oct 2022 16:14:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231211AbiJNUOQ (ORCPT ); Fri, 14 Oct 2022 16:14:16 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C74F7186FE for ; Fri, 14 Oct 2022 13:14:15 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id p5-20020a25bd45000000b006beafa0d110so5208441ybm.1 for ; Fri, 14 Oct 2022 13:14:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=s1u5FCYn8RsWrm4xJEN7PdURIEcHyxJb/9pj2n8isAA=; b=fhvrXFoWhZpC391txksgdYNhBWOVQCBl52aYSUmgLmhInb9/MtPSZeYIGNH/ys8YWI mQSvZiXV1v5iLGTGKg3WLOnb1cFS0+Th+kedZ2Q3zmcpiIRzT5RaNzsSxxtcaNVbbxQo 6C/ki/P9jwc6ECEEO3qyZ7BhL6tV27cjhxD/VeL/TfQ+p/pKemcqLqpJM6t6JMdBSclB h82uZmMBfbIJIfgs+0ai9YWmfThqceTYpj/4W8VtdRmM96JMViT3MmTw9mDdKQfv3xvt kEinfPe2PO+UwyaMeL2LurLmXdFoE/9L88IDkDSdt7gWv/6RRC+AabmHqrVrKTq57VGh UuKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=s1u5FCYn8RsWrm4xJEN7PdURIEcHyxJb/9pj2n8isAA=; b=3S2nlx7JKYVzVjDo7mPfSqxM5pBb5R43VqxJHfsC68TcFd8HxUdNS4LU1W+Boh2WGh hq/7hBEuEKjSK/WswwftZLMEfqQMCcsxyZI+gjSxVQPNJiN43+DG6tQ8DjWKWPEG9+Ui rROqxV4Hkf2ZeUqvuCsW+BGweM1Q14OjHVIqrtT8h7mCbzJU0/CFvPRPwyOfqyzlffNs KgkbisXrYckU9CXpfr7t4UyBZjB+8mSniPirgssLygORVHfOpBq6z6b7RONHE4zd0z/p uGrq8qdARsroqAFYFvUfBotwsyQBwpZvxDGQTs3k4idgIstX7myv8rrbtCthbHgW5VfR OCCQ== X-Gm-Message-State: ACrzQf2EtC2oYpmxP09LfFQ0f0jxcDnXnPiO3u4ctTRo7W5y9nKgUZxw ZpNI1x1J9u1AxMWiV5pznPjjz52OGFhFoOLe9IU= X-Received: from ndesaulniers-desktop.svl.corp.google.com ([2620:0:100e:712:2ba5:63af:4077:4515]) (user=ndesaulniers job=sendgmr) by 2002:a0d:eb0d:0:b0:356:67be:73ca with SMTP id u13-20020a0deb0d000000b0035667be73camr6144943ywe.108.1665778454896; Fri, 14 Oct 2022 13:14:14 -0700 (PDT) Date: Fri, 14 Oct 2022 13:13:54 -0700 In-Reply-To: <20221014201354.3190007-1-ndesaulniers@google.com> Mime-Version: 1.0 References: <20221014201354.3190007-1-ndesaulniers@google.com> X-Developer-Key: i=ndesaulniers@google.com; a=ed25519; pk=UIrHvErwpgNbhCkRZAYSX0CFd/XFEwqX3D0xqtqjNug= X-Developer-Signature: v=1; a=ed25519-sha256; t=1665778434; l=4916; i=ndesaulniers@google.com; s=20220923; h=from:subject; bh=VxwVKVoT72n36JM/fgC34SDckwipa3adGbKwxRiCt2I=; b=rr6SNqvjfUP45yOE+YAm3SR9cD5RDQnj3V+GfQQxH8pSx9VoCaj7uytjS9DlnvEkq4VZJ0hzDBme Yv8fiIbkB02j4cJV0iSKr9y6pV5x0SIUrX0N5J9BqTNYul2wwy6r X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog Message-ID: <20221014201354.3190007-5-ndesaulniers@google.com> Subject: [PATCH v4 4/4] ARM: pass -march= only to compiler From: Nick Desaulniers To: Russell King Cc: Arnd Bergmann , Ard Biesheuvel , Masahiro Yamada , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, llvm@lists.linux.dev, Nathan Chancellor , Nick Desaulniers X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746695980159389591?= X-GMAIL-MSGID: =?utf-8?q?1746695980159389591?= When both -march= and -Wa,-march= are specified for assembler or assembler-with-cpp sources, GCC and Clang will prefer the -Wa,-march= value but Clang will warn that -march= is unused. warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument] This is the top group of warnings we observe when using clang to assemble the kernel via `ARCH=arm make LLVM=1`. Split the arch-y make variable into two, so that -march= flags only get passed to the compiler, not the assembler. -D flags are added to KBUILD_CPPFLAGS which is used for both C and assembler-with-cpp sources. Clang is trying to warn that it doesn't support different values for -march= and -Wa,-march= (like GCC does, but the kernel doesn't need this) though the value of the preprocessor define __thumb2__ is based on -march=. Make sure to re-set __thumb2__ via -D flag for assembler sources now that we're no longer passing -march= to the assembler. Set it to a different value than the preprocessor would for -march= in case -march= gets accidentally re-added to KBUILD_AFLAGS in the future. Thanks to Ard and Nathan for this suggestion. Link: https://github.com/ClangBuiltLinux/linux/issues/1315 Link: https://github.com/ClangBuiltLinux/linux/issues/1587 Link: https://github.com/llvm/llvm-project/issues/55656 Suggested-by: Ard Biesheuvel Suggested-by: Nathan Chancellor Signed-off-by: Nick Desaulniers Reviewed-by: Nathan Chancellor Tested-by: Nathan Chancellor --- Changes v3 -> v4: * Add -D__thumb2__=2 to KBUILD_AFLAGS as per in-person discussion with Ard and Nathan, and their SB tags. * Reword commit message. arch/arm/Makefile | 36 +++++++++++++++++++++++++----------- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ee888070b2ff..b58998749ead 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -60,21 +60,34 @@ endif KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra) # This selects which instruction set is used. +arch-$(CONFIG_CPU_32v7M) :=-march=armv7-m +arch-$(CONFIG_CPU_32v7) :=-march=armv7-a +arch-$(CONFIG_CPU_32v6) :=-march=armv6 +# Only override the compiler option if ARMv6. The ARMv6K extensions are +# always available in ARMv7 +ifeq ($(CONFIG_CPU_32v6),y) +arch-$(CONFIG_CPU_32v6K) :=-march=armv6k +endif +arch-$(CONFIG_CPU_32v5) :=-march=armv5te +arch-$(CONFIG_CPU_32v4T) :=-march=armv4t +arch-$(CONFIG_CPU_32v4) :=-march=armv4 +arch-$(CONFIG_CPU_32v3) :=-march=armv3m + # Note that GCC does not numerically define an architecture version # macro, but instead defines a whole series of macros which makes # testing for a specific architecture or later rather impossible. -arch-$(CONFIG_CPU_32v7M) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-m -arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-a -arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 -march=armv6 -# Only override the compiler opt:ion if ARMv6. The ARMv6K extensions are +cpp-$(CONFIG_CPU_32v7M) :=-D__LINUX_ARM_ARCH__=7 +cpp-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 +cpp-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 +# Only override the compiler option if ARMv6. The ARMv6K extensions are # always available in ARMv7 ifeq ($(CONFIG_CPU_32v6),y) -arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 -march=armv6k +cpp-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 endif -arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 -march=armv5te -arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t -arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4 -arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3m +cpp-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 +cpp-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 +cpp-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 +cpp-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 # This selects how we optimise for the processor. tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi @@ -119,15 +132,16 @@ AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) ifeq ($(CONFIG_THUMB2_KERNEL),y) CFLAGS_ISA :=-mthumb -Wa,-mimplicit-it=always $(AFLAGS_NOWARN) -AFLAGS_ISA :=$(CFLAGS_ISA) -Wa$(comma)-mthumb +AFLAGS_ISA :=$(CFLAGS_ISA) -Wa$(comma)-mthumb -D__thumb2__=2 else CFLAGS_ISA :=$(call cc-option,-marm,) $(AFLAGS_NOWARN) AFLAGS_ISA :=$(CFLAGS_ISA) endif # Need -Uarm for gcc < 3.x +KBUILD_CPPFLAGS +=$(cpp-y) KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm -KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float +KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) -Wa,$(arch-y) $(tune-y) -include asm/unified.h -msoft-float CHECKFLAGS += -D__arm__