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Since the VOP2 driver only supports these plane types at the moment, the current code is safe. However, in order to provide a future-proof solution, fix the initialization of the variable. Reported-by: kernel test robot Reported-by: Dan Carpenter Signed-off-by: Michael Riesch --- v3: - no changes v2: - new patch drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 8cecf81a5ae0..374ef821b453 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -2322,10 +2322,11 @@ static int vop2_create_crtc(struct vop2 *vop2) /* change the unused primary window to overlay window */ win->type = DRM_PLANE_TYPE_OVERLAY; } - } - - if (win->type == DRM_PLANE_TYPE_OVERLAY) + } else if (win->type == DRM_PLANE_TYPE_OVERLAY) { possible_crtcs = (1 << nvps) - 1; + } else { + possible_crtcs = 0; + } ret = vop2_plane_init(vop2, win, possible_crtcs); if (ret) { From patchwork Tue Jan 24 05:47:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 47548 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1988849wrn; Mon, 23 Jan 2023 22:03:59 -0800 (PST) X-Google-Smtp-Source: AK7set89mJT0G74naHO9L3igZ4nH2awgUX+E30Wn96pLzkVpNOWQ2VnCmJWBYtTKbOwwyucmkvst X-Received: by 2002:a05:6000:1c13:b0:2bf:afaf:9d71 with SMTP id ba19-20020a0560001c1300b002bfafaf9d71mr1043597wrb.48.1674540238934; Mon, 23 Jan 2023 22:03:58 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674540238; cv=pass; d=google.com; s=arc-20160816; b=x1xH3ZW27FAG1kscdIUrjEgdoYUkLXwEBzHZkO55oKtB2rmLPULx+NaOSThqu20F3s WBNh0j6lkXCYMqjOBciiPzJb4InPU9iw7uWznMByonZDrXohDyDfkBdKbTNRuzisMpW5 +A6NQDS9E5rkcGkIHVN6K1BcBscoSuI0KFs3IwV2oIa5767K9GKTMX5XbbTSXf5M7lS+ baorVIte476qMQzi1e1V86OzM+t7rcCmBosSCQAISc9wwSyU+InrXOWnWzxkSzKbFmZ8 Rv3LwGy9NfuXbJddEJjvL+PuUMs+AnIZMNBdip2QpozmoFGAQBoalnkF+afmi6GuV+3K Ty9Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=g4qMVJMpLkSgyH995ws7aK1P48Io+P7fDQjJHTGRi6Q=; b=VYu8rt40yW2RbEufo1pBLz068YY1k/M0b6H00xebEjewD5KtUqanuSa7qc39aDAfnf RbPgRLB7z7ilXMpZZJZBAhPSJnoRUP2ImqEkYNKSD7lApRbv6aUgryd1qKGtKElCr1WN 6vz+twMXX/1hwQRWYHlCN0D92da+YFrnhpeuF6sZp/hYHjGQrml72dMsHeEG0DWm0yh0 VjHvLhnnWKLlMTtmkZdMevZtc3RvHCmT4RztE86OqW1k1zxxxR0R2+BRnEpvPW+mC+Dz usogR2x3ujJYi+4MP8H62wHxfI6NM0fHKCi0oSqV+70XN0WqnBCwaR02oCoOfnXbAvYB vMJw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b="m7TrbJ/W"; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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However, this step has not yet been carried out for the RGB output block. Embed the drm_encoder structure into the rockchip_encoder structure and set the endpoint ID correctly. Signed-off-by: Michael Riesch --- v3: - no changes v2: - use endpoint id from device tree instead of hardcoded value drivers/gpu/drm/rockchip/rockchip_rgb.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c index 75eb7cca3d82..5971df4302f2 100644 --- a/drivers/gpu/drm/rockchip/rockchip_rgb.c +++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c @@ -22,13 +22,11 @@ #include "rockchip_drm_vop.h" #include "rockchip_rgb.h" -#define encoder_to_rgb(c) container_of(c, struct rockchip_rgb, encoder) - struct rockchip_rgb { struct device *dev; struct drm_device *drm_dev; struct drm_bridge *bridge; - struct drm_encoder encoder; + struct rockchip_encoder encoder; struct drm_connector connector; int output_mode; }; @@ -125,7 +123,7 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, return ERR_PTR(ret); } - encoder = &rgb->encoder; + encoder = &rgb->encoder.encoder; encoder->possible_crtcs = drm_crtc_mask(crtc); ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_NONE); @@ -161,6 +159,8 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, goto err_free_encoder; } + rgb->encoder.crtc_endpoint_id = endpoint_id; + ret = drm_connector_attach_encoder(connector, encoder); if (ret < 0) { DRM_DEV_ERROR(drm_dev->dev, @@ -182,6 +182,6 @@ void rockchip_rgb_fini(struct rockchip_rgb *rgb) { drm_panel_bridge_remove(rgb->bridge); drm_connector_cleanup(&rgb->connector); - drm_encoder_cleanup(&rgb->encoder); + drm_encoder_cleanup(&rgb->encoder.encoder); } EXPORT_SYMBOL_GPL(rockchip_rgb_fini); From patchwork Tue Jan 24 05:47:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 47544 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1988022wrn; Mon, 23 Jan 2023 22:01:56 -0800 (PST) X-Google-Smtp-Source: AMrXdXvUlo6/+wZTkbH46WcHb1lC/xlw+QMabcHL9IeyiEhlKmQtTp5tqfSsay/vhL5IYlq0Kd7B X-Received: by 2002:a05:600c:4d93:b0:3d9:efd1:214d with SMTP id v19-20020a05600c4d9300b003d9efd1214dmr26245108wmp.25.1674540116458; Mon, 23 Jan 2023 22:01:56 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674540116; cv=pass; d=google.com; s=arc-20160816; b=Jw3yskhfPLmzMbKFIqX+XlpInJ88ubPNitE/CGBSVKhkgCWaJ6xiSgpS+jHuwb/GOP Uo02FZpHg1SBqJOll2cAlc4s8tMu0Po6n5LDjQAobiBShogdV3NOHp7GLs4wKPcUgf5G 0mrPbhqfdkb4EaqAmPr2rIvGPINS16Vy52FSRhOT8it/hpa94xM5qrJM3v1sh8pRMR88 pddqUohdUI4/Pyu1Ro0NK1CoWHMawjVHsC0bnI0pe74XL0NnFK/VeDps6iiFmxiDF5n7 2LOiLtGEod470FRY/qcLegwVROprMDiXIKUNjVDwMcqaYzn01Pi5itxbh+MwOiYJaew0 7tGQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Dgr7kEURxIEnma+AY7Da1nbfb3Zw5t63LYtMVyPER6g=; b=0ePFPT8Lzhlg9/IzX8INWSLb/Y70nMUn4n4IczSmHEN6BrdnDj75GSC9esH3n3gPTZ 0vWIO34YOhTvyPk/zte8541xMZ49LPt/1/2jANUQTXEdcB4aSimdx/+rxMgnRptH9hMT MhUWKjeWDgWPW7VQ66rdrZFTf6CLCvcoFj1rdxR/e1hLEXdKKB362Lr88MslVeFlHJL3 wssoCJ65gaYiDwWnBkrJ3xcMOzJVDpsJu10q+6s3L+GCwOvYWdHUQpvLhODhyGg7nUHj XUp1RUlytQW2hYl0SSEtzQH3eiIXXJJmrFRV4OPIzHTSxY/aOUxsftY6hLXisksjKbdb pNGg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=iPepEZxF; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Add an extra parameter for the video port id to the rockchip_rgb_init function. Signed-off-by: Michael Riesch --- v3: - no changes v2: - no changes drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +- drivers/gpu/drm/rockchip/rockchip_rgb.c | 9 +++++---- drivers/gpu/drm/rockchip/rockchip_rgb.h | 6 ++++-- 3 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index fa1f4ee6d195..5d18dea5c8d6 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -2221,7 +2221,7 @@ static int vop_bind(struct device *dev, struct device *master, void *data) goto err_disable_pm_runtime; if (vop->data->feature & VOP_FEATURE_INTERNAL_RGB) { - vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev); + vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev, 0); if (IS_ERR(vop->rgb)) { ret = PTR_ERR(vop->rgb); goto err_disable_pm_runtime; diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c index 5971df4302f2..c677b71ae516 100644 --- a/drivers/gpu/drm/rockchip/rockchip_rgb.c +++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c @@ -72,7 +72,8 @@ struct drm_encoder_helper_funcs rockchip_rgb_encoder_helper_funcs = { struct rockchip_rgb *rockchip_rgb_init(struct device *dev, struct drm_crtc *crtc, - struct drm_device *drm_dev) + struct drm_device *drm_dev, + int video_port) { struct rockchip_rgb *rgb; struct drm_encoder *encoder; @@ -90,7 +91,7 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, rgb->dev = dev; rgb->drm_dev = drm_dev; - port = of_graph_get_port_by_id(dev->of_node, 0); + port = of_graph_get_port_by_id(dev->of_node, video_port); if (!port) return ERR_PTR(-EINVAL); @@ -103,8 +104,8 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, continue; child_count++; - ret = drm_of_find_panel_or_bridge(dev->of_node, 0, endpoint_id, - &panel, &bridge); + ret = drm_of_find_panel_or_bridge(dev->of_node, video_port, + endpoint_id, &panel, &bridge); if (!ret) { of_node_put(endpoint); break; diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.h b/drivers/gpu/drm/rockchip/rockchip_rgb.h index 27b9635124bc..1bd4e20e91eb 100644 --- a/drivers/gpu/drm/rockchip/rockchip_rgb.h +++ b/drivers/gpu/drm/rockchip/rockchip_rgb.h @@ -8,12 +8,14 @@ #ifdef CONFIG_ROCKCHIP_RGB struct rockchip_rgb *rockchip_rgb_init(struct device *dev, struct drm_crtc *crtc, - struct drm_device *drm_dev); + struct drm_device *drm_dev, + int video_port); void rockchip_rgb_fini(struct rockchip_rgb *rgb); #else static inline struct rockchip_rgb *rockchip_rgb_init(struct device *dev, struct drm_crtc *crtc, - struct drm_device *drm_dev) + struct drm_device *drm_dev, + int video_port) { return NULL; } From patchwork Tue Jan 24 05:47:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 47550 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1992446wrn; Mon, 23 Jan 2023 22:15:31 -0800 (PST) X-Google-Smtp-Source: AMrXdXuCIzxVLz7X6KJO+JSxOK4a120MAyLMnYTCvFvHR8spAEL9C+a+AifvUIG/uVOgd4n3tdxW X-Received: by 2002:a05:6402:27cf:b0:46b:4011:9863 with SMTP id c15-20020a05640227cf00b0046b40119863mr36610488ede.39.1674540930686; Mon, 23 Jan 2023 22:15:30 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674540930; cv=pass; d=google.com; s=arc-20160816; b=cKmX7XmZRY8m+o0wJ0jP8Y+yxncHM3joqLIIg3H3gdFD4zXZPz4MNUwN0rZ7ANg622 B3pJ65qsVFKigOvvJxMNKZvl8u2m74R2ZgUcmE/8XS65sOx6vKspz/Mb/6F7tbL6WNOn r7iA428SrlFrfhZ1aW1e+3qKCC7wPn7bl5dcJa5thqiqQOgXULqH4O/7kW41JfooEqKO ICKuy9XbMI/UNkzHqz/xbQCjrFKk5a+hFHtu7ASKL9Juc9m9RycYWMzjcIjyzy92CLLt zebj1Vy4IICgzeh2gZcPWh2yQFF9+x3O4MWG/apLBQ2HovbwNK/e2bh+caBak1cLfdLK q+QQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qELp75GMG8gq/xzAPHpiSQQnHjdgzgjWvx4lnj2MduM=; b=mFWcN1VWlLz4vBdtuHu4wNnmX5J+LtWG7fQTA0az7x83g+Os55ASlXmDSrdBawt3Yc BaLWld7I/CK+mei/qIZtQhSJxhhwnaddWbWtreKZ1OwWyDDWkzi5hdUkxiocH7qHNmwn WbsH1FGfAxM+egLohBdjZ7otHGqdxDG4E1Onzyr/fx18WylXXIUeN33mWatY0TeguhIL N/bjBsqWfe6Vy6NL1zfQ8dIwVqZNtn6G0DeO1nZmbgI37MzMJW97lAe69CaldKgPHopa S0fhjorILWBiIUu/s2In7R9ELGZgK37UqEJl8vnfSFrspYtjYzuPslaoP8EdZ1D8l8wI 9vSA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=pC5MRLu0; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Received: from DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) by VI1PR08MB10032.eurprd08.prod.outlook.com (2603:10a6:800:1cc::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.28; Tue, 24 Jan 2023 05:47:22 +0000 Received: from DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219]) by DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219%2]) with mapi id 15.20.6002.033; Tue, 24 Jan 2023 05:47:22 +0000 From: Michael Riesch To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Cc: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Sandy Huang , David Airlie , Daniel Vetter , Sascha Hauer , Michael Riesch Subject: [PATCH v3 4/6] drm/rockchip: vop2: use symmetric function pair vop2_{create,destroy}_crtcs Date: Tue, 24 Jan 2023 06:47:04 +0100 Message-Id: <20230124054706.3921383-5-michael.riesch@wolfvision.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230124054706.3921383-1-michael.riesch@wolfvision.net> References: <20230124054706.3921383-1-michael.riesch@wolfvision.net> X-ClientProxiedBy: ZR0P278CA0189.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:44::6) To DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR08MB9155:EE_|VI1PR08MB10032:EE_ X-MS-Office365-Filtering-Correlation-Id: cc682a86-e116-48f3-0578-08dafdce76ae X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Also, use a symmetric function pair to create and destroy the CRTCs and the corresponding planes. Signed-off-by: Michael Riesch --- v3: - no changes v2: - no changes drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 31 ++++++++++---------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 374ef821b453..06fcdfa7b885 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -2246,7 +2246,7 @@ static struct vop2_video_port *find_vp_without_primary(struct vop2 *vop2) #define NR_LAYERS 6 -static int vop2_create_crtc(struct vop2 *vop2) +static int vop2_create_crtcs(struct vop2 *vop2) { const struct vop2_data *vop2_data = vop2->data; struct drm_device *drm = vop2->drm; @@ -2372,15 +2372,25 @@ static int vop2_create_crtc(struct vop2 *vop2) return 0; } -static void vop2_destroy_crtc(struct drm_crtc *crtc) +static void vop2_destroy_crtcs(struct vop2 *vop2) { - of_node_put(crtc->port); + struct drm_device *drm = vop2->drm; + struct list_head *crtc_list = &drm->mode_config.crtc_list; + struct list_head *plane_list = &drm->mode_config.plane_list; + struct drm_crtc *crtc, *tmpc; + struct drm_plane *plane, *tmpp; + + list_for_each_entry_safe(plane, tmpp, plane_list, head) + drm_plane_cleanup(plane); /* * Destroy CRTC after vop2_plane_destroy() since vop2_disable_plane() * references the CRTC. */ - drm_crtc_cleanup(crtc); + list_for_each_entry_safe(crtc, tmpc, crtc_list, head) { + of_node_put(crtc->port); + drm_crtc_cleanup(crtc); + } } static struct reg_field vop2_cluster_regs[VOP2_WIN_MAX_REG] = { @@ -2684,7 +2694,7 @@ static int vop2_bind(struct device *dev, struct device *master, void *data) if (ret) return ret; - ret = vop2_create_crtc(vop2); + ret = vop2_create_crtcs(vop2); if (ret) return ret; @@ -2698,19 +2708,10 @@ static int vop2_bind(struct device *dev, struct device *master, void *data) static void vop2_unbind(struct device *dev, struct device *master, void *data) { struct vop2 *vop2 = dev_get_drvdata(dev); - struct drm_device *drm = vop2->drm; - struct list_head *plane_list = &drm->mode_config.plane_list; - struct list_head *crtc_list = &drm->mode_config.crtc_list; - struct drm_crtc *crtc, *tmpc; - struct drm_plane *plane, *tmpp; pm_runtime_disable(dev); - list_for_each_entry_safe(plane, tmpp, plane_list, head) - drm_plane_cleanup(plane); - - list_for_each_entry_safe(crtc, tmpc, crtc_list, head) - vop2_destroy_crtc(crtc); + vop2_destroy_crtcs(vop2); } const struct component_ops vop2_component_ops = { From patchwork Tue Jan 24 05:47:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 47547 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1988670wrn; Mon, 23 Jan 2023 22:03:32 -0800 (PST) X-Google-Smtp-Source: AMrXdXsP5U4J175LTIYuc+SPt7361vNPmbPNol3CsU/33tnAN5HpuGfBJ3YFLik9XZkR6TbAZURL X-Received: by 2002:a17:906:4694:b0:86d:c1b2:257b with SMTP id a20-20020a170906469400b0086dc1b2257bmr39039034ejr.19.1674540212131; Mon, 23 Jan 2023 22:03:32 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674540212; cv=pass; d=google.com; s=arc-20160816; b=BbX5s3rvK/oUC6KTyuIH1jwShcO+vvfZs/2meHj9VcKAmd9hi6JSO+sU03yzU+un98 1LNeZS1ZdVosA8r7A4ZYOxdwiUQwXxyGiLmDs0SXqWjkIpivLjQpTaRMt3Jl8FF6cNou 3w1yVxEdGDFpUiA8lOxI8Ka+u0T8N0H3qwu63QMxf5/3iBxaXUVyYVQOku3pVUhq3DZS Lc1ON+zis+fpXIhxjC6qdlzJfW+ScxFGJSeT1fVE6qXH+mCC2beFeCYUksdyqICnx9i+ NU/Bac9hfU1XqhPCiqotx9f3LoxiWbtxjGZ1aMdtrxiuzrNq5xWMgZGsAeTOx96ZwYlA 7Ykw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jmMn2MrzNdLf4gxHZQEmHIe0WNK9Hf6gYQ+Ss8LUPbc=; b=f3byz9XfX7eJ61yus+vk4BcQPmbzcpTd4Yd598HJvwAFVHfZUeadYn3zXLYAyx9JPA Cpy8P5WJURVF+jjCj14GA8HxVzDl7KCtIXwOhZb9H5Pya+A/8f4JgJnIc+Z+wPrIz11D LxHjyBE7VuxeXOQ0eDIZ6UucqyUrcrc3/q2yvMhnIZFecnDNZ4N+HK3DDg5uGNFnb1ws qvvXx5WCndR5A+FjR+3c3X0Q1AYLA2SSMcnnMdyE7vHTANfHkNoqJ5aPSf9F0htx6DXD LQHimFurFoKx2GGwqI+7SN/q21kH5ovb3/LBjmvX803+7/t+9Dw5LFcPR966Xm8Ym/ip Dprw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=jAHsna9X; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Add support for this output block. Signed-off-by: Michael Riesch --- v3: - fix commit messages (still assumed video port 2) - fix condition to make 0 a valid video port v2: - move away from wrong assumption that the RGB block is always connected to video port 2 -> check devicetree to find RGB block drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 44 ++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 06fcdfa7b885..f38ffd0ccd9f 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -39,6 +39,7 @@ #include "rockchip_drm_gem.h" #include "rockchip_drm_fb.h" #include "rockchip_drm_vop2.h" +#include "rockchip_rgb.h" /* * VOP2 architecture @@ -212,6 +213,9 @@ struct vop2 { struct clk *hclk; struct clk *aclk; + /* optional internal rgb encoder */ + struct rockchip_rgb *rgb; + /* must be put at the end of the struct */ struct vop2_win win[]; }; @@ -2393,6 +2397,25 @@ static void vop2_destroy_crtcs(struct vop2 *vop2) } } +static int vop2_find_rgb_encoder(struct vop2 *vop2) +{ + struct device_node *node = vop2->dev->of_node; + struct device_node *endpoint; + int i; + + for (i = 0; i < vop2->data->nr_vps; i++) { + endpoint = of_graph_get_endpoint_by_regs(node, i, + ROCKCHIP_VOP2_EP_RGB0); + if (!endpoint) + continue; + + of_node_put(endpoint); + return i; + } + + return -ENOENT; +} + static struct reg_field vop2_cluster_regs[VOP2_WIN_MAX_REG] = { [VOP2_WIN_ENABLE] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 0, 0), [VOP2_WIN_FORMAT] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 1, 5), @@ -2698,11 +2721,29 @@ static int vop2_bind(struct device *dev, struct device *master, void *data) if (ret) return ret; + ret = vop2_find_rgb_encoder(vop2); + if (ret >= 0) { + vop2->rgb = rockchip_rgb_init(dev, &vop2->vps[ret].crtc, + vop2->drm, ret); + if (IS_ERR(vop2->rgb)) { + if (PTR_ERR(vop2->rgb) == -EPROBE_DEFER) { + ret = PTR_ERR(vop2->rgb); + goto err_crtcs; + } + vop2->rgb = NULL; + } + } + rockchip_drm_dma_init_device(vop2->drm, vop2->dev); pm_runtime_enable(&pdev->dev); return 0; + +err_crtcs: + vop2_destroy_crtcs(vop2); + + return ret; } static void vop2_unbind(struct device *dev, struct device *master, void *data) @@ -2711,6 +2752,9 @@ static void vop2_unbind(struct device *dev, struct device *master, void *data) pm_runtime_disable(dev); + if (vop2->rgb) + rockchip_rgb_fini(vop2->rgb); + vop2_destroy_crtcs(vop2); } From patchwork Tue Jan 24 05:47:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 47545 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1988036wrn; Mon, 23 Jan 2023 22:01:57 -0800 (PST) X-Google-Smtp-Source: AMrXdXtHkaqUqlKR8Ko9DYGFdNCrG+W59KtODKtvD4dr1UYLEVQw6geK8RIOJTUkfYa25DZ0dcbv X-Received: by 2002:a05:600c:4fcb:b0:3db:1919:41b5 with SMTP id o11-20020a05600c4fcb00b003db191941b5mr20593473wmq.21.1674540117654; Mon, 23 Jan 2023 22:01:57 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674540117; cv=pass; d=google.com; s=arc-20160816; b=f8wLrTmQyAiZksmM4hHHyhc/5GXa64Zxd8n6r52ieA57uU19E6UJv+Pu6DYIJfiWvI QY7IETpqum5pNaIRQbHOQmSaj1QcIaoxS7mBs0tBvWUZz5rhP+VHoGifNpRhq04oZ1DE hn42y4CqaLlMGpA/QzSg1BrpkLeok0iL34wp+yMtR2xXduNG5XkEc1OGp8Ka9RF7+B1d KFlTbrnIljuNN0DKzREcSItFpTDWr9lOSfOQu8xVY8up/wk+pLtTNYmtzi86r+nc8iXz 7dtb4kE4HNlkyWHvJRszq1aCPwROYVy7RUQ1qPnW9TLDrfmjuf/5fJYs1x1DYpxR29IC ROUw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bfOwi5RzpCapi9SbxOiOdJVhxa3zxmIg1tK3h21oxUY=; b=hmMqUepbnoH2ZEU/pmXYp/A29/yR4Qe5zweQ8VxMrdc1xGYx9tr62kQiRkE3L7e1S2 DNNYLY+pYBTDzq3QvhgBkvxeFCeLbREiFWwzico4df4TSPS6ljrmgz4NNSBHjMJ3PNtJ QlWSD1qphgUJfHF167QTd3ULFl5gMD4+jlLeGBchYtb6RLbz+hZ/ouNvexAyj0REMdXA aZwVTdkCXM7VtcRkQZaarAPmIgiW8D8S0P0lUqVn9IGbcNF3Y+/czBe2JPyZAI9p7at8 ynPmzEZwHTlCU920lcayPUBGkKFtdXX9H/usNk27t/kbexxHsAeqJ+6womyjWctLIjrz WvLg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=Rirx8ttd; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Add separate nodes for the 16-bit and 18-bit version, respectively. While at it, split off the clock/sync signals from the data signals. The exact mapping of the data pins was discussed here: https://lore.kernel.org/linux-rockchip/f33a0488-528c-99de-3279-3c0346a03fd6@wolfvision.net/T/ Signed-off-by: Michael Riesch --- v3: - no changes v2: - no changes .../boot/dts/rockchip/rk3568-pinctrl.dtsi | 94 +++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi index 8f90c66dd9e9..0a979bfb63d9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi @@ -3117,4 +3117,98 @@ tsadc_pin: tsadc-pin { <0 RK_PA1 0 &pcfg_pull_none>; }; }; + + lcdc { + /omit-if-no-ref/ + lcdc_clock: lcdc-clock { + rockchip,pins = + /* lcdc_clk */ + <3 RK_PA0 1 &pcfg_pull_none>, + /* lcdc_den */ + <3 RK_PC3 1 &pcfg_pull_none>, + /* lcdc_hsync */ + <3 RK_PC1 1 &pcfg_pull_none>, + /* lcdc_vsync */ + <3 RK_PC2 1 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + lcdc_data16: lcdc-data16 { + rockchip,pins = + /* lcdc_d3 */ + <2 RK_PD3 1 &pcfg_pull_none>, + /* lcdc_d4 */ + <2 RK_PD4 1 &pcfg_pull_none>, + /* lcdc_d5 */ + <2 RK_PD5 1 &pcfg_pull_none>, + /* lcdc_d6 */ + <2 RK_PD6 1 &pcfg_pull_none>, + /* lcdc_d7 */ + <2 RK_PD7 1 &pcfg_pull_none>, + /* lcdc_d10 */ + <3 RK_PA3 1 &pcfg_pull_none>, + /* lcdc_d11 */ + <3 RK_PA4 1 &pcfg_pull_none>, + /* lcdc_d12 */ + <3 RK_PA5 1 &pcfg_pull_none>, + /* lcdc_d13 */ + <3 RK_PA6 1 &pcfg_pull_none>, + /* lcdc_d14 */ + <3 RK_PA7 1 &pcfg_pull_none>, + /* lcdc_d15 */ + <3 RK_PB0 1 &pcfg_pull_none>, + /* lcdc_d19 */ + <3 RK_PB4 1 &pcfg_pull_none>, + /* lcdc_d20 */ + <3 RK_PB5 1 &pcfg_pull_none>, + /* lcdc_d21 */ + <3 RK_PB6 1 &pcfg_pull_none>, + /* lcdc_d22 */ + <3 RK_PB7 1 &pcfg_pull_none>, + /* lcdc_d23 */ + <3 RK_PC0 1 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + lcdc_data18: lcdc-data18 { + rockchip,pins = + /* lcdc_d2 */ + <2 RK_PD2 1 &pcfg_pull_none>, + /* lcdc_d3 */ + <2 RK_PD3 1 &pcfg_pull_none>, + /* lcdc_d4 */ + <2 RK_PD4 1 &pcfg_pull_none>, + /* lcdc_d5 */ + <2 RK_PD5 1 &pcfg_pull_none>, + /* lcdc_d6 */ + <2 RK_PD6 1 &pcfg_pull_none>, + /* lcdc_d7 */ + <2 RK_PD7 1 &pcfg_pull_none>, + /* lcdc_d10 */ + <3 RK_PA3 1 &pcfg_pull_none>, + /* lcdc_d11 */ + <3 RK_PA4 1 &pcfg_pull_none>, + /* lcdc_d12 */ + <3 RK_PA5 1 &pcfg_pull_none>, + /* lcdc_d13 */ + <3 RK_PA6 1 &pcfg_pull_none>, + /* lcdc_d14 */ + <3 RK_PA7 1 &pcfg_pull_none>, + /* lcdc_d15 */ + <3 RK_PB0 1 &pcfg_pull_none>, + /* lcdc_d18 */ + <3 RK_PB3 1 &pcfg_pull_none>, + /* lcdc_d19 */ + <3 RK_PB4 1 &pcfg_pull_none>, + /* lcdc_d20 */ + <3 RK_PB5 1 &pcfg_pull_none>, + /* lcdc_d21 */ + <3 RK_PB6 1 &pcfg_pull_none>, + /* lcdc_d22 */ + <3 RK_PB7 1 &pcfg_pull_none>, + /* lcdc_d23 */ + <3 RK_PC0 1 &pcfg_pull_none>; + }; + }; + };