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Received: from AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) by AS8PR04MB8184.eurprd04.prod.outlook.com (2603:10a6:20b:3fa::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.33; Mon, 23 Jan 2023 07:22:51 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::5725:92ec:f43e:f5fc]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::5725:92ec:f43e:f5fc%7]) with mapi id 15.20.6002.028; Mon, 23 Jan 2023 07:22:51 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: marex@denx.de, stefan@agner.ch, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com Subject: [PATCH 1/2] dt-bindings: lcdif: Add i.MX93 LCDIF support Date: Mon, 23 Jan 2023 15:23:57 +0800 Message-Id: <20230123072358.1060670-2-victor.liu@nxp.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230123072358.1060670-1-victor.liu@nxp.com> References: <20230123072358.1060670-1-victor.liu@nxp.com> X-ClientProxiedBy: SG2PR03CA0104.apcprd03.prod.outlook.com (2603:1096:4:7c::32) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|AS8PR04MB8184:EE_ X-MS-Office365-Filtering-Correlation-Id: 71dec194-dd38-4cd2-462b-08dafd12a2b6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: go1+MGRCeucAE/xcwT0U1s4BD8s2OwJm4tPScjU6aMH2E09vxaJ9w9EHyalwyaaJIkFa8WAXCl24/efO8yhc9OkNMRmuZ/WHem8FSZcO6zEBjU44VmUp0MipNiKgJ8c1IAdyQelPqHQ2FNPjrO7u/IA7HF3D3TijruDIwHpkJlUtrc294SuTdOe9w0WO/cen0IjxitOGeIHaQl1neYUlW+tTpVQ5LVPxi2ZjwPx+YAHxNvVOQpCvyqtLhcUUt8195+1CVnCkHgTg0jBn9ufsLKlFCh/glZSIPn3IWev8T4D5BxEMpt4tMofrx15v8lkOqNDIMtq2zcKb/Yfd2+PhxgZ32O/fY6sVJpcgXsKATXfNvllCeTf4FLcyml11BzsLDsk46mgqme9gc7ODEM17wDG5yjXqMe7zVEv/1PJbg0hhyZyX2D36JT+Up6I3ycHepG9HiuNdyVkgPM04SXItSgE2cC9TDXXuFwRLirgd1/0Wi3KvC76kDdL6OHt7NKMJBmVTWARO27Gf4PVycqozvY0Je3Hnzepbd50/vyKqpfQ68Bam0ibbMG+5Py0XDw+XNRkFPb/y6W16EkVsE+436hNxKlqmWGTgIqBYXoGkRzSDX5KDNBl7XOS3+wtAK9HW6yT99O8WgDRn1mYub01vjbKWo2XJrPx/vpBwXZpWL7umC4piGd5WiUkoMvRIs0KqQwpQoh2CDy1yDY9D1xo7GjaQYw9qFSZqwI3wpxVEjoTzH7V2lLmrp9cPv8TN2hOa/GcAA5gXg0WmR6DM510bVLXkHVTOfCCFV7buMMDUOXzKGytN4GQ5KTIL7/Zh9zMht/pR0uh2epsk43xX5Bj8tUTtOGD+7AVM0SLJmZ2tvthY2QqIbIKIE1SkcbrEfvFPaddgpj4/B2ZqD9brUYri2u0ddlVwZVaZakvft09PrIWEafMt7Q4vcA6DdZAbrnVSJb0KNbf/EqfofLxvfnUmIpM2glOPDPXn1L7TyyoEPofX7Wlp3LtEoL3fcp+FWPYlbCvkRNvl2lKDijTm50/i+luL+Fb+SlFXt1aavrefpooYxH87FZR0h6TwYo3g6o/MK1GgFt3aT8z6X1Dj43mVKSZhiqzzJ9wK/U7LWZxvNBegb5FpLrm0FgEhus1FYbtQ4F/n4PiiwWwMteI3mEGJ23yvcKc1ffGX1341m95ROdGlde9EoHKr824B0AFgk+TpDVFaEJz+nHbKUzoCO5aOOZE8j5/LeJKh+tl69V5YUfdv3Rp5rqHeKq7jtohQtE2hSXb+4mr4bTQEAEYGPHF78HPVg/IjV39FdQkaUFKn0oGacPIejBO/l2CdKUsCWLSMTIY8ITpatIRwpsMe7Gc7txcH+MynvLUKuH5pSga+3FSmXYFuTj51gDCtQEoX952NJx3mI8r3ZaLCLzt3HrBC2j1SYsmm0B8vGUmwgSBYf6k1141nh7qAPt5x9kF/GC16Mpn1DG16PK+QsQg+CZthedZheDJYV5d1SBeMG74tYjG/JDyC6yErFJ1gFakUMkf7X934nUJcOXX/DP5ofkHt15cc0d/evwD2u4zUqF04yF2gFev+h+wetXbcY59Vt4l7 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 71dec194-dd38-4cd2-462b-08dafd12a2b6 X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jan 2023 07:22:50.9939 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 1m+sOa9+/5HvZHP1KhR/If9gDzau29FrXJBEKBb3ftBiAjq0hs+drsAJFB+mh361L55NFrcUR1KOgcvNL7p6BA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB8184 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755797117266436283?= X-GMAIL-MSGID: =?utf-8?q?1755797117266436283?= There is one LCDIF embedded in i.MX93 SoC to connect with MIPI DSI controller through LCDIF cross line pattern(controlled by mediamix blk-ctrl) or connect with LVDS display bridge(LDB) directly or connect with a parallel display through parallel display format(also controlled by mediamix blk-ctrl). i.MX93 LCDIF IP is essentially the same to i.MX8MP LCDIF IP. Add device tree binding for i.MX93 LCDIF. Signed-off-by: Liu Ying Acked-by: Krzysztof Kozlowski Reviewed-by: Marek Vasut --- Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml index 75b4efd70ba8..fc11ab5fc465 100644 --- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml +++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml @@ -21,6 +21,7 @@ properties: - fsl,imx28-lcdif - fsl,imx6sx-lcdif - fsl,imx8mp-lcdif + - fsl,imx93-lcdif - items: - enum: - fsl,imx6sl-lcdif @@ -88,7 +89,9 @@ allOf: properties: compatible: contains: - const: fsl,imx8mp-lcdif + enum: + - fsl,imx8mp-lcdif + - fsl,imx93-lcdif then: properties: clocks: @@ -107,6 +110,7 @@ allOf: enum: - fsl,imx6sx-lcdif - fsl,imx8mp-lcdif + - fsl,imx93-lcdif then: properties: clocks: @@ -123,6 +127,7 @@ allOf: - fsl,imx8mm-lcdif - fsl,imx8mn-lcdif - fsl,imx8mp-lcdif + - fsl,imx93-lcdif then: required: - power-domains From patchwork Mon Jan 23 07:23:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liu Ying X-Patchwork-Id: 47058 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1472200wrn; Sun, 22 Jan 2023 23:24:01 -0800 (PST) X-Google-Smtp-Source: AMrXdXvrREQzDBRme53UoYh9mvfrCKL99AwjPZgmmJYZvNyk1rOeOLg5ISp4xEa3jWc0SF1T0MXb X-Received: by 2002:a17:907:2a56:b0:84d:35e1:2781 with SMTP id fe22-20020a1709072a5600b0084d35e12781mr33067311ejc.46.1674458641368; Sun, 22 Jan 2023 23:24:01 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674458641; cv=pass; d=google.com; s=arc-20160816; b=STBw323fUV3/R+XLQs+2xYC5CbapmK3V2HRIn7kRxaWjwT8WLdCUi8JHi38ziGZJt1 A692uSZ2k+t+D3gGsCkLq3c4tDyo2hM8wYO1ueJY/Sj1EOS32GEnDuG84iCGuVPX1rW4 pNH2v3I2pFcl0do5IsFxlT/fwY6ydAasQP3pcwm22k88Lh+PSaAO1gcQbciGT0RNGKvy NGGExFR2MGmYDepOM1QKcGJkLzP/x9zLEWjwxVclF4Mt1UP8evU4glw1gyo8kGp06bhK vxgjQaoKOwBtdZy4LK70MF79TREhNPiCKcgIRC5kzKG4W0XzD63BGNyxXZW1eEmgD1up 4HVQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=fbnLuoPnlJ0Wx7L17Iq3WkVVgA7nnZ11nj8wnZp2K+4=; b=fp8Cyk8FPNACn6YXA9JlX3dhxWhTRQlta3yl1O9sBldTR0F3IyOh3VfEIgcNVEbl8E CdzANWCCMUp8r9mHPY1Th7cNxEBgqdT/KLuqmeXwcRTR6F72GmaYs6C9aYlUPYxp+tdu z4qoJLNgmjxU2fC17geJlICf3yQGKxRzQodNixByaMyEzMIlRqaixSyGzjTrbN5+iO/O a1R9fr0ooo3B7Ksk3bDKChLTAZye/GG8vyRKgl3glnYHJc092KuozULqRwfz7OvNs4+v u4EPJjyKIC4VYKA2Ra3gePR5e6kJuldCpQtUX/4lSAIHnDLCk7Yq8nsSTlR3Wq7sAzjb MUXQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@nxp.com header.s=selector2 header.b=VPy7W8q7; arc=pass (i=1 spf=pass spfdomain=nxp.com dkim=pass dkdomain=nxp.com dmarc=pass fromdomain=nxp.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. 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Received: from AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) by AS8PR04MB8184.eurprd04.prod.outlook.com (2603:10a6:20b:3fa::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.33; Mon, 23 Jan 2023 07:22:55 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::5725:92ec:f43e:f5fc]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::5725:92ec:f43e:f5fc%7]) with mapi id 15.20.6002.028; Mon, 23 Jan 2023 07:22:55 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: marex@denx.de, stefan@agner.ch, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com Subject: [PATCH 2/2] drm: lcdif: Add i.MX93 LCDIF support Date: Mon, 23 Jan 2023 15:23:58 +0800 Message-Id: <20230123072358.1060670-3-victor.liu@nxp.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230123072358.1060670-1-victor.liu@nxp.com> References: <20230123072358.1060670-1-victor.liu@nxp.com> X-ClientProxiedBy: SG2PR03CA0104.apcprd03.prod.outlook.com (2603:1096:4:7c::32) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|AS8PR04MB8184:EE_ X-MS-Office365-Filtering-Correlation-Id: 2a88bf26-6d70-4c96-b846-08dafd12a54f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: uOf5ufIZlTkN5VXQBfNOJT1aNHg+gK49lyEXUZuoqKXQCwzIBSw6sCmOpYE23/Sleq0uyq89y3gqIkCY+tK6ub2PZztoNM6mzHGE+imD1RAID6p7TrKyrFvxBVq/9Hx/RzmYaeIsDK002garWqTkhd9hcL1KWm8Rrk+P5bEamhOTqvFghixiavMdhqPcyQU7DxauK8g/k0q+Tfa9hoCc6k1WY7EsHv1sVPX4pD+Txrlx4cbkUaJN5DQr5Yjkdof0Mcc0fXnN2qEEXJ7y5V42CO5aYS7V4gNXd1tKYCdZfwu3sXgUF4kr1OYFPS3tEpQWcdZbvI/M9QC5MExTuw3hp9JiJq2LEBYMotzb/QKmd95QP6ZsUTQXETLkGyzy8xSITR/BLf3WWYhJGVNrUqiHahaVpaOMZiYZmt+qSjqC1kzYNdOARoQ3/+xHZNbsQCuoJ7JCdJpFV/JC0C+mcLB26JtERrkwptB9tRp7cHe993jP+p8E4eQAG7qVeNPEJUdPxek8CYR++yFhxb0fFMg8j9RC33GHONriDxLmwExrTM2TYVm866/At29UGamQE1T/ZIITU6s1HqGYZMbgTSHoW/EabXhk1ch7EXcbQD0cBNBZdusCle+m2ZOmGykCbfDiamFqtoYOdKhcVt2fqqtznpNiYOsMpEJ7zDJo8chqzz+JSSCn3kJhpUV9528ZGFOXBrBZYwJA2+LfC71Mqi+5PPdSrecdsVgjPoZYTYrgpqjqy+5lI/B0M6dO7h1Y/vaj1vk5ru8aGa/9ndJq8Pjth5CxadgPQHjopc4a5CpQcjrUFnWqw37hLfEUSuo6oTyEgNNGKZPHE7qM6ou6FUX8QOozS6hiUsqFrDz3C0Bv8O7Vu9qOT4Dk1UBqVBx1REFqYuJZaYE9DzEjZl2NqguvM0Rr/cz9ic9PxfREgzH7it4/Ph76enunYDWR1xUSHNdaDzoAhcquOXqHIwuFmcxdqAkfWbDC+ijzut1NKP8Y/VTwQFaxdRauT9PaabyEYZTbpbTwV/0r2YgAWlYJ601mXDsB1UHf21efLk7qxasMcurzxrk9Fc2tl+PQYHFumJWMp45tLtoMiM/cCIpb/RelBcTB0TMBSxQlVK3fLG1gzQAGg8wpSO9oBWt0SZY6Cux8hQLA7MAwb5JXqKhWtVVnhuIUXugW/n6CPVdNUxi1pXTAA7ai+OWwFG8hzgtj4mlctGTnSNenh634zsxtWpZQOQPvcLMoltRA9lhP6oemgTjH4qFmCO1FBvhwB2zUPribrNnWk6oV1srAr4JLZDUR3wBuyE93Wf0N5Yeo8L5LEQlniOwPg0Z2/uYwiGpuYuC6Yc0NVYfvR3bYEJT91B+30Q2eu3gEPxz+45Ym5OCI5yGaEnGYEygQ+KjWlkkLDO8+Mp+ZKhv1fu/06ks4bTbewoLUBg5lcDiuI8sR3R35ZDhZPnT3wrVQnq+tzLFlJwJ8vHYA8563fk8nFeCrp5AkIQfRgBAVmd2T5DzsdG/LBXanQG8lLIQ25jDLXqTM0WxdMyfWWo/MZJC6x4boKG+4K+5kWOV1+BZ44v1yz7xfn+OorZ+JiFzsBuDUiqdFl0P3 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2a88bf26-6d70-4c96-b846-08dafd12a54f X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jan 2023 07:22:55.3393 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: P90wEpn1qgNLp3KF8Oep27DfWeha+gLUyivR5bvHL2TAGTuGybY1AJKDAMBk2I4LAVTapX6A92sBLy/LpowHLg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB8184 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755797109867433247?= X-GMAIL-MSGID: =?utf-8?q?1755797143944100474?= The LCDIF embedded in i.MX93 SoC is essentially the same to those in i.MX8mp SoC. However, i.MX93 LCDIF may connect with MIPI DSI controller through LCDIF cross line pattern(controlled by mediamix blk-ctrl) or connect with LVDS display bridge(LDB) directly or a parallel display(also through mediamix blk-ctrl), so add multiple encoders(with DRM_MODE_ENCODER_NONE encoder type) support in the LCDIF DRM driver and find a bridge to attach the relevant encoder's chain when needed. While at it, derive lcdif_crtc_state structure from drm_crtc_state structure to introduce bus_format and bus_flags states so that the next downstream bridges may use consistent bus format and bus flags. Signed-off-by: Liu Ying --- drivers/gpu/drm/mxsfb/lcdif_drv.c | 73 +++++++++-- drivers/gpu/drm/mxsfb/lcdif_drv.h | 6 +- drivers/gpu/drm/mxsfb/lcdif_kms.c | 206 ++++++++++++++++++++---------- 3 files changed, 208 insertions(+), 77 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/lcdif_drv.c b/drivers/gpu/drm/mxsfb/lcdif_drv.c index cc2ceb301b96..4d41f6b6eb14 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_drv.c +++ b/drivers/gpu/drm/mxsfb/lcdif_drv.c @@ -9,13 +9,16 @@ #include #include #include +#include #include +#include #include #include #include #include #include +#include #include #include #include @@ -38,21 +41,70 @@ static const struct drm_mode_config_helper_funcs lcdif_mode_config_helpers = { .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, }; +static const struct drm_encoder_funcs lcdif_encoder_funcs = { + .destroy = drm_encoder_cleanup, +}; + static int lcdif_attach_bridge(struct lcdif_drm_private *lcdif) { - struct drm_device *drm = lcdif->drm; + struct device *dev = lcdif->drm->dev; + struct device_node *ep; struct drm_bridge *bridge; int ret; - bridge = devm_drm_of_get_bridge(drm->dev, drm->dev->of_node, 0, 0); - if (IS_ERR(bridge)) - return PTR_ERR(bridge); - - ret = drm_bridge_attach(&lcdif->encoder, bridge, NULL, 0); - if (ret) - return dev_err_probe(drm->dev, ret, "Failed to attach bridge\n"); - - lcdif->bridge = bridge; + for_each_endpoint_of_node(dev->of_node, ep) { + struct device_node *remote; + struct of_endpoint of_ep; + struct drm_encoder *encoder; + + remote = of_graph_get_remote_port_parent(ep); + if (!remote || !of_device_is_available(remote)) { + of_node_put(remote); + continue; + } + of_node_put(remote); + + ret = of_graph_parse_endpoint(ep, &of_ep); + if (ret < 0) { + dev_err(dev, "Failed to parse endpoint %pOF\n", ep); + of_node_put(ep); + return ret; + } + + if (of_ep.id >= MAX_DISPLAYS) { + dev_warn(dev, "invalid endpoint id %u\n", of_ep.id); + continue; + } + + bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, of_ep.id); + if (IS_ERR(bridge)) { + of_node_put(ep); + return dev_err_probe(dev, PTR_ERR(bridge), + "Failed to get bridge for endpoint%u\n", + of_ep.id); + } + + encoder = &lcdif->encoders[of_ep.id]; + encoder->possible_crtcs = drm_crtc_mask(&lcdif->crtc); + ret = drm_encoder_init(lcdif->drm, encoder, &lcdif_encoder_funcs, + DRM_MODE_ENCODER_NONE, NULL); + if (ret) { + dev_err(dev, "Failed to initialize encoder for endpoint%u: %d\n", + of_ep.id, ret); + of_node_put(ep); + return ret; + } + + ret = drm_bridge_attach(encoder, bridge, NULL, 0); + if (ret) { + of_node_put(ep); + return dev_err_probe(dev, ret, + "Failed to attach bridge for endpoint%u\n", + of_ep.id); + } + + lcdif->bridges[of_ep.id] = bridge; + } return 0; } @@ -199,6 +251,7 @@ static const struct drm_driver lcdif_driver = { static const struct of_device_id lcdif_dt_ids[] = { { .compatible = "fsl,imx8mp-lcdif" }, + { .compatible = "fsl,imx93-lcdif" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, lcdif_dt_ids); diff --git a/drivers/gpu/drm/mxsfb/lcdif_drv.h b/drivers/gpu/drm/mxsfb/lcdif_drv.h index 6cdba6e20c02..64459c3904e8 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_drv.h +++ b/drivers/gpu/drm/mxsfb/lcdif_drv.h @@ -14,6 +14,8 @@ #include #include +#define MAX_DISPLAYS 3 + struct clk; struct lcdif_drm_private { @@ -30,8 +32,8 @@ struct lcdif_drm_private { /* i.MXRT does support overlay planes, add them here. */ } planes; struct drm_crtc crtc; - struct drm_encoder encoder; - struct drm_bridge *bridge; + struct drm_encoder encoders[MAX_DISPLAYS]; + struct drm_bridge *bridges[MAX_DISPLAYS]; }; static inline struct lcdif_drm_private * diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdif_kms.c index 262bc43b1079..ba36447ed900 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_kms.c +++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -30,6 +31,18 @@ #include "lcdif_drv.h" #include "lcdif_regs.h" +struct lcdif_crtc_state { + struct drm_crtc_state base; + u32 bus_format; + u32 bus_flags; +}; + +static inline struct lcdif_crtc_state * +to_lcdif_crtc_state(struct drm_crtc_state *s) +{ + return container_of(s, struct lcdif_crtc_state, base); +} + /* ----------------------------------------------------------------------------- * CRTC */ @@ -385,48 +398,109 @@ static void lcdif_reset_block(struct lcdif_drm_private *lcdif) readl(lcdif->base + LCDC_V8_CTRL); } -static void lcdif_crtc_mode_set_nofb(struct lcdif_drm_private *lcdif, - struct drm_plane_state *plane_state, - struct drm_bridge_state *bridge_state, - const u32 bus_format) +static void lcdif_crtc_mode_set_nofb(struct drm_crtc_state *crtc_state, + struct drm_plane_state *plane_state) { - struct drm_device *drm = lcdif->crtc.dev; - struct drm_display_mode *m = &lcdif->crtc.state->adjusted_mode; - u32 bus_flags = 0; - - if (lcdif->bridge && lcdif->bridge->timings) - bus_flags = lcdif->bridge->timings->input_bus_flags; - else if (bridge_state) - bus_flags = bridge_state->input_bus_cfg.flags; + struct lcdif_crtc_state *lcdif_crtc_state = to_lcdif_crtc_state(crtc_state); + struct drm_device *drm = crtc_state->crtc->dev; + struct lcdif_drm_private *lcdif = to_lcdif_drm_private(drm); + struct drm_display_mode *m = &crtc_state->adjusted_mode; DRM_DEV_DEBUG_DRIVER(drm->dev, "Pixel clock: %dkHz (actual: %dkHz)\n", m->crtc_clock, (int)(clk_get_rate(lcdif->clk) / 1000)); DRM_DEV_DEBUG_DRIVER(drm->dev, "Bridge bus_flags: 0x%08X\n", - bus_flags); + lcdif_crtc_state->bus_flags); DRM_DEV_DEBUG_DRIVER(drm->dev, "Mode flags: 0x%08X\n", m->flags); /* Mandatory eLCDIF reset as per the Reference Manual */ lcdif_reset_block(lcdif); - lcdif_set_formats(lcdif, plane_state, bus_format); + lcdif_set_formats(lcdif, plane_state, lcdif_crtc_state->bus_format); - lcdif_set_mode(lcdif, bus_flags); + lcdif_set_mode(lcdif, lcdif_crtc_state->bus_flags); } static int lcdif_crtc_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state) { + struct drm_device *drm = crtc->dev; struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); + struct lcdif_crtc_state *lcdif_crtc_state = to_lcdif_crtc_state(crtc_state); bool has_primary = crtc_state->plane_mask & drm_plane_mask(crtc->primary); + struct drm_connector_state *connector_state; + struct drm_connector *connector; + struct drm_encoder *encoder; + struct drm_bridge_state *bridge_state; + struct drm_bridge *bridge; + u32 bus_format, bus_flags; + bool format_set = false, flags_set = false; + int ret, i; /* The primary plane has to be enabled when the CRTC is active. */ if (crtc_state->active && !has_primary) return -EINVAL; - return drm_atomic_add_affected_planes(state, crtc); + ret = drm_atomic_add_affected_planes(state, crtc); + if (ret) + return ret; + + /* Try to find consistent bus format and flags across first bridges. */ + for_each_new_connector_in_state(state, connector, connector_state, i) { + if (!connector_state->crtc) + continue; + + encoder = connector_state->best_encoder; + + bridge = drm_bridge_chain_get_first_bridge(encoder); + if (!bridge) + continue; + + /* + * Use bridge's input bus format if possible, otherwise use + * MEDIA_BUS_FMT_FIXED. + */ + bridge_state = drm_atomic_get_new_bridge_state(state, bridge); + if (!bridge_state) + bus_format = MEDIA_BUS_FMT_FIXED; + else + bus_format = bridge_state->input_bus_cfg.format; + + if (bus_format == MEDIA_BUS_FMT_FIXED) { + dev_warn(drm->dev, + "[ENCODER:%d:%s]'s bridge does not provide bus format, assuming MEDIA_BUS_FMT_RGB888_1X24.\n" + "Please fix bridge driver by handling atomic_get_input_bus_fmts.\n", + encoder->base.id, encoder->name); + bus_format = MEDIA_BUS_FMT_RGB888_1X24; + } + + if (!format_set) { + lcdif_crtc_state->bus_format = bus_format; + format_set = true; + } else if (lcdif_crtc_state->bus_format != bus_format) { + DRM_DEV_DEBUG_DRIVER(drm->dev, "inconsistent bus format\n"); + return -EINVAL; + } + + if (bridge->timings) + bus_flags = bridge->timings->input_bus_flags; + else if (bridge_state) + bus_flags = bridge_state->input_bus_cfg.flags; + else + bus_flags = 0; + + if (!flags_set) { + lcdif_crtc_state->bus_flags = bus_flags; + flags_set = true; + } else if (lcdif_crtc_state->bus_flags != bus_flags) { + DRM_DEV_DEBUG_DRIVER(drm->dev, "inconsistent bus flags\n"); + return -EINVAL; + } + } + + return 0; } static void lcdif_crtc_atomic_flush(struct drm_crtc *crtc, @@ -458,44 +532,21 @@ static void lcdif_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) { struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev); - struct drm_plane_state *new_pstate = drm_atomic_get_new_plane_state(state, - crtc->primary); + struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); + struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, + crtc->primary); struct drm_display_mode *m = &lcdif->crtc.state->adjusted_mode; - struct drm_bridge_state *bridge_state = NULL; struct drm_device *drm = lcdif->drm; - u32 bus_format = 0; dma_addr_t paddr; - /* If there is a bridge attached to the LCDIF, use its bus format */ - if (lcdif->bridge) { - bridge_state = - drm_atomic_get_new_bridge_state(state, - lcdif->bridge); - if (!bridge_state) - bus_format = MEDIA_BUS_FMT_FIXED; - else - bus_format = bridge_state->input_bus_cfg.format; - - if (bus_format == MEDIA_BUS_FMT_FIXED) { - dev_warn_once(drm->dev, - "Bridge does not provide bus format, assuming MEDIA_BUS_FMT_RGB888_1X24.\n" - "Please fix bridge driver by handling atomic_get_input_bus_fmts.\n"); - bus_format = MEDIA_BUS_FMT_RGB888_1X24; - } - } - - /* If all else fails, default to RGB888_1X24 */ - if (!bus_format) - bus_format = MEDIA_BUS_FMT_RGB888_1X24; - clk_set_rate(lcdif->clk, m->crtc_clock * 1000); pm_runtime_get_sync(drm->dev); - lcdif_crtc_mode_set_nofb(lcdif, new_pstate, bridge_state, bus_format); + lcdif_crtc_mode_set_nofb(new_crtc_state, new_plane_state); /* Write cur_buf as well to avoid an initial corrupt frame */ - paddr = drm_fb_dma_get_gem_addr(new_pstate->fb, new_pstate, 0); + paddr = drm_fb_dma_get_gem_addr(new_plane_state->fb, new_plane_state, 0); if (paddr) { writel(lower_32_bits(paddr), lcdif->base + LCDC_V8_CTRLDESCL_LOW0_4); @@ -529,6 +580,46 @@ static void lcdif_crtc_atomic_disable(struct drm_crtc *crtc, pm_runtime_put_sync(drm->dev); } +static void lcdif_crtc_reset(struct drm_crtc *crtc) +{ + struct lcdif_crtc_state *state; + + if (crtc->state) + __drm_atomic_helper_crtc_destroy_state(crtc->state); + + kfree(to_lcdif_crtc_state(crtc->state)); + crtc->state = NULL; + + state = kzalloc(sizeof(*state), GFP_KERNEL); + if (state) + __drm_atomic_helper_crtc_reset(crtc, &state->base); +} + +static struct drm_crtc_state * +lcdif_crtc_atomic_duplicate_state(struct drm_crtc *crtc) +{ + struct lcdif_crtc_state *old = to_lcdif_crtc_state(crtc->state); + struct lcdif_crtc_state *new; + + new = kzalloc(sizeof(*new), GFP_KERNEL); + if (!new) + return NULL; + + __drm_atomic_helper_crtc_duplicate_state(crtc, &new->base); + + new->bus_format = old->bus_format; + new->bus_flags = old->bus_flags; + + return &new->base; +} + +static void lcdif_crtc_atomic_destroy_state(struct drm_crtc *crtc, + struct drm_crtc_state *state) +{ + __drm_atomic_helper_crtc_destroy_state(state); + kfree(to_lcdif_crtc_state(state)); +} + static int lcdif_crtc_enable_vblank(struct drm_crtc *crtc) { struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev); @@ -557,24 +648,16 @@ static const struct drm_crtc_helper_funcs lcdif_crtc_helper_funcs = { }; static const struct drm_crtc_funcs lcdif_crtc_funcs = { - .reset = drm_atomic_helper_crtc_reset, + .reset = lcdif_crtc_reset, .destroy = drm_crtc_cleanup, .set_config = drm_atomic_helper_set_config, .page_flip = drm_atomic_helper_page_flip, - .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, - .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, + .atomic_duplicate_state = lcdif_crtc_atomic_duplicate_state, + .atomic_destroy_state = lcdif_crtc_atomic_destroy_state, .enable_vblank = lcdif_crtc_enable_vblank, .disable_vblank = lcdif_crtc_disable_vblank, }; -/* ----------------------------------------------------------------------------- - * Encoder - */ - -static const struct drm_encoder_funcs lcdif_encoder_funcs = { - .destroy = drm_encoder_cleanup, -}; - /* ----------------------------------------------------------------------------- * Planes */ @@ -667,7 +750,6 @@ int lcdif_kms_init(struct lcdif_drm_private *lcdif) BIT(DRM_COLOR_YCBCR_BT2020); const u32 supported_ranges = BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | BIT(DRM_COLOR_YCBCR_FULL_RANGE); - struct drm_encoder *encoder = &lcdif->encoder; struct drm_crtc *crtc = &lcdif->crtc; int ret; @@ -691,13 +773,7 @@ int lcdif_kms_init(struct lcdif_drm_private *lcdif) return ret; drm_crtc_helper_add(crtc, &lcdif_crtc_helper_funcs); - ret = drm_crtc_init_with_planes(lcdif->drm, crtc, - &lcdif->planes.primary, NULL, - &lcdif_crtc_funcs, NULL); - if (ret) - return ret; - - encoder->possible_crtcs = drm_crtc_mask(crtc); - return drm_encoder_init(lcdif->drm, encoder, &lcdif_encoder_funcs, - DRM_MODE_ENCODER_NONE, NULL); + return drm_crtc_init_with_planes(lcdif->drm, crtc, + &lcdif->planes.primary, NULL, + &lcdif_crtc_funcs, NULL); }