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([188.252.220.152]) by smtp.googlemail.com with ESMTPSA id d26-20020a056402401a00b0046c7c3755a7sm5152151eda.17.2023.01.21.03.29.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 Jan 2023 03:29:48 -0800 (PST) From: Robert Marko To: ilia.lin@kernel.org, agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, rafael@kernel.org, viresh.kumar@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Robert Marko Subject: [PATCH 1/4] soc: qcom: socinfo: move SMEM item struct and defines to a header Date: Sat, 21 Jan 2023 12:29:44 +0100 Message-Id: <20230121112947.53433-1-robimarko@gmail.com> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755631512725490753?= X-GMAIL-MSGID: =?utf-8?q?1755631512725490753?= Move SMEM item struct and related defines to a header in order to be able to reuse them in the Qualcomm NVMEM CPUFreq driver instead of duplicating them. Signed-off-by: Robert Marko --- drivers/soc/qcom/socinfo.c | 65 +----------------------------- include/linux/soc/qcom/socinfo.h | 68 ++++++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+), 64 deletions(-) create mode 100644 include/linux/soc/qcom/socinfo.h diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index 3b970a80f3aa..5919f863f369 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -32,15 +33,6 @@ #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id) #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name) -#define SMEM_SOCINFO_BUILD_ID_LENGTH 32 -#define SMEM_SOCINFO_CHIP_ID_LENGTH 32 - -/* - * SMEM item id, used to acquire handles to respective - * SMEM region. - */ -#define SMEM_HW_SW_BUILD_ID 137 - #ifdef CONFIG_DEBUG_FS #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 #define SMEM_IMAGE_VERSION_SIZE 4096 @@ -121,62 +113,7 @@ static const char *const pmic_models[] = { [58] = "PM8450", [65] = "PM8010", }; -#endif /* CONFIG_DEBUG_FS */ - -/* Socinfo SMEM item structure */ -struct socinfo { - __le32 fmt; - __le32 id; - __le32 ver; - char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH]; - /* Version 2 */ - __le32 raw_id; - __le32 raw_ver; - /* Version 3 */ - __le32 hw_plat; - /* Version 4 */ - __le32 plat_ver; - /* Version 5 */ - __le32 accessory_chip; - /* Version 6 */ - __le32 hw_plat_subtype; - /* Version 7 */ - __le32 pmic_model; - __le32 pmic_die_rev; - /* Version 8 */ - __le32 pmic_model_1; - __le32 pmic_die_rev_1; - __le32 pmic_model_2; - __le32 pmic_die_rev_2; - /* Version 9 */ - __le32 foundry_id; - /* Version 10 */ - __le32 serial_num; - /* Version 11 */ - __le32 num_pmics; - __le32 pmic_array_offset; - /* Version 12 */ - __le32 chip_family; - __le32 raw_device_family; - __le32 raw_device_num; - /* Version 13 */ - __le32 nproduct_id; - char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH]; - /* Version 14 */ - __le32 num_clusters; - __le32 ncluster_array_offset; - __le32 num_defective_parts; - __le32 ndefective_parts_array_offset; - /* Version 15 */ - __le32 nmodem_supported; - /* Version 16 */ - __le32 feature_code; - __le32 pcode; - __le32 npartnamemap_offset; - __le32 nnum_partname_mapping; -}; -#ifdef CONFIG_DEBUG_FS struct socinfo_params { u32 raw_device_family; u32 hw_plat_subtype; diff --git a/include/linux/soc/qcom/socinfo.h b/include/linux/soc/qcom/socinfo.h new file mode 100644 index 000000000000..6a175d635617 --- /dev/null +++ b/include/linux/soc/qcom/socinfo.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __QCOM_SOCINFO_H__ +#define __QCOM_SOCINFO_H__ + +/* + * SMEM item id, used to acquire handles to respective + * SMEM region. + */ +#define SMEM_HW_SW_BUILD_ID 137 + +#define SMEM_SOCINFO_BUILD_ID_LENGTH 32 +#define SMEM_SOCINFO_CHIP_ID_LENGTH 32 + +/* Socinfo SMEM item structure */ +struct socinfo { + __le32 fmt; + __le32 id; + __le32 ver; + char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH]; + /* Version 2 */ + __le32 raw_id; + __le32 raw_ver; + /* Version 3 */ + __le32 hw_plat; + /* Version 4 */ + __le32 plat_ver; + /* Version 5 */ + __le32 accessory_chip; + /* Version 6 */ + __le32 hw_plat_subtype; + /* Version 7 */ + __le32 pmic_model; + __le32 pmic_die_rev; + /* Version 8 */ + __le32 pmic_model_1; + __le32 pmic_die_rev_1; + __le32 pmic_model_2; + __le32 pmic_die_rev_2; + /* Version 9 */ + __le32 foundry_id; + /* Version 10 */ + __le32 serial_num; + /* Version 11 */ + __le32 num_pmics; + __le32 pmic_array_offset; + /* Version 12 */ + __le32 chip_family; + __le32 raw_device_family; + __le32 raw_device_num; + /* Version 13 */ + __le32 nproduct_id; + char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH]; + /* Version 14 */ + __le32 num_clusters; + __le32 ncluster_array_offset; + __le32 num_defective_parts; + __le32 ndefective_parts_array_offset; + /* Version 15 */ + __le32 nmodem_supported; + /* Version 16 */ + __le32 feature_code; + __le32 pcode; + __le32 npartnamemap_offset; + __le32 nnum_partname_mapping; +}; + +#endif From patchwork Sat Jan 21 11:29:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 46818 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp680434wrn; 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([188.252.220.152]) by smtp.googlemail.com with ESMTPSA id d26-20020a056402401a00b0046c7c3755a7sm5152151eda.17.2023.01.21.03.29.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 Jan 2023 03:29:50 -0800 (PST) From: Robert Marko To: ilia.lin@kernel.org, agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, rafael@kernel.org, viresh.kumar@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Robert Marko Subject: [PATCH 2/4] cpufreq: qcom-nvmem: reuse socinfo SMEM item struct Date: Sat, 21 Jan 2023 12:29:45 +0100 Message-Id: <20230121112947.53433-2-robimarko@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230121112947.53433-1-robimarko@gmail.com> References: <20230121112947.53433-1-robimarko@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755631560932640611?= X-GMAIL-MSGID: =?utf-8?q?1755631560932640611?= Now that socinfo SMEM item struct and defines have been moved to a header so we can utilize that instead. Now the SMEM value can be accesed directly, there is no need for defining the ID for the SMEM request as well. Signed-off-by: Robert Marko Reviewed-by: Bjorn Andersson Acked-by: Viresh Kumar --- drivers/cpufreq/qcom-cpufreq-nvmem.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index a577586b23be..c0a7841a56c1 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -28,8 +28,7 @@ #include #include #include - -#define MSM_ID_SMEM 137 +#include enum _msm_id { MSM8996V3 = 0xF6ul, @@ -143,17 +142,14 @@ static void get_krait_bin_format_b(struct device *cpu_dev, static enum _msm8996_version qcom_cpufreq_get_msm_id(void) { size_t len; - u32 *msm_id; + struct socinfo *info; enum _msm8996_version version; - msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len); - if (IS_ERR(msm_id)) + info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, &len); + if (IS_ERR(info)) return NUM_OF_MSM8996_VERSIONS; - /* The first 4 bytes are format, next to them is the actual msm-id */ - msm_id++; - - switch ((enum _msm_id)*msm_id) { + switch (info->id) { case MSM8996V3: case APQ8096V3: version = MSM8996_V3; From patchwork Sat Jan 21 11:29:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 46819 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp680810wrn; Sat, 21 Jan 2023 03:33:27 -0800 (PST) X-Google-Smtp-Source: AMrXdXudIp5X+4MIFR/gTw0V3GP8cBmfJPp6LCtfbZ481gxfEMR7WLuYWtlaRRnOu35csyf6a5wt X-Received: by 2002:aa7:8a04:0:b0:58b:b29c:50c2 with SMTP id m4-20020aa78a04000000b0058bb29c50c2mr17043732pfa.26.1674300806776; Sat, 21 Jan 2023 03:33:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1674300806; cv=none; d=google.com; s=arc-20160816; b=RwXdMLHOulhAsmYCxNJN6g4eo4oOmzdlszlSFiRrFFWkW21aQcLhMHt33I6Cmaw705 K8GeVZTUrf6ZO5gb0LmO6X0oZ2BfhQk56+0pae6jyf6uqWGqizSFWKF3O2vP6Eamr5qh V1n5rW40fjgMzz5KKQ3CMy4v2W+7mxMi7R1BbTn6IK39o6iJIIS/NAFlQc5rQecSRsdc 2eVJrDeaCoIH3a1y5IMQ/fyr9A3dKeizg5SJaBCqYbVCjP+RkRfOZ4EDb0y7F4KDQ3Pg wwZABMA2TL6jfX/GYaJDebwCTEKLG1k2DzlTslkGMY4PTCWVjASJnDc9hqjqtfZ7iBI0 QUVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=APNLiKmbt8JWMBZWCLrn0Q41j8dsCsL0653AwgPsFDA=; b=admAoDIJVGF+KQtpHW1YqlgBT6l5gWYWs6r51o7JL41VMMtEte38KqIJXUVl7p+IW/ NLDNuHSJ9xUIodxJ+Yt3i2R7EB1W2vFd/sII77lppqtYqnQ5YUzIKp8xz8Q+j1afly98 lOq5s0W5FvpejdrWnJL32+9LE4fWh97rkYUytoP3AgXv+GLhcnUMwrUmC6pbuUddum+V MycT3oyx9tbGo4VzlUlfWzt6jGR4J69pQCxvo/puB2aoZPe71xzY39YWtcNFTXIPGCwC jGcc6lQuOc/zJUkLWLnXyPNzWiROaA18Dob3Lyxuv5HOZrPzBN3K3GjSMQ+2DfdrGtg6 bJZQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=g1UzDz1r; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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([188.252.220.152]) by smtp.googlemail.com with ESMTPSA id d26-20020a056402401a00b0046c7c3755a7sm5152151eda.17.2023.01.21.03.29.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 Jan 2023 03:29:51 -0800 (PST) From: Robert Marko To: ilia.lin@kernel.org, agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, rafael@kernel.org, viresh.kumar@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Robert Marko Subject: [PATCH 3/4] cpufreq: qcom-nvmem: use SoC ID-s from bindings Date: Sat, 21 Jan 2023 12:29:46 +0100 Message-Id: <20230121112947.53433-3-robimarko@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230121112947.53433-1-robimarko@gmail.com> References: <20230121112947.53433-1-robimarko@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755631643006770115?= X-GMAIL-MSGID: =?utf-8?q?1755631643006770115?= SMEM SoC ID-s are now stored in DT bindings so lets use those instead of defining them in the driver again. Signed-off-by: Robert Marko Reviewed-by: Konrad Dybcio Reviewed-by: Bjorn Andersson --- drivers/cpufreq/qcom-cpufreq-nvmem.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index c0a7841a56c1..da55d2e1925a 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -30,12 +30,7 @@ #include #include -enum _msm_id { - MSM8996V3 = 0xF6ul, - APQ8096V3 = 0x123ul, - MSM8996SG = 0x131ul, - APQ8096SG = 0x138ul, -}; +#include enum _msm8996_version { MSM8996_V3, @@ -150,12 +145,12 @@ static enum _msm8996_version qcom_cpufreq_get_msm_id(void) return NUM_OF_MSM8996_VERSIONS; switch (info->id) { - case MSM8996V3: - case APQ8096V3: + case QCOM_ID_MSM8996: + case QCOM_ID_APQ8096: version = MSM8996_V3; break; - case MSM8996SG: - case APQ8096SG: + case QCOM_ID_MSM8996SG: + case QCOM_ID_APQ8096SG: version = MSM8996_SG; break; default: From patchwork Sat Jan 21 11:29:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 46820 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp680924wrn; Sat, 21 Jan 2023 03:33:51 -0800 (PST) X-Google-Smtp-Source: AMrXdXt52NfMcR3Ig0l5AVj3Uh46m3XJ4xS7VOapO4IkcjfxgUYufgfcRByooe8+X6AJxJaaZv+B X-Received: by 2002:a17:90a:d258:b0:227:1fa4:4aa1 with SMTP id o24-20020a17090ad25800b002271fa44aa1mr17988442pjw.47.1674300831496; Sat, 21 Jan 2023 03:33:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1674300831; cv=none; d=google.com; s=arc-20160816; b=Tu3BgWgh6kl8fj0pku7TgD1ykpGjCkCkLJXjxn/w2jo8MQeaA7gzK8qA35tSmfpIpl fUkMXxkoctxobOQO8fOAFzXqAvz64McatU/xJn3o1MVHDN2iFF1x8hUp8yy09e22N8Fq QbpPcxj5wB6ai4tOzduYyCU2u2Zef+oWtnx4GsHd7ra2NfRMSzzJunzk0TBnOOZ/a4+U 6e5Pw+vme5+XqU4K7n1vjqsh+xuRBaKByQLio0N3DCBf726G88qA5GFef+a3U5uPDkI+ k2dOY0Xf4IVUoS51EgYG9PTw8Df2RyIbJSfPqZMkm5GFmyrLAcvwFRzvfZJ9D6etGPz+ z0yA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=hAzkTMFTURCBIwS+2F7U3D+gzMtPsw23R5CfBmpjqS8=; b=xTFLYKRgBvH1sVr3hiOC0kfM1eYgKHhxz8kQiGcSImspo+yA0ZxMWkUlE3kMjRQdBd Zk5/fX/yJuDQuyJaQKopMTa0jY6q+U7HfOtRDa8W/BJ0E9uZrN7n9Vej81jQUJXSfguo 5+E/J7kUTj4WGlgINQB/H9FrNLaFFb/mlei62VnVajLiX+otKhV7H4Ax3hb86QQmEHqN fOiRHL2t+vjttyqDmJWe7VWvyqA+8Rkl7XlRrHItTuXWMARt56H82i4PWTdAadZ4QhW9 Z8S+yJ7pLh9A9ZYgu5URArO/6SFXPFjz1G0CZ9N20NshuXTMou7WelvUc6daJPQTee1S BBgQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=Zzg50d2n; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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([188.252.220.152]) by smtp.googlemail.com with ESMTPSA id d26-20020a056402401a00b0046c7c3755a7sm5152151eda.17.2023.01.21.03.29.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 Jan 2023 03:29:52 -0800 (PST) From: Robert Marko To: ilia.lin@kernel.org, agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, rafael@kernel.org, viresh.kumar@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Robert Marko Subject: [PATCH 4/4] cpufreq: qcom-nvmem: make qcom_cpufreq_get_msm_id() return the SoC ID Date: Sat, 21 Jan 2023 12:29:47 +0100 Message-Id: <20230121112947.53433-4-robimarko@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230121112947.53433-1-robimarko@gmail.com> References: <20230121112947.53433-1-robimarko@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755631668847198000?= X-GMAIL-MSGID: =?utf-8?q?1755631668847198000?= Currently, qcom_cpufreq_get_msm_id() does not simply return the SoC ID after getting it via SMEM call but instead uses an enum to encode the matched SMEM ID to 2 variants of MSM8996 which are then used in qcom_cpufreq_kryo_name_version() to set the supported version. This prevents qcom_cpufreq_get_msm_id() from being universal and its doing more than its name suggests, so lets make it just return the SoC ID directly which allows matching directly on the SoC ID and removes the need for msm8996_version enum which simplifies the driver. It also allows reusing the qcom_cpufreq_get_msm_id() for new SoC-s. Signed-off-by: Robert Marko Reviewed-by: Bjorn Andersson --- drivers/cpufreq/qcom-cpufreq-nvmem.c | 44 ++++++++-------------------- 1 file changed, 12 insertions(+), 32 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index da55d2e1925a..9deaf9521d6d 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -32,12 +32,6 @@ #include -enum _msm8996_version { - MSM8996_V3, - MSM8996_SG, - NUM_OF_MSM8996_VERSIONS, -}; - struct qcom_cpufreq_drv; struct qcom_cpufreq_match_data { @@ -134,30 +128,16 @@ static void get_krait_bin_format_b(struct device *cpu_dev, dev_dbg(cpu_dev, "PVS version: %d\n", *pvs_ver); } -static enum _msm8996_version qcom_cpufreq_get_msm_id(void) +static int qcom_cpufreq_get_msm_id(void) { size_t len; struct socinfo *info; - enum _msm8996_version version; info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, &len); if (IS_ERR(info)) - return NUM_OF_MSM8996_VERSIONS; + return PTR_ERR(info); - switch (info->id) { - case QCOM_ID_MSM8996: - case QCOM_ID_APQ8096: - version = MSM8996_V3; - break; - case QCOM_ID_MSM8996SG: - case QCOM_ID_APQ8096SG: - version = MSM8996_SG; - break; - default: - version = NUM_OF_MSM8996_VERSIONS; - } - - return version; + return info->id; } static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, @@ -166,25 +146,25 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, struct qcom_cpufreq_drv *drv) { size_t len; + int msm_id; u8 *speedbin; - enum _msm8996_version msm8996_version; *pvs_name = NULL; - msm8996_version = qcom_cpufreq_get_msm_id(); - if (NUM_OF_MSM8996_VERSIONS == msm8996_version) { - dev_err(cpu_dev, "Not Snapdragon 820/821!"); - return -ENODEV; - } + msm_id = qcom_cpufreq_get_msm_id(); + if (msm_id < 0) + return msm_id; speedbin = nvmem_cell_read(speedbin_nvmem, &len); if (IS_ERR(speedbin)) return PTR_ERR(speedbin); - switch (msm8996_version) { - case MSM8996_V3: + switch (msm_id) { + case QCOM_ID_MSM8996: + case QCOM_ID_APQ8096: drv->versions = 1 << (unsigned int)(*speedbin); break; - case MSM8996_SG: + case QCOM_ID_MSM8996SG: + case QCOM_ID_APQ8096SG: drv->versions = 1 << ((unsigned int)(*speedbin) + 4); break; default: