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Fri, 20 Jan 2023 13:15:16 -0600 From: Mario Limonciello To: Shyam Sundar S K CC: , , Mario Limonciello , Hans de Goede , Mark Gross , , Subject: [PATCH 1/2] platform/x86: amd: pmc: Disable IRQ1 wakeup for RN/CZN Date: Fri, 20 Jan 2023 13:15:18 -0600 Message-ID: <20230120191519.15926-1-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT072:EE_|PH7PR12MB7137:EE_ X-MS-Office365-Filtering-Correlation-Id: d5980761-fdce-4280-6201-08dafb1aab2f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: U2jiYUs0VAVsMBIgb1KtAo7anDPLzBfH7/066b8ZHFdYg8sgg2o2rihGCdeAO4ddnipkg7YAhC/JUFsfr5T7IM7JaoFp1DaUvQJqArG3mjnDzczosPihVn3UBFbDEz4N7fwJNOdOwPAkpfUp8vyh2AfNPQ6aF8iwAnSeYuxan9BkIkfiGltRUX52QubY7PeILVwsjikiW4aaB+erT6h1TfJHHj2ANjsLMgEQlxI4VBnyxtCzQUXZmdyhD5v2qIxAyhHd1hfEmwlQDunuDeSgHHUxUjsK6tYa51ZguO0m+Sl6wC+MBvliCJUvlXdSbRxEWCxhUWCcLaxAevwVeW+jE5AZmRw9BnLshQtZfHkISvnw3j4VXrqu4QqGxOKrZwkibLszjHJICMId82Qs/LgJQ2YmylIoEUJturrZ6ojDUeigcQwA6iatDiGL0CrRIPQ3j+USBqn+PXuiaGDYLzOj+BSKnQ9szz/AWfVg+YNyxLyYSmUbLGRJ2WT+0b/yN2NmevP7jh4WmEx4BtxIQmYfs/GcRYqo2dpUGrQYX/FAADp2SbZ/879E2DKeacxk8oOQXkFiud4E0i9msnZJ7Zzwz4poZWWJjcMqYXq4c6EYmO/0Ywh4BGd7RQJl7G5FFytc6sC5SjNquTuhxSbO2ZykMbGydnMEax4UkfMur+vqkjrhV7BVOn1ISmuX7lWgextr X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(396003)(39860400002)(376002)(136003)(451199015)(46966006)(40470700004)(36840700001)(186003)(26005)(82310400005)(44832011)(16526019)(426003)(86362001)(47076005)(83380400001)(478600001)(2906002)(40480700001)(70586007)(70206006)(966005)(316002)(1076003)(336012)(37006003)(82740400003)(4326008)(5660300002)(8676002)(6862004)(54906003)(7696005)(8936002)(6636002)(41300700001)(36860700001)(356005)(2616005)(36756003)(40460700003)(81166007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jan 2023 19:15:18.4514 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d5980761-fdce-4280-6201-08dafb1aab2f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT072.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7137 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755570750180326512?= X-GMAIL-MSGID: =?utf-8?q?1755570750180326512?= By default when the system is configured for low power idle in the FADT the keyboard is set up as a wake source. This matches the behavior that Windows uses for Modern Standby as well. It has been reported that a variety of AMD based designs there are spurious wakeups are happening where two IRQ sources are active. For example: ``` PM: Triggering wakeup from IRQ 9 PM: Triggering wakeup from IRQ 1 ``` In these designs IRQ 9 is the ACPI SCI and IRQ 1 is the keyboard. One way to trigger this problem is to suspend the laptop and then unplug the AC adapter. The SOC will be in a hardware sleep state and plugging in the AC adapter returns control to the kernel's s2idle loop. Normally if just IRQ 9 was active the s2idle loop would advance any EC transactions and no other IRQ being active would cause the s2idle loop to put the SOC back into hardware sleep state. When this bug occurred IRQ 1 is also active even if no keyboard activity occurred. This causes the s2idle loop to break and the system to wake. This is a platform firmware bug triggering IRQ1 without keyboard activity. This occurs in Windows as well, but Windows will enter "SW DRIPS" and then with no activity enters back into "HW DRIPS" (hardware sleep state). This issue affects Renoir, Lucienne, Cezanne, and Barcelo platforms. It does not happen on newer systems such as Mendocino or Rembrandt. It's been fixed in newer platform firmware. To avoid triggering the bug on older systems check the SMU F/W version and adjust the policy at suspend time for s2idle wakeup from keyboard on these systems. A lot of thought and experimentation has been given around the timing of disabling IRQ1, and to make it work the "suspend" PM callback is restored. Reported-by: Kai-Heng Feng Reported-by: Xaver Hugl Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2115 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1951 Signed-off-by: Mario Limonciello --- drivers/platform/x86/amd/pmc.c | 50 ++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/drivers/platform/x86/amd/pmc.c b/drivers/platform/x86/amd/pmc.c index 8d924986381be..be1b49824edbd 100644 --- a/drivers/platform/x86/amd/pmc.c +++ b/drivers/platform/x86/amd/pmc.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -653,6 +654,33 @@ static int amd_pmc_get_os_hint(struct amd_pmc_dev *dev) return -EINVAL; } +static int amd_pmc_czn_wa_irq1(struct amd_pmc_dev *pdev) +{ + struct device *d; + int rc; + + if (!pdev->major) { + rc = amd_pmc_get_smu_version(pdev); + if (rc) + return rc; + } + + if (pdev->major > 64 || (pdev->major == 64 && pdev->minor > 65)) + return 0; + + d = bus_find_device_by_name(&serio_bus, NULL, "serio0"); + if (!d) + return 0; + if (device_may_wakeup(d)) { + dev_info_once(d, "Disabling IRQ1 wakeup source to avoid platform firmware bug\n"); + disable_irq_wake(1); + device_set_wakeup_enable(d, false); + } + put_device(d); + + return 0; +} + static int amd_pmc_verify_czn_rtc(struct amd_pmc_dev *pdev, u32 *arg) { struct rtc_device *rtc_device; @@ -782,6 +810,25 @@ static struct acpi_s2idle_dev_ops amd_pmc_s2idle_dev_ops = { .check = amd_pmc_s2idle_check, .restore = amd_pmc_s2idle_restore, }; + +static int __maybe_unused amd_pmc_suspend_handler(struct device *dev) +{ + struct amd_pmc_dev *pdev = dev_get_drvdata(dev); + + if (pdev->cpu_id == AMD_CPU_ID_CZN) { + int rc = amd_pmc_czn_wa_irq1(pdev); + + if (rc) { + dev_err(pdev->dev, "failed to adjust keyboard wakeup: %d\n", rc); + return rc; + } + } + + return 0; +} + +static SIMPLE_DEV_PM_OPS(amd_pmc_pm, amd_pmc_suspend_handler, NULL); + #endif static const struct pci_device_id pmc_pci_ids[] = { @@ -980,6 +1027,9 @@ static struct platform_driver amd_pmc_driver = { .name = "amd_pmc", .acpi_match_table = amd_pmc_acpi_ids, .dev_groups = pmc_groups, +#ifdef CONFIG_SUSPEND + .pm = &amd_pmc_pm, +#endif }, .probe = amd_pmc_probe, .remove = amd_pmc_remove, From patchwork Fri Jan 20 19:15:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 46589 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp381613wrn; Fri, 20 Jan 2023 11:21:19 -0800 (PST) X-Google-Smtp-Source: AMrXdXvdO+ywxOou5mYdX9bh6jyZZahkXpHXkHlm8l1+TOsa64GwUnKm4fd4u7p5KxvPQzSi/u44 X-Received: by 2002:a05:6402:e8c:b0:463:e2cd:a8b5 with SMTP id h12-20020a0564020e8c00b00463e2cda8b5mr15493280eda.11.1674242479095; Fri, 20 Jan 2023 11:21:19 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674242479; cv=pass; d=google.com; s=arc-20160816; b=CwKQYN0eW2VifhvGI50ZnQFvarv0rMJHBKEhsh+vLGyAA6w0GsbIF7W+Kwlgbh9qdM HxhSzyUi9ZXuee6hkwi9ruRUEX9LUmVnYEyksZYZD7sWj8dTTiC3C7/8ZnzZg3my/ivD mILEUH9krMRO4iZIO87i02TuyVzy7d2dfR4szOrP4Zj8RSu4ihllaqsnquB0YlWRQIfB O2vpcpqppqS1GMucQ3nrXXqLqM7Q8CIFDjHdg4wgxJdba3+nSwrThOmnirQ7DFdboIkm zbxbtzIRWpru0CF9hNNZYIXzeN7hwi0X5RspiYrDcLXAxJMFTPEvtsAQioX1GX8X2UKw iP2w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7C7PIzKmN+13SGyyZ51BjYoRkF4RjZPpqLFfrREbUIc=; b=08WHv+zQEdzFh0M1AET6yRe6zvFjnITLKj1oO0q2JiRREpORn+vwUOWD+tpnQ4PMMo c7ZxHWYaJuFR9SJsJ7AZQgnt8ixW0cMIgTwkUSLevQ4m52qst2OMHjQyn5BcZLVuZmu3 qSBfk1K5ZkA660I4Wsg4rEHSW31eipTOZ0k8vjmNBhSykHHleOaJgtpDV3zeoDqiCpS7 r5LislGSL45+OQSQNQIVOcclm7ZhBiv0kluIj5fauTUnSpAU862OOghcJ5ke2QTduueq Q+wPT0K/ZaKp14TnVLawvdtZ5iQyoN0ZovqUbD3ClWKX7XRLAHTB378gkh0L1q7YLaTg IalQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=C9ljAYO5; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Fri, 20 Jan 2023 13:15:17 -0600 From: Mario Limonciello To: Shyam Sundar S K CC: , , Mario Limonciello , Hans de Goede , Mark Gross , , Subject: [PATCH 2/2] platform/x86/amd: pmc: Add a module parameter to disable workarounds Date: Fri, 20 Jan 2023 13:15:19 -0600 Message-ID: <20230120191519.15926-2-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230120191519.15926-1-mario.limonciello@amd.com> References: <20230120191519.15926-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT072:EE_|SN7PR12MB7228:EE_ X-MS-Office365-Filtering-Correlation-Id: 1fe6b387-6630-45ff-7ce3-08dafb1aabf0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: E3ZIBH3+MuIZ4nTAZKqkNAVjaRugG8bGL043YNB8zxdczp/TWaHrszUm0KcRKN2A44dxGzYualWLYGo+NGH0/BfEsTRpqTEEDHrXQSgoR2uQNg4FUkh4imscv0P9KZ185uE6WLjYm4SCk0P/sT1GrFsZzLFEn4LAPijLwFXCK6/mz15aoZ5QVmW4df3BxQ58Rp3wBO74P2BZeYbyPzS+F3auFjHwEVjzSd29S3rp3z1PhojOjDqlRP5Q6JoRgFy4dxgxfMV5RaXV/vD4vlPCSD8FQ1H0cn584G4eERn8rKqoeJw30HdpLSFtpQlD45vDf/qVdHShpbd4S4THjns1DdjPAHrGmkCcObXnf359GegvA6Sjb5/QgtTYRSwzBMMP4bSH83k2AN9oEAkfI+u8TWiMxzStIAswU4P9iVw/hMhri+QUxz6jLK0b/2gIr/IIJVhh77yFqUxD8lygKz9v0MahLKAI+8M1QjivLp97PSAxNnDsqEhoXaRJNYIEYApkPLc1bZpxqv6GOfYz0h2h5DUXGgCrMdV/raF6SH3NFJXbPXsHf312tx41NdW2pvHpr23YjMRzRfrV8ih/5pYLBj8m8myyhu34QDzW5MCIF1KDOpfczyjpHyn9azBwl7WHtPBS5PQCER53Z3VDsvsU+3aFcJCS0d/m3h4PN0RFEc2bOYvcFjFBOwekSPDTsX02vGw5SvY0kEra9SSZB7wihavT89FUMaAFStK2WF6VdLA= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(39860400002)(136003)(346002)(396003)(451199015)(40470700004)(36840700001)(46966006)(81166007)(26005)(44832011)(356005)(5660300002)(41300700001)(8936002)(6862004)(82740400003)(40460700003)(36860700001)(36756003)(6636002)(37006003)(54906003)(7696005)(186003)(83380400001)(86362001)(16526019)(478600001)(316002)(8676002)(70206006)(2906002)(4326008)(82310400005)(70586007)(2616005)(426003)(40480700001)(47076005)(336012)(1076003)(36900700001);DIR:OUT;SFP:1101; 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To allow them to bypass these workarounds, introduce a module parameter. Signed-off-by: Mario Limonciello --- drivers/platform/x86/amd/pmc.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/amd/pmc.c b/drivers/platform/x86/amd/pmc.c index be1b49824edbd..3cbb01ec10e32 100644 --- a/drivers/platform/x86/amd/pmc.c +++ b/drivers/platform/x86/amd/pmc.c @@ -161,6 +161,10 @@ static bool enable_stb; module_param(enable_stb, bool, 0644); MODULE_PARM_DESC(enable_stb, "Enable the STB debug mechanism"); +static bool disable_workarounds; +module_param(disable_workarounds, bool, 0644); +MODULE_PARM_DESC(disable_workarounds, "Disable workarounds for platform bugs"); + static struct amd_pmc_dev pmc; static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret); static int amd_pmc_read_stb(struct amd_pmc_dev *dev, u32 *buf); @@ -743,8 +747,8 @@ static void amd_pmc_s2idle_prepare(void) /* Reset and Start SMU logging - to monitor the s0i3 stats */ amd_pmc_setup_smu_logging(pdev); - /* Activate CZN specific RTC functionality */ - if (pdev->cpu_id == AMD_CPU_ID_CZN) { + /* Activate CZN specific platform bug workarounds */ + if (pdev->cpu_id == AMD_CPU_ID_CZN && !disable_workarounds) { rc = amd_pmc_verify_czn_rtc(pdev, &arg); if (rc) { dev_err(pdev->dev, "failed to set RTC: %d\n", rc); @@ -815,7 +819,7 @@ static int __maybe_unused amd_pmc_suspend_handler(struct device *dev) { struct amd_pmc_dev *pdev = dev_get_drvdata(dev); - if (pdev->cpu_id == AMD_CPU_ID_CZN) { + if (pdev->cpu_id == AMD_CPU_ID_CZN && !disable_workarounds) { int rc = amd_pmc_czn_wa_irq1(pdev); if (rc) {