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Signed-off-by: Nipun Gupta --- .../devicetree/bindings/bus/xlnx,cdx.yaml | 65 +++++++++++++++++++ MAINTAINERS | 6 ++ 2 files changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/xlnx,cdx.yaml diff --git a/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml new file mode 100644 index 000000000000..984ff65b668a --- /dev/null +++ b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/xlnx,cdx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD CDX bus controller + +description: | + CDX bus controller detects CDX devices using CDX firmware and + add those to cdx bus. The CDX bus manages multiple FPGA based + hardware devices, which can support network, crypto or any other + specialized type of devices. These FPGA based devices can be + added/modified dynamically on run-time. + + All devices on the CDX bus will have a unique streamid (for IOMMU) + and a unique device ID (for MSI) corresponding to a requestor ID + (one to one associated with the device). The streamid and deviceid + are used to configure SMMU and GIC-ITS respectively. + + iommu-map property is used to define the set of stream ids + corresponding to each device and the associated IOMMU. + + The MSI writes are accompanied by sideband data (Device ID). + The msi-map property is used to associate the devices with the + device ID as well as the associated ITS controller. + +maintainers: + - Nipun Gupta + - Nikhil Agarwal + +properties: + compatible: + const: xlnx,cdxbus-controller-1.0 + + reg: + maxItems: 1 + + iommu-map: true + + msi-map: true + +required: + - compatible + - reg + - iommu-map + - msi-map + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + cdx: cdx@4000000 { + compatible = "xlnx,cdxbus-controller-1.0"; + reg = <0x00000000 0x04000000 0 0x1000>; + /* define map for RIDs 250-259 */ + iommu-map = <250 &smmu 250 10>; + /* define msi map for RIDs 250-259 */ + msi-map = <250 &its 250 10>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index f5ca4aefd184..5f48f11fe0c3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -935,6 +935,12 @@ S: Supported F: drivers/crypto/ccp/ F: include/linux/ccp.h +AMD CDX BUS DRIVER +M: Nipun Gupta +M: Nikhil Agarwal +S: Maintained +F: Documentation/devicetree/bindings/bus/xlnx,cdx.yaml + AMD CRYPTOGRAPHIC COPROCESSOR (CCP) DRIVER - SEV SUPPORT M: Brijesh Singh M: Tom Lendacky From patchwork Fri Oct 14 04:40:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gupta, Nipun" X-Patchwork-Id: 2497 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3c08:b0:7f:eb39:1b51 with SMTP id e8csp187901dys; Thu, 13 Oct 2022 21:43:52 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4wtD8U5IIYGuj4+sDyYbl/231SW/PprbLnK+r018olNXdOa/aQPFly8YKnlOw1ZZsr4CfL X-Received: by 2002:a17:90b:3890:b0:20a:9ab0:6fa2 with SMTP id mu16-20020a17090b389000b0020a9ab06fa2mr15370387pjb.49.1665722632228; Thu, 13 Oct 2022 21:43:52 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1665722632; cv=pass; d=google.com; s=arc-20160816; b=0itCO10g2eCwA62C7qhx9EVaYF9Rur72pLBLweJiTrKdO+Ayv4rNg+2icbj26xTlmC Sf4Sj88KpwMrR166OxoEM95Ixg5giBqE82nvWBKpVXsYKNlDO5BPbQeG4IFwFKVPBGht JrnZzGOfh4PQwdMjn5Tq+cT50wQDuRvjCDeqVi2SO/fKidMMdf3/JhoT8rehOERkrnKz eAv6YQePIzNgUmflZ8MJMHf5ZGcSI2Ne8umFuemLVO3ERiV/keof4bvzskq9k9LeULwD Dvpofj2EOH/YawitnyT2hTDBDulpEQsZupI/0IxPp6vg14k6mQmvOS4rAxMeCguRxgPl tN0g== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=BXNQooQpT2aawbW/eQJdibgyg56ZOYEfA1A1m9MPyLc=; b=PGuz6Jeuaq5fxKIquBNjT7tkQbzxctgw5oRm89o+frX1l0QbfWATSK0fC76PeooH2C DEX8HvRoVTKn+SuThcGqMgAykewUPNlr5kEIUY+Y0q4hPW1BTrF/i+1N3TK+R6CpsXVp sJsMklDarmMtPMCd/ph2i3Bs+RQQv+yZ55HLbZfmp7yazIjAdBTlGj3L0nWe4e+z3q7k yTBAU+UYjdgKwOnWz1PH1kcReJ1LTgSud74puM5dYruntn8/JZDuV8L6UBVCDQCn1Vi8 8SfyWdFJJrFvM+Ff71er66Pj7uNXtYc9xUo0hkXwdLonVAU4OKBXvzHLM9Ok632vSFpo NWyA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=4sfKckbS; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Oct 2022 04:41:23.1286 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 91349c1e-46cc-423c-f719-08daad9e58d2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6806 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746636774954639503?= X-GMAIL-MSGID: =?utf-8?q?1746636774954639503?= CDX bus supports the scanning and probing of FPGA based devices. These devices are registered as CDX devices. The bus driver sets up the basic infrastructure and triggers the cdx controller to scan the cdx devices once registered. CDX bus uses ops registered by the CDX controller to scan, reset and write MSI message on the CDX devices. Signed-off-by: Nipun Gupta --- MAINTAINERS | 2 + drivers/bus/Kconfig | 1 + drivers/bus/Makefile | 3 + drivers/bus/cdx/Kconfig | 13 ++ drivers/bus/cdx/Makefile | 8 + drivers/bus/cdx/cdx.c | 366 ++++++++++++++++++++++++++++++ drivers/bus/cdx/cdx.h | 66 ++++++ include/linux/cdx/cdx_bus.h | 139 ++++++++++++ include/linux/mod_devicetable.h | 13 ++ scripts/mod/devicetable-offsets.c | 4 + scripts/mod/file2alias.c | 12 + 11 files changed, 627 insertions(+) create mode 100644 drivers/bus/cdx/Kconfig create mode 100644 drivers/bus/cdx/Makefile create mode 100644 drivers/bus/cdx/cdx.c create mode 100644 drivers/bus/cdx/cdx.h create mode 100644 include/linux/cdx/cdx_bus.h diff --git a/MAINTAINERS b/MAINTAINERS index 5f48f11fe0c3..6b7b3c098839 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -940,6 +940,8 @@ M: Nipun Gupta M: Nikhil Agarwal S: Maintained F: Documentation/devicetree/bindings/bus/xlnx,cdx.yaml +F: drivers/bus/cdx/* +F: include/linux/cdx/* AMD CRYPTOGRAPHIC COPROCESSOR (CCP) DRIVER - SEV SUPPORT M: Brijesh Singh diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index 7bfe998f3514..b0324efb9a6a 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -251,5 +251,6 @@ config DA8XX_MSTPRI source "drivers/bus/fsl-mc/Kconfig" source "drivers/bus/mhi/Kconfig" +source "drivers/bus/cdx/Kconfig" endmenu diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile index d90eed189a65..88649111c395 100644 --- a/drivers/bus/Makefile +++ b/drivers/bus/Makefile @@ -20,6 +20,9 @@ obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o +#CDX bus +obj-$(CONFIG_CDX_BUS) += cdx/ + # Interconnect bus driver for OMAP SoCs. obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o diff --git a/drivers/bus/cdx/Kconfig b/drivers/bus/cdx/Kconfig new file mode 100644 index 000000000000..98ec05ad708d --- /dev/null +++ b/drivers/bus/cdx/Kconfig @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# CDX bus configuration +# +# Copyright (C) 2022, Advanced Micro Devices, Inc. +# + +config CDX_BUS + bool "CDX Bus driver" + help + Driver to enable CDX Bus infrastructure. CDX bus uses + CDX controller and firmware to scan the FPGA based + devices. diff --git a/drivers/bus/cdx/Makefile b/drivers/bus/cdx/Makefile new file mode 100644 index 000000000000..2e8f42611dfc --- /dev/null +++ b/drivers/bus/cdx/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for CDX +# +# Copyright (C) 2022, Advanced Micro Devices, Inc. +# + +obj-$(CONFIG_CDX_BUS) += cdx.o diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c new file mode 100644 index 000000000000..5a366f4ae69c --- /dev/null +++ b/drivers/bus/cdx/cdx.c @@ -0,0 +1,366 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CDX bus driver. + * + * Copyright (C) 2022, Advanced Micro Devices, Inc. + */ + +/* + * Architecture Overview + * ===================== + * CDX is a Hardware Architecture designed for AMD FPGA devices. It + * consists of sophisticated mechanism for interaction between FPGA, + * Firmware and the APUs (Application CPUs). + * + * Firmware resides on RPU (Realtime CPUs) which interacts with + * the FPGA program manager and the APUs. The RPU provides memory-mapped + * interface (RPU if) which is used to communicate with APUs. + * + * The diagram below shows an overview of the CDX architecture: + * + * +--------------------------------------+ + * | Application CPUs (APU) | + * | | + * | CDX device drivers| + * | Linux OS | | + * | CDX bus | + * | | | + * | CDX controller | + * | | | + * +-----------------------------|--------+ + * | (discover, config, + * | reset, rescan) + * | + * +------------------------| RPU if |----+ + * | | | + * | V | + * | Realtime CPUs (RPU) | + * | | + * +--------------------------------------+ + * | + * +---------------------|----------------+ + * | FPGA | | + * | +-----------------------+ | + * | | | | | + * | +-------+ +-------+ +-------+ | + * | | dev 1 | | dev 2 | | dev 3 | | + * | +-------+ +-------+ +-------+ | + * +--------------------------------------+ + * + * The RPU firmware extracts the device information from the loaded FPGA + * image and implements a mechanism that allows the APU drivers to + * enumerate such devices (device personality and resource details) via + * a dedicated communication channel. RPU mediates operations such as + * discover, reset and rescan of the FPGA devices for the APU. This is + * done using memory mapped interface provided by the RPU to APU. + */ + +#include +#include +#include +#include + +#include "cdx.h" + +/* + * Default DMA mask for devices on a CDX bus + */ +#define CDX_DEFAULT_DMA_MASK (~0ULL) + +static struct cdx_controller_t *cdx_controller; + +static int reset_cdx_device(struct device *dev, void * __always_unused data) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + struct cdx_controller_t *cdx = cdx_dev->cdx; + int ret; + + ret = cdx->ops.reset_dev(cdx, cdx_dev->bus_num, cdx_dev->dev_num); + if (ret) + dev_err(dev, "cdx device reset failed\n"); + + return ret; +} + +int cdx_dev_reset(struct device *dev) +{ + return reset_cdx_device(dev, NULL); +} +EXPORT_SYMBOL_GPL(cdx_dev_reset); + +static int cdx_unregister_device(struct device *dev, + void * __always_unused data) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + + kfree(cdx_dev->driver_override); + cdx_dev->driver_override = NULL; + + /* + * Do not free cdx_dev here as it would be freed in + * cdx_device_release() called from within put_device(). + */ + device_del(&cdx_dev->dev); + put_device(&cdx_dev->dev); + + return 0; +} + +/** + * cdx_match_one_device - Tell if a CDX device structure has a matching + * CDX device id structure + * @id: single CDX device id structure to match + * @dev: the CDX device structure to match against + * + * Returns the matching cdx_device_id structure or NULL if there is no match. + */ +static inline const struct cdx_device_id * +cdx_match_one_device(const struct cdx_device_id *id, + const struct cdx_device *dev) +{ + /* Use vendor ID and device ID for matching */ + if ((id->vendor == dev->vendor) && (id->device == dev->device)) + return id; + return NULL; +} + +/** + * cdx_match_id - See if a CDX device matches a given cdx_id table + * @ids: array of CDX device ID structures to search in + * @dev: the CDX device structure to match against. + * + * Used by a driver to check whether a CDX device is in its list of + * supported devices. Returns the matching cdx_device_id structure or + * NULL if there is no match. + */ +static inline const struct cdx_device_id * +cdx_match_id(const struct cdx_device_id *ids, struct cdx_device *dev) +{ + if (ids) { + while (ids->vendor || ids->device) { + if (cdx_match_one_device(ids, dev)) + return ids; + ids++; + } + } + return NULL; +} + +/** + * cdx_bus_match - device to driver matching callback + * @dev: the cdx device to match against + * @drv: the device driver to search for matching cdx device + * structures + * + * Returns 1 on success, 0 otherwise. + */ +static int cdx_bus_match(struct device *dev, struct device_driver *drv) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + struct cdx_driver *cdx_drv = to_cdx_driver(drv); + const struct cdx_device_id *found_id; + + /* When driver_override is set, only bind to the matching driver */ + if (cdx_dev->driver_override) + return !strcmp(cdx_dev->driver_override, cdx_drv->driver.name); + + found_id = cdx_match_id(cdx_drv->match_id_table, cdx_dev); + if (found_id) + return true; + + return false; +} + +static void cdx_remove(struct device *dev) +{ + struct cdx_driver *cdx_drv = to_cdx_driver(dev->driver); + struct cdx_device *cdx_dev = to_cdx_device(dev); + + if (cdx_drv->remove) + cdx_drv->remove(cdx_dev); +} + +struct bus_type cdx_bus_type = { + .name = "cdx", + .match = cdx_bus_match, + .remove = cdx_remove, +}; +EXPORT_SYMBOL_GPL(cdx_bus_type); + +static int cdx_driver_probe(struct device *dev) +{ + struct cdx_driver *cdx_drv = to_cdx_driver(dev->driver); + struct cdx_device *cdx_dev = to_cdx_device(dev); + int error; + + error = cdx_drv->probe(cdx_dev); + if (error < 0) { + if (error != -EPROBE_DEFER) + dev_err(dev, "%s failed: %d\n", __func__, error); + return error; + } + + return 0; +} + +static int cdx_driver_remove(struct device *dev) +{ + struct cdx_driver *cdx_drv = to_cdx_driver(dev->driver); + struct cdx_device *cdx_dev = to_cdx_device(dev); + int ret; + + if (cdx_drv->remove) { + ret = cdx_drv->remove(cdx_dev); + if (ret < 0) { + dev_err(dev, "%s failed: %d\n", __func__, ret); + return ret; + } + } + + return 0; +} + +static void cdx_driver_shutdown(struct device *dev) +{ + struct cdx_driver *cdx_drv = to_cdx_driver(dev->driver); + struct cdx_device *cdx_dev = to_cdx_device(dev); + + cdx_drv->shutdown(cdx_dev); +} + +int __cdx_driver_register(struct cdx_driver *cdx_driver, + struct module *owner) +{ + int error; + + cdx_driver->driver.owner = owner; + cdx_driver->driver.bus = &cdx_bus_type; + + if (cdx_driver->probe) + cdx_driver->driver.probe = cdx_driver_probe; + + if (cdx_driver->remove) + cdx_driver->driver.remove = cdx_driver_remove; + + if (cdx_driver->shutdown) + cdx_driver->driver.shutdown = cdx_driver_shutdown; + + error = driver_register(&cdx_driver->driver); + if (error < 0) { + pr_err("driver_register() failed for %s: %d\n", + cdx_driver->driver.name, error); + return error; + } + + return 0; +} +EXPORT_SYMBOL_GPL(__cdx_driver_register); + +void cdx_driver_unregister(struct cdx_driver *cdx_driver) +{ + driver_unregister(&cdx_driver->driver); +} +EXPORT_SYMBOL_GPL(cdx_driver_unregister); + +static void cdx_device_release(struct device *dev) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + + kfree(cdx_dev); +} + +int cdx_device_add(struct cdx_dev_params_t *dev_params) +{ + struct cdx_controller_t *cdx = dev_params->cdx; + struct device *parent = cdx->dev; + struct cdx_device *cdx_dev; + int ret; + + cdx_dev = kzalloc(sizeof(*cdx_dev), GFP_KERNEL); + if (!cdx_dev) { + dev_err(parent, + "memory allocation for cdx dev failed\n"); + return -ENOMEM; + } + + /* Populate resource */ + memcpy(cdx_dev->res, dev_params->res, sizeof(struct resource) * + dev_params->res_count); + cdx_dev->res_count = dev_params->res_count; + + /* Populate CDX dev params */ + cdx_dev->req_id = dev_params->req_id; + cdx_dev->vendor = dev_params->vendor; + cdx_dev->device = dev_params->device; + cdx_dev->bus_num = dev_params->bus_num; + cdx_dev->dev_num = dev_params->dev_num; + cdx_dev->cdx = dev_params->cdx; + cdx_dev->dma_mask = CDX_DEFAULT_DMA_MASK; + + /* Initiaize generic device */ + device_initialize(&cdx_dev->dev); + cdx_dev->dev.parent = parent; + cdx_dev->dev.bus = &cdx_bus_type; + cdx_dev->dev.dma_mask = &cdx_dev->dma_mask; + cdx_dev->dev.release = cdx_device_release; + + /* Set Name */ + dev_set_name(&cdx_dev->dev, "cdx-%02x:%02x", cdx_dev->bus_num, + cdx_dev->dev_num); + + ret = device_add(&cdx_dev->dev); + if (ret != 0) { + dev_err(&cdx_dev->dev, + "cdx device add failed: %d", ret); + goto fail; + } + + /* Reset the device before use */ + ret = cdx->ops.reset_dev(cdx, cdx_dev->bus_num, cdx_dev->dev_num); + if (ret) { + dev_err(&cdx_dev->dev, "cdx device reset failed\n"); + goto fail; + } + + return 0; + +fail: + /* + * Do not free cdx_dev here as it would be freed in + * cdx_device_release() called from put_device(). + */ + put_device(&cdx_dev->dev); + + return ret; +} +EXPORT_SYMBOL_GPL(cdx_device_add); + +int cdx_register_controller(struct cdx_controller_t *cdx) +{ + int ret; + + /* Scan all the devices */ + ret = cdx->ops.scan(cdx); + if (ret) { + dev_err(cdx->dev, "CDX scanning failed: %d\n", ret); + return ret; + } + + cdx_controller = cdx; + + return 0; +} +EXPORT_SYMBOL_GPL(cdx_register_controller); + +void cdx_unregister_controller(struct cdx_controller_t *cdx) +{ + device_for_each_child(cdx->dev, NULL, cdx_unregister_device); + cdx_controller = NULL; +} +EXPORT_SYMBOL_GPL(cdx_unregister_controller); + +static int __init cdx_bus_init(void) +{ + return bus_register(&cdx_bus_type); +} +postcore_initcall(cdx_bus_init); diff --git a/drivers/bus/cdx/cdx.h b/drivers/bus/cdx/cdx.h new file mode 100644 index 000000000000..80496865ae9c --- /dev/null +++ b/drivers/bus/cdx/cdx.h @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Header file for the CDX Bus + * + * Copyright (C) 2022, Advanced Micro Devices, Inc. + */ + +#ifndef _CDX_H_ +#define _CDX_H_ + +#include + +/** + * struct cdx_dev_params_t - CDX device parameters + * @cdx: CDX controller assocated with the device + * @parent: Associated CDX controller + * @vendor: Vendor ID for CDX device + * @device: Device ID for CDX device + * @subsys_vendor: Sub vendor ID for CDX device + * @subsys_device: Sub device ID for CDX device + * @bus_num: Bus number for this CDX device + * @dev_num: Device number for this device + * @res: array of MMIO region entries + * @res_count: number of valid MMIO regions + * @req_id: Requestor ID associated with CDX device + */ +struct cdx_dev_params_t { + struct cdx_controller_t *cdx; + u16 vendor; + u16 device; + u16 subsys_vendor; + u16 subsys_device; + u8 bus_num; + u8 dev_num; + struct resource res[MAX_CDX_DEV_RESOURCES]; + u8 res_count; + u32 req_id; +}; + +/** + * cdx_register_controller - Register a CDX controller and its ports + * on the CDX bus. + * @cdx: The CDX controller to register + * + * Returns -errno on failure, 0 on success. + */ +int cdx_register_controller(struct cdx_controller_t *cdx); + +/** + * cdx_unregister_controller - Unregister a CDX controller + * @cdx: The CDX controller to unregister + */ +void cdx_unregister_controller(struct cdx_controller_t *cdx); + +/** + * cdx_device_add - Add a CDX device. This function adds a CDX device + * on the CDX bus as per the device paramteres provided + * by caller. It also creates and registers an associated + * Linux generic device. + * @dev_params: device parameters associated with the device to be created. + * + * Returns -errno on failure, 0 on success. + */ +int cdx_device_add(struct cdx_dev_params_t *dev_params); + +#endif /* _CDX_H_ */ diff --git a/include/linux/cdx/cdx_bus.h b/include/linux/cdx/cdx_bus.h new file mode 100644 index 000000000000..9e6872a03215 --- /dev/null +++ b/include/linux/cdx/cdx_bus.h @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CDX bus public interface + * + * Copyright (C) 2022, Advanced Micro Devices, Inc. + * + */ +#ifndef _CDX_BUS_H_ +#define _CDX_BUS_H_ + +#include +#include + +#define MAX_CDX_DEV_RESOURCES 4 + +/* Forward declaration for CDX controller */ +struct cdx_controller_t; + +typedef int (*cdx_scan_t)(struct cdx_controller_t *cdx); + +typedef int (*cdx_dev_reset_t)(struct cdx_controller_t *cdx, + uint8_t bus_num, uint8_t dev_num); + +/** + * Callbacks supported by CDX controller. + * @scan: scan the devices on the controller + * @reset_dev: reset a CDX device + */ +struct cdx_ops_t { + cdx_scan_t scan; + cdx_dev_reset_t reset_dev; +}; + +/** + * struct cdx_controller: CDX controller object + * @dev: Linux device associated with the CDX controller. + * @priv: private data + * @ops: CDX controller ops + */ +struct cdx_controller_t { + struct device *dev; + void *priv; + + struct cdx_ops_t ops; +}; + +/** + * struct cdx_device - CDX device object + * @dev: Linux driver model device object + * @cdx: CDX controller assocated with the device + * @vendor: Vendor ID for CDX device + * @device: Device ID for CDX device + * @bus_num: Bus number for this CDX device + * @dev_num: Device number for this device + * @res: array of MMIO region entries + * @res_count: number of valid MMIO regions + * @dma_mask: Default DMA mask + * @flags: CDX device flags + * @req_id: Requestor ID associated with CDX device + * @driver_override: driver name to force a match; do not set directly, + * because core frees it; use driver_set_override() to + * set or clear it. + */ +struct cdx_device { + struct device dev; + struct cdx_controller_t *cdx; + u16 vendor; + u16 device; + u8 bus_num; + u8 dev_num; + struct resource res[MAX_CDX_DEV_RESOURCES]; + u8 res_count; + u64 dma_mask; + u16 flags; + u32 req_id; + const char *driver_override; +}; + +#define to_cdx_device(_dev) \ + container_of(_dev, struct cdx_device, dev) + +/** + * struct cdx_driver - CDX device driver + * @driver: Generic device driver + * @match_id_table: table of supported device matching Ids + * @probe: Function called when a device is added + * @remove: Function called when a device is removed + * @shutdown: Function called at shutdown time to quiesce the device + * @suspend: Function called when a device is stopped + * @resume: Function called when a device is resumed + * @driver_managed_dma: Device driver doesn't use kernel DMA API for DMA. + * For most device drivers, no need to care about this flag + * as long as all DMAs are handled through the kernel DMA API. + * For some special ones, for example VFIO drivers, they know + * how to manage the DMA themselves and set this flag so that + * the IOMMU layer will allow them to setup and manage their + * own I/O address space. + */ +struct cdx_driver { + struct device_driver driver; + const struct cdx_device_id *match_id_table; + int (*probe)(struct cdx_device *dev); + int (*remove)(struct cdx_device *dev); + void (*shutdown)(struct cdx_device *dev); + int (*suspend)(struct cdx_device *dev, pm_message_t state); + int (*resume)(struct cdx_device *dev); + bool driver_managed_dma; +}; + +#define to_cdx_driver(_drv) \ + container_of(_drv, struct cdx_driver, driver) + +/* Macro to avoid include chaining to get THIS_MODULE */ +#define cdx_driver_register(drv) \ + __cdx_driver_register(drv, THIS_MODULE) + +/** + * __cdx_driver_register - registers a CDX device driver + */ +int __must_check __cdx_driver_register(struct cdx_driver *cdx_driver, + struct module *owner); + +/** + * cdx_driver_unregister - unregisters a device driver from the + * CDX bus. + */ +void cdx_driver_unregister(struct cdx_driver *driver); + +extern struct bus_type cdx_bus_type; + +/** + * cdx_dev_reset - Reset CDX device + * @dev: device pointer + * + * Return 0 for success, -errno on failure + */ +int cdx_dev_reset(struct device *dev); + +#endif /* _CDX_BUS_H_ */ diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h index 549590e9c644..9b94be83d53e 100644 --- a/include/linux/mod_devicetable.h +++ b/include/linux/mod_devicetable.h @@ -911,4 +911,17 @@ struct ishtp_device_id { kernel_ulong_t driver_data; }; +/** + * struct cdx_device_id - CDX device identifier + * @vendor: vendor ID + * @device: Device ID + * + * Type of entries in the "device Id" table for CDX devices supported by + * a CDX device driver. + */ +struct cdx_device_id { + __u16 vendor; + __u16 device; +}; + #endif /* LINUX_MOD_DEVICETABLE_H */ diff --git a/scripts/mod/devicetable-offsets.c b/scripts/mod/devicetable-offsets.c index c0d3bcb99138..62dc988df84d 100644 --- a/scripts/mod/devicetable-offsets.c +++ b/scripts/mod/devicetable-offsets.c @@ -262,5 +262,9 @@ int main(void) DEVID(ishtp_device_id); DEVID_FIELD(ishtp_device_id, guid); + DEVID(cdx_device_id); + DEVID_FIELD(cdx_device_id, vendor); + DEVID_FIELD(cdx_device_id, device); + return 0; } diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c index 80d973144fde..c36e1f624e39 100644 --- a/scripts/mod/file2alias.c +++ b/scripts/mod/file2alias.c @@ -1452,6 +1452,17 @@ static int do_dfl_entry(const char *filename, void *symval, char *alias) return 1; } +/* Looks like: cdx:vNdN */ +static int do_cdx_entry(const char *filename, void *symval, + char *alias) +{ + DEF_FIELD(symval, cdx_device_id, vendor); + DEF_FIELD(symval, cdx_device_id, device); + + sprintf(alias, "cdx:v%08Xd%08Xd", vendor, device); + return 1; +} + /* Does namelen bytes of name exactly match the symbol? */ static bool sym_is(const char *name, unsigned namelen, const char *symbol) { @@ -1531,6 +1542,7 @@ static const struct devtable devtable[] = { {"ssam", SIZE_ssam_device_id, do_ssam_entry}, {"dfl", SIZE_dfl_device_id, do_dfl_entry}, {"ishtp", SIZE_ishtp_device_id, do_ishtp_entry}, + {"cdx", SIZE_cdx_device_id, do_cdx_entry}, }; /* Create MODULE_ALIAS() statements. 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Signed-off-by: Nipun Gupta --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index d32b02336411..8ec9f2baf12d 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -29,6 +29,7 @@ #include #include +#include #include "arm-smmu-v3.h" #include "../../iommu-sva-lib.h" @@ -3690,16 +3691,27 @@ static int arm_smmu_set_bus_ops(struct iommu_ops *ops) if (err) goto err_reset_pci_ops; } +#endif +#ifdef CONFIG_CDX_BUS + if (cdx_bus_type.iommu_ops != ops) { + err = bus_set_iommu(&cdx_bus_type, ops); + if (err) + goto err_reset_amba_ops; + } #endif if (platform_bus_type.iommu_ops != ops) { err = bus_set_iommu(&platform_bus_type, ops); if (err) - goto err_reset_amba_ops; + goto err_reset_cdx_ops; } return 0; -err_reset_amba_ops: +err_reset_cdx_ops: +#ifdef CONFIG_CDX_BUS + bus_set_iommu(&cdx_bus_type, NULL); +#endif +err_reset_amba_ops: __maybe_unused; #ifdef CONFIG_ARM_AMBA bus_set_iommu(&amba_bustype, NULL); #endif From patchwork Fri Oct 14 04:40:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gupta, Nipun" X-Patchwork-Id: 2502 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3c08:b0:7f:eb39:1b51 with SMTP id e8csp188589dys; Thu, 13 Oct 2022 21:45:35 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7HYf/7F7V0UyZR1V1tpFiWFxAPNBypBz7SBPuKYIUcpPOvavYJd78pku87aWWTcZxwDTNC X-Received: by 2002:a17:90a:e7cd:b0:20a:c658:c185 with SMTP id kb13-20020a17090ae7cd00b0020ac658c185mr3727970pjb.114.1665722735110; Thu, 13 Oct 2022 21:45:35 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1665722735; cv=pass; d=google.com; s=arc-20160816; b=NVrSvgOoJo6QHte1Uq3uAWgXagJM6Daq3f3jEkqgyJtY0aJU4cwfrCdyw00t0Qjsv8 BIcwjR6hiViYKZA1nmOKCWlELadlmwlrsOQJSzZaFx9zbRh8h0Lu/DwuRzhjV5kSnE0v G8Yb1IhdSoeuv0YueUi7M9WWv1UH4P2wmyZdArxq5C+NiNxFQtec/EGSxNty7y7UOGb1 YtAIEDQtsXvlVlbQ1aE0Ab4ROfKE/qNSSFKwx8Kw3SL/0wfbujjjAEBTtwTA07EvGUz4 syFHfR7SVotkoC3O4QXvsnoVwAEm0LlbjFa40NBkUqHoclCGf57K1qgU9T43Te3WhvAx xJcA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=SmYVvxz0wvs3BZvU0oP9HJ5OMvAW2v1a3YmJJAd9fu8=; b=WF4j/zNRlx84u9n41sHSvsF1NZv7oDZj7AEfwdUcGWQv7tyH+U29lm7tI4xzMB0aNx tRqzTupEggW5ezxbSgKBkT9eWAJJby1sK9wxUlCh95/FXaPjOCXlBEizP2VV7thOXg7+ +GUTF9ayv5sQq1loL/bA52XK+nJ8oxWacPwTf6TkIVszNJPPWtT/vbHfvvi22BCdET82 PGH8an4jdWigUtk2ojVz4Peonaczgb8n3yFsQTtaANdZq9fgD9LJu9z1o2nSr0rIb4u7 /wr/EW8V91W6OBSBmfsBGPlzRto/RGNqzva5qZ5av1lW61/JCTfOF1HQJqpnC9ChiGQg BYmg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b="is/Uei8G"; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Oct 2022 04:42:05.5974 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 21e58fa5-a159-46ab-2efb-08daad9e7223 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5959 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746636882684113702?= X-GMAIL-MSGID: =?utf-8?q?1746636882684113702?= With CDX bus supported in SMMU, devices on CDX bus can be configured to support DMA configuration. This change adds the dma configure callback for CDX bus. Signed-off-by: Nipun Gupta --- drivers/bus/cdx/cdx.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c index 5a366f4ae69c..b2a7e0b34df8 100644 --- a/drivers/bus/cdx/cdx.c +++ b/drivers/bus/cdx/cdx.c @@ -57,6 +57,7 @@ #include #include +#include #include #include @@ -180,10 +181,26 @@ static void cdx_remove(struct device *dev) cdx_drv->remove(cdx_dev); } +static int cdx_dma_configure(struct device *dev) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + u32 input_id = cdx_dev->req_id; + int ret; + + ret = of_dma_configure_id(dev, dev->parent->of_node, 0, &input_id); + if (ret) { + dev_err(dev, "of_dma_configure_id() failed\n"); + return ret; + } + + return 0; +} + struct bus_type cdx_bus_type = { .name = "cdx", .match = cdx_bus_match, .remove = cdx_remove, + .dma_configure = cdx_dma_configure, }; EXPORT_SYMBOL_GPL(cdx_bus_type); From patchwork Fri Oct 14 04:40:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gupta, Nipun" X-Patchwork-Id: 2499 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3c08:b0:7f:eb39:1b51 with SMTP id e8csp188190dys; Thu, 13 Oct 2022 21:44:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4f4bRocn/Bkl2b9Gui5feN7sy+UHI0skSPY/AGCN6VJW/2s5wCPKM5ZCfBc4jW/mBAMDpS X-Received: by 2002:a17:903:110f:b0:178:ae31:ab2 with SMTP id n15-20020a170903110f00b00178ae310ab2mr3271453plh.89.1665722672315; Thu, 13 Oct 2022 21:44:32 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1665722672; cv=pass; d=google.com; s=arc-20160816; b=T8+MUhVSFraMoquLkV6TZtrMqakLhcaP7Qwi2Oz9pIifg6cu31p3yZpPX0YDNMuJPc Mo3kvKrg/q1SfAa28bMThXOX4Zr+lfrdj1HLFlVDndl2X+a0JQ+fB3z0U5IcUSHwktqQ 9tMvIXZilbHTlogxE/2LTCec/K9H1WWTWEk4CU4Esm3bhXop9aM9D7UWmZGMCZA8oxZz zCvE2jFdO0n5+64TouVSdTCHG0DlwCZ4JqAvIFeycNstEOUc2wenZcCwoYmIk1jhMqLD DVm+TQ4qeQfEnWEqSk3V+DDEteoRwczc5B+USJ78o9Pe5wlRUT99Bip2GlYqKGH8C02B G7MQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+K9ehIjOh8KhbrUhtSnOdU7U6y8AO5hjycEQmg07qXo=; b=GLVjJzvndwBUi5ZjlSC/xd3gdac4Rqh0j1Ntd7JAM1DVdzkyvnQNpIRUyQ81d6+8d1 ozFbrQWMYeq3Sa8ZPxo+jqv4FaZg5R3daWtPC4mrHN3jVSQsE2gmS1ydLkXZyN45CjCt By5gzaQHZ1juioUmGrlgULoyuwjfszKxpgS/+E1i+yLF4vmNDju9vx0cXXn2xbKPPn2Y /08/q+GAD0ywE+eCghfy+KMG/TvtDUrX7/svqkr/vHP+Nf4EGlEDHdpnAJwq+7Gy6agB NkB1UjqNmbuWLWU5J8o2vBCZdGmls3CqWGVhkCFFvnaTSqAjRnyLnPletJk5fM2x6mw6 OJQQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=EGqBfyUi; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Oct 2022 04:42:04.7692 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bec3c482-4fa4-48ae-d27d-08daad9e71a4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5102 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746636816841061684?= X-GMAIL-MSGID: =?utf-8?q?1746636816841061684?= This change adds te support for rescanning and reset of the CDX buses, as well as option to reset any device on the bus. It also enables sysfs entry for vendor id and device id. Sysfs entries are provided in CDX controller: - rescan of the CDX controller. - reset all the devices present on CDX buses. Sysfs entry is provided in each of the platform device detected by the CDX controller - vendor id - device id - modalias - reset of the device. Signed-off-by: Puneet Gupta Signed-off-by: Nipun Gupta --- drivers/bus/cdx/cdx.c | 158 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 158 insertions(+) diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c index b2a7e0b34df8..41c61bf6d5f0 100644 --- a/drivers/bus/cdx/cdx.c +++ b/drivers/bus/cdx/cdx.c @@ -107,6 +107,12 @@ static int cdx_unregister_device(struct device *dev, return 0; } +static void cdx_unregister_devices(struct bus_type *bus) +{ + /* Reset all the devices attached to cdx bus */ + bus_for_each_dev(bus, NULL, NULL, cdx_unregister_device); +} + /** * cdx_match_one_device - Tell if a CDX device structure has a matching * CDX device id structure @@ -196,11 +202,163 @@ static int cdx_dma_configure(struct device *dev) return 0; } +static ssize_t vendor_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + + return sprintf(buf, "0x%x\n", cdx_dev->vendor); +} +static DEVICE_ATTR_RO(vendor); + +static ssize_t device_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + + return sprintf(buf, "0x%x\n", cdx_dev->device); +} +static DEVICE_ATTR_RO(device); + +static ssize_t reset_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret = 0; + bool reset = count > 0 && *buf != '0'; + + if (!reset) + return count; + + ret = reset_cdx_device(dev, NULL); + if (ret) + return ret; + + return count; +} +static DEVICE_ATTR_WO(reset); + +static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + + return sprintf(buf, "cdx:v%08Xd%d\n", cdx_dev->vendor, + cdx_dev->device); +} +static DEVICE_ATTR_RO(modalias); + +static ssize_t driver_override_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + const char *old = cdx_dev->driver_override; + char *driver_override; + char *cp; + + if (WARN_ON(dev->bus != &cdx_bus_type)) + return -EINVAL; + + if (count >= (PAGE_SIZE - 1)) + return -EINVAL; + + driver_override = kstrndup(buf, count, GFP_KERNEL); + if (!driver_override) + return -ENOMEM; + + cp = strchr(driver_override, '\n'); + if (cp) + *cp = '\0'; + + if (strlen(driver_override)) { + cdx_dev->driver_override = driver_override; + } else { + kfree(driver_override); + cdx_dev->driver_override = NULL; + } + + kfree(old); + + return count; +} + +static ssize_t driver_override_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + + return snprintf(buf, PAGE_SIZE, "%s\n", cdx_dev->driver_override); +} +static DEVICE_ATTR_RW(driver_override); + +static struct attribute *cdx_dev_attrs[] = { + &dev_attr_reset.attr, + &dev_attr_vendor.attr, + &dev_attr_device.attr, + &dev_attr_modalias.attr, + &dev_attr_driver_override.attr, + NULL, +}; +ATTRIBUTE_GROUPS(cdx_dev); + +static ssize_t rescan_store(struct bus_type *bus, + const char *buf, size_t count) +{ + bool rescan = count > 0 && *buf != '0'; + int ret = 0; + + if (!rescan) + return count; + + if (!cdx_controller) + return -EINVAL; + + /* Unregister all the devices on the bus */ + cdx_unregister_devices(&cdx_bus_type); + + /* Rescan all the devices */ + ret = cdx_controller->ops.scan(cdx_controller); + if (ret) + return ret; + + return count; +} +static BUS_ATTR_WO(rescan); + +static ssize_t reset_all_store(struct bus_type *bus, + const char *buf, size_t count) +{ + bool reset = count > 0 && *buf != '0'; + int ret = 0; + + if (!reset) + return count; + + /* Reset all the devices attached to cdx bus */ + ret = bus_for_each_dev(bus, NULL, NULL, reset_cdx_device); + if (ret) { + pr_err("error in CDX bus reset\n"); + return 0; + } + + return count; +} +static BUS_ATTR_WO(reset_all); + +static struct attribute *cdx_bus_attrs[] = { + &bus_attr_rescan.attr, + &bus_attr_reset_all.attr, + NULL, +}; +ATTRIBUTE_GROUPS(cdx_bus); + struct bus_type cdx_bus_type = { .name = "cdx", .match = cdx_bus_match, .remove = cdx_remove, .dma_configure = cdx_dma_configure, + .dev_groups = cdx_dev_groups, + .bus_groups = cdx_bus_groups, }; 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Thu, 13 Oct 2022 23:42:42 -0500 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB08.amd.com (10.181.40.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Thu, 13 Oct 2022 21:42:08 -0700 Received: from xhdipdslab49.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Thu, 13 Oct 2022 23:42:00 -0500 From: Nipun Gupta To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Nipun Gupta Subject: [RFC PATCH v4 6/8] irq/msi: use implicit msi domain for alloc and free Date: Fri, 14 Oct 2022 10:10:47 +0530 Message-ID: <20221014044049.2557085-7-nipun.gupta@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221014044049.2557085-1-nipun.gupta@amd.com> References: <20220803122655.100254-1-nipun.gupta@amd.com> <20221014044049.2557085-1-nipun.gupta@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT045:EE_|CH0PR12MB5251:EE_ X-MS-Office365-Filtering-Correlation-Id: 15c68f82-7917-45dc-3a4b-08daad9e9dcc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Oct 2022 04:43:18.8628 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 15c68f82-7917-45dc-3a4b-08daad9e9dcc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT045.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5251 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746636868067938729?= X-GMAIL-MSGID: =?utf-8?q?1746636868067938729?= The domain can be extracted out of the device rather than passing it explicitly in the msi domain alloc and free APIs. So this change removes taking irq domain input parameter for these APIs Signed-off-by: Nipun Gupta --- drivers/base/platform-msi.c | 4 ++-- drivers/bus/fsl-mc/fsl-mc-msi.c | 4 ++-- drivers/pci/msi/irqdomain.c | 4 ++-- drivers/soc/ti/ti_sci_inta_msi.c | 2 +- include/linux/msi.h | 10 ++++------ kernel/irq/msi.c | 21 +++++++++------------ 6 files changed, 20 insertions(+), 25 deletions(-) diff --git a/drivers/base/platform-msi.c b/drivers/base/platform-msi.c index 296ea673d661..62664a207230 100644 --- a/drivers/base/platform-msi.c +++ b/drivers/base/platform-msi.c @@ -212,7 +212,7 @@ int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec, if (err) return err; - err = msi_domain_alloc_irqs(dev->msi.domain, dev, nvec); + err = msi_domain_alloc_irqs(dev, nvec); if (err) platform_msi_free_priv_data(dev); @@ -226,7 +226,7 @@ EXPORT_SYMBOL_GPL(platform_msi_domain_alloc_irqs); */ void platform_msi_domain_free_irqs(struct device *dev) { - msi_domain_free_irqs(dev->msi.domain, dev); + msi_domain_free_irqs(dev); platform_msi_free_priv_data(dev); } EXPORT_SYMBOL_GPL(platform_msi_domain_free_irqs); diff --git a/drivers/bus/fsl-mc/fsl-mc-msi.c b/drivers/bus/fsl-mc/fsl-mc-msi.c index 0cfe859a4ac4..0522e80a34ac 100644 --- a/drivers/bus/fsl-mc/fsl-mc-msi.c +++ b/drivers/bus/fsl-mc/fsl-mc-msi.c @@ -235,7 +235,7 @@ int fsl_mc_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count) * NOTE: Calling this function will trigger the invocation of the * its_fsl_mc_msi_prepare() callback */ - error = msi_domain_alloc_irqs(msi_domain, dev, irq_count); + error = msi_domain_alloc_irqs(dev, irq_count); if (error) dev_err(dev, "Failed to allocate IRQs\n"); @@ -250,5 +250,5 @@ void fsl_mc_msi_domain_free_irqs(struct device *dev) if (!msi_domain) return; - msi_domain_free_irqs(msi_domain, dev); + msi_domain_free_irqs(dev); } diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c index e9cf318e6670..00ac782afd1d 100644 --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -14,7 +14,7 @@ int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) domain = dev_get_msi_domain(&dev->dev); if (domain && irq_domain_is_hierarchy(domain)) - return msi_domain_alloc_irqs_descs_locked(domain, &dev->dev, nvec); + return msi_domain_alloc_irqs_descs_locked(&dev->dev, nvec); return pci_msi_legacy_setup_msi_irqs(dev, nvec, type); } @@ -25,7 +25,7 @@ void pci_msi_teardown_msi_irqs(struct pci_dev *dev) domain = dev_get_msi_domain(&dev->dev); if (domain && irq_domain_is_hierarchy(domain)) - msi_domain_free_irqs_descs_locked(domain, &dev->dev); + msi_domain_free_irqs_descs_locked(&dev->dev); else pci_msi_legacy_teardown_msi_irqs(dev); msi_free_msi_descs(&dev->dev); diff --git a/drivers/soc/ti/ti_sci_inta_msi.c b/drivers/soc/ti/ti_sci_inta_msi.c index 991c78b34745..ae10b88d1ff0 100644 --- a/drivers/soc/ti/ti_sci_inta_msi.c +++ b/drivers/soc/ti/ti_sci_inta_msi.c @@ -114,7 +114,7 @@ int ti_sci_inta_msi_domain_alloc_irqs(struct device *dev, goto unlock; } - ret = msi_domain_alloc_irqs_descs_locked(msi_domain, dev, nvec); + ret = msi_domain_alloc_irqs_descs_locked(dev, nvec); if (ret) dev_err(dev, "Failed to allocate IRQs %d\n", ret); unlock: diff --git a/include/linux/msi.h b/include/linux/msi.h index fc918a658d48..76f997bdcb52 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -428,13 +428,11 @@ struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode, struct irq_domain *parent); int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); -int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, - int nvec); -int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, - int nvec); +int msi_domain_alloc_irqs_descs_locked(struct device *dev, int nvec); +int msi_domain_alloc_irqs(struct device *dev, int nvec); void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); -void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev); -void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); +void msi_domain_free_irqs_descs_locked(struct device *dev); +void msi_domain_free_irqs(struct device *dev); struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain); struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode, diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c index a9ee535293eb..14983c82a9e3 100644 --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -925,7 +925,6 @@ static int msi_domain_add_simple_msi_descs(struct msi_domain_info *info, /** * msi_domain_alloc_irqs_descs_locked - Allocate interrupts from a MSI interrupt domain - * @domain: The domain to allocate from * @dev: Pointer to device struct of the device for which the interrupts * are allocated * @nvec: The number of interrupts to allocate @@ -936,9 +935,9 @@ static int msi_domain_add_simple_msi_descs(struct msi_domain_info *info, * * Return: %0 on success or an error code. */ -int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, - int nvec) +int msi_domain_alloc_irqs_descs_locked(struct device *dev, int nvec) { + struct irq_domain *domain = dev_get_msi_domain(dev); struct msi_domain_info *info = domain->host_data; struct msi_domain_ops *ops = info->ops; int ret; @@ -951,25 +950,24 @@ int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device ret = ops->domain_alloc_irqs(domain, dev, nvec); if (ret) - msi_domain_free_irqs_descs_locked(domain, dev); + msi_domain_free_irqs_descs_locked(dev); return ret; } /** * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain - * @domain: The domain to allocate from * @dev: Pointer to device struct of the device for which the interrupts * are allocated * @nvec: The number of interrupts to allocate * * Return: %0 on success or an error code. */ -int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec) +int msi_domain_alloc_irqs(struct device *dev, int nvec) { int ret; msi_lock_descs(dev); - ret = msi_domain_alloc_irqs_descs_locked(domain, dev, nvec); + ret = msi_domain_alloc_irqs_descs_locked(dev, nvec); msi_unlock_descs(dev); return ret; } @@ -1006,7 +1004,6 @@ static void msi_domain_free_msi_descs(struct msi_domain_info *info, /** * msi_domain_free_irqs_descs_locked - Free interrupts from a MSI interrupt @domain associated to @dev - * @domain: The domain to managing the interrupts * @dev: Pointer to device struct of the device for which the interrupts * are free * @@ -1014,8 +1011,9 @@ static void msi_domain_free_msi_descs(struct msi_domain_info *info, * pair. Use this for MSI irqdomains which implement their own vector * allocation. */ -void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev) +void msi_domain_free_irqs_descs_locked(struct device *dev) { + struct irq_domain *domain = dev_get_msi_domain(dev); struct msi_domain_info *info = domain->host_data; struct msi_domain_ops *ops = info->ops; @@ -1027,14 +1025,13 @@ void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device /** * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated to @dev - * @domain: The domain to managing the interrupts * @dev: Pointer to device struct of the device for which the interrupts * are free */ -void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) +void msi_domain_free_irqs(struct device *dev) { msi_lock_descs(dev); - msi_domain_free_irqs_descs_locked(domain, dev); + msi_domain_free_irqs_descs_locked(dev); msi_unlock_descs(dev); } From patchwork Fri Oct 14 04:40:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gupta, Nipun" X-Patchwork-Id: 2503 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3c08:b0:7f:eb39:1b51 with SMTP id e8csp188966dys; Thu, 13 Oct 2022 21:46:25 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6qPok8+6hnqJTByuZbDczhzkfFwd7cC5qngdugugp6ScNf6jyKVXAKXW4mJF2yfTCTd8LH X-Received: by 2002:a05:6a00:124d:b0:566:8645:dad2 with SMTP id u13-20020a056a00124d00b005668645dad2mr1511687pfi.5.1665722785477; Thu, 13 Oct 2022 21:46:25 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1665722785; cv=pass; d=google.com; s=arc-20160816; b=a/UDYq6rJu70eMg/2w6jVjTgAZPYC0K577dg+qfrxwuSvLGe10o+ntLeL+uLXSvn+0 O6MTTYW3YxVihclUOBRLND4mPRglLnvVRp6p5MlUC8NQXOFI02zweBVKOoX6U8PKOT66 BtOtzrxr2ds3qVnPRqcjay43adAmb3/FyJ2ygp7WX03rFHTY3RdAKCOvC2MO09ZWHN12 2cqfXRiiVCCwgEmxnzDcIZBhXzRdizbDtDicmIGGCW79HmFpuVdu1CwvufZTE9oqQ/NT es7Nc9HD6w307jgn4AWhuSOhKGISBSTkjsDbm8iVN76+PSWaazhEbCGMgMj9hJTgNd7+ q3Sw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=u3JptsUvS1Ep5IrkL1vqw0fo28X1LbRqDw7CQaH72V8=; b=cUnH8j0oDfF5vskmpTBVXxC+ZliKEnESbsH45w7EIYeiP6sJdwvfVmx3arl+12/Q5R /hUZ8onIh2AtkTiMqLK7fWmJzijA8T+JmahfNqzorNpAUoAeByTgtOtMrpF9V2xKtPKt Qxwp3Y0V9lpth7IJQgWmjC6lmgupr39qtpEYbIJ23Bslmvcq0SXlZd1bixVPFmh0IYrm ztJAtgM1lb42FaUrAfyRw+ijI9FB9T5bW4SBNngjpeiPabDlAVwFI4VWjjgq4HXJppgF VGh0N2QvUL6f61ZU9aoDcZDHyZv1z/hRU4g1EROB7eaMgx6+tQ4kVaZQUk0LJd/ki2/D Rqtg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=jk1GIm+s; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Oct 2022 04:43:19.6580 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f8baff6a-97b7-4431-8f5e-08daad9e9e45 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT014.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7688 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746576921425052285?= X-GMAIL-MSGID: =?utf-8?q?1746636935622356778?= Since CDX devices are not linked to of node they need a separate MSI domain for handling device ID to be provided to the GIC ITS domain. This also introduces APIs to alloc and free IRQs for CDX domain. Signed-off-by: Nipun Gupta Signed-off-by: Nikhil Agarwal --- drivers/bus/cdx/Kconfig | 1 + drivers/bus/cdx/Makefile | 2 +- drivers/bus/cdx/cdx.c | 18 ++++ drivers/bus/cdx/cdx.h | 10 +++ drivers/bus/cdx/cdx_msi.c | 161 ++++++++++++++++++++++++++++++++++++ include/linux/cdx/cdx_bus.h | 26 ++++++ kernel/irq/msi.c | 1 + 7 files changed, 218 insertions(+), 1 deletion(-) create mode 100644 drivers/bus/cdx/cdx_msi.c diff --git a/drivers/bus/cdx/Kconfig b/drivers/bus/cdx/Kconfig index 98ec05ad708d..062443080d6f 100644 --- a/drivers/bus/cdx/Kconfig +++ b/drivers/bus/cdx/Kconfig @@ -7,6 +7,7 @@ config CDX_BUS bool "CDX Bus driver" + select GENERIC_MSI_IRQ_DOMAIN help Driver to enable CDX Bus infrastructure. CDX bus uses CDX controller and firmware to scan the FPGA based diff --git a/drivers/bus/cdx/Makefile b/drivers/bus/cdx/Makefile index 2e8f42611dfc..95f8fa3b4db8 100644 --- a/drivers/bus/cdx/Makefile +++ b/drivers/bus/cdx/Makefile @@ -5,4 +5,4 @@ # Copyright (C) 2022, Advanced Micro Devices, Inc. # -obj-$(CONFIG_CDX_BUS) += cdx.o +obj-$(CONFIG_CDX_BUS) += cdx.o cdx_msi.o diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c index 41c61bf6d5f0..a3accde0421f 100644 --- a/drivers/bus/cdx/cdx.c +++ b/drivers/bus/cdx/cdx.c @@ -56,6 +56,7 @@ */ #include +#include #include #include #include @@ -449,6 +450,7 @@ int cdx_device_add(struct cdx_dev_params_t *dev_params) struct cdx_controller_t *cdx = dev_params->cdx; struct device *parent = cdx->dev; struct cdx_device *cdx_dev; + struct irq_domain *cdx_msi_domain; int ret; cdx_dev = kzalloc(sizeof(*cdx_dev), GFP_KERNEL); @@ -465,6 +467,7 @@ int cdx_device_add(struct cdx_dev_params_t *dev_params) /* Populate CDX dev params */ cdx_dev->req_id = dev_params->req_id; + cdx_dev->num_msi = dev_params->num_msi; cdx_dev->vendor = dev_params->vendor; cdx_dev->device = dev_params->device; cdx_dev->bus_num = dev_params->bus_num; @@ -483,6 +486,21 @@ int cdx_device_add(struct cdx_dev_params_t *dev_params) dev_set_name(&cdx_dev->dev, "cdx-%02x:%02x", cdx_dev->bus_num, cdx_dev->dev_num); + /* If CDX MSI domain is not created, create one. */ + cdx_msi_domain = irq_find_host(parent->of_node); + if (!cdx_msi_domain) { + cdx_msi_domain = cdx_msi_domain_init(parent); + if (!cdx_msi_domain) { + dev_err(&cdx_dev->dev, + "cdx_msi_domain_init() failed: %d", ret); + kfree(cdx_dev); + return -ENODEV; + } + } + + /* Set the MSI domain */ + dev_set_msi_domain(&cdx_dev->dev, cdx_msi_domain); + ret = device_add(&cdx_dev->dev); if (ret != 0) { dev_err(&cdx_dev->dev, diff --git a/drivers/bus/cdx/cdx.h b/drivers/bus/cdx/cdx.h index 80496865ae9c..5fd40c7e633e 100644 --- a/drivers/bus/cdx/cdx.h +++ b/drivers/bus/cdx/cdx.h @@ -23,6 +23,7 @@ * @res: array of MMIO region entries * @res_count: number of valid MMIO regions * @req_id: Requestor ID associated with CDX device + * @num_msi: Number of MSI's supported by the device */ struct cdx_dev_params_t { struct cdx_controller_t *cdx; @@ -35,6 +36,7 @@ struct cdx_dev_params_t { struct resource res[MAX_CDX_DEV_RESOURCES]; u8 res_count; u32 req_id; + u32 num_msi; }; /** @@ -63,4 +65,12 @@ void cdx_unregister_controller(struct cdx_controller_t *cdx); */ int cdx_device_add(struct cdx_dev_params_t *dev_params); +/** + * cdx_msi_domain_init - Init the CDX bus MSI domain. + * @dev: Device of the CDX bus controller + * + * Return CDX MSI domain, NULL on failure + */ +struct irq_domain *cdx_msi_domain_init(struct device *dev); + #endif /* _CDX_H_ */ diff --git a/drivers/bus/cdx/cdx_msi.c b/drivers/bus/cdx/cdx_msi.c new file mode 100644 index 000000000000..b9e7e9d6fb51 --- /dev/null +++ b/drivers/bus/cdx/cdx_msi.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AMD CDX bus driver MSI support + * + * Copyright (C) 2022, Advanced Micro Devices, Inc. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cdx.h" + +#define REQ_ID_SHIFT 10 + +/* + * Convert an msi_desc to a globaly unique identifier (per-device + * reqid + msi_desc position in the msi_list). + */ +static irq_hw_number_t cdx_domain_calc_hwirq(struct cdx_device *dev, + struct msi_desc *desc) +{ + return (dev->req_id << REQ_ID_SHIFT) | desc->msi_index; +} + +static void cdx_msi_set_desc(msi_alloc_info_t *arg, + struct msi_desc *desc) +{ + arg->desc = desc; + arg->hwirq = cdx_domain_calc_hwirq(to_cdx_device(desc->dev), desc); +} + +static void cdx_msi_write_msg(struct irq_data *irq_data, + struct msi_msg *msg) +{ + struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data); + struct cdx_device *cdx_dev = to_cdx_device(msi_desc->dev); + struct cdx_controller_t *cdx = cdx_dev->cdx; + uint64_t addr; + int ret; + + addr = ((uint64_t)(msi_desc->msg.address_hi) << 32) | + msi_desc->msg.address_lo; + + ret = cdx->ops.write_msi(cdx, cdx_dev->bus_num, cdx_dev->dev_num, + msi_desc->msi_index, msi_desc->msg.data, + addr); + if (ret) + dev_err(&cdx_dev->dev, "Write MSI failed to CDX controller\n"); +} + +int cdx_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count) +{ + int ret; + + ret = msi_setup_device_data(dev); + if (ret) + return ret; + + msi_lock_descs(dev); + if (msi_first_desc(dev, MSI_DESC_ALL)) + ret = -EINVAL; + msi_unlock_descs(dev); + if (ret) + return ret; + + ret = msi_domain_alloc_irqs(dev, irq_count); + if (ret) + dev_err(dev, "Failed to allocate IRQs\n"); + + return ret; +} +EXPORT_SYMBOL_GPL(cdx_msi_domain_alloc_irqs); + +static struct irq_chip cdx_msi_irq_chip = { + .name = "CDX-MSI", + .irq_mask = irq_chip_mask_parent, + .irq_unmask = irq_chip_unmask_parent, + .irq_eoi = irq_chip_eoi_parent, + .irq_set_affinity = msi_domain_set_affinity, + .irq_write_msi_msg = cdx_msi_write_msg +}; + +static int cdx_msi_prepare(struct irq_domain *msi_domain, + struct device *dev, + int nvec, msi_alloc_info_t *info) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + struct msi_domain_info *msi_info; + struct device *parent = dev->parent; + u32 dev_id; + int ret; + + /* Retrieve device ID from requestor ID using parent device */ + ret = of_map_id(parent->of_node, cdx_dev->req_id, "msi-map", + "msi-map-mask", NULL, &dev_id); + if (ret) { + dev_err(dev, "of_map_id failed for MSI: %d\n", ret); + return ret; + } + + /* Set the device Id to be passed to the GIC-ITS */ + info->scratchpad[0].ul = dev_id; + + msi_info = msi_get_domain_info(msi_domain->parent); + + return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info); +} + +static struct msi_domain_ops cdx_msi_ops __ro_after_init = { + .msi_prepare = cdx_msi_prepare, + .set_desc = cdx_msi_set_desc +}; + +static struct msi_domain_info cdx_msi_domain_info = { + .ops = &cdx_msi_ops, + .chip = &cdx_msi_irq_chip, + .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | + MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS | MSI_FLAG_FREE_MSI_DESCS +}; + +struct irq_domain *cdx_msi_domain_init(struct device *dev) +{ + struct irq_domain *parent; + struct irq_domain *cdx_msi_domain; + struct fwnode_handle *fwnode_handle; + struct device_node *parent_node; + struct device_node *np = dev->of_node; + + fwnode_handle = of_node_to_fwnode(np); + + parent_node = of_parse_phandle(np, "msi-map", 1); + if (!parent_node) { + dev_err(dev, "msi-map not present on cdx controller\n"); + return NULL; + } + + parent = irq_find_matching_fwnode(of_node_to_fwnode(parent_node), + DOMAIN_BUS_NEXUS); + if (!parent || !msi_get_domain_info(parent)) { + dev_err(dev, "unable to locate ITS domain\n"); + return NULL; + } + + cdx_msi_domain = msi_create_irq_domain(fwnode_handle, + &cdx_msi_domain_info, parent); + if (!cdx_msi_domain) { + dev_err(dev, "unable to create CDX-MSI domain\n"); + return NULL; + } + + dev_dbg(dev, "CDX-MSI domain created\n"); + + return cdx_msi_domain; +} diff --git a/include/linux/cdx/cdx_bus.h b/include/linux/cdx/cdx_bus.h index 9e6872a03215..dfc0bd289834 100644 --- a/include/linux/cdx/cdx_bus.h +++ b/include/linux/cdx/cdx_bus.h @@ -21,14 +21,21 @@ typedef int (*cdx_scan_t)(struct cdx_controller_t *cdx); typedef int (*cdx_dev_reset_t)(struct cdx_controller_t *cdx, uint8_t bus_num, uint8_t dev_num); +typedef int (*cdx_write_msi_msg_t)(struct cdx_controller_t *cdx, + uint8_t bus_num, uint8_t dev_num, + uint16_t msi_index, uint32_t data, + uint64_t addr); + /** * Callbacks supported by CDX controller. * @scan: scan the devices on the controller * @reset_dev: reset a CDX device + * @write_msi: callback to write the MSI message */ struct cdx_ops_t { cdx_scan_t scan; cdx_dev_reset_t reset_dev; + cdx_write_msi_msg_t write_msi; }; /** @@ -57,6 +64,7 @@ struct cdx_controller_t { * @dma_mask: Default DMA mask * @flags: CDX device flags * @req_id: Requestor ID associated with CDX device + * @num_msi: Number of MSI's supported by the device * @driver_override: driver name to force a match; do not set directly, * because core frees it; use driver_set_override() to * set or clear it. @@ -73,6 +81,7 @@ struct cdx_device { u64 dma_mask; u16 flags; u32 req_id; + u32 num_msi; const char *driver_override; }; @@ -136,4 +145,21 @@ extern struct bus_type cdx_bus_type; */ int cdx_dev_reset(struct device *dev); +/** + * cdx_msi_domain_alloc_irqs - Allocate MSI's for the CDX device + * @dev: device pointer + * @irq_count: Number of MSI's to be allocated + * + * Return 0 for success, -errno on failure + */ +int cdx_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count); + +/** + * cdx_msi_domain_free_irqs - Free MSI's for CDX device + * @dev: device pointer + * + * Return 0 for success, -errno on failure + */ +#define cdx_msi_domain_free_irqs msi_domain_free_irqs + #endif /* _CDX_BUS_H_ */ diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c index 14983c82a9e3..f55a5e395686 100644 --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -1034,6 +1034,7 @@ void msi_domain_free_irqs(struct device *dev) msi_domain_free_irqs_descs_locked(dev); msi_unlock_descs(dev); } +EXPORT_SYMBOL_GPL(msi_domain_free_irqs); /** * msi_get_domain_info - Get the MSI interrupt domain info for @domain From patchwork Fri Oct 14 04:40:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gupta, Nipun" X-Patchwork-Id: 2498 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3c08:b0:7f:eb39:1b51 with SMTP id e8csp188146dys; Thu, 13 Oct 2022 21:44:26 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5+B0lfl5HWJNnN3cz5N9YMcNZwSOi+UXfNa0rCXbclH3eJmQDM/7OCDMmeXYmSL07iC5GJ X-Received: by 2002:a17:902:d711:b0:185:31b5:8087 with SMTP id w17-20020a170902d71100b0018531b58087mr3327032ply.121.1665722666447; Thu, 13 Oct 2022 21:44:26 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1665722666; cv=pass; d=google.com; s=arc-20160816; b=KHnxRvWfxQ2SGVjlkq26zZg/8NnjEUf5RIxsvcHrYcnnz/QK1chENRmrplLf+/rh9l adCIQrW2+8DuX2TjlcC4GKWwBhxeWpO9HM3PynA7gXNZcCxQnqsxt7srrZUKyKnFz1DO kMHuKk13tI4Xmm2trG3flZGb82tIYO/t//owOrtlxhVTSgnWuL9b2Zf1YMYXEm9PSCZB NpMH757DWABQBaNnpdDGrKlfAePs246UqW7yoOqUM2PsF9qe5k9o7E5Q7fWycu5gdH+c aZq+AsCqNMqYTYaNmN+dYFIf2LcvijZ5gamuvr9c1Q//mcSz1kiOg86J2g99EbUOsozh s5qA== ARC-Message-Signature: i=2; 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The controller discovers the CDX devices with the help of firmware and add those devices to the CDX bus. CDX controller also provide ops to be registered to CDX bus for scanning, resetting and writing MSI data to CDX devices. Signed-off-by: Nipun Gupta --- drivers/bus/cdx/Kconfig | 2 + drivers/bus/cdx/Makefile | 2 +- drivers/bus/cdx/controller/Kconfig | 16 ++ drivers/bus/cdx/controller/Makefile | 8 + drivers/bus/cdx/controller/cdx_controller.c | 210 ++++++++++++++++++++ drivers/bus/cdx/controller/mcdi_stubs.c | 68 +++++++ drivers/bus/cdx/controller/mcdi_stubs.h | 101 ++++++++++ 7 files changed, 406 insertions(+), 1 deletion(-) create mode 100644 drivers/bus/cdx/controller/Kconfig create mode 100644 drivers/bus/cdx/controller/Makefile create mode 100644 drivers/bus/cdx/controller/cdx_controller.c create mode 100644 drivers/bus/cdx/controller/mcdi_stubs.c create mode 100644 drivers/bus/cdx/controller/mcdi_stubs.h diff --git a/drivers/bus/cdx/Kconfig b/drivers/bus/cdx/Kconfig index 062443080d6f..8036d754a0a6 100644 --- a/drivers/bus/cdx/Kconfig +++ b/drivers/bus/cdx/Kconfig @@ -12,3 +12,5 @@ config CDX_BUS Driver to enable CDX Bus infrastructure. CDX bus uses CDX controller and firmware to scan the FPGA based devices. + +source "drivers/bus/cdx/controller/Kconfig" diff --git a/drivers/bus/cdx/Makefile b/drivers/bus/cdx/Makefile index 95f8fa3b4db8..285fd7d51174 100644 --- a/drivers/bus/cdx/Makefile +++ b/drivers/bus/cdx/Makefile @@ -5,4 +5,4 @@ # Copyright (C) 2022, Advanced Micro Devices, Inc. # -obj-$(CONFIG_CDX_BUS) += cdx.o cdx_msi.o +obj-$(CONFIG_CDX_BUS) += cdx.o cdx_msi.o controller/ diff --git a/drivers/bus/cdx/controller/Kconfig b/drivers/bus/cdx/controller/Kconfig new file mode 100644 index 000000000000..29bd45626d38 --- /dev/null +++ b/drivers/bus/cdx/controller/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# CDX controller configuration +# +# Copyright (C) 2022, Advanced Micro Devices, Inc. +# + +config CDX_CONTROLLER + tristate "CDX hardware driver" + depends on CDX_BUS + help + CDX controller drives the CDX bus. It interacts with + firmware to get the hardware devices and registers with + the CDX bus. Say Y to enable the CDX hardware driver. + + If unsure, say N. diff --git a/drivers/bus/cdx/controller/Makefile b/drivers/bus/cdx/controller/Makefile new file mode 100644 index 000000000000..83bcd4ae1874 --- /dev/null +++ b/drivers/bus/cdx/controller/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Makefile for CDX controller drivers +# +# Copyright (C) 2022, Advanced Micro Devices, Inc. +# + +obj-$(CONFIG_CDX_CONTROLLER) += cdx_controller.o mcdi_stubs.o diff --git a/drivers/bus/cdx/controller/cdx_controller.c b/drivers/bus/cdx/controller/cdx_controller.c new file mode 100644 index 000000000000..792fbb8314d5 --- /dev/null +++ b/drivers/bus/cdx/controller/cdx_controller.c @@ -0,0 +1,210 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Platform driver for CDX bus. + * + * Copyright (C) 2022, Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "../cdx.h" +#include "mcdi_stubs.h" + +static int cdx_reset_device(struct cdx_controller_t *cdx, + uint8_t bus_num, uint8_t dev_num) +{ + return cdx_mcdi_reset_dev(cdx->priv, bus_num, dev_num); +} + +static int cdx_scan_devices(struct cdx_controller_t *cdx) +{ + struct cdx_mcdi_t *cdx_mcdi = cdx->priv; + int num_cdx_bus, num_cdx_dev; + uint8_t bus_num, dev_num; + int ret; + + /* MCDI FW Read: Fetch the number of CDX buses present*/ + num_cdx_bus = cdx_mcdi_get_num_buses(cdx_mcdi); + + for (bus_num = 0; bus_num < num_cdx_bus; bus_num++) { + /* MCDI FW Read: Fetch the number of devices present */ + num_cdx_dev = cdx_mcdi_get_num_devs(cdx_mcdi, bus_num); + + for (dev_num = 0; dev_num < num_cdx_dev; dev_num++) { + struct cdx_dev_params_t dev_params; + + /* MCDI FW: Get the device config */ + ret = cdx_mcdi_get_dev_config(cdx_mcdi, bus_num, + dev_num, &dev_params); + if (ret) { + dev_err(cdx->dev, + "CDX device config get failed for bus: %d\n", ret); + return ret; + } + dev_params.cdx = cdx; + + /* Add the device to the cdx bus */ + ret = cdx_device_add(&dev_params); + if (ret) { + dev_err(cdx->dev, "registering cdx dev: %d failed: %d\n", + dev_num, ret); + return ret; + } + + dev_dbg(cdx->dev, "CDX dev: %d on cdx bus: %d created\n", + dev_num, bus_num); + } + } + + return 0; +} + +static int cdx_write_msi(struct cdx_controller_t *cdx, uint8_t bus_num, + uint8_t dev_num, uint16_t msi_index, + uint32_t data, uint64_t addr) +{ + return cdx_mcdi_write_msi(cdx->priv, bus_num, dev_num, + msi_index, data, addr); +} + +static int cdx_probe(struct platform_device *pdev) +{ + struct cdx_mcdi_t *cdx_mcdi; + struct cdx_controller_t *cdx; + struct device_node *iommu_node; + struct platform_device *plat_iommu_dev; + int ret; + + /* + * Defer probe CDX controller in case IOMMU is not yet initialized. + * We do not add CDX devices before the IOMMU device is probed, as + * in cleanup or shutdown time (device_shutdonw()), which traverse + * device list in reverse order of device addition, we need to remove + * CDX devices, before IOMMU device is removed. + */ + iommu_node = of_parse_phandle(pdev->dev.of_node, "iommu-map", 1); + if (!of_device_is_available(iommu_node)) { + dev_err(&pdev->dev, "No associated IOMMU node found\n"); + return -EINVAL; + } + + plat_iommu_dev = of_find_device_by_node(iommu_node); + if (!plat_iommu_dev) { + ret = -EPROBE_DEFER; + goto iommu_of_cleanup; + } + + if (!plat_iommu_dev->dev.driver) { + ret = -EPROBE_DEFER; + goto iommu_of_cleanup; + } + + cdx_mcdi = kzalloc(sizeof(*cdx_mcdi), GFP_KERNEL); + if (!cdx_mcdi) { + dev_err(&pdev->dev, "Failed to allocate memory for cdx_mcdi\n"); + ret = -ENOMEM; + goto iommu_of_cleanup; + } + + /* MCDI FW: Initialize the FW path */ + ret = cdx_mcdi_init(cdx_mcdi); + if (ret) { + dev_err(&pdev->dev, "MCDI Initialization failed: %d\n", ret); + goto mcdi_init_fail; + } + + cdx = kzalloc(sizeof(*cdx), GFP_KERNEL); + if (!cdx) { + dev_err(&pdev->dev, "Failed to allocate memory for cdx\n"); + ret = -ENOMEM; + goto cdx_alloc_fail; + } + platform_set_drvdata(pdev, cdx); + + cdx->dev = &pdev->dev; + cdx->priv = cdx_mcdi; + cdx->ops.scan = cdx_scan_devices; + cdx->ops.reset_dev = cdx_reset_device; + cdx->ops.write_msi = cdx_write_msi; + + /* Register CDX controller with CDX bus driver */ + ret = cdx_register_controller(cdx); + if (ret) { + dev_err(&pdev->dev, "Failed to register CDX controller\n"); + goto cdx_register_fail; + } + + return 0; + +cdx_register_fail: + kfree(cdx); +cdx_alloc_fail: + cdx_mcdi_finish(cdx_mcdi); +mcdi_init_fail: + kfree(cdx_mcdi); +iommu_of_cleanup: + of_node_put(iommu_node); + + return ret; +} + +static int cdx_remove(struct platform_device *pdev) +{ + struct cdx_controller_t *cdx = platform_get_drvdata(pdev); + struct cdx_mcdi_t *cdx_mcdi = cdx->priv; + + cdx_unregister_controller(cdx); + kfree(cdx); + + cdx_mcdi_finish(cdx_mcdi); + kfree(cdx_mcdi); + + return 0; +} + +static void cdx_shutdown(struct platform_device *pdev) +{ + cdx_remove(pdev); +} + +static const struct of_device_id cdx_match_table[] = { + {.compatible = "xlnx,cdxbus-controller-1.0",}, + { }, +}; + +MODULE_DEVICE_TABLE(of, cdx_match_table); + +static struct platform_driver cdx_pdriver = { + .driver = { + .name = "cdx-controller", + .pm = NULL, + .of_match_table = cdx_match_table, + }, + .probe = cdx_probe, + .remove = cdx_remove, + .shutdown = cdx_shutdown, +}; + +static int __init cdx_controller_init(void) +{ + int ret; + + ret = platform_driver_register(&cdx_pdriver); + if (ret < 0) + pr_err("platform_driver_register() failed: %d\n", ret); + + return ret; +} +module_init(cdx_controller_init); + +static void __exit cdx_controller_exit(void) +{ + platform_driver_unregister(&cdx_pdriver); +} +module_exit(cdx_controller_exit); diff --git a/drivers/bus/cdx/controller/mcdi_stubs.c b/drivers/bus/cdx/controller/mcdi_stubs.c new file mode 100644 index 000000000000..17737ffeae1c --- /dev/null +++ b/drivers/bus/cdx/controller/mcdi_stubs.c @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MCDI Firmware interaction for CDX bus. + * + * Copyright (C) 2022, Advanced Micro Devices, Inc. + */ + +#include + +#include "mcdi_stubs.h" + +int cdx_mcdi_init(struct cdx_mcdi_t *cdx_mcdi) +{ + cdx_mcdi->id = 0; + cdx_mcdi->flags = 0; + + return 0; +} + +void cdx_mcdi_finish(struct cdx_mcdi_t *cdx_mcdi) +{ +} + +int cdx_mcdi_get_num_buses(struct cdx_mcdi_t *cdx_mcdi) +{ + return 1; +} + +int cdx_mcdi_get_num_devs(struct cdx_mcdi_t *cdx_mcdi, int bus_num) +{ + return 1; +} + +int cdx_mcdi_get_dev_config(struct cdx_mcdi_t *cdx_mcdi, + uint8_t bus_num, uint8_t dev_num, + struct cdx_dev_params_t *dev_params) +{ + dev_params->res[0].start = 0xe4020000; + dev_params->res[0].end = 0xe4020FFF; + dev_params->res[0].flags = IORESOURCE_MEM; + dev_params->res[1].start = 0xe4100000; + dev_params->res[1].end = 0xE411FFFF; + dev_params->res[1].flags = IORESOURCE_MEM; + dev_params->res_count = 2; + + dev_params->req_id = 0x250; + dev_params->num_msi = 4; + dev_params->vendor = 0x10ee; + dev_params->device = 0x8084; + dev_params->bus_num = bus_num; + dev_params->dev_num = dev_num; + + return 0; +} + +int cdx_mcdi_reset_dev(struct cdx_mcdi_t *cdx_mcdi, + uint8_t bus_num, uint8_t dev_num) +{ + return 0; +} + +int cdx_mcdi_write_msi(struct cdx_mcdi_t *cdx_mcdi, + uint8_t bus_num, uint8_t dev_num, + uint16_t msi_index, uint32_t data, + uint64_t addr) +{ + return 0; +} diff --git a/drivers/bus/cdx/controller/mcdi_stubs.h b/drivers/bus/cdx/controller/mcdi_stubs.h new file mode 100644 index 000000000000..3256f0e306fa --- /dev/null +++ b/drivers/bus/cdx/controller/mcdi_stubs.h @@ -0,0 +1,101 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Header file for MCDI FW interaction for CDX bus. + * + * Copyright (C) 2022, Advanced Micro Devices, Inc. + */ + +#ifndef _MCDI_STUBS_H_ +#define _MCDI_STUBS_H_ + +#include "../cdx.h" + +/** + * struct cdx_mcdi_t - CDX MCDI Firmware interface, to interact + * with CDX controller. + * @id: ID for MCDI Firmware interface + * @flags: Associated flags + */ +struct cdx_mcdi_t { + u32 id; + u32 flags; + /* Have more MCDI interface related data */ +}; + +/** + * cdx_mcdi_init - Initialize the MCDI Firmware interface + * for the CDX controller. + * @cdx_mcdi: pointer to MCDI interface + * + * Return 0 on success, <0 on failure + */ +int cdx_mcdi_init(struct cdx_mcdi_t *cdx_mcdi); + +/** + * cdx_mcdi_finish - Close the MCDI Firmware interface. + * @cdx_mcdi: pointer to MCDI interface + */ +void cdx_mcdi_finish(struct cdx_mcdi_t *cdx_mcdi); + +/** + * cdx_mcdi_get_num_buses - Get the total number of busses on + * the controller. + * @cdx_mcdi: pointer to MCDI interface. + * + * Return total number of busses available on the controller, + * <0 on failure + */ +int cdx_mcdi_get_num_buses(struct cdx_mcdi_t *cdx_mcdi); + +/** + * cdx_mcdi_get_num_devs - Get the total number of devices on + * a particular bus. + * @cdx_mcdi: pointer to MCDI interface. + * @bus_num: Bus number. + * + * Return total number of devices available on the bus, <0 on failure + */ +int cdx_mcdi_get_num_devs(struct cdx_mcdi_t *cdx_mcdi, int bus_num); + +/** + * cdx_mcdi_get_dev_config - Get configuration for a particular + * bus_num:dev_num + * @cdx_mcdi: pointer to MCDI interface. + * @bus_num: Bus number. + * @dev_num: Device number. + * @dev_params: Pointer to cdx_dev_params_t, this is populated by this + * function with the configuration corresponding to the provided + * bus_num:dev_num. + * + * Return 0 total number of devices available on the bus, <0 on failure + */ +int cdx_mcdi_get_dev_config(struct cdx_mcdi_t *cdx_mcdi, + uint8_t bus_num, uint8_t dev_num, + struct cdx_dev_params_t *dev_params); + +/** + * cdx_mcdi_reset_dev - Reset cdx device represented by bus_num:dev_num + * @cdx_mcdi: pointer to MCDI interface. + * @bus_num: Bus number. + * @dev_num: Device number. + * + * Return 0 on success, <0 on failure + */ +int cdx_mcdi_reset_dev(struct cdx_mcdi_t *cdx_mcdi, + uint8_t bus_num, uint8_t dev_num); + +/** + * cdx_mcdi_write_msi_data - Write MSI related info to the Firmware + * @cdx_mcdi: pointer to MCDI interface. + * @bus_num: Bus number. + * @dev_num: Device number. + * @msi_index: MSI Index for which the data and address is provided + * @data: MSI data (i.e. eventID) for the interrupt + * @addr: the address on which the MSI is to be raised + */ +int cdx_mcdi_write_msi(struct cdx_mcdi_t *cdx_mcdi, + uint8_t bus_num, uint8_t dev_num, + uint16_t msi_index, uint32_t data, + uint64_t addr); + +#endif /* _MCDI_STUBS_H_ */