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Since the VOP2 driver only supports these plane types at the moment, the current code is safe. However, in order to provide a future-proof solution, fix the initialization of the variable. Reported-by: kernel test robot Reported-by: Dan Carpenter Signed-off-by: Michael Riesch --- v2: - new patch drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 8cecf81a5ae0..374ef821b453 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -2322,10 +2322,11 @@ static int vop2_create_crtc(struct vop2 *vop2) /* change the unused primary window to overlay window */ win->type = DRM_PLANE_TYPE_OVERLAY; } - } - - if (win->type == DRM_PLANE_TYPE_OVERLAY) + } else if (win->type == DRM_PLANE_TYPE_OVERLAY) { possible_crtcs = (1 << nvps) - 1; + } else { + possible_crtcs = 0; + } ret = vop2_plane_init(vop2, win, possible_crtcs); if (ret) { From patchwork Thu Jan 19 14:39:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 45820 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp366050wrn; Thu, 19 Jan 2023 06:45:55 -0800 (PST) X-Google-Smtp-Source: AMrXdXtAPcJ4klSBgtj5UI5vdMMF/nBOLjHI36+KXOao+j/z9zF/QKefZ/myZrOLCy00qR5LNqTo X-Received: by 2002:a17:902:8205:b0:192:feef:588 with SMTP id x5-20020a170902820500b00192feef0588mr9530132pln.23.1674139555565; Thu, 19 Jan 2023 06:45:55 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674139555; cv=pass; d=google.com; s=arc-20160816; b=RX4HmlXrXSH4WqiRHPN5V7wonFLb7q46Hj7r2iH/7J6szVU6FVBUdUP5DMF7AZYwRf Xa1u1fHCdZ59TyEyfNMhArMyrV9CCNfwPlZPBgqQF7M/5X/eNnkHb4JplOVeMJu2eGdL 6h4UfWNESU8BXM8SChH/y8pw9WuUvq6GPAhcvLrg+s3919uW9+XJiL7jukyyvhXElXSp ozHkRMzWYKV6w6Q6X1SyUpbT2f5UsRAFIJbZkVbBPKARqdJppIdBSfFvoRhZQVF16uri RhVW7f64nohC412mQ1SfuPW9LXuEitf+D0ycGxPOcMPgvfNPib93BpJHrEcaOJoGnJih tNYA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jymqeV+w4uIMgpBiV126XddF0BF4GjQeni91Q6nnFoE=; b=C5MUdXPXtHuBJgkSfzJdVz/fOJ0YZSVZmgNraInJEPXW1ylotChtx/c1rxvMFHsseN gtRkkWr9ZXZm4v54qRJhw2G0iJ58vFM9stDrZbMtfsPeKqr1TU1vxNXsgI5YjuidRVFA C6pVx8LCZiJwUyGCGeG+Gfpn42ofBAJ3rDap5B2l/L7zzz7tFUlUqCi0fFoHoYxuj1hr 3xhBJExzqh5a43JihaEyBk9AltvRyiocQrpCZymB0BJ9zBjJs2La/JtqR2SArHmaR2qz 64p+LFs1QtOJ8qh/u7zJnrXEvL3bswMhs/zlhaXPfnxi62LylBzD42QcEUcoqG2mdVSB D6Vw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=AmhnmA0r; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Received: from DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) by DB9PR08MB6556.eurprd08.prod.outlook.com (2603:10a6:10:261::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.13; Thu, 19 Jan 2023 14:39:27 +0000 Received: from DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219]) by DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219%2]) with mapi id 15.20.6002.024; Thu, 19 Jan 2023 14:39:27 +0000 From: Michael Riesch To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Cc: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Sandy Huang , David Airlie , Daniel Vetter , Sascha Hauer , Michael Riesch Subject: [PATCH v2 2/6] drm/rockchip: rgb: embed drm_encoder into rockchip_encoder Date: Thu, 19 Jan 2023 15:39:07 +0100 Message-Id: <20230119143911.3793654-3-michael.riesch@wolfvision.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230119143911.3793654-1-michael.riesch@wolfvision.net> References: <20230119143911.3793654-1-michael.riesch@wolfvision.net> X-ClientProxiedBy: VI1PR07CA0152.eurprd07.prod.outlook.com (2603:10a6:802:16::39) To DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR08MB9155:EE_|DB9PR08MB6556:EE_ X-MS-Office365-Filtering-Correlation-Id: 0b57ce7c-ca97-4c4d-8be0-08dafa2af756 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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However, this step has not yet been carried out for the RGB output block. Embed the drm_encoder structure into the rockchip_encoder structure and set the endpoint ID correctly. Signed-off-by: Michael Riesch --- v2: - use endpoint id from device tree instead of hardcoded value drivers/gpu/drm/rockchip/rockchip_rgb.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c index 75eb7cca3d82..5971df4302f2 100644 --- a/drivers/gpu/drm/rockchip/rockchip_rgb.c +++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c @@ -22,13 +22,11 @@ #include "rockchip_drm_vop.h" #include "rockchip_rgb.h" -#define encoder_to_rgb(c) container_of(c, struct rockchip_rgb, encoder) - struct rockchip_rgb { struct device *dev; struct drm_device *drm_dev; struct drm_bridge *bridge; - struct drm_encoder encoder; + struct rockchip_encoder encoder; struct drm_connector connector; int output_mode; }; @@ -125,7 +123,7 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, return ERR_PTR(ret); } - encoder = &rgb->encoder; + encoder = &rgb->encoder.encoder; encoder->possible_crtcs = drm_crtc_mask(crtc); ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_NONE); @@ -161,6 +159,8 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, goto err_free_encoder; } + rgb->encoder.crtc_endpoint_id = endpoint_id; + ret = drm_connector_attach_encoder(connector, encoder); if (ret < 0) { DRM_DEV_ERROR(drm_dev->dev, @@ -182,6 +182,6 @@ void rockchip_rgb_fini(struct rockchip_rgb *rgb) { drm_panel_bridge_remove(rgb->bridge); drm_connector_cleanup(&rgb->connector); - drm_encoder_cleanup(&rgb->encoder); + drm_encoder_cleanup(&rgb->encoder.encoder); } EXPORT_SYMBOL_GPL(rockchip_rgb_fini); From patchwork Thu Jan 19 14:39:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 45815 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp365208wrn; Thu, 19 Jan 2023 06:44:03 -0800 (PST) X-Google-Smtp-Source: AMrXdXvIyhptYd9ZLS9U2bMgsm7G7zEdhQGQv0szRyQltsj67a6tCZac4lFyKLTSnZE1L5vvIJi1 X-Received: by 2002:a17:906:f1d6:b0:86e:7896:80d4 with SMTP id gx22-20020a170906f1d600b0086e789680d4mr11408741ejb.49.1674139443286; Thu, 19 Jan 2023 06:44:03 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674139443; cv=pass; d=google.com; s=arc-20160816; b=tlFa2r1TAzXNHvo8M5dHh43PL110rmJKdCBqvaRL9yymI7057u/tuCqw5XLLjGltRZ SD+9lSPj3q2UkVMcjl8YM3cl4iIU8/r7rAbh8MaqVK0OfI3MNpDHmfXsXeYfdFSwiJDT lqlme9Cw64yjndgGDmoe73rEFcRUA9FM06xmhpAll6EngX3x3xLD9hp1jFaVKQNwmg4G E2c2Ze2a8kkYRaIipMUJxMJ1S2OqlxhAC1Ioxypl1IZMf9PGID7gegHDvnygp8E7VILA 2Dva9VYorFfdu/3WQpL3tYOVLAlGHA1TGZ73jrko4y4qnbdOvWVjqc/QZANKAcB+QfWu J9eg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vBrPCmaMjMnV11cZ/AnUAfmHjG/9aWQuKuxz3sw7Fw0=; b=ltgNKFhGV1K4q62ipK+2t2btwsfeCQfv/iSW/ssyRRx7jlSVI3+p1/s+6hZX7E5SQr ydhwLEeAkE33QUuJmImYW4GiQnC6fMkCr65qYDBzeXStgwfDPf4me37meTiLykIGL9oW 14Lzj9IF3Pcnkcq+fYOjT4qsMSTSC3GdHa/wyCWi3x9YefFEruZArgyFznseTlwtJ8eD io0wdAn8nNmNQXk/PmozJO8RjFNwG3ZQVxBlkeKjWEYinVHhwWPEp45N9VG42e4cPZR5 bAolVn6RcvmmHz7r/0s22asajQDHPyvvpFoW88nEO9oN1Zvim/gNHjyaebJb5fXnMqFI XXcQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=rHBfl+mJ; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Add an extra parameter for the video port id to the rockchip_rgb_init function. Signed-off-by: Michael Riesch --- v2: - no changes drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +- drivers/gpu/drm/rockchip/rockchip_rgb.c | 9 +++++---- drivers/gpu/drm/rockchip/rockchip_rgb.h | 6 ++++-- 3 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index fa1f4ee6d195..5d18dea5c8d6 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -2221,7 +2221,7 @@ static int vop_bind(struct device *dev, struct device *master, void *data) goto err_disable_pm_runtime; if (vop->data->feature & VOP_FEATURE_INTERNAL_RGB) { - vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev); + vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev, 0); if (IS_ERR(vop->rgb)) { ret = PTR_ERR(vop->rgb); goto err_disable_pm_runtime; diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c index 5971df4302f2..c677b71ae516 100644 --- a/drivers/gpu/drm/rockchip/rockchip_rgb.c +++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c @@ -72,7 +72,8 @@ struct drm_encoder_helper_funcs rockchip_rgb_encoder_helper_funcs = { struct rockchip_rgb *rockchip_rgb_init(struct device *dev, struct drm_crtc *crtc, - struct drm_device *drm_dev) + struct drm_device *drm_dev, + int video_port) { struct rockchip_rgb *rgb; struct drm_encoder *encoder; @@ -90,7 +91,7 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, rgb->dev = dev; rgb->drm_dev = drm_dev; - port = of_graph_get_port_by_id(dev->of_node, 0); + port = of_graph_get_port_by_id(dev->of_node, video_port); if (!port) return ERR_PTR(-EINVAL); @@ -103,8 +104,8 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, continue; child_count++; - ret = drm_of_find_panel_or_bridge(dev->of_node, 0, endpoint_id, - &panel, &bridge); + ret = drm_of_find_panel_or_bridge(dev->of_node, video_port, + endpoint_id, &panel, &bridge); if (!ret) { of_node_put(endpoint); break; diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.h b/drivers/gpu/drm/rockchip/rockchip_rgb.h index 27b9635124bc..1bd4e20e91eb 100644 --- a/drivers/gpu/drm/rockchip/rockchip_rgb.h +++ b/drivers/gpu/drm/rockchip/rockchip_rgb.h @@ -8,12 +8,14 @@ #ifdef CONFIG_ROCKCHIP_RGB struct rockchip_rgb *rockchip_rgb_init(struct device *dev, struct drm_crtc *crtc, - struct drm_device *drm_dev); + struct drm_device *drm_dev, + int video_port); void rockchip_rgb_fini(struct rockchip_rgb *rgb); #else static inline struct rockchip_rgb *rockchip_rgb_init(struct device *dev, struct drm_crtc *crtc, - struct drm_device *drm_dev) + struct drm_device *drm_dev, + int video_port) { return NULL; } From patchwork Thu Jan 19 14:39:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 45819 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp365913wrn; Thu, 19 Jan 2023 06:45:39 -0800 (PST) X-Google-Smtp-Source: AMrXdXuOiU6/SBRYh+Y8mHSDpefIjWhkPKmoLfBVf29Ebxj8H/JdWsBqngKbf99iNnqYpTggugas X-Received: by 2002:a05:6a20:1b21:b0:b8:ad30:717c with SMTP id ch33-20020a056a201b2100b000b8ad30717cmr9541836pzb.9.1674139539564; Thu, 19 Jan 2023 06:45:39 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674139539; cv=pass; d=google.com; s=arc-20160816; b=IXAA8svEBwYWxnqWpqKuKvHsn9lO9ZgqVxb0UwCU+XCzyNSH7s9kpmao6cMVFKDfsh QLPTvWJf9/kSB73At5pHV6BW8x1uTCDmb7k+AoKboq920ClcQMC2i0HgMcgj+J9nAUQo BnJYBtYrqIpypkB6aw2B3vMm7ZsqIbvSdEwl/VG/nX2wflxTSvBEznyD+JoDi/d/CNtm KxlYxpgNHZaVtWH8r9if4JHht64QOlFHhv8vNPNu0eZBeAWwOv9/XB8O4joYZC9N2O6m tnz7LtKeLRisWjHubTXTgFWiaGL1Yv0J0Ci7EcBD6gKdQ1D9BSg9QmyQgIbkG9K83HJM ZU/g== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bTDa3bsgB3lbqNtRTVwHqGScdV7FWISBbpPdc4IEoFw=; b=O/6WxlY6XnoiLpLbqtVGlZzUrlqYQ2R3AxXhbsxE82l6a3eQCw68VONMXjFbuSohOE onLDQddZkIPnxfsJ21mNbQNgvyiABpM7ohPnzS5Al3P4PzROAZYfuizWiO0tzYQ0d8MW C2ugPFAh1tNeWsxQr7q+wQYj+XhUoW0rkIGHBXbarRMAwk5rqMFPXYlkjcypkRJzErg7 8C109CAa6KMb8EwkggEp8gxzk+tpfZ9qP5Mujjh/MW2kEYk0V2Mdo5m6RmdvqOiUIcnP hvDaDdnyguGLWgvvt/vjhFt51FpG0sXp7oSTm6iaSskk1tsBO/4tCsyIPjHLmL3NDrGd nPtw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=habd9RtT; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Received: from DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) by DB9PR08MB6556.eurprd08.prod.outlook.com (2603:10a6:10:261::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.13; Thu, 19 Jan 2023 14:39:30 +0000 Received: from DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219]) by DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219%2]) with mapi id 15.20.6002.024; Thu, 19 Jan 2023 14:39:30 +0000 From: Michael Riesch To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Cc: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Sandy Huang , David Airlie , Daniel Vetter , Sascha Hauer , Michael Riesch Subject: [PATCH v2 4/6] drm/rockchip: vop2: use symmetric function pair vop2_{create,destroy}_crtcs Date: Thu, 19 Jan 2023 15:39:09 +0100 Message-Id: <20230119143911.3793654-5-michael.riesch@wolfvision.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230119143911.3793654-1-michael.riesch@wolfvision.net> References: <20230119143911.3793654-1-michael.riesch@wolfvision.net> X-ClientProxiedBy: VI1PR07CA0152.eurprd07.prod.outlook.com (2603:10a6:802:16::39) To DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR08MB9155:EE_|DB9PR08MB6556:EE_ X-MS-Office365-Filtering-Correlation-Id: e8eb3cab-14ab-4bff-c207-08dafa2af948 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Also, use a symmetric function pair to create and destroy the CRTCs and the corresponding planes. Signed-off-by: Michael Riesch --- v2: - no changes drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 31 ++++++++++---------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 374ef821b453..06fcdfa7b885 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -2246,7 +2246,7 @@ static struct vop2_video_port *find_vp_without_primary(struct vop2 *vop2) #define NR_LAYERS 6 -static int vop2_create_crtc(struct vop2 *vop2) +static int vop2_create_crtcs(struct vop2 *vop2) { const struct vop2_data *vop2_data = vop2->data; struct drm_device *drm = vop2->drm; @@ -2372,15 +2372,25 @@ static int vop2_create_crtc(struct vop2 *vop2) return 0; } -static void vop2_destroy_crtc(struct drm_crtc *crtc) +static void vop2_destroy_crtcs(struct vop2 *vop2) { - of_node_put(crtc->port); + struct drm_device *drm = vop2->drm; + struct list_head *crtc_list = &drm->mode_config.crtc_list; + struct list_head *plane_list = &drm->mode_config.plane_list; + struct drm_crtc *crtc, *tmpc; + struct drm_plane *plane, *tmpp; + + list_for_each_entry_safe(plane, tmpp, plane_list, head) + drm_plane_cleanup(plane); /* * Destroy CRTC after vop2_plane_destroy() since vop2_disable_plane() * references the CRTC. */ - drm_crtc_cleanup(crtc); + list_for_each_entry_safe(crtc, tmpc, crtc_list, head) { + of_node_put(crtc->port); + drm_crtc_cleanup(crtc); + } } static struct reg_field vop2_cluster_regs[VOP2_WIN_MAX_REG] = { @@ -2684,7 +2694,7 @@ static int vop2_bind(struct device *dev, struct device *master, void *data) if (ret) return ret; - ret = vop2_create_crtc(vop2); + ret = vop2_create_crtcs(vop2); if (ret) return ret; @@ -2698,19 +2708,10 @@ static int vop2_bind(struct device *dev, struct device *master, void *data) static void vop2_unbind(struct device *dev, struct device *master, void *data) { struct vop2 *vop2 = dev_get_drvdata(dev); - struct drm_device *drm = vop2->drm; - struct list_head *plane_list = &drm->mode_config.plane_list; - struct list_head *crtc_list = &drm->mode_config.crtc_list; - struct drm_crtc *crtc, *tmpc; - struct drm_plane *plane, *tmpp; pm_runtime_disable(dev); - list_for_each_entry_safe(plane, tmpp, plane_list, head) - drm_plane_cleanup(plane); - - list_for_each_entry_safe(crtc, tmpc, crtc_list, head) - vop2_destroy_crtc(crtc); + vop2_destroy_crtcs(vop2); } const struct component_ops vop2_component_ops = { From patchwork Thu Jan 19 14:39:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 45817 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp365358wrn; Thu, 19 Jan 2023 06:44:22 -0800 (PST) X-Google-Smtp-Source: AMrXdXs9gFpuh7XKUsI04n4555Eruq5TUYWQaQ5kP/Xfsyz2iX9Z411DGF6+2K61F/AHF+1uHwWn X-Received: by 2002:a17:906:cd1f:b0:7c1:23ef:4bb9 with SMTP id oz31-20020a170906cd1f00b007c123ef4bb9mr11142642ejb.13.1674139462477; Thu, 19 Jan 2023 06:44:22 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674139462; cv=pass; d=google.com; s=arc-20160816; b=mzAak0ntzbTtRnPENytkAcUDDOpoBxNX7CLS0MM1rXjV88E/nKYpcY7IgJ3odD3Cy+ 86mI7zJja60LzBEhzvU8fsYInZnU5YPFMC+dHy1jksciUJlg8a48Oqn7tUh8WT+AQ/AD rj1wW4aD9LPyw3s7HVvBz1eAF/DArhsBT4m2rnes6tdii5+NwRl/Cfi31+16bxrNX/1B c/t8SO3vqRcSv64S4coia+8M3g7yOf2WskiOORs7rjkLiXebYJjCQ68tEH+nEYB6QqYy Lxg3uJQAyD6GGDCrYsT8zlQyKZeGrGSvDs8HoAyUVUC8BxNwxXxAyh2C9MdmCQfDqhmC Uugg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=F2F3uF8cnXUZ/k+w9WKWhvCjJSIzUe3ncb1orqRKHaw=; b=ho0+HQxXz7d2y7nC6S/VA6kAhcG5a7VsbsejUnHgtRdxEVTKJZ3Tv0N8LPS8zgwnsJ cwi2zwjZDoozE9JqzLVzKveVnQlDlldDI+o0qseNWUSk+oyoVTP59bJV8K2DnQkc0jlN nHCGycKBaMefOS+i5VBVCD6Tb03WFKHJtoSkgD0LXbL0I60RK/K/+GTTSd4VoAF6OzXa IuZQBtB57TJzfVXaJN3VKR6v288eiF1+QqZV+zF9/p0Ar6BfW+DHyvnwj07Z8Za77gZB EIWCUugPr6cuPrxB36MJWNkyoBiOJ0hOK6ZYTpp2kjzw6J+ASwtl0oU2fpQPagVrS6NZ JmAA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=SoQLvlSy; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Add support for this output block. Signed-off-by: Michael Riesch --- v2: - move away from wrong assumption that the RGB block is always connected to video port 2 -> check devicetree to find RGB block drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 44 ++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 06fcdfa7b885..f30037d161ae 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -39,6 +39,7 @@ #include "rockchip_drm_gem.h" #include "rockchip_drm_fb.h" #include "rockchip_drm_vop2.h" +#include "rockchip_rgb.h" /* * VOP2 architecture @@ -212,6 +213,9 @@ struct vop2 { struct clk *hclk; struct clk *aclk; + /* optional internal rgb encoder */ + struct rockchip_rgb *rgb; + /* must be put at the end of the struct */ struct vop2_win win[]; }; @@ -2393,6 +2397,25 @@ static void vop2_destroy_crtcs(struct vop2 *vop2) } } +static int vop2_find_rgb_encoder(struct vop2 *vop2) +{ + struct device_node *node = vop2->dev->of_node; + struct device_node *endpoint; + int i; + + for (i = 0; i < vop2->data->nr_vps; i++) { + endpoint = of_graph_get_endpoint_by_regs(node, i, + ROCKCHIP_VOP2_EP_RGB0); + if (!endpoint) + continue; + + of_node_put(endpoint); + return i; + } + + return -ENOENT; +} + static struct reg_field vop2_cluster_regs[VOP2_WIN_MAX_REG] = { [VOP2_WIN_ENABLE] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 0, 0), [VOP2_WIN_FORMAT] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 1, 5), @@ -2698,11 +2721,29 @@ static int vop2_bind(struct device *dev, struct device *master, void *data) if (ret) return ret; + ret = vop2_find_rgb_encoder(vop2); + if (ret > 0) { + vop2->rgb = rockchip_rgb_init(dev, &vop2->vps[ret].crtc, + vop2->drm, ret); + if (IS_ERR(vop2->rgb)) { + if (PTR_ERR(vop2->rgb) == -EPROBE_DEFER) { + ret = PTR_ERR(vop2->rgb); + goto err_crtcs; + } + vop2->rgb = NULL; + } + } + rockchip_drm_dma_init_device(vop2->drm, vop2->dev); pm_runtime_enable(&pdev->dev); return 0; + +err_crtcs: + vop2_destroy_crtcs(vop2); + + return ret; } static void vop2_unbind(struct device *dev, struct device *master, void *data) @@ -2711,6 +2752,9 @@ static void vop2_unbind(struct device *dev, struct device *master, void *data) pm_runtime_disable(dev); + if (vop2->rgb) + rockchip_rgb_fini(vop2->rgb); + vop2_destroy_crtcs(vop2); } From patchwork Thu Jan 19 14:39:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 45818 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp365403wrn; Thu, 19 Jan 2023 06:44:30 -0800 (PST) X-Google-Smtp-Source: AMrXdXtR8eAfkQmc8v5i75GE7WCi6Wgv49dXGAVu+xaBht6sXGRIaQoTgyDPNDXPpASBQ5e/GnX8 X-Received: by 2002:a17:906:454e:b0:871:de7e:94f5 with SMTP id s14-20020a170906454e00b00871de7e94f5mr10883685ejq.16.1674139470184; Thu, 19 Jan 2023 06:44:30 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674139470; cv=pass; d=google.com; s=arc-20160816; b=P29qasGL/d9sRzipEHKQVfgp9kM5N4BsCqOyMoXCVZzTzBQvFRtTXN1NDAaSAb3l0f aGry4sIWFFlHNmk/0Pgfq4oNt3naVJbvJgau2V3kX+tu9+nAMg/4kqmASLW6Hxag5Kv9 1vwa1GSAEz6+/zqQwiSjy+LjZCQErO1nBD1HhvJNGTRANRHRfPPGYU0u+ceEf7cTBpT8 M0/szP6DMgW7ODv2n05zX4/KOaWvc177A0NCZutziYxGcMD1BFcsr3si8J+G5qzfCpqd +hAWUxggpQBSun/XlqaSXzbcSYFnRt1UxyXksS0CsHCw3vsByJmSZzmyMHRy6Kk1CprB +2tA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eEYoPRCiCB8m/KrOhtmvJIRuuqANDjXR6bpxvNkok4g=; b=FDjoaUbpoiAPgLYV3J1Twmo9Yia+gUm/FmJZKt1VoxLmps65I119LOfvkN/cL1jkTA Twb6NXgPX7UIOmI+n+a43wXrYhVviLlGyC3ekKANkpzF0CMYlkTozRLUaELObxp0eLzU jPzFNbtjRPQ6UTUlltZ/uZwQeVSQy+ym7qX3+6oTZsCAXbY2F/7gu2rZfBFxUTDU3oGR vgpkHvfDRGbNj5Z4Q0S8Spf34/YOq3sfqWueFzL5eMFfPr7XsNCKlSpip2Z1w8ktOFP8 2MVtD+fW55RiOAj4iyyRW13RRPUT6SsRGSRR/wM9az6YOC2tbVa3PCj0OwEUxXSs5Jct m04Q== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=0kWaI6Jx; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Add separate nodes for the 16-bit and 18-bit version, respectively. While at it, split off the clock/sync signals from the data signals. The exact mapping of the data pins was discussed here: https://lore.kernel.org/linux-rockchip/f33a0488-528c-99de-3279-3c0346a03fd6@wolfvision.net/T/ Signed-off-by: Michael Riesch --- v2: - no changes .../boot/dts/rockchip/rk3568-pinctrl.dtsi | 94 +++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi index 8f90c66dd9e9..0a979bfb63d9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi @@ -3117,4 +3117,98 @@ tsadc_pin: tsadc-pin { <0 RK_PA1 0 &pcfg_pull_none>; }; }; + + lcdc { + /omit-if-no-ref/ + lcdc_clock: lcdc-clock { + rockchip,pins = + /* lcdc_clk */ + <3 RK_PA0 1 &pcfg_pull_none>, + /* lcdc_den */ + <3 RK_PC3 1 &pcfg_pull_none>, + /* lcdc_hsync */ + <3 RK_PC1 1 &pcfg_pull_none>, + /* lcdc_vsync */ + <3 RK_PC2 1 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + lcdc_data16: lcdc-data16 { + rockchip,pins = + /* lcdc_d3 */ + <2 RK_PD3 1 &pcfg_pull_none>, + /* lcdc_d4 */ + <2 RK_PD4 1 &pcfg_pull_none>, + /* lcdc_d5 */ + <2 RK_PD5 1 &pcfg_pull_none>, + /* lcdc_d6 */ + <2 RK_PD6 1 &pcfg_pull_none>, + /* lcdc_d7 */ + <2 RK_PD7 1 &pcfg_pull_none>, + /* lcdc_d10 */ + <3 RK_PA3 1 &pcfg_pull_none>, + /* lcdc_d11 */ + <3 RK_PA4 1 &pcfg_pull_none>, + /* lcdc_d12 */ + <3 RK_PA5 1 &pcfg_pull_none>, + /* lcdc_d13 */ + <3 RK_PA6 1 &pcfg_pull_none>, + /* lcdc_d14 */ + <3 RK_PA7 1 &pcfg_pull_none>, + /* lcdc_d15 */ + <3 RK_PB0 1 &pcfg_pull_none>, + /* lcdc_d19 */ + <3 RK_PB4 1 &pcfg_pull_none>, + /* lcdc_d20 */ + <3 RK_PB5 1 &pcfg_pull_none>, + /* lcdc_d21 */ + <3 RK_PB6 1 &pcfg_pull_none>, + /* lcdc_d22 */ + <3 RK_PB7 1 &pcfg_pull_none>, + /* lcdc_d23 */ + <3 RK_PC0 1 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + lcdc_data18: lcdc-data18 { + rockchip,pins = + /* lcdc_d2 */ + <2 RK_PD2 1 &pcfg_pull_none>, + /* lcdc_d3 */ + <2 RK_PD3 1 &pcfg_pull_none>, + /* lcdc_d4 */ + <2 RK_PD4 1 &pcfg_pull_none>, + /* lcdc_d5 */ + <2 RK_PD5 1 &pcfg_pull_none>, + /* lcdc_d6 */ + <2 RK_PD6 1 &pcfg_pull_none>, + /* lcdc_d7 */ + <2 RK_PD7 1 &pcfg_pull_none>, + /* lcdc_d10 */ + <3 RK_PA3 1 &pcfg_pull_none>, + /* lcdc_d11 */ + <3 RK_PA4 1 &pcfg_pull_none>, + /* lcdc_d12 */ + <3 RK_PA5 1 &pcfg_pull_none>, + /* lcdc_d13 */ + <3 RK_PA6 1 &pcfg_pull_none>, + /* lcdc_d14 */ + <3 RK_PA7 1 &pcfg_pull_none>, + /* lcdc_d15 */ + <3 RK_PB0 1 &pcfg_pull_none>, + /* lcdc_d18 */ + <3 RK_PB3 1 &pcfg_pull_none>, + /* lcdc_d19 */ + <3 RK_PB4 1 &pcfg_pull_none>, + /* lcdc_d20 */ + <3 RK_PB5 1 &pcfg_pull_none>, + /* lcdc_d21 */ + <3 RK_PB6 1 &pcfg_pull_none>, + /* lcdc_d22 */ + <3 RK_PB7 1 &pcfg_pull_none>, + /* lcdc_d23 */ + <3 RK_PC0 1 &pcfg_pull_none>; + }; + }; + };