From patchwork Wed Jan 18 10:32:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 45179 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2279932wrn; Wed, 18 Jan 2023 03:21:58 -0800 (PST) X-Google-Smtp-Source: AMrXdXtljPFPNvkSFteU/QnSoMDgi6xm4CkY1H3R5fBfRQX1F2HT5KPLCJEsQR0HeFUlZ9F19RM8 X-Received: by 2002:a05:6a21:151a:b0:b8:927a:6a9d with SMTP id nq26-20020a056a21151a00b000b8927a6a9dmr6876678pzb.9.1674040918285; Wed, 18 Jan 2023 03:21:58 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674040918; cv=pass; d=google.com; s=arc-20160816; b=BluRjZbS2Yo4RtiKymYoHHBf6JTzWY5lPYAOzz1IjGWTH+T9OecfWgNMJ/LadLa6GI L0G9jzKICPu63FuZ4E5mgZMVpMweg0b69UnL9k9PZXM/3JwcP32YLo86uf8+4q6IEb3K vy8EyBynVFJyBp2SJU6+gMlQ3rh5agzsMxRATZU0V618sTfhGIqKcfTg+XUtzA9HReiK tBBbiCDdv4zQN/K8eHYX+pVyfSwf/WtluORXWQNQULstWVF5By3Mlhvb+3lBBczurL+2 fIfWmYAAfnHBdXqcF1wNeswx3FllizDoL5+AxTiLydYnJrKtzSGfBXmfW05mY1aiWOCv L2hw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vryhRBJFdNxBWzhe/MQfm5Mx7tNmJ6fraVBj+N90tAM=; b=R3lvCvzjuDyUq7WyDPYQloQxVnPkighBZLKrh9lQ52y5pOXcRIeCrS1DADw2wNRBPc WYrUjDaaRh9RPXIKVb/QibW0rcV5MNvheNqOzewA+OHFIJRboOkS4Z40emKCzF2X8LAZ uF40K18sVZiGkhdzJ63dy3vsJziQs7HlplXsiPNhFISBvy3Ur0WYnUnX+yJpktpSmT9+ HOFgg7ZnqHHSiQkAzVP+bV55rn7dShKTHNU4RJSNszMtvbyAaJ62jkQlNe8xVVria5VG kf3HCQ5CnrvgkH/vATZSrSomSQZazojemBavNaFLz7BQXS7UuCsqfsD2h/zckVLcbMEM QqCQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=LZ1SWqIU; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h184-20020a6383c1000000b004d01272f820si2651132pge.616.2023.01.18.03.21.46; Wed, 18 Jan 2023 03:21:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=LZ1SWqIU; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230032AbjARLTD (ORCPT + 99 others); Wed, 18 Jan 2023 06:19:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230281AbjARLQp (ORCPT ); Wed, 18 Jan 2023 06:16:45 -0500 Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-db5eur01on2077.outbound.protection.outlook.com [40.107.15.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17BDA458B1; Wed, 18 Jan 2023 02:32:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=YsYqyBDSstqF1o4hC3ZZCwpC+q8vzo7xCf38KX0NfWSG4BjZ/HMO4gCwPibyDEQzL3MyXUAIpTbuUafWcZnlNR2+42kTwhmBtwYSZUXljcOrh7aEPoNFtSkuJjrEMBP3fR3LZbrKXXOPtEgIGZz8nYMHRVQPrtMiKWctx6fa/3zqde6VJkRPOiNuQ6zh01vwJ6vSBaYbuIHdh//qxB9nuePi1IOb7rPsqr/KORUtzBZ3lHN8N5WVkhPj+7UzQ86WwL4lGitk0ioCl5AmYvfnwY0TKfq9l5YqpztGQw3CpXs34xplQnz+tVoZK8bJfZWs0HO3jXwYE2oi5a01hNo6rw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=vryhRBJFdNxBWzhe/MQfm5Mx7tNmJ6fraVBj+N90tAM=; b=KpWVowkGF8jImEnTlru2/zkoDiElw/lwceZEpoLetnylFIfPwk8JJrFqoDs49Nf+ZIVHorlITDBRLEjfx81JPEdaYIG1CNrJmmCY2MxZ8T9vx4j2KzRWM2oYVaBF2FqKgp0DrHtnArLItBOoQuQitBndOhx5YEVNoQpn19zFY4ldH0rbq9Dw5IbWvc6U7nilgMAbRk1k0czEI6A8Zvxe0s19vyOQcM7oyimhYbt+DsFTxcYrqi1chuqdxXNJt8qYBTcWmR+YBFRpvf3Yt7abIH4VDvu0JfQ+brhGDfTlSZG8dx7DPRH9c56RC7Igw6g00k6qNLsEwKCJctmMMD1uDQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wolfvision.net; dmarc=pass action=none header.from=wolfvision.net; dkim=pass header.d=wolfvision.net; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wolfvision.net; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=vryhRBJFdNxBWzhe/MQfm5Mx7tNmJ6fraVBj+N90tAM=; b=LZ1SWqIUybPVKyuz6kpHGEe+i/SvLx7XGBP/I6ntPAjfbvdTN8zdTWJAJSuuEmqhYH2dJ8JI8sHqzyZJ4e4fb3gpA6tr/esrQKc07UW3ho1rlRiE3EmZQOPBzYq8wfJSQ/WfTqGMAEX4MQ8sepG+h/I8cf5WWtiSDWJoDQg+fqI= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=wolfvision.net; Received: from DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) by AS8PR08MB5990.eurprd08.prod.outlook.com (2603:10a6:20b:296::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.12; Wed, 18 Jan 2023 10:32:55 +0000 Received: from DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219]) by DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219%2]) with mapi id 15.20.5986.022; Wed, 18 Jan 2023 10:32:55 +0000 From: Michael Riesch To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Michael Riesch , Gerald Loacker , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Sakari Ailus , Shawn Tu , Laurent Pinchart , Hans Verkuil , Marco Felsch , Mikhail Rudenko , =?utf-8?q?Krzysztof_Ha=C5=82asa?= , Marek Vasut Subject: [PATCH 1/2] dt-bindings: media: i2c: add imx415 cmos image sensor Date: Wed, 18 Jan 2023 11:32:38 +0100 Message-Id: <20230118103239.3409674-2-michael.riesch@wolfvision.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230118103239.3409674-1-michael.riesch@wolfvision.net> References: <20230118103239.3409674-1-michael.riesch@wolfvision.net> X-ClientProxiedBy: ZR2P278CA0021.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:46::17) To DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR08MB9155:EE_|AS8PR08MB5990:EE_ X-MS-Office365-Filtering-Correlation-Id: 50850b39-bd3c-4364-0743-08daf93f5bf9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: YadP+eanf9tbRlRwLtxHl1d08wcNsavUI6ipId/hfQOcXf0VIYkvMIBqpd03ic2QmnB4ok4cqeJpbSRvvF1vcllSYw6eADNBGFD778nkxOw5R9xkw/imgV+zOCTgiOdFUYIgayOphMlhGZbDaqGhHVtSh+LxP+mxg/nk3bX/mN7ns9oeRCytuNkhGUaFo1UdDGSmcdfojpUwAS2EjPF7Q/J4s+f3YuqlQjtI7qi0Ju01ylyTW8D7Lt8lJA8phJuk5NK35RS0sQFOd2/MTRnPDOFxLzpOfPMHbHyqiV3I8X24e/BEx/EQ9DvC1/gdJVicVypjsl68ryrr84ZZI/C+7D1HK9C6FLLREDmdfTkreylUZRMuWu+Pnn8u5H0IUJwLfnY9Ljfu5qmRdwsc+Pl46iQoWlp7TuRf7iix1TGTU9rL83Q8t3JJ2A2H7KDXqNhBs2uUi0Jfc3zgI6PjGCr76ODPdH83HBlRGpWqtP43yp7rNR0HN6begqtYQ7GB+4T6LPH3jmvBMM7+8INRbCSwKMzTtMN+Xcz+5URSFcYUFiLpqk9Gv+902Ld928HMJX5GvqCkrR6OKrNz7tXV74i2/87avSh/TJ7vOWjBygEEX1V4TU7nVTX7t5KZLjKV3orQJLh29DOynhK4SWRS0y43NOVaJ6s4t+D+OcIrh3TxT20= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DU0PR08MB9155.eurprd08.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(4636009)(39850400004)(376002)(396003)(346002)(136003)(366004)(451199015)(52116002)(4326008)(6486002)(966005)(478600001)(36756003)(86362001)(38100700002)(6512007)(1076003)(186003)(2616005)(83380400001)(2906002)(6666004)(6506007)(316002)(5660300002)(66946007)(7416002)(66476007)(8676002)(41300700001)(66556008)(8936002)(44832011)(54906003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: PQrtg3+1MdXeaB7f8sfJ8HTnJocJoHmcpHsnlZgkMzrid/pdygBid35hFpEHx14mieXwuE1dM8iNB7Ghu94PrgF2GG+QJ8RUEBf9rdedkJKhoPuarRcDpB0HQOuBinncRGL7Y3PrG0BQaVjYtdCi2UOIblCoXH/lGlG3hfXXoz8iilWzYWER09ZTmRNEhbduVyYYE73GFAaLWw4tr+5lWZ9uAqSPnQvRlv5QcccKw+L0NKZJh3BdTrxcNQ5VpqThWZ1LjhX84YuY7+vyGDtm/1XUYq5Scf8qoSxwAzrY3MPK3ahyZpbtPbPBLSfl7+AO0p6FSzefj3k2yDfkUxTMnZFs5+o5yvzp8g6FFdl3vk7PZHn/wXM+VHbVZeFnGkR6g2fKGG5yP+3FOwNaerbjOCe23zr+9jWu2NQgrSSKT/Ke1OEGZztiH0ah9akdINiGBt3LpuK7xMKA4kHoOvf/h9aVJTA8NiMsy6VrR0SZjexbOH6KOvfYHpak5+KgsqjE1AVgqjJED+J/sGiIbHUGQp2z8vLZ+FK67zt6il7B2zJXWMeRcq8JSKGgXbGJAM+Mnok192JY+jNfUa45LlwHpJCbX9poDpn2ACCXxZdMCH/fweyjeMc6ccSrE4p1qOUgIuz6qQODFcVQQzeWqWaYt79AmljqGvZRI8IZTYeQWmUnqWCyUfTk34d7L7TfBK0wu9hIeHZYV9TtBYEG+7R3jEZou0tUeFDu4N+hywWIVUwL/2zhxdlvTlncN6iq4sUp72gt27hHEAlsvzpqAf00UtBkpNw46VdNbTGR21x2gZcacCwqYG8PjKn+QM5AZOLkzY7kPssqd/sJnzwMs8rKXRF0LuDNW/j4POE7g5nbGTj5xt7WjaYwwCWJnjHUc7EDio4TP/1AfKt7ytfbitX1/HkKghV8LrmapOKo7UWL+GsEN5+LfXjFLglFwD57y9ZQ8prPek2/u+54QO1vc/EwEIVdmYNxNaRJ0drFVP6VyMp5zwCzfG5KV6y86m/vETovnmAq1ONbwofzOMa7RdFWvNWIVm722k2/vu8yNTBH0F0vhTES2FlcoYozK0a5DXTu3tYA1bMRXT4uhVp5t/htiwroGwNaXEdn2FirSF3n52Gku7O2sMTpTWdFjq70Kialp1Pa+O+15OkOvvNM/MA1pRgFSQfQno6xSyAmLs5Q10VU1hsI0Wx2yND4f5GILrLEc9gI9wqksnq+/lJLYCwOIQB+3PJvof0udqG9gXRRucMV1JgCnJM2rZaHwy3TBL9/kiBhYkOSy/G1T1931ayiVdiUeemIkm6+Ng+AiJS0YRa4hCZSj1muEaj+WyQ8HiBge7/ZXgrMp3pdBeK3xgRmK4h+Hec3/aCHeXIxKeTmYuXUzmBN6bWI6iKpcxGJKcg7CIWnupdwLyZAjY9wUTK8YEhV+F1hm6Z7VPlx/VeTK/I2nY2EiiWPvl1b8JEzRYLGBMoN8p7EiGxG+m+fzkcBk9n5wVfkNhzex0NXaaL4YJk/IWD7pNUlmT5k6/2Cpqb5R6zA4rY87SKOerDDA2d62Uuej/Ws7Sht8XiwmSzN8+QiyS89mGlUkQxUzZF8SawbA6QPBU7rGKj7QTbcp6B6+3QjAZTdzfg82k4cK5N4KHbxkG0ZQtOU3b2eFAQZ20pikHjljs7NzskVwA830zqIT6kJfDddTUr3vOYQLo1ME+4= X-OriginatorOrg: wolfvision.net X-MS-Exchange-CrossTenant-Network-Message-Id: 50850b39-bd3c-4364-0743-08daf93f5bf9 X-MS-Exchange-CrossTenant-AuthSource: DU0PR08MB9155.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2023 10:32:54.9211 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: e94ec9da-9183-471e-83b3-51baa8eb804f X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: exebdLwgQx81IgVNf3MdmyTjZMpmTfWgR7HMop2aewK6v+GCmd3ycjlhMq0zy7U0wfWjhLLAxTXEmHr6+7jZWMp8iRazKFmaZY0FsmlQpS8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB5990 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755359130166684406?= X-GMAIL-MSGID: =?utf-8?q?1755359130166684406?= Add devicetree binding for the Sony IMX415 CMOS image sensor. Signed-off-by: Michael Riesch --- .../bindings/media/i2c/sony,imx415.yaml | 120 ++++++++++++++++++ MAINTAINERS | 7 + 2 files changed, 127 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml new file mode 100644 index 000000000000..ae54834a2341 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/sony,imx415.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony IMX415 CMOS Image Sensor + +maintainers: + - Michael Riesch + +description: |- + The Sony IMX415 is a diagonal 6.4 mm (Type 1/2.8) CMOS active pixel type + solid-state image sensor with a square pixel array and 8.46 M effective + pixels. This chip operates with analog 2.9 V, digital 1.1 V, and interface + 1.8 V triple power supply, and has low power consumption. + The IMX415 is programmable through I2C interface. The sensor output is + available via CSI-2 serial data output (two or four lanes). + +allOf: + - $ref: ../video-interface-devices.yaml# + +properties: + compatible: + const: sony,imx415 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + description: Input clock (24 MHz, 27 MHz, 37.125 MHz, 72 MHz or 74.25 MHz) + items: + - const: inck + + avdd-supply: + description: Analog power supply (2.9 V) + + dvdd-supply: + description: Digital power supply (1.1 V) + + ovdd-supply: + description: Interface power supply (1.8 V) + + reset-gpios: + description: Sensor reset (XCLR) GPIO + maxItems: 1 + + flash-leds: true + + lens-focus: true + + orientation: true + + rotation: true + + port: + $ref: /schemas/graph.yaml#/properties/port + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: true + link-frequencies: true + + required: + - data-lanes + - link-frequencies + + required: + - endpoint + +required: + - compatible + - reg + - clocks + - clock-names + - avdd-supply + - dvdd-supply + - ovdd-supply + - port + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + imx415: camera-sensor@1a { + compatible = "sony,imx415"; + reg = <0x1a>; + avdd-supply = <&vcc2v9_cam>; + clocks = <&clock_cam>; + clock-names = "inck"; + dvdd-supply = <&vcc1v1_cam>; + ovdd-supply = <&vcc1v8_cam>; + lens-focus = <&vcm>; + rotation = <180>; + orientation = <2>; + reset-gpios = <&gpio_expander 14 GPIO_ACTIVE_LOW>; + + port { + imx415_ep: endpoint { + remote-endpoint = <&mipi_in>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index f61eb221415b..c9fa893bf649 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19493,6 +19493,13 @@ T: git git://linuxtv.org/media_tree.git F: Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml F: drivers/media/i2c/imx412.c +SONY IMX415 SENSOR DRIVER +M: Michael Riesch +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml + SONY MEMORYSTICK SUBSYSTEM M: Maxim Levitsky M: Alex Dubov From patchwork Wed Jan 18 10:32:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 45180 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2280143wrn; Wed, 18 Jan 2023 03:22:30 -0800 (PST) X-Google-Smtp-Source: AMrXdXtOZ+exHUeA0xMrH9Kseaa2XnqkYMIWEoEn606eTAEjfLXpvRwSitb+pqJnbpIMYxG8LVan X-Received: by 2002:a17:906:2743:b0:7c0:b4bb:919 with SMTP id a3-20020a170906274300b007c0b4bb0919mr19057930ejd.10.1674040950089; Wed, 18 Jan 2023 03:22:30 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674040950; cv=pass; d=google.com; s=arc-20160816; b=hJ2ZOJp4E8u4g/VsjC1oPQezUD+M9FwE7hkZ9ZIgiQhtsIxELIQJ4Ya5eiu/d8IRmy 6l5U5rfdUAEiWQClTbB0wc2AOMjB+0TlOOio8herbScJc31rpU8DG5eiqOws77KaNC79 u27krhXyEi0L9Jfp8QvpgAC/fyUAVvQBPECqsQtfJj+nfh0S4SYN5TUEvy2vr3JGEqxn du8fJdg4z51wM75/cspZF+auSk1bgfWPeaWiZ9LJMsbSlcN4zfCfdoRB1IAp6t/n3wQv lrRhE3QdfkSVHkF6nJmVBxK6+yndhAohw00kJahxdmjyKV4mbszn6EQFhSsOCfExwsav 8+IA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9A6B9nWwssJ3vj36QtEVl8rP2N0QpaP8K/Vo+cI9ZS4=; b=MSQtr4gUS56BJhUWdn4d9cH9WKuF/gVcQsoADa2oBu5KwT9lKaKYkjH5CMrZVtQFq6 tLeWIxFX5Rk8nZ9O7sge5J1TVaz5bkJ89mS6b/qrgCghnkqc/Cf5DvhIapKImAosAqjQ RuEZAn7r66wj60+bGqR8se/Ob4/cI7yW2CoqBuKSjGhFBiLHmwAwMvUEl0gFzziWjgzU suPjLiSNQArpVAal64Zm7WhlhsMCC9w04o2IzNkpMPG8FMaMknhtmAHMBkXUqcqShjKi khUt/bNI9e9OP9Q5ehNdFKNdsF+UE6nWFtxm+zK1Qa1ez/pgbqmNi8JTsjTVte3/O0nY GWfQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=C4n5QK1v; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dd3-20020a1709069b8300b008775fc70972si1134260ejc.186.2023.01.18.03.22.03; Wed, 18 Jan 2023 03:22:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=C4n5QK1v; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229567AbjARLTZ (ORCPT + 99 others); Wed, 18 Jan 2023 06:19:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36688 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229854AbjARLSi (ORCPT ); Wed, 18 Jan 2023 06:18:38 -0500 Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-db5eur01on2077.outbound.protection.outlook.com [40.107.15.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E53E460B4; Wed, 18 Jan 2023 02:33:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=lKNV1Z57TCUn3U91oiH4B2AEJzlpRY/kRB3c8O4rA70gGYL9GaMROIFVTXhCPELnDd4g8doEFKba8mZPgFJdgaXG9UrhnrowDVJQEjnOmjIgISTRhk1XltDSQacq2rddbqcKbTCUNFKftrB/64ELsurEdv5kYFRgRYSMjJNJhvKGDWcGMHp4bCEFj04bC20pYvlZPfuNdOMdQmmjS6JNegabnNixdwbMzKm/Xgd34+Q4nANC1imCX8HHB5m4K6vMEAs0DO//gD/5t2Da3IaFkcYDYLe4g/RM4lDZSBhAW24VO243BqJzp7YX8jxb/ph3GbRF8+/yAvrWNlewNe4A6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9A6B9nWwssJ3vj36QtEVl8rP2N0QpaP8K/Vo+cI9ZS4=; b=DBkktOVceDJmVz79n8NdB72E54TzinqvtUDQ8BVHb3rfxglcX5KBJ46T7H5i5oxhdmuZ2VZZjZidhE4MZ/tuXxio4XrdBO+OQTKi6CzZtD885uUlJk3snLJhaNHshQzUOUlzc6RRiZil0k9r+siyCqWuqvecaSV38Nx9LGykqjLrH/EgK2Ge1YF2LMf+HHWUsJxDm3zT49d8nc+G437ySdR71gPcE1gX0LDw1gDxBOzFtk4QHK8oz7gVmNPLspUCpMaOP1MzKqntWkuJriBM0Kkdtju5quk4WkT+O0cCB6CJwsgWRCNP4pViyFLKHiv+BWTFk/Tbgv5qly+G4/Rr+A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wolfvision.net; dmarc=pass action=none header.from=wolfvision.net; dkim=pass header.d=wolfvision.net; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wolfvision.net; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9A6B9nWwssJ3vj36QtEVl8rP2N0QpaP8K/Vo+cI9ZS4=; b=C4n5QK1vpoC5MIbeNMPuGfZrnOqnDjE/CH0K1rX3GOwMr9zppdhRCUJySHucZAdRnkKOGcsVtYD4FkaNh+BD7MlQk9rGLl31zB3J0XktzZPA7r5rSwdI3yLdcoDKUMWXovl17Ix0C7591IpavSZm485N/EcNxgNie6MmgOPcd9U= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=wolfvision.net; Received: from DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) by AS8PR08MB5990.eurprd08.prod.outlook.com (2603:10a6:20b:296::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.12; Wed, 18 Jan 2023 10:32:56 +0000 Received: from DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219]) by DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219%2]) with mapi id 15.20.5986.022; Wed, 18 Jan 2023 10:32:56 +0000 From: Michael Riesch To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Michael Riesch , Gerald Loacker , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Sakari Ailus , Shawn Tu , Laurent Pinchart , Hans Verkuil , Marco Felsch , Mikhail Rudenko , =?utf-8?q?Krzysztof_Ha=C5=82asa?= , Marek Vasut Subject: [PATCH 2/2] media: i2c: add imx415 cmos image sensor driver Date: Wed, 18 Jan 2023 11:32:39 +0100 Message-Id: <20230118103239.3409674-3-michael.riesch@wolfvision.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230118103239.3409674-1-michael.riesch@wolfvision.net> References: <20230118103239.3409674-1-michael.riesch@wolfvision.net> X-ClientProxiedBy: ZR2P278CA0021.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:46::17) To DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR08MB9155:EE_|AS8PR08MB5990:EE_ X-MS-Office365-Filtering-Correlation-Id: 788a04b7-933c-40f3-6b83-08daf93f5cff X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 8ywhBCvL/wTvJMOBljNvVxNnK8ujDd6pUs0/sW//5EuPGxq2SNf4Vg7IqDyariQJnA5LdLaJJ/JwpaxvUnqN44GJmuAVa40BcZSi7UKcW8PckIn1q8da+fhQ6ZUKbZuxVoxzHCwb/L54ovPTI0I8osld1/+QVGS5GmULA0a6fLLMZGjRm5sLLUkOmXaAo1NGfC4xuogwOOfVEFvIxVn/IcThz0DNgAecqDub7lEgHFDsVtDPil1N2ZDxicrbsRbJfiZWcodtlSJu89sn86fmEwM4efdtbbt10hYU9Sym1caGhePn7XWH1nD55PJvjIFmbmyzzW5JsX4coNjRnFf1DfqqjRNOEEOx84cA+vtyctx43Uu28TomLvZSaO9nl80YZvUA/YiTjLSdoUSStAhZcyL+BYytwgOGZLqjiEVZNiVD4rWACcCO7Zw50MeY/mU4cqiIev5R+RZaIGm9ukwoC0WtXuaX5N5DKEcGpchQbw9HmswbFWQfR4ib6tw8lKesteeVEX7idGygNCeweCC7D7CG5I4/SnK7yGQiOs90VoUA3ThrE3e6UjpI/2/QMoK+Ne7lQVLSat7ASngRz+MZI+1bGr7uiTW+KV8JuDk+pfI4kHMbdVSg85vcEmIcH04JM+RuoIf++dUAZ3pJ9eH8SA== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DU0PR08MB9155.eurprd08.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(4636009)(39850400004)(376002)(396003)(346002)(136003)(366004)(451199015)(52116002)(4326008)(6486002)(478600001)(36756003)(86362001)(38100700002)(6512007)(1076003)(186003)(2616005)(83380400001)(2906002)(6666004)(6506007)(316002)(5660300002)(66946007)(7416002)(66476007)(30864003)(8676002)(41300700001)(66556008)(8936002)(44832011)(54906003)(579004);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3f/WPjEJTcUJSMdDD1XdcKnW2RYOC5ZgtiQ67rf8ovLT2s17yIyvy+OKOBrd3QmRlsxxYmt2iDZGak9VSouK3eBdQXILaVX1rx6GA9ubV8WqA5/6HR54Qj47SUg7hyexUo3G8BOar89nxMXNRO/jPOvpfhn5oHMBTJL6FVUiC+bPxHdKTJUB553+ws6YQ+3hs9+SeOzJgYF1Fo8bM/Aqb3txAvkkzTnFjrKPkOqR+/+YrSAJnwpfixzMZ9HjCCempI4HKMU3l3GLxqFhdiG7y/URc75fk+t4oXfrVmFV1dC09GqgSTUQ9k6l/fm+W0vbDS/jtcZViKuN60+tvU42yWWl/VD6MBGR+aCa+LAUxalo9q5vV8jNCNFxm3QRI5oW4AASAbo1ENkInonl4j4fpQuMyEHAFYe5Y41pcmgwZuL5hUTk9uWi1DC6TQPb17MAIBM1fi585TG1xTfpuRZRpl6u3fcFsvL+sppVh0Zk6/CTfTnngDSYi9KNjlG3SapMCr1bCLgrGNRRzB3AtSomfS7hyqiN7pZ9co2R+y8A7PqKnFsbrSjDfULhLVsCeUbsXynXaz+WFBMMDP9fc/XDb3oPXkLNhS9/6w9SdKPGPlXwHR8Vr3HJZfTAec2B5Cu+q5eZG3PiK33B/cUja3dgeqHbyF3ygX6y9VqBORtGLLdgiszQO6heO+wD3HQz0zy+8Qz93gxNT+hy+SMcraPU8YGwxdse8hVurvkoL3Bre8KCqjijbltDNvQB/EtX4rCPAKQrJ9nDzXswstk8tiQfH86KHZvlwOgUpWoG72xPHK/PE05O+mSw7G117jAdyJW5m3cgfdBg7OLdvnmEvDgogvh1DMJOPN0aKZoNqf+QB1WHzcpYuUX4xvBb2eGhsKSnVZO/E708fFaO+3/Fd20eRgg/C1TII+D8DVPeyZhc1MJa3FLSPELeOadoMUfJfhCBDTlXnq6K/G2pUcHYwZ+jYdsxmDTiTNfWBZUqROsfFB8Y5RoWj64GcEIum4BNvRp4HOeblUCnyi5dJlLiAF94XC9vuU8+3y+SogHVbI/fmIrP1rwyZ9qpT1dEWZ6tNccrnRhvDpquLCOxS1UlvoWrb/VbgWzNJ7zGLFGIH3JxvsFTp0Bbn8yS7Nqu81j7MsRPWtTUh2KRED6Tif0y/YRQeKkum7TPb3nTUkiar1UL49qfXK9HMA06VlTB+tliRzhQ7OT2zP/KAqdqhrqtDF1oqJ4LTiJ0+VGTuedVRVLGPlnlSBuWKyh7q/1krxWIgNdrEm8Tcx4R3sImJCoSBDvbvhAfAEo5pAYJId309eySLUskMPUbhVwXEYSFsQM3yMpoE6LpIqKA9Jq7DvNdUv5epJ2GnxOB0928rWoO1XYXZ9kTE/I2mESZ+L2W2lGY4aj30LwKl5kmc3sxcpJAxKV7uVXZIvEDqC6mGuHwBorwA9x5PW4zxYGJ+okH+kCDyiBYCEgVJbeXdibFhMOTVJ86ymMHDKMg9YrDORL9nNG6Dys0q70dDToazwan7fB+ZqjKHZ2jBKa/1ox2TofEfVQslTGlnwXfc/SsKISrijXVvwc96OaxoArgMxd6sii5kJFuPK3hE2k3A8mE6d8G34WEAFfPMQxyMrngdzCQH2RP21LS0zzQi6aadakbooWHggt8nM//KLAfp9DfUmrTuYlU3Pg9miEkR22BERQpYMzTj0g= X-OriginatorOrg: wolfvision.net X-MS-Exchange-CrossTenant-Network-Message-Id: 788a04b7-933c-40f3-6b83-08daf93f5cff X-MS-Exchange-CrossTenant-AuthSource: DU0PR08MB9155.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2023 10:32:56.7970 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: e94ec9da-9183-471e-83b3-51baa8eb804f X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: cNa4a/TxisAxtxqos1fkOiNI8ItJFbP8RwlcFbOeAmAc+7WqPI+ryMa/T1/fztw4l2CAQjQRyw24tdpT9fP0gV9FtrTCE6d8XOSlSVHNFDE= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB5990 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_PDS_OTHER_BAD_TLD autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755359163097398150?= X-GMAIL-MSGID: =?utf-8?q?1755359163097398150?= From: Gerald Loacker Add driver for the Sony IMX415 CMOS image sensor. Signed-off-by: Gerald Loacker Co-developed-by: Michael Riesch Signed-off-by: Michael Riesch --- MAINTAINERS | 1 + drivers/media/i2c/Kconfig | 14 + drivers/media/i2c/Makefile | 1 + drivers/media/i2c/imx415.c | 1296 ++++++++++++++++++++++++++++++++++++ 4 files changed, 1312 insertions(+) create mode 100644 drivers/media/i2c/imx415.c diff --git a/MAINTAINERS b/MAINTAINERS index c9fa893bf649..803bcfa0d102 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19499,6 +19499,7 @@ L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git F: Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml +F: drivers/media/i2c/imx415.c SONY MEMORYSTICK SUBSYSTEM M: Maxim Levitsky diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 833241897d63..f7c3d6232c15 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -228,6 +228,20 @@ config VIDEO_IMX412 To compile this driver as a module, choose M here: the module will be called imx412. +config VIDEO_IMX415 + tristate "Sony IMX415 sensor support" + depends on OF_GPIO + depends on I2C && VIDEO_DEV + select VIDEO_V4L2_SUBDEV_API + select MEDIA_CONTROLLER + select V4L2_FWNODE + help + This is a Video4Linux2 sensor driver for the Sony + IMX415 camera. + + To compile this driver as a module, choose M here: the + module will be called imx415. + config VIDEO_MAX9271_LIB tristate diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile index 4d6c052bb5a7..810c615d7e32 100644 --- a/drivers/media/i2c/Makefile +++ b/drivers/media/i2c/Makefile @@ -48,6 +48,7 @@ obj-$(CONFIG_VIDEO_IMX334) += imx334.o obj-$(CONFIG_VIDEO_IMX335) += imx335.o obj-$(CONFIG_VIDEO_IMX355) += imx355.o obj-$(CONFIG_VIDEO_IMX412) += imx412.o +obj-$(CONFIG_VIDEO_IMX415) += imx415.o obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o obj-$(CONFIG_VIDEO_ISL7998X) += isl7998x.o obj-$(CONFIG_VIDEO_KS0127) += ks0127.o diff --git a/drivers/media/i2c/imx415.c b/drivers/media/i2c/imx415.c new file mode 100644 index 000000000000..a8f0b7e0bee8 --- /dev/null +++ b/drivers/media/i2c/imx415.c @@ -0,0 +1,1296 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Driver for the Sony IMX415 CMOS Image Sensor. + * + * Copyright (C) 2022 WolfVision GmbH. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define IMX415_PIXEL_ARRAY_TOP 0 +#define IMX415_PIXEL_ARRAY_LEFT 0 +#define IMX415_PIXEL_ARRAY_WIDTH 3864 +#define IMX415_PIXEL_ARRAY_HEIGHT 2192 +#define IMX415_PIXEL_ARRAY_VBLANK 58 + +#define IMX415_NUM_CLK_PARAM_REGS 11 + +#define IMX415_REG_8BIT(n) ((1 << 16) | (n)) +#define IMX415_REG_16BIT(n) ((2 << 16) | (n)) +#define IMX415_REG_24BIT(n) ((3 << 16) | (n)) +#define IMX415_REG_SIZE_SHIFT 16 +#define IMX415_REG_ADDR_MASK 0xffff + +#define IMX415_MODE IMX415_REG_8BIT(0x3000) +#define IMX415_MODE_OPERATING (0) +#define IMX415_MODE_STANDBY BIT(0) +#define IMX415_REGHOLD IMX415_REG_8BIT(0x3001) +#define IMX415_REGHOLD_INVALID (0) +#define IMX415_REGHOLD_VALID BIT(0) +#define IMX415_XMSTA IMX415_REG_8BIT(0x3002) +#define IMX415_XMSTA_START (0) +#define IMX415_XMSTA_STOP BIT(0) +#define IMX415_BCWAIT_TIME IMX415_REG_16BIT(0x3008) +#define IMX415_CPWAIT_TIME IMX415_REG_16BIT(0x300A) +#define IMX415_WINMODE IMX415_REG_8BIT(0x301C) +#define IMX415_ADDMODE IMX415_REG_8BIT(0x3022) +#define IMX415_REVERSE IMX415_REG_8BIT(0x3030) +#define IMX415_HREVERSE_SHIFT (0) +#define IMX415_VREVERSE_SHIFT BIT(0) +#define IMX415_ADBIT IMX415_REG_8BIT(0x3031) +#define IMX415_MDBIT IMX415_REG_8BIT(0x3032) +#define IMX415_SYS_MODE IMX415_REG_8BIT(0x3033) +#define IMX415_OUTSEL IMX415_REG_8BIT(0x30C0) +#define IMX415_DRV IMX415_REG_8BIT(0x30C1) +#define IMX415_VMAX IMX415_REG_24BIT(0x3024) +#define IMX415_HMAX IMX415_REG_16BIT(0x3028) +#define IMX415_SHR0 IMX415_REG_24BIT(0x3050) +#define IMX415_GAIN_PCG_0 IMX415_REG_16BIT(0x3090) +#define IMX415_AGAIN_MIN 0 +#define IMX415_AGAIN_MAX 100 +#define IMX415_AGAIN_STEP 1 +#define IMX415_BLKLEVEL IMX415_REG_16BIT(0x30E2) +#define IMX415_BLKLEVEL_DEFAULT 50 +#define IMX415_TPG_EN_DUOUT IMX415_REG_8BIT(0x30E4) +#define IMX415_TPG_PATSEL_DUOUT IMX415_REG_8BIT(0x30E6) +#define IMX415_TPG_COLORWIDTH IMX415_REG_8BIT(0x30E8) +#define IMX415_TESTCLKEN_MIPI IMX415_REG_8BIT(0x3110) +#define IMX415_INCKSEL1 IMX415_REG_8BIT(0x3115) +#define IMX415_INCKSEL2 IMX415_REG_8BIT(0x3116) +#define IMX415_INCKSEL3 IMX415_REG_16BIT(0x3118) +#define IMX415_INCKSEL4 IMX415_REG_16BIT(0x311A) +#define IMX415_INCKSEL5 IMX415_REG_8BIT(0x311E) +#define IMX415_DIG_CLP_MODE IMX415_REG_8BIT(0x32C8) +#define IMX415_WRJ_OPEN IMX415_REG_8BIT(0x3390) +#define IMX415_SENSOR_INFO IMX415_REG_16BIT(0x3F12) +#define IMX415_SENSOR_INFO_MASK 0xFFF +#define IMX415_CHIP_ID 0x514 +#define IMX415_LANEMODE IMX415_REG_16BIT(0x4001) +#define IMX415_LANEMODE_2 1 +#define IMX415_LANEMODE_4 3 +#define IMX415_TXCLKESC_FREQ IMX415_REG_16BIT(0x4004) +#define IMX415_INCKSEL6 IMX415_REG_8BIT(0x400C) +#define IMX415_TCLKPOST IMX415_REG_16BIT(0x4018) +#define IMX415_TCLKPREPARE IMX415_REG_16BIT(0x401A) +#define IMX415_TCLKTRAIL IMX415_REG_16BIT(0x401C) +#define IMX415_TCLKZERO IMX415_REG_16BIT(0x401E) +#define IMX415_THSPREPARE IMX415_REG_16BIT(0x4020) +#define IMX415_THSZERO IMX415_REG_16BIT(0x4022) +#define IMX415_THSTRAIL IMX415_REG_16BIT(0x4024) +#define IMX415_THSEXIT IMX415_REG_16BIT(0x4026) +#define IMX415_TLPX IMX415_REG_16BIT(0x4028) +#define IMX415_INCKSEL7 IMX415_REG_8BIT(0x4074) + +struct imx415_reg { + u32 address; + u32 val; +}; + +static const char *const imx415_supply_names[] = { + "dvdd", + "ovdd", + "avdd", +}; + +/* + * The IMX415 data sheet uses lane rates but v4l2 uses link frequency to + * describe MIPI CSI-2 speed. This driver uses lane rates wherever possible + * and converts them to link frequencies by a factor of two when needed. + */ +static const s64 link_freq_menu_items[] = { + 594000000 / 2, 720000000 / 2, 891000000 / 2, + 1440000000 / 2, 1485000000 / 2, +}; + +struct imx415_clk_params { + u64 lane_rate; + u64 inck; + struct imx415_reg regs[IMX415_NUM_CLK_PARAM_REGS]; +}; + +/* INCK Settings - includes all lane rate and INCK dependent registers */ +static const struct imx415_clk_params imx415_clk_params[] = { + { + .lane_rate = 594000000, + .inck = 27000000, + .regs[0] = { IMX415_BCWAIT_TIME, 0x05D }, + .regs[1] = { IMX415_CPWAIT_TIME, 0x042 }, + .regs[2] = { IMX415_SYS_MODE, 0x7 }, + .regs[3] = { IMX415_INCKSEL1, 0x00 }, + .regs[4] = { IMX415_INCKSEL2, 0x23 }, + .regs[5] = { IMX415_INCKSEL3, 0x084 }, + .regs[6] = { IMX415_INCKSEL4, 0x0E7 }, + .regs[7] = { IMX415_INCKSEL5, 0x23 }, + .regs[8] = { IMX415_INCKSEL6, 0x0 }, + .regs[9] = { IMX415_INCKSEL7, 0x1 }, + .regs[10] = { IMX415_TXCLKESC_FREQ, 0x06C0 }, + }, + { + .lane_rate = 720000000, + .inck = 24000000, + .regs[0] = { IMX415_BCWAIT_TIME, 0x054 }, + .regs[1] = { IMX415_CPWAIT_TIME, 0x03B }, + .regs[2] = { IMX415_SYS_MODE, 0x9 }, + .regs[3] = { IMX415_INCKSEL1, 0x00 }, + .regs[4] = { IMX415_INCKSEL2, 0x23 }, + .regs[5] = { IMX415_INCKSEL3, 0x0B4 }, + .regs[6] = { IMX415_INCKSEL4, 0x0FC }, + .regs[7] = { IMX415_INCKSEL5, 0x23 }, + .regs[8] = { IMX415_INCKSEL6, 0x0 }, + .regs[9] = { IMX415_INCKSEL7, 0x1 }, + .regs[10] = { IMX415_TXCLKESC_FREQ, 0x0600 }, + }, + { + .lane_rate = 891000000, + .inck = 27000000, + .regs[0] = { IMX415_BCWAIT_TIME, 0x05D }, + .regs[1] = { IMX415_CPWAIT_TIME, 0x042 }, + .regs[2] = { IMX415_SYS_MODE, 0x5 }, + .regs[3] = { IMX415_INCKSEL1, 0x00 }, + .regs[4] = { IMX415_INCKSEL2, 0x23 }, + .regs[5] = { IMX415_INCKSEL3, 0x0C6 }, + .regs[6] = { IMX415_INCKSEL4, 0x0E7 }, + .regs[7] = { IMX415_INCKSEL5, 0x23 }, + .regs[8] = { IMX415_INCKSEL6, 0x0 }, + .regs[9] = { IMX415_INCKSEL7, 0x1 }, + .regs[10] = { IMX415_TXCLKESC_FREQ, 0x06C0 }, + }, + { + .lane_rate = 1440000000, + .inck = 24000000, + .regs[0] = { IMX415_BCWAIT_TIME, 0x054 }, + .regs[1] = { IMX415_CPWAIT_TIME, 0x03B }, + .regs[2] = { IMX415_SYS_MODE, 0x8 }, + .regs[3] = { IMX415_INCKSEL1, 0x00 }, + .regs[4] = { IMX415_INCKSEL2, 0x23 }, + .regs[5] = { IMX415_INCKSEL3, 0x0B4 }, + .regs[6] = { IMX415_INCKSEL4, 0x0FC }, + .regs[7] = { IMX415_INCKSEL5, 0x23 }, + .regs[8] = { IMX415_INCKSEL6, 0x1 }, + .regs[9] = { IMX415_INCKSEL7, 0x0 }, + .regs[10] = { IMX415_TXCLKESC_FREQ, 0x0600 }, + }, + { + .lane_rate = 1485000000, + .inck = 27000000, + .regs[0] = { IMX415_BCWAIT_TIME, 0x05D }, + .regs[1] = { IMX415_CPWAIT_TIME, 0x042 }, + .regs[2] = { IMX415_SYS_MODE, 0x8 }, + .regs[3] = { IMX415_INCKSEL1, 0x00 }, + .regs[4] = { IMX415_INCKSEL2, 0x23 }, + .regs[5] = { IMX415_INCKSEL3, 0x0A5 }, + .regs[6] = { IMX415_INCKSEL4, 0x0E7 }, + .regs[7] = { IMX415_INCKSEL5, 0x23 }, + .regs[8] = { IMX415_INCKSEL6, 0x1 }, + .regs[9] = { IMX415_INCKSEL7, 0x0 }, + .regs[10] = { IMX415_TXCLKESC_FREQ, 0x06C0 }, + }, +}; + +/* all-pixel 2-lane 720 Mbps 15.74 Hz mode */ +static const struct imx415_reg imx415_mode_2_720[] = { + { IMX415_VMAX, 0x08CA }, + { IMX415_HMAX, 0x07F0 }, + { IMX415_LANEMODE, IMX415_LANEMODE_2 }, + { IMX415_TCLKPOST, 0x006F }, + { IMX415_TCLKPREPARE, 0x002F }, + { IMX415_TCLKTRAIL, 0x002F }, + { IMX415_TCLKZERO, 0x00BF }, + { IMX415_THSPREPARE, 0x002F }, + { IMX415_THSZERO, 0x0057 }, + { IMX415_THSTRAIL, 0x002F }, + { IMX415_THSEXIT, 0x004F }, + { IMX415_TLPX, 0x0027 }, +}; + +/* all-pixel 2-lane 1440 Mbps 30.01 Hz mode */ +static const struct imx415_reg imx415_mode_2_1440[] = { + { IMX415_VMAX, 0x08CA }, + { IMX415_HMAX, 0x042A }, + { IMX415_LANEMODE, IMX415_LANEMODE_2 }, + { IMX415_TCLKPOST, 0x009F }, + { IMX415_TCLKPREPARE, 0x0057 }, + { IMX415_TCLKTRAIL, 0x0057 }, + { IMX415_TCLKZERO, 0x0187 }, + { IMX415_THSPREPARE, 0x005F }, + { IMX415_THSZERO, 0x00A7 }, + { IMX415_THSTRAIL, 0x005F }, + { IMX415_THSEXIT, 0x0097 }, + { IMX415_TLPX, 0x004F }, +}; + +/* all-pixel 4-lane 891 Mbps 30 Hz mode */ +static const struct imx415_reg imx415_mode_4_891[] = { + { IMX415_VMAX, 0x08CA }, + { IMX415_HMAX, 0x044C }, + { IMX415_LANEMODE, IMX415_LANEMODE_4 }, + { IMX415_TCLKPOST, 0x007F }, + { IMX415_TCLKPREPARE, 0x0037 }, + { IMX415_TCLKTRAIL, 0x0037 }, + { IMX415_TCLKZERO, 0x00F7 }, + { IMX415_THSPREPARE, 0x003F }, + { IMX415_THSZERO, 0x006F }, + { IMX415_THSTRAIL, 0x003F }, + { IMX415_THSEXIT, 0x005F }, + { IMX415_TLPX, 0x002F }, +}; + +struct imx415_mode_reg_list { + u32 num_of_regs; + const struct imx415_reg *regs; +}; + +/* + * Mode : number of lanes, lane rate and frame rate dependent settings + * + * pixel_rate and hmax_pix are needed to calculate hblank for the v4l2 ctrl + * interface. These values can not be found in the data sheet and should be + * treated as virtual values. Use following table when adding new modes. + * + * lane_rate lanes fps hmax_pix pixel_rate + * + * 594 2 10.000 4400 99000000 + * 891 2 15.000 4400 148500000 + * 720 2 15.748 4064 144000000 + * 1782 2 30.000 4400 297000000 + * 2079 2 30.000 4400 297000000 + * 1440 2 30.019 4510 304615385 + * + * 594 4 20.000 5500 247500000 + * 594 4 25.000 4400 247500000 + * 720 4 25.000 4400 247500000 + * 720 4 30.019 4510 304615385 + * 891 4 30.000 4400 297000000 + * 1440 4 30.019 4510 304615385 + * 1440 4 60.038 4510 609230769 + * 1485 4 60.000 4400 594000000 + * 1782 4 60.000 4400 594000000 + * 2079 4 60.000 4400 594000000 + * 2376 4 90.164 4392 891000000 + */ +struct imx415_mode { + u64 lane_rate; + u32 lanes; + u32 hmax_pix; + u64 pixel_rate; + struct imx415_mode_reg_list reg_list; +}; + +/* mode configs */ +static const struct imx415_mode supported_modes[] = { + { + .lane_rate = 720000000, + .lanes = 2, + .hmax_pix = 4064, + .pixel_rate = 144000000, + .reg_list = { + .num_of_regs = ARRAY_SIZE(imx415_mode_2_720), + .regs = imx415_mode_2_720, + }, + }, + { + .lane_rate = 1440000000, + .lanes = 2, + .hmax_pix = 4510, + .pixel_rate = 304615385, + .reg_list = { + .num_of_regs = ARRAY_SIZE(imx415_mode_2_1440), + .regs = imx415_mode_2_1440, + }, + }, + { + .lane_rate = 891000000, + .lanes = 4, + .hmax_pix = 4400, + .pixel_rate = 297000000, + .reg_list = { + .num_of_regs = ARRAY_SIZE(imx415_mode_4_891), + .regs = imx415_mode_4_891, + }, + }, +}; + +static const struct regmap_config imx415_regmap_config = { + .reg_bits = 16, + .val_bits = 8, +}; + +static const char *const imx415_test_pattern_menu[] = { + "disabled", + "solid black", + "solid white", + "solid dark gray", + "solid light gray", + "stripes light/dark grey", + "stripes dark/light grey", + "stripes black/dark grey", + "stripes dark grey/black", + "stripes black/white", + "stripes white/black", + "horizontal color bar", + "vertical color bar", +}; + +struct imx415 { + struct device *dev; + struct clk *clk; + struct regulator_bulk_data supplies[ARRAY_SIZE(imx415_supply_names)]; + struct gpio_desc *reset; + struct regmap *regmap; + + const struct imx415_clk_params *clk_params; + + bool streaming; + + struct v4l2_subdev subdev; + struct media_pad pad; + + struct v4l2_ctrl_handler ctrls; + struct v4l2_ctrl *hblank; + struct v4l2_ctrl *vblank; + struct v4l2_ctrl *exposure; + struct v4l2_ctrl *again; + struct v4l2_ctrl *pixel_rate; + struct v4l2_ctrl *hflip; + struct v4l2_ctrl *vflip; + struct v4l2_ctrl *link_freq; + + int cur_mode; + int num_data_lanes; +}; + +/* + * This table includes fixed register settings and a bunch of undocumented + * registers that have to be set to another value than default. + */ +static const struct imx415_reg imx415_init_table[] = { + /* use all-pixel readout mode, no flip */ + { IMX415_WINMODE, 0x00 }, + { IMX415_ADDMODE, 0x00 }, + { IMX415_REVERSE, 0x00 }, + /* use RAW 10-bit mode */ + { IMX415_ADBIT, 0x00 }, + { IMX415_MDBIT, 0x00 }, + /* output VSYNC on XVS and low on XHS */ + { IMX415_OUTSEL, 0x22 }, + { IMX415_DRV, 0x00 }, + + /* SONY magic registers */ + { IMX415_REG_8BIT(0x32D4), 0x21 }, + { IMX415_REG_8BIT(0x32EC), 0xA1 }, + { IMX415_REG_8BIT(0x3452), 0x7F }, + { IMX415_REG_8BIT(0x3453), 0x03 }, + { IMX415_REG_8BIT(0x358A), 0x04 }, + { IMX415_REG_8BIT(0x35A1), 0x02 }, + { IMX415_REG_8BIT(0x36BC), 0x0C }, + { IMX415_REG_8BIT(0x36CC), 0x53 }, + { IMX415_REG_8BIT(0x36CD), 0x00 }, + { IMX415_REG_8BIT(0x36CE), 0x3C }, + { IMX415_REG_8BIT(0x36D0), 0x8C }, + { IMX415_REG_8BIT(0x36D1), 0x00 }, + { IMX415_REG_8BIT(0x36D2), 0x71 }, + { IMX415_REG_8BIT(0x36D4), 0x3C }, + { IMX415_REG_8BIT(0x36D6), 0x53 }, + { IMX415_REG_8BIT(0x36D7), 0x00 }, + { IMX415_REG_8BIT(0x36D8), 0x71 }, + { IMX415_REG_8BIT(0x36DA), 0x8C }, + { IMX415_REG_8BIT(0x36DB), 0x00 }, + { IMX415_REG_8BIT(0x3724), 0x02 }, + { IMX415_REG_8BIT(0x3726), 0x02 }, + { IMX415_REG_8BIT(0x3732), 0x02 }, + { IMX415_REG_8BIT(0x3734), 0x03 }, + { IMX415_REG_8BIT(0x3736), 0x03 }, + { IMX415_REG_8BIT(0x3742), 0x03 }, + { IMX415_REG_8BIT(0x3862), 0xE0 }, + { IMX415_REG_8BIT(0x38CC), 0x30 }, + { IMX415_REG_8BIT(0x38CD), 0x2F }, + { IMX415_REG_8BIT(0x395C), 0x0C }, + { IMX415_REG_8BIT(0x3A42), 0xD1 }, + { IMX415_REG_8BIT(0x3A4C), 0x77 }, + { IMX415_REG_8BIT(0x3AE0), 0x02 }, + { IMX415_REG_8BIT(0x3AEC), 0x0C }, + { IMX415_REG_8BIT(0x3B00), 0x2E }, + { IMX415_REG_8BIT(0x3B06), 0x29 }, + { IMX415_REG_8BIT(0x3B98), 0x25 }, + { IMX415_REG_8BIT(0x3B99), 0x21 }, + { IMX415_REG_8BIT(0x3B9B), 0x13 }, + { IMX415_REG_8BIT(0x3B9C), 0x13 }, + { IMX415_REG_8BIT(0x3B9D), 0x13 }, + { IMX415_REG_8BIT(0x3B9E), 0x13 }, + { IMX415_REG_8BIT(0x3BA1), 0x00 }, + { IMX415_REG_8BIT(0x3BA2), 0x06 }, + { IMX415_REG_8BIT(0x3BA3), 0x0B }, + { IMX415_REG_8BIT(0x3BA4), 0x10 }, + { IMX415_REG_8BIT(0x3BA5), 0x14 }, + { IMX415_REG_8BIT(0x3BA6), 0x18 }, + { IMX415_REG_8BIT(0x3BA7), 0x1A }, + { IMX415_REG_8BIT(0x3BA8), 0x1A }, + { IMX415_REG_8BIT(0x3BA9), 0x1A }, + { IMX415_REG_8BIT(0x3BAC), 0xED }, + { IMX415_REG_8BIT(0x3BAD), 0x01 }, + { IMX415_REG_8BIT(0x3BAE), 0xF6 }, + { IMX415_REG_8BIT(0x3BAF), 0x02 }, + { IMX415_REG_8BIT(0x3BB0), 0xA2 }, + { IMX415_REG_8BIT(0x3BB1), 0x03 }, + { IMX415_REG_8BIT(0x3BB2), 0xE0 }, + { IMX415_REG_8BIT(0x3BB3), 0x03 }, + { IMX415_REG_8BIT(0x3BB4), 0xE0 }, + { IMX415_REG_8BIT(0x3BB5), 0x03 }, + { IMX415_REG_8BIT(0x3BB6), 0xE0 }, + { IMX415_REG_8BIT(0x3BB7), 0x03 }, + { IMX415_REG_8BIT(0x3BB8), 0xE0 }, + { IMX415_REG_8BIT(0x3BBA), 0xE0 }, + { IMX415_REG_8BIT(0x3BBC), 0xDA }, + { IMX415_REG_8BIT(0x3BBE), 0x88 }, + { IMX415_REG_8BIT(0x3BC0), 0x44 }, + { IMX415_REG_8BIT(0x3BC2), 0x7B }, + { IMX415_REG_8BIT(0x3BC4), 0xA2 }, + { IMX415_REG_8BIT(0x3BC8), 0xBD }, + { IMX415_REG_8BIT(0x3BCA), 0xBD }, +}; + +static inline struct imx415 *to_imx415(struct v4l2_subdev *sd) +{ + return container_of(sd, struct imx415, subdev); +} + +static int imx415_read(struct imx415 *sensor, u32 addr) +{ + u8 data[3] = { 0, 0, 0 }; + int ret; + + ret = regmap_raw_read(sensor->regmap, addr & IMX415_REG_ADDR_MASK, data, + (addr >> IMX415_REG_SIZE_SHIFT) & 3); + if (ret < 0) + return ret; + + return (data[2] << 16) | (data[1] << 8) | data[0]; +} + +static int imx415_write(struct imx415 *sensor, u32 addr, u32 value) +{ + u8 data[3] = { value & 0xff, (value >> 8) & 0xff, value >> 16 }; + int ret; + + ret = regmap_raw_write(sensor->regmap, addr & IMX415_REG_ADDR_MASK, + data, (addr >> IMX415_REG_SIZE_SHIFT) & 3); + if (ret < 0) + dev_err_ratelimited(sensor->dev, + "%u-bit write to 0x%04x failed: %d\n", + ((addr >> IMX415_REG_SIZE_SHIFT) & 3) * 8, + addr & IMX415_REG_ADDR_MASK, ret); + + return ret; +} + +static int imx415_set_testpattern(struct imx415 *sensor, int val) +{ + int ret; + + if (val) { + ret = imx415_write(sensor, IMX415_BLKLEVEL, 0x00); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_TPG_EN_DUOUT, 0x01); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_TPG_PATSEL_DUOUT, val - 1); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_TPG_COLORWIDTH, 0x01); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_TESTCLKEN_MIPI, 0x20); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_DIG_CLP_MODE, 0x00); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_WRJ_OPEN, 0x00); + } else { + ret = imx415_write(sensor, IMX415_BLKLEVEL, + IMX415_BLKLEVEL_DEFAULT); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_TPG_EN_DUOUT, 0x00); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_TESTCLKEN_MIPI, 0x00); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_DIG_CLP_MODE, 0x01); + if (ret) + return ret; + ret = imx415_write(sensor, IMX415_WRJ_OPEN, 0x01); + } + return ret; +} + +static int imx415_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct imx415 *sensor = container_of(ctrl->handler, struct imx415, + ctrls); + const struct v4l2_mbus_framefmt *format; + struct v4l2_subdev_state *state; + unsigned int vmax; + unsigned int flip; + + if (!sensor->streaming) + return 0; + + state = v4l2_subdev_get_locked_active_state(&sensor->subdev); + format = v4l2_subdev_get_pad_format(&sensor->subdev, state, 0); + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE: + /* clamp the exposure value to VMAX. */ + vmax = format->height + sensor->vblank->cur.val; + ctrl->val = min_t(int, ctrl->val, vmax); + return imx415_write(sensor, IMX415_SHR0, vmax - ctrl->val); + + case V4L2_CID_ANALOGUE_GAIN: + /* analogue gain in 0.3 dB step size */ + return imx415_write(sensor, IMX415_GAIN_PCG_0, ctrl->val); + + case V4L2_CID_HFLIP: + case V4L2_CID_VFLIP: + flip = (sensor->hflip->val << IMX415_HREVERSE_SHIFT) | + (sensor->vflip->val << IMX415_VREVERSE_SHIFT); + return imx415_write(sensor, IMX415_REVERSE, flip); + + case V4L2_CID_TEST_PATTERN: + return imx415_set_testpattern(sensor, ctrl->val); + + default: + return -EINVAL; + } +} + +static const struct v4l2_ctrl_ops imx415_ctrl_ops = { + .s_ctrl = imx415_s_ctrl, +}; + +static int imx415_ctrls_init(struct imx415 *sensor) +{ + struct v4l2_fwnode_device_properties props; + u64 pixel_rate = supported_modes[sensor->cur_mode].pixel_rate; + u64 lane_rate = supported_modes[sensor->cur_mode].lane_rate; + u32 exposure_max = IMX415_PIXEL_ARRAY_HEIGHT + + IMX415_PIXEL_ARRAY_VBLANK - 8; + u32 hblank; + unsigned int i; + int ret; + + ret = v4l2_fwnode_device_parse(sensor->dev, &props); + if (ret < 0) + return ret; + + v4l2_ctrl_handler_init(&sensor->ctrls, 9); + + for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); ++i) { + if (lane_rate == link_freq_menu_items[i] * 2) + break; + } + if (i == ARRAY_SIZE(link_freq_menu_items)) { + return dev_err_probe(sensor->dev, -EINVAL, + "lane rate %llu not supported\n", + lane_rate); + } + + sensor->link_freq = + v4l2_ctrl_new_int_menu(&sensor->ctrls, &imx415_ctrl_ops, + V4L2_CID_LINK_FREQ, + ARRAY_SIZE(link_freq_menu_items) - 1, i, + link_freq_menu_items); + + if (sensor->link_freq) + sensor->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + sensor->exposure = v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, + V4L2_CID_EXPOSURE, 4, exposure_max, + 1, exposure_max); + + sensor->again = v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, + V4L2_CID_ANALOGUE_GAIN, + IMX415_AGAIN_MIN, IMX415_AGAIN_MAX, + IMX415_AGAIN_STEP, IMX415_AGAIN_MIN); + + hblank = supported_modes[sensor->cur_mode].hmax_pix - + IMX415_PIXEL_ARRAY_WIDTH; + sensor->hblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, + V4L2_CID_HBLANK, hblank, hblank, 1, + hblank); + if (sensor->hblank) + sensor->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + sensor->vblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, + V4L2_CID_VBLANK, + IMX415_PIXEL_ARRAY_VBLANK, + IMX415_PIXEL_ARRAY_VBLANK, 1, + IMX415_PIXEL_ARRAY_VBLANK); + if (sensor->vblank) + sensor->vblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + /* + * The pixel rate used here is a virtual value and can be used for + * calculating the frame rate together with hblank. It may not + * necessarily be the physically correct pixel clock. + */ + sensor->pixel_rate = v4l2_ctrl_new_std(&sensor->ctrls, NULL, + V4L2_CID_PIXEL_RATE, pixel_rate, + pixel_rate, 1, pixel_rate); + + sensor->hflip = v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, + V4L2_CID_HFLIP, 0, 1, 1, 0); + sensor->vflip = v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, + V4L2_CID_VFLIP, 0, 1, 1, 0); + + v4l2_ctrl_new_std_menu_items(&sensor->ctrls, &imx415_ctrl_ops, + V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(imx415_test_pattern_menu) - 1, + 0, 0, imx415_test_pattern_menu); + + v4l2_ctrl_new_fwnode_properties(&sensor->ctrls, &imx415_ctrl_ops, + &props); + + if (sensor->ctrls.error) { + dev_err_probe(sensor->dev, sensor->ctrls.error, + "failed to add controls\n"); + v4l2_ctrl_handler_free(&sensor->ctrls); + return sensor->ctrls.error; + } + sensor->subdev.ctrl_handler = &sensor->ctrls; + + return 0; +} + +static int imx415_set_mode(struct imx415 *sensor, int mode) +{ + const struct imx415_reg *reg; + unsigned int i; + int ret = 0; + + if (mode >= ARRAY_SIZE(supported_modes)) { + dev_err(sensor->dev, "Mode %d not supported\n", mode); + return -EINVAL; + } + + for (i = 0; i < supported_modes[mode].reg_list.num_of_regs; ++i) { + reg = &supported_modes[mode].reg_list.regs[i]; + ret = imx415_write(sensor, reg->address, reg->val); + if (ret) + return ret; + } + + for (i = 0; i < IMX415_NUM_CLK_PARAM_REGS; ++i) { + reg = &sensor->clk_params->regs[i]; + ret = imx415_write(sensor, reg->address, reg->val); + if (ret) + return ret; + } + + return 0; +} + +static int imx415_setup(struct imx415 *sensor, struct v4l2_subdev_state *state) +{ + unsigned int i; + int ret; + + for (i = 0; i < ARRAY_SIZE(imx415_init_table); ++i) { + ret = imx415_write(sensor, imx415_init_table[i].address, + imx415_init_table[i].val); + if (ret) + return ret; + } + + return imx415_set_mode(sensor, sensor->cur_mode); +} + +static int imx415_stream_on(struct imx415 *sensor) +{ + int ret; + + ret = imx415_write(sensor, IMX415_MODE, IMX415_MODE_OPERATING); + if (ret) + return ret; + + /* wait at least 24 ms for internal regulator stabilization */ + msleep(30); + + return imx415_write(sensor, IMX415_XMSTA, IMX415_XMSTA_START); +} + +static int imx415_stream_off(struct imx415 *sensor) +{ + int ret; + + ret = imx415_write(sensor, IMX415_XMSTA, IMX415_XMSTA_STOP); + if (ret) + return ret; + + return imx415_write(sensor, IMX415_MODE, IMX415_MODE_STANDBY); +} + +static int imx415_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct imx415 *sensor = to_imx415(sd); + struct v4l2_subdev_state *state; + int ret; + + state = v4l2_subdev_lock_and_get_active_state(sd); + + if (!enable) { + ret = imx415_stream_off(sensor); + + pm_runtime_mark_last_busy(sensor->dev); + pm_runtime_put_autosuspend(sensor->dev); + + sensor->streaming = false; + + goto unlock; + } + + ret = pm_runtime_resume_and_get(sensor->dev); + if (ret < 0) + goto unlock; + + ret = imx415_setup(sensor, state); + if (ret < 0) + goto err_pm; + + /* + * Set streaming to true to ensure __v4l2_ctrl_handler_setup() will set + * the controls. The flag is reset to false further down if an error + * occurs. + */ + sensor->streaming = true; + + ret = __v4l2_ctrl_handler_setup(&sensor->ctrls); + if (ret < 0) + goto err_pm; + + ret = imx415_stream_on(sensor); + if (ret) + goto err_pm; + +unlock: + v4l2_subdev_unlock_state(state); + + return ret; + +err_pm: + /* + * In case of error, turn the power off synchronously as the device + * likely has no other chance to recover. + */ + pm_runtime_put_sync(sensor->dev); + sensor->streaming = false; + + goto unlock; +} + +static int imx415_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index != 0) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SGBRG10_1X10; + + return 0; +} + +static int imx415_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_frame_size_enum *fse) +{ + const struct v4l2_mbus_framefmt *format; + + format = v4l2_subdev_get_pad_format(sd, state, fse->pad); + + if (fse->index > 0 || fse->code != format->code) + return -EINVAL; + + fse->min_width = IMX415_PIXEL_ARRAY_WIDTH; + fse->max_width = fse->min_width; + fse->min_height = IMX415_PIXEL_ARRAY_HEIGHT; + fse->max_height = fse->min_height; + return 0; +} + +static int imx415_get_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *fmt) +{ + fmt->format = *v4l2_subdev_get_pad_format(sd, state, fmt->pad); + + return 0; +} + +static int imx415_set_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *fmt) +{ + struct v4l2_mbus_framefmt *format; + + format = v4l2_subdev_get_pad_format(sd, state, fmt->pad); + + format->width = fmt->format.width; + format->height = fmt->format.height; + format->code = MEDIA_BUS_FMT_SGBRG10_1X10; + format->field = V4L2_FIELD_NONE; + format->colorspace = V4L2_COLORSPACE_RAW; + format->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + format->quantization = V4L2_QUANTIZATION_DEFAULT; + format->xfer_func = V4L2_XFER_FUNC_NONE; + + fmt->format = *format; + return 0; +} + +static int imx415_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_selection *sel) +{ + switch (sel->target) { + case V4L2_SEL_TGT_CROP: + case V4L2_SEL_TGT_CROP_DEFAULT: + case V4L2_SEL_TGT_CROP_BOUNDS: + sel->r.top = IMX415_PIXEL_ARRAY_TOP; + sel->r.left = IMX415_PIXEL_ARRAY_LEFT; + sel->r.width = IMX415_PIXEL_ARRAY_WIDTH; + sel->r.height = IMX415_PIXEL_ARRAY_HEIGHT; + + return 0; + } + + return -EINVAL; +} + +static int imx415_init_cfg(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state) +{ + struct v4l2_subdev_format format = { + .format = { + .width = IMX415_PIXEL_ARRAY_WIDTH, + .height = IMX415_PIXEL_ARRAY_HEIGHT, + }, + }; + + imx415_set_format(sd, state, &format); + + return 0; +} + +static const struct v4l2_subdev_video_ops imx415_subdev_video_ops = { + .s_stream = imx415_s_stream, +}; + +static const struct v4l2_subdev_pad_ops imx415_subdev_pad_ops = { + .enum_mbus_code = imx415_enum_mbus_code, + .enum_frame_size = imx415_enum_frame_size, + .get_fmt = imx415_get_format, + .set_fmt = imx415_set_format, + .get_selection = imx415_get_selection, + .init_cfg = imx415_init_cfg, +}; + +static const struct v4l2_subdev_ops imx415_subdev_ops = { + .video = &imx415_subdev_video_ops, + .pad = &imx415_subdev_pad_ops, +}; + +static int imx415_subdev_init(struct imx415 *sensor) +{ + struct i2c_client *client = to_i2c_client(sensor->dev); + int ret; + + v4l2_i2c_subdev_init(&sensor->subdev, client, &imx415_subdev_ops); + + ret = imx415_ctrls_init(sensor); + if (ret < 0) + return ret; + + sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + sensor->pad.flags = MEDIA_PAD_FL_SOURCE; + sensor->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = media_entity_pads_init(&sensor->subdev.entity, 1, &sensor->pad); + if (ret < 0) { + v4l2_ctrl_handler_free(&sensor->ctrls); + return ret; + } + + sensor->subdev.state_lock = sensor->subdev.ctrl_handler->lock; + v4l2_subdev_init_finalize(&sensor->subdev); + + return ret; +} + +static void imx415_subdev_cleanup(struct imx415 *sensor) +{ + media_entity_cleanup(&sensor->subdev.entity); + v4l2_ctrl_handler_free(&sensor->ctrls); +} + +static int imx415_power_on(struct imx415 *sensor) +{ + int ret; + + ret = regulator_bulk_enable(ARRAY_SIZE(sensor->supplies), + sensor->supplies); + if (ret < 0) + return ret; + + ret = gpiod_direction_output(sensor->reset, 0); + if (ret < 0) + goto err_supply; + + udelay(1); + + ret = clk_prepare_enable(sensor->clk); + if (ret < 0) + goto err_reset; + + /* + * Data sheet states that 20 us are required before communication start, + * but this doesn't work in all cases. Use 100 us to be on the safe + * side. + */ + usleep_range(100, 200); + + return 0; + +err_reset: + gpiod_direction_output(sensor->reset, 1); +err_supply: + regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies); + return ret; +} + +static void imx415_power_off(struct imx415 *sensor) +{ + clk_disable_unprepare(sensor->clk); + gpiod_direction_output(sensor->reset, 1); + regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies); +} + +static int imx415_identify_model(struct imx415 *sensor) +{ + int model, ret; + + /* + * While most registers can be read when the sensor is in standby, this + * is not the case of the sensor info register :-( + */ + ret = imx415_write(sensor, IMX415_MODE, IMX415_MODE_OPERATING); + if (ret < 0) + return dev_err_probe(sensor->dev, ret, + "failed to get sensor out of standby\n"); + + /* + * According to the datasheet we have to wait at least 63 us after + * leaving standby mode. But this doesn't work even after 30 ms. + * So probably this should be 63 ms and therefore we wait for 80 ms. + */ + msleep(80); + + ret = imx415_read(sensor, IMX415_SENSOR_INFO); + if (ret < 0) { + dev_err_probe(sensor->dev, ret, + "failed to read sensor information\n"); + goto done; + } + + model = ret & IMX415_SENSOR_INFO_MASK; + + switch (model) { + case IMX415_CHIP_ID: + dev_info(sensor->dev, "Detected IMX415 image sensor\n"); + break; + default: + ret = dev_err_probe(sensor->dev, -ENODEV, + "invalid device model 0x%04x\n", model); + goto done; + } + +done: + imx415_write(sensor, IMX415_MODE, IMX415_MODE_STANDBY); + return ret; +} + +static int imx415_check_inck(unsigned long inck, u64 link_frequency) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(imx415_clk_params); ++i) { + if ((imx415_clk_params[i].lane_rate == link_frequency * 2) && + imx415_clk_params[i].inck == inck) + break; + } + + if (i == ARRAY_SIZE(imx415_clk_params)) + return -EINVAL; + else + return 0; +} + +static int imx415_parse_hw_config(struct imx415 *sensor) +{ + struct v4l2_fwnode_endpoint bus_cfg = { + .bus_type = V4L2_MBUS_CSI2_DPHY, + }; + struct fwnode_handle *ep; + u64 lane_rate; + unsigned long inck; + unsigned int i, j; + int ret; + + for (i = 0; i < ARRAY_SIZE(sensor->supplies); ++i) + sensor->supplies[i].supply = imx415_supply_names[i]; + + ret = devm_regulator_bulk_get(sensor->dev, ARRAY_SIZE(sensor->supplies), + sensor->supplies); + if (ret) + return dev_err_probe(sensor->dev, ret, + "failed to get supplies\n"); + + sensor->reset = devm_gpiod_get_optional(sensor->dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(sensor->reset)) + return dev_err_probe(sensor->dev, PTR_ERR(sensor->reset), + "failed to get reset GPIO\n"); + + sensor->clk = devm_clk_get(sensor->dev, "inck"); + if (IS_ERR(sensor->clk)) + return dev_err_probe(sensor->dev, PTR_ERR(sensor->clk), + "failed to get clock\n"); + + ep = fwnode_graph_get_next_endpoint(dev_fwnode(sensor->dev), NULL); + if (!ep) + return -ENXIO; + + ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); + fwnode_handle_put(ep); + if (ret) + return ret; + + switch (bus_cfg.bus.mipi_csi2.num_data_lanes) { + case 2: + case 4: + sensor->num_data_lanes = bus_cfg.bus.mipi_csi2.num_data_lanes; + break; + default: + ret = dev_err_probe(sensor->dev, -EINVAL, + "invalid number of CSI2 data lanes %d\n", + bus_cfg.bus.mipi_csi2.num_data_lanes); + goto done_endpoint_free; + } + + if (!bus_cfg.nr_of_link_frequencies) { + ret = dev_err_probe(sensor->dev, -EINVAL, + "no link frequencies defined"); + goto done_endpoint_free; + } + + /* + * Check if there exists a sensor mode defined for current INCK, + * number of lanes and given lane rates. + */ + inck = clk_get_rate(sensor->clk); + for (i = 0; i < bus_cfg.nr_of_link_frequencies; ++i) { + if (imx415_check_inck(inck, bus_cfg.link_frequencies[i])) { + dev_err(sensor->dev, + "INCK %lu Hz not supported for this link freq", + inck); + continue; + } + + for (j = 0; j < ARRAY_SIZE(supported_modes); ++j) { + if (sensor->num_data_lanes != supported_modes[j].lanes) + continue; + if (bus_cfg.link_frequencies[i] * 2 != + supported_modes[j].lane_rate) + continue; + sensor->cur_mode = j; + goto found_mode; + } + } + if (i == bus_cfg.nr_of_link_frequencies) { + ret = dev_err_probe(sensor->dev, -EINVAL, + "no valid sensor mode defined\n"); + goto done_endpoint_free; + } + +found_mode: + lane_rate = supported_modes[sensor->cur_mode].lane_rate; + for (i = 0; i < ARRAY_SIZE(imx415_clk_params); ++i) { + if (lane_rate == imx415_clk_params[i].lane_rate && + inck == imx415_clk_params[i].inck) { + sensor->clk_params = &imx415_clk_params[i]; + break; + } + } + if (i == ARRAY_SIZE(imx415_clk_params)) { + ret = dev_err_probe(sensor->dev, -EINVAL, + "Mode %d not supported\n", + sensor->cur_mode); + goto done_endpoint_free; + } + + dev_dbg(sensor->dev, "clock: %lu Hz, lane_rate: %llu bps, lanes: %d\n", + inck, lane_rate, sensor->num_data_lanes); + +done_endpoint_free: + v4l2_fwnode_endpoint_free(&bus_cfg); + + return ret; +} + +static int imx415_probe(struct i2c_client *client) +{ + struct imx415 *sensor; + int ret; + + sensor = devm_kzalloc(&client->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return -ENOMEM; + + sensor->dev = &client->dev; + + ret = imx415_parse_hw_config(sensor); + if (ret) + return ret; + + sensor->regmap = devm_regmap_init_i2c(client, &imx415_regmap_config); + if (IS_ERR(sensor->regmap)) + return PTR_ERR(sensor->regmap); + + /* + * Enable power management. The driver supports runtime PM, but needs to + * work when runtime PM is disabled in the kernel. To that end, power + * the sensor on manually here, identify it, and fully initialize it. + */ + ret = imx415_power_on(sensor); + if (ret < 0) + return ret; + + ret = imx415_identify_model(sensor); + if (ret < 0) + goto err_power; + + ret = imx415_subdev_init(sensor); + if (ret < 0) + goto err_power; + + /* + * Enable runtime PM. As the device has been powered manually, mark it + * as active, and increase the usage count without resuming the device. + */ + pm_runtime_set_active(sensor->dev); + pm_runtime_get_noresume(sensor->dev); + pm_runtime_enable(sensor->dev); + + ret = v4l2_async_register_subdev_sensor(&sensor->subdev); + if (ret < 0) + goto err_pm; + + /* + * Finally, enable autosuspend and decrease the usage count. The device + * will get suspended after the autosuspend delay, turning the power + * off. + */ + pm_runtime_set_autosuspend_delay(sensor->dev, 1000); + pm_runtime_use_autosuspend(sensor->dev); + pm_runtime_put_autosuspend(sensor->dev); + + return 0; + +err_pm: + pm_runtime_disable(sensor->dev); + pm_runtime_put_noidle(sensor->dev); + imx415_subdev_cleanup(sensor); +err_power: + imx415_power_off(sensor); + return ret; +} + +static void imx415_remove(struct i2c_client *client) +{ + struct v4l2_subdev *subdev = i2c_get_clientdata(client); + struct imx415 *sensor = to_imx415(subdev); + + v4l2_async_unregister_subdev(subdev); + + imx415_subdev_cleanup(sensor); + + /* + * Disable runtime PM. In case runtime PM is disabled in the kernel, + * make sure to turn power off manually. + */ + pm_runtime_disable(sensor->dev); + if (!pm_runtime_status_suspended(sensor->dev)) + imx415_power_off(sensor); + pm_runtime_set_suspended(sensor->dev); +} + +static int imx415_runtime_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct v4l2_subdev *subdev = i2c_get_clientdata(client); + struct imx415 *sensor = to_imx415(subdev); + + return imx415_power_on(sensor); +} + +static int imx415_runtime_suspend(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct v4l2_subdev *subdev = i2c_get_clientdata(client); + struct imx415 *sensor = to_imx415(subdev); + + imx415_power_off(sensor); + + return 0; +} + +static DEFINE_RUNTIME_DEV_PM_OPS(imx415_pm_ops, imx415_runtime_suspend, + imx415_runtime_resume, NULL); + +static const struct of_device_id imx415_of_match[] = { + { .compatible = "sony,imx415" }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, imx415_of_match); + +static struct i2c_driver imx415_driver = { + .probe_new = imx415_probe, + .remove = imx415_remove, + .driver = { + .name = "imx415", + .of_match_table = imx415_of_match, + .pm = pm_ptr(&imx415_pm_ops), + }, +}; + +module_i2c_driver(imx415_driver); + +MODULE_DESCRIPTION("Sony IMX415 image sensor driver"); +MODULE_AUTHOR("Gerald Loacker "); +MODULE_AUTHOR("Michael Riesch "); +MODULE_LICENSE("GPL");