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(146725694.box.freepro.com. [130.180.211.218]) by smtp.gmail.com with ESMTPSA id r126-20020a1c2b84000000b003d35c845cbbsm37121541wmr.21.2023.01.16.02.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 02:20:02 -0800 (PST) From: Daniel Lezcano To: daniel.lezcano@linaro.org Cc: Bjorn Andersson , Amit Kucheria , Thara Gopinath , Andy Gross , Konrad Dybcio , "Rafael J. Wysocki" , Zhang Rui , linux-pm@vger.kernel.org (open list:QUALCOMM TSENS THERMAL DRIVER), linux-arm-msm@vger.kernel.org (open list:QUALCOMM TSENS THERMAL DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2] thermal/drivers/qcom: Remove duplicate set next trip point interrupt code Date: Mon, 16 Jan 2023 11:19:54 +0100 Message-Id: <20230116101955.3961427-1-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=1.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Level: * X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755175374084653557?= X-GMAIL-MSGID: =?utf-8?q?1755175374084653557?= The tsens driver reprogram the next trip points in the irq handler. This function then call thermal_zone_device_update(). However, thermal_zone_device_update() calls thermal_zone_set_trips() and from there it calls the backend 'set_trips' ops. This one in turn reprogram the next trip points (low/high). Consequently, the code setting the next trip points interrupt in the interrupt handle is not needed and could be removed. Reviewed-by: Bjorn Andersson Acked-by: Amit Kucheria Signed-off-by: Daniel Lezcano --- v2: - Removed unused delcared variables --- drivers/thermal/qcom/tsens.c | 51 ++---------------------------------- 1 file changed, 2 insertions(+), 49 deletions(-) diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index b5b136ff323f..9dd69754dd63 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -459,12 +459,9 @@ static irqreturn_t tsens_irq_thread(int irq, void *data) { struct tsens_priv *priv = data; struct tsens_irq_data d; - bool enable = true, disable = false; - unsigned long flags; - int temp, ret, i; + int i; for (i = 0; i < priv->num_sensors; i++) { - bool trigger = false; const struct tsens_sensor *s = &priv->sensor[i]; u32 hw_id = s->hw_id; @@ -472,52 +469,8 @@ static irqreturn_t tsens_irq_thread(int irq, void *data) continue; if (!tsens_threshold_violated(priv, hw_id, &d)) continue; - ret = get_temp_tsens_valid(s, &temp); - if (ret) { - dev_err(priv->dev, "[%u] %s: error reading sensor\n", - hw_id, __func__); - continue; - } - spin_lock_irqsave(&priv->ul_lock, flags); - - tsens_read_irq_state(priv, hw_id, s, &d); - - if (d.up_viol && - !masked_irq(hw_id, d.up_irq_mask, tsens_version(priv))) { - tsens_set_interrupt(priv, hw_id, UPPER, disable); - if (d.up_thresh > temp) { - dev_dbg(priv->dev, "[%u] %s: re-arm upper\n", - hw_id, __func__); - tsens_set_interrupt(priv, hw_id, UPPER, enable); - } else { - trigger = true; - /* Keep irq masked */ - } - } else if (d.low_viol && - !masked_irq(hw_id, d.low_irq_mask, tsens_version(priv))) { - tsens_set_interrupt(priv, hw_id, LOWER, disable); - if (d.low_thresh < temp) { - dev_dbg(priv->dev, "[%u] %s: re-arm low\n", - hw_id, __func__); - tsens_set_interrupt(priv, hw_id, LOWER, enable); - } else { - trigger = true; - /* Keep irq masked */ - } - } - - spin_unlock_irqrestore(&priv->ul_lock, flags); - - if (trigger) { - dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n", - hw_id, __func__, temp); - thermal_zone_device_update(s->tzd, - THERMAL_EVENT_UNSPECIFIED); - } else { - dev_dbg(priv->dev, "[%u] %s: no violation: %d\n", - hw_id, __func__, temp); - } + thermal_zone_device_update(s->tzd, THERMAL_EVENT_UNSPECIFIED); if (tsens_version(priv) < VER_0_1) { /* Constraint: There is only 1 interrupt control register for all