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Fri, 13 Jan 2023 09:20:57 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 01/13] x86/resctrl: Replace smp_call_function_many() with on_each_cpu_mask() Date: Fri, 13 Jan 2023 09:20:27 -0600 Message-ID: <20230113152039.770054-2-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT080:EE_|MN2PR12MB4343:EE_ X-MS-Office365-Filtering-Correlation-Id: 846f362b-34b7-419e-3070-08daf579e2fe X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3NvEPkJcaifwMgefK1NZlxY0T6eTlKgN6N8fUO3Gcp6oGBqE6eRK6pfhinF8u32fOx2Gd8XfD9md5vXx7s4xXq62IKVExWgRxRz8KJmrthXDwFW/BrEKnEvd8KODCi8ledUCv8qlRQJOmL4O00+SFDJXBgEx8W7oH5bmc6/cKTMOKCMyVPT+nnpv4aPrx9SfJrLt82CjmOGRr0igJOy8m12a86CZuuUAgiD1E5WO7cTelhdPsd/JnaVHCMLh9Fa/6HBGeOrTzxsiQZCzua4Al5ZUV2QWD0CWndjUuzAop1oo39UW2fJAzawj8Q7Oik+Fni7Qp16jluBI0uWULotsqcKR4KWqvCBFwzryLcU4mtWhFErl9a0LnlbQYYpSm5Y6rm/QVXljLmQZsEpsEmm2RLFAoM3onUbw6uk/8zFwoQKKD+u/oAEPYE+my4ssBj7gkLqvjreHBb26HoreR+YhRSS1HwY3xNCrBbroD7ByxpO09sI6emcvW3oCKWVcBQQE82FmhY/EasEwKv70IfOZbK1XeBrccPXuLMfb72cty0i3MidjWfx4M3F53Whyva+s1tXTd8I0pnUMKZ9qvawKvdDRZyE1oZQq4grt+cMksGBvMjJ/oyBYMk+xjsLFK7K8sU4caGcb/pRjb1knlHfgyzsK8RCyqnWTZ/rdW+qnHuWlzJAHXIduELxHpLQUJlZOm0igdLJiBfn4UKqTP+1UytHw5dGcOlALFVh28Qmd6Jw= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(376002)(396003)(136003)(39860400002)(451199015)(36840700001)(40470700004)(46966006)(41300700001)(426003)(7416002)(47076005)(44832011)(7406005)(5660300002)(8936002)(6666004)(2906002)(83380400001)(36860700001)(336012)(82740400003)(8676002)(70586007)(70206006)(81166007)(356005)(1076003)(316002)(54906003)(478600001)(7696005)(36756003)(40460700003)(110136005)(4326008)(40480700001)(2616005)(82310400005)(86362001)(186003)(26005)(16526019)(36900700001);DIR:OUT;SFP:1101; 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Replace smp_call_function_many() with on_each_cpu_mask() to simplify the code. Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 11 +++------ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 29 +++++++---------------- 2 files changed, 11 insertions(+), 29 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c index 1df0e3262bca..7eece3d2d0c3 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -310,7 +310,6 @@ int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid) enum resctrl_conf_type t; cpumask_var_t cpu_mask; struct rdt_domain *d; - int cpu; u32 idx; if (!zalloc_cpumask_var(&cpu_mask, GFP_KERNEL)) @@ -341,13 +340,9 @@ int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid) if (cpumask_empty(cpu_mask)) goto done; - cpu = get_cpu(); - /* Update resource control msr on this CPU if it's in cpu_mask. */ - if (cpumask_test_cpu(cpu, cpu_mask)) - rdt_ctrl_update(&msr_param); - /* Update resource control msr on other CPUs. */ - smp_call_function_many(cpu_mask, rdt_ctrl_update, &msr_param, 1); - put_cpu(); + + /* Update resource control msr on all the CPUs. */ + on_each_cpu_mask(cpu_mask, rdt_ctrl_update, &msr_param, 1); done: free_cpumask_var(cpu_mask); diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index 5993da21d822..d23fbc45ecd1 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -325,12 +325,7 @@ static void update_cpu_closid_rmid(void *info) static void update_closid_rmid(const struct cpumask *cpu_mask, struct rdtgroup *r) { - int cpu = get_cpu(); - - if (cpumask_test_cpu(cpu, cpu_mask)) - update_cpu_closid_rmid(r); - smp_call_function_many(cpu_mask, update_cpu_closid_rmid, r, 1); - put_cpu(); + on_each_cpu_mask(cpu_mask, update_cpu_closid_rmid, r, 1); } static int cpus_mon_write(struct rdtgroup *rdtgrp, cpumask_var_t newmask, @@ -1866,13 +1861,9 @@ static int set_cache_qos_cfg(int level, bool enable) /* Pick one CPU from each domain instance to update MSR */ cpumask_set_cpu(cpumask_any(&d->cpu_mask), cpu_mask); } - cpu = get_cpu(); - /* Update QOS_CFG MSR on this cpu if it's in cpu_mask. */ - if (cpumask_test_cpu(cpu, cpu_mask)) - update(&enable); - /* Update QOS_CFG MSR on all other cpus in cpu_mask. */ - smp_call_function_many(cpu_mask, update, &enable, 1); - put_cpu(); + + /* Update QOS_CFG MSR on all the CPUs in cpu_mask */ + on_each_cpu_mask(cpu_mask, update, &enable, 1); free_cpumask_var(cpu_mask); @@ -2349,7 +2340,7 @@ static int reset_all_ctrls(struct rdt_resource *r) struct msr_param msr_param; cpumask_var_t cpu_mask; struct rdt_domain *d; - int i, cpu; + int i; if (!zalloc_cpumask_var(&cpu_mask, GFP_KERNEL)) return -ENOMEM; @@ -2370,13 +2361,9 @@ static int reset_all_ctrls(struct rdt_resource *r) for (i = 0; i < hw_res->num_closid; i++) hw_dom->ctrl_val[i] = r->default_ctrl; } - cpu = get_cpu(); - /* Update CBM on this cpu if it's in cpu_mask. */ - if (cpumask_test_cpu(cpu, cpu_mask)) - rdt_ctrl_update(&msr_param); - /* Update CBM on all other cpus in cpu_mask. */ - smp_call_function_many(cpu_mask, rdt_ctrl_update, &msr_param, 1); - put_cpu(); + + /* Update CBM on all the CPUs in cpu_mask */ + on_each_cpu_mask(cpu_mask, rdt_ctrl_update, &msr_param, 1); free_cpumask_var(cpu_mask); From patchwork Fri Jan 13 15:20:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43381 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp332979wrt; Fri, 13 Jan 2023 07:32:24 -0800 (PST) X-Google-Smtp-Source: AMrXdXvfg6lt0DTHcVDuo4fgJhItF81nf4xplk5SxdqfL2RE78jsXZwlkTIVIqhSwIMbVz5dcgQG X-Received: by 2002:a17:906:33cf:b0:7ad:d62d:9d31 with SMTP id w15-20020a17090633cf00b007add62d9d31mr3462350eja.67.1673623943952; Fri, 13 Jan 2023 07:32:23 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673623943; cv=pass; d=google.com; s=arc-20160816; b=IcVNbCigU+bnYVi6BYORvRcKM+kLXzhvAHSEIiqNkKLPh9IHTs6vUIt17rbAME0/3O dL2kJRsi2nVp106OfqrBIz8NKw3M/gDHgLPyujSuaPiXA/MG6sAgL3ChyA6J3clmLNwX JpAwFM730XA+mofxVb/ImH9ZexTfHYHqOvXoye/vn9RXReviN3qDZw3SAesAvD4B1bEt 6PMzIZDr0y0JlEGqG5ZMqNan2GT6Mgeorlxcun7md1wGvSHYyVHYSAS2IHktuQO2hHnr VsN63qziwS8m0dEnpD+RAh4D57vQBh8RWuNam1m87OJ6KhrhUxQ0YpbW+TkzmkvMuGyq dbBg== ARC-Message-Signature: i=2; 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Fri, 13 Jan 2023 09:20:58 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 02/13] x86/cpufeatures: Add Slow Memory Bandwidth Allocation feature flag Date: Fri, 13 Jan 2023 09:20:28 -0600 Message-ID: <20230113152039.770054-3-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT065:EE_|SJ1PR12MB6123:EE_ X-MS-Office365-Filtering-Correlation-Id: 183a7e72-111f-4ad8-492c-08daf579e330 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: S+EJ5OzoZDBAVVh6UXnA+64wgR+89cHL2gfEpSlYxV7+JhuqJcZ0rZ3DUDEuduma8KHGxXRS7oAyNFkwt9MwuE8AaSTKBCTly7XslvGevonEfOmNK0difKK1vESziLM757rxr7v89T3HPFvOz6xkOkG9/Kc17nUea0IAierROkbavPm2s4W8ITLsESRbqc2apmvrVKBtHHnu15fLXpm2VunDCrqkFHL3r+2yC2nhwQhS4RR/NjzEM5W8gIrdSqlnioIdsN1AU/67dT8COUlMZTJQ5d5t9v98iMLLGH/jFN5vymJGKiuadwJG5xdQTVDnNreCKZmytvcGYzbeOvV0nohylIB2w8ddWVBA6piG9nXcT52zH+wY+6/G7zS/96g4WeokY5kwIlljZSI9AF2S60Y2YrdsBNF8+4y8mBPPzYNpVI981q3cVrVMdG/wT92XIHE3VtuZHTjBH3ermCMltBf3XLxdeFwB8MUZS+59lvlYpcCG0g1nO5ozcqvZCmpUhm76SFozg5vZx2Lv+Jx/PBh1mu+LY4mOsL7bbbeqLQeZPYe5BQCyVwac8zHVdPAA5ZBWGRmQ+p1zKZvFMK9eeANY285zoxX8XasAFCfuTyI6QTHXzq/15gj52NcRnEIKo20R7PzMuB51uWDYOz9P1eSdRY9HpjhbFVDcus8cfayLrQQ3tHlcxICHsTcfyHqqOp7vv8EwkiMTrdg0vZuwOlu5QFjQVnlmsy8Ha1hUQ/Yc/zF5cu9UYs5DXHRw5/Pk+jqWYmDmKXi/H0p+Sv2ggYebfJ05tWuAytgSzsquXLEEqecq1x1n0S1NaVPVD2Dj X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(39860400002)(346002)(376002)(136003)(451199015)(40470700004)(46966006)(36840700001)(8676002)(83380400001)(36860700001)(2906002)(8936002)(70586007)(7416002)(81166007)(356005)(4326008)(44832011)(7406005)(5660300002)(70206006)(82310400005)(186003)(41300700001)(47076005)(110136005)(40480700001)(16526019)(26005)(6666004)(1076003)(7696005)(2616005)(426003)(82740400003)(966005)(40460700003)(54906003)(478600001)(316002)(86362001)(336012)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 15:21:47.7318 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 183a7e72-111f-4ad8-492c-08daf579e330 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT065.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6123 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754921900393641461?= X-GMAIL-MSGID: =?utf-8?q?1754921900393641461?= Add the new AMD feature X86_FEATURE_SMBA. With this feature, the QOS enforcement policies can be applied to external slow memory connected to the host. QOS enforcement is accomplished by assigning a Class Of Service (COS) to a processor and specifying allocations or limits for that COS for each resource to be allocated. This feature is identified by the CPUID Function 8000_0020_EBX_x0. CPUID Fn8000_0020_EBX_x0 AMD Bandwidth Enforcement Feature Identifiers (ECX=0) Bits Field Name Description 2 L3SBE L3 external slow memory bandwidth enforcement CXL.memory is the only supported "slow" memory device. With the support of SMBA feature, the hardware enables bandwidth allocation on the slow memory devices. If there are multiple slow memory devices in the system, then the throttling logic groups all the slow sources together and applies the limit on them as a whole. The presence of the SMBA feature(with CXL.memory) is independent of whether slow memory device is actually present in the system. If there is no slow memory in the system, then setting a SMBA limit will have no impact on the performance of the system. Presence of CXL memory can be identified by numactl command. $numactl -H available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 node 0 size: 63678 MB node 0 free: 59542 MB node 1 cpus: node 1 size: 16122 MB node 1 free: 15627 MB node distances: node 0 1 0: 10 50 1: 50 10 CPU list for CXL memory will be empty. The cpu-cxl node distance is greater than cpu-to-cpu distances. Node 1 has the CXL memory in this case. CXL memory can also be identified using ACPI SRAT table and memory maps. Feature description is available in the specification, "AMD64 Technology Platform Quality of Service Extensions, Revision: 1.03 Publication # 56375 Revision: 1.03 Issue Date: February 2022". Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Link: https://www.amd.com/en/support/tech-docs/amd64-technology-platform-quality-service-extensions --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 6cfa7143c316..fbf243a7937e 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -307,6 +307,7 @@ #define X86_FEATURE_SGX_EDECCSSA (11*32+18) /* "" SGX EDECCSSA user leaf function */ #define X86_FEATURE_CALL_DEPTH (11*32+19) /* "" Call depth tracking for RSB stuffing */ #define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */ +#define X86_FEATURE_SMBA (11*32+21) /* "" Slow Memory Bandwidth Allocation */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index f53944fb8f7f..d925753084fb 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -45,6 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, + { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { 0, 0, 0, 0, 0 } From patchwork Fri Jan 13 15:20:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43383 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp333084wrt; Fri, 13 Jan 2023 07:32:33 -0800 (PST) X-Google-Smtp-Source: AMrXdXvgBIVIrfQGX1KNvdEqEDHcp7RFlwTBF34uCF7c8pzHXx98T9eeAr/9o4bP0YxvMCU3F81i X-Received: by 2002:a17:907:c303:b0:84d:2025:850a with SMTP id tl3-20020a170907c30300b0084d2025850amr25822198ejc.68.1673623953760; Fri, 13 Jan 2023 07:32:33 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673623953; cv=pass; d=google.com; s=arc-20160816; b=J01GGZgwVuzmvDBnh0LOrA5eX8CK58He9ekBGS4HuXAAOOfigpYd8iKzq4dv6fBLBy WvIeImIW5SHI8TWpNV7kxP0WvgP6eaaSu3b2K5GyqT6y6Nx5KSeKguP3sZJyK4ReAqEz 86Ey0U1gSNerXIqRdYnExKclt8C5Yd81WUaD8pJ5YwFU/qwdoRmr5x5aUnVFjTn/ObY5 aM/E80lupYFGDpL/jkxCPqHczbR2W5R8npdwKw1JGrEJlkzk3X2ZllD2sSAjOw0xmcnd JOVV+97uSqjJ2kMfVUchpjzL2cvHbIDvI/0kjqFejrcUasQ740klqaA1uAFtz8/jgplk tnlA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1F1GLlMLfSr5l7CElB+d0nCVkbg0nKh2QbK6amZ2zIc=; b=dSt00VsPi06Jlt2oTRFxIKDI1YyX6Y3COv2MVFykhpaQpp5yUjkbYnJ1fF6ttTLnzd u87x1kTf3WcsCkb2wlsPbbD7Q9WN9oW9GPGx84JChoMddFnSTnAEqZ1sjkRZH4a45S2Q Af0HMSV4LtgIdZNhITNKVBoxjVKhc45A7OSTvSWm+jGK78LaB4PG3QQe1rv+X98ztu4B yNlcDaEQYtJHKsm1lg6de5gZl3Km9WUwwhY8VBhBdoP7959/i9IY+5a/AnLtAnLpFtBe iFn5f7hcL9I6H4qidKGVt+x0ZzvLvwjiSe//7LIaLO2Pnxf+kP08OiYumyk7BWSWp5f7 BBDA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=guafYJLe; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Fri, 13 Jan 2023 09:21:00 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 03/13] x86/resctrl: Add a new resource type RDT_RESOURCE_SMBA Date: Fri, 13 Jan 2023 09:20:29 -0600 Message-ID: <20230113152039.770054-4-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT080:EE_|DM4PR12MB5867:EE_ X-MS-Office365-Filtering-Correlation-Id: 412ca5b4-6b39-4e81-23d1-08daf579e3d7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: WK2kuDp+yZpErMi9d73K7fKh8bOhIBle9HKX+WcSoZhYDUsJAWQYxX/QD5jvi6FFxdZVGLBZuwVlF2C7AWnlF6TO9GL8XR+wtYQhsh+AP6Tg7iGlwF9cyFuomV9duQKtXAsBOGt6AlCevvoZZOCmY/XaJ6NHnC2q809sHjrf2f1ZYgh0jKfF3RJg8tqNMTc0tYwIIb8+uCqfm8Q9eYLLjbQxoXKx2ihCnkWotF0I7PQPjOB3fX76DueZr8N4I2n043RE/ubphS9Vu/VamUCeGt+49Lk8LuSI2Kr51NZip9b5YatkdKDuLC1y9yC+dAsmkST3s10YAg3ovh6xNlaONK55kvBk1C2u15fkAExhswNMPlt7+sLovtzGvlTogmWu7+K4tcz+sI59tdA5S/ozleFhBQ/wI16dcEglMekMIAYQJiT6lK5J3ncfaBJZaCJqM67PHa9vlaDvNjlU4mByX1WFMLZyFt37QGzogNcF7g7pOO2suwASf8IYL34Xc/wRussrLNCT3Ns8vXwKv3lUZ0Z8AZv39oWHcMhqTzRL8nv4mzUnFvHpBRB4O8WdUE5tLr7HgIXyARTZv2KwEmg6lOF8QsuobTd3GXkEvm1Vk3L5OV5xgNpXbfO8hAywDeeWpFu8i4ANESue9MuAyI7XR649DAwlGcSzWSZ4EkhhApKVWMTcvYyBV//dNiiMkJtJG7KE/nEFflH7zbStjgjjIzxEoyLrY0iA75iuXVty4DY= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(136003)(39860400002)(346002)(376002)(451199015)(40470700004)(46966006)(36840700001)(5660300002)(7406005)(54906003)(7416002)(36756003)(110136005)(2906002)(40460700003)(44832011)(2616005)(82310400005)(1076003)(36860700001)(336012)(426003)(47076005)(186003)(7696005)(86362001)(40480700001)(316002)(26005)(81166007)(356005)(82740400003)(16526019)(478600001)(70586007)(6666004)(70206006)(8936002)(4326008)(8676002)(41300700001)(36900700001);DIR:OUT;SFP:1101; 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Mostly initialization of the essentials. Setting fflags to RFTYPE_RES_MB configures the SMBA resource to have the same resctrl files as the existing MBA resource. The SMBA resource has identical properties to the existing MBA resource. These properties will be enumerated in an upcoming change and exposed via resctrl because of this flag. Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/core.c | 12 ++++++++++++ arch/x86/kernel/cpu/resctrl/internal.h | 1 + 2 files changed, 13 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index c98e52ff5f20..f6af3ac1ef20 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -100,6 +100,18 @@ struct rdt_hw_resource rdt_resources_all[] = { .fflags = RFTYPE_RES_MB, }, }, + [RDT_RESOURCE_SMBA] = + { + .r_resctrl = { + .rid = RDT_RESOURCE_SMBA, + .name = "SMBA", + .cache_level = 3, + .domains = domain_init(RDT_RESOURCE_SMBA), + .parse_ctrlval = parse_bw, + .format_str = "%d=%*u", + .fflags = RFTYPE_RES_MB, + }, + }, }; /* diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 5ebd28e6aa0c..fdbbf66312ec 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -409,6 +409,7 @@ enum resctrl_res_level { RDT_RESOURCE_L3, RDT_RESOURCE_L2, RDT_RESOURCE_MBA, + RDT_RESOURCE_SMBA, /* Must be the last */ RDT_NUM_RESOURCES, From patchwork Fri Jan 13 15:20:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43382 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp332994wrt; Fri, 13 Jan 2023 07:32:25 -0800 (PST) X-Google-Smtp-Source: AMrXdXuyBJ/8QbMrUUQ4eAsqmM/bseIgyZEUz5qmdszKTRCweR6oI0+N5/B8ArHwtlo2MeO5dG9W X-Received: by 2002:a05:6402:1d98:b0:498:b9ea:1894 with SMTP id dk24-20020a0564021d9800b00498b9ea1894mr18622278edb.15.1673623945122; Fri, 13 Jan 2023 07:32:25 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673623945; cv=pass; d=google.com; s=arc-20160816; b=yC6wdj770gZuduG8Wh+le3WBOkpRRrd1q29+d0cSmLCA+83fV1DpQvSNKZcfpi7j2f 5RKKVIB5/NNdOX7OJ+R8m5cE4aRPhrtpWN1WqlT4/MrVNLcBHtCOChVknirfiqqxcnIm joSfwK21+3xJsgwgu96RLUWDMtbeYJ567styRF0Y9jq97qkWJpb50UJM9NZu36tCcvGb ijo1AVPuCr/0JG83RvuUAKuuJ06CkVI2TTgL8bfiASy6dSOBgIbBE20THe5fuD/eGTu3 UiAtMT93sIJy4CPiZb/DWh8+zQu01sKYgdjkdF1akAbZEFOJPdKG3CofdMCdJjyXL0ue tcwQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=KiGaBgNs34OVtg/o76sSHoa/Gi5RWgxUe3AGT5rQyXk=; b=QmS+oJX53A1+4F0HSCfmW4VWsRwMDLEgWaOYUjZlzxfBdysLDDRo0OT5Hg00SVvDNU Pntn9UT4NvRK4xugIcLkv9Bd1q6BJbDiHmN6Pn6yMm8lfVVVEOXTH28uGnF3fdvydo+H za6UP2uCoVKoKHI38wd9PSg75VoeGpAi/SZ8L9BBGBrGcfX7Q0E64aiRmnM3FQDptqZ7 uHerQKL9Cwoe7xPBcbykbwt7Mf7qk25obdoBnsUN5yu4PFTsEo5SeaRBf5/RszDtKYEt Lg0sQi1nnvLXrLuVDPo8GpNmWgnmBVvg0Tl7sII8ypYseKzteydsPNVLRrbp8nXw/CKq qjdg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=MTl0uHqT; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Fri, 13 Jan 2023 09:21:02 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 04/13] x86/cpufeatures: Add Bandwidth Monitoring Event Configuration feature flag Date: Fri, 13 Jan 2023 09:20:30 -0600 Message-ID: <20230113152039.770054-5-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT065:EE_|DM4PR12MB6448:EE_ X-MS-Office365-Filtering-Correlation-Id: fa4d8ce7-b154-4ef4-6573-08daf579e3f1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: gq0zv9d3Zo+NQyMNKWO/zSG2OUxpNZqq4sRjNRqjHKvuBO/U7sW2U8QsF8bt7CxjjOD1JSU9n7r1g2CCsPMNZ/Pe7qnUDBHJ4lURN6qezS6APbaFTYnz95DZyvGrs2jt9OK2Nhao3S2ULAUpP/rod9SOe+w7p+CeaCavcmo3mUVzhQWNXgeJL8Th5lHPh4xbwxco+FQwVKIxj6KYk3Wn6UP9PRZ4CR7om5vxL6k1WtRfgV1+d+ep3u4SQ/UGHZgi44SM9QS1ZiIxBt78ysbW7UXk/oDiVWU/1LoS3G7XVlxIrPDm1Bk7IlmdFWQ8rHvqkkYFZzzLqE82XSrysNqRRPPSW2jvRPszQlciGeFb4mamb5F+LSp0hYu4eXVqq6recEAnyCF/R0nCLhOf2Og2BybOb/SJ0OqE4F+fV40c4QjCLtNaPapDfqR+hT4hRN3Gx3ZjFik+xTylNacvE7O0+r2hSnSDlqkN5sINVAKzp8Of0PQuStYpmvtFlnPmzQQh34aI2v31AHNTQQULg9mVG0w0lJmDnP5QTPeOvK0d5tqlSCdX1WHjtacqeWjmudLTvlQR+WQMWKNJ0y0p1uHrT6fpgTSPp2I4DbgKNfPR/xMRuS7YVGA74lg8tVbhmq2OSM6NGLX7wEBUlfeK8XROZ1WrylENSBYPJvyTYiXGu0EC0XpHsCGuk28zBugR10s40dA7hNn08ISuaHDsGxFCkncnSYkb23jQWEJm9mDIk1rkjz29N616ckjsaDdOfLCKNCNJHxQCSfIdHcgjtClgkyDCuj32TgCeMtLtP7EQ0bNRmIgPKyai+vctpIJUZOHW X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(346002)(396003)(39860400002)(136003)(451199015)(36840700001)(40470700004)(46966006)(44832011)(2906002)(82310400005)(83380400001)(47076005)(336012)(36860700001)(426003)(1076003)(7406005)(7416002)(40480700001)(5660300002)(16526019)(186003)(8936002)(26005)(6666004)(36756003)(7696005)(2616005)(70586007)(41300700001)(70206006)(110136005)(81166007)(478600001)(8676002)(86362001)(54906003)(966005)(356005)(316002)(40460700003)(4326008)(82740400003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 15:21:48.9973 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa4d8ce7-b154-4ef4-6573-08daf579e3f1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT065.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6448 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754921901498979380?= X-GMAIL-MSGID: =?utf-8?q?1754921901498979380?= Newer AMD processors support the new feature Bandwidth Monitoring Event Configuration (BMEC). The feature support is identified via CPUID Fn8000_0020_EBX_x0 (ECX=0). Bits Field Name Description 3 EVT_CFG Bandwidth Monitoring Event Configuration (BMEC) The bandwidth monitoring events mbm_total_bytes and mbm_local_bytes are set to count all the total and local reads/writes respectively. With the introduction of slow memory, the two counters are not enough to count all the different types of memory events. With the feature BMEC, the users have the option to configure mbm_total_bytes and mbm_local_bytes to count the specific type of events. Each BMEC event has a configuration MSR, which contains one field for each bandwidth type that can be used to configure the bandwidth event to track any combination of supported bandwidth types. The event will count requests from every bandwidth type bit that is set in the corresponding configuration register. Following are the types of events supported: ==== ======================================================== Bits Description ==== ======================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== ======================================================== By default, the mbm_total_bytes configuration is set to 0x7F to count all the event types and the mbm_local_bytes configuration is set to 0x15 to count all the local memory events. Feature description is available in the specification, "AMD64 Technology Platform Quality of Service Extensions, Revision: 1.03 Publication". Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Link: https://www.amd.com/en/support/tech-docs/amd64-technology-platform-quality-service-extensions --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/cpuid-deps.c | 2 ++ arch/x86/kernel/cpu/scattered.c | 1 + 3 files changed, 4 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index fbf243a7937e..123613cdae93 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -308,6 +308,7 @@ #define X86_FEATURE_CALL_DEPTH (11*32+19) /* "" Call depth tracking for RSB stuffing */ #define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */ #define X86_FEATURE_SMBA (11*32+21) /* "" Slow Memory Bandwidth Allocation */ +#define X86_FEATURE_BMEC (11*32+22) /* "" Bandwidth Monitoring Event Configuration */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c index d95221117129..f6748c8bd647 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -68,6 +68,8 @@ static const struct cpuid_dep cpuid_deps[] = { { X86_FEATURE_CQM_OCCUP_LLC, X86_FEATURE_CQM_LLC }, { X86_FEATURE_CQM_MBM_TOTAL, X86_FEATURE_CQM_LLC }, { X86_FEATURE_CQM_MBM_LOCAL, X86_FEATURE_CQM_LLC }, + { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_TOTAL }, + { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_LOCAL }, { X86_FEATURE_AVX512_BF16, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_FP16, X86_FEATURE_AVX512BW }, { X86_FEATURE_ENQCMD, X86_FEATURE_XSAVES }, diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index d925753084fb..0dad49a09b7a 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -46,6 +46,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, + { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { 0, 0, 0, 0, 0 } From patchwork Fri Jan 13 15:20:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43380 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp332934wrt; Fri, 13 Jan 2023 07:32:18 -0800 (PST) X-Google-Smtp-Source: AMrXdXsco4WuKlURMV+s1z0Dv/BcQCeOJTqfXysg7RtxTHdOHnPikYU9ivHBGRStlRWk4cshbSQT X-Received: by 2002:a17:906:b00a:b0:7c1:458b:a946 with SMTP id v10-20020a170906b00a00b007c1458ba946mr71333642ejy.0.1673623938783; Fri, 13 Jan 2023 07:32:18 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673623938; cv=pass; d=google.com; s=arc-20160816; b=GSyUMg1eUFQp3kYq3FpTpRgNYFM2s24mjiHaC6UtsOu+AAJ1/K40UzkL9S1A1viIRJ Un5kggtrsDdKzzFN5R0htGGU6++iqepQK3+vPm0uLG2ZSm6fAi9vfZEiNqdot28zhb/d nzND8y62J2zIZ7RN6RrAKRz33DtQ1rmCKSKNiPXA1nGHxqY4A01Q45oxO3Md8M5NCD0s wdaf/CZc/Qnv4hEbsnLtTbqtCvBmg+Az7+HhnIdijTWilzSpvxBNdxI2j89nIn43g9iz H2KlqJdT3B4iVim5vm9Ycc0MK1qnvPF9XguR0lSz6SzBAroRxNG37BCU/Uu/t0UayTNS W0oQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=BZ0txemEripltiNGTXy/Z+dsa5is9tRbljc7gm5f0gg=; b=hOcfxNa59wJTvJSTmAskrYbeMcsegB+40+ftSDf3Ui29YtmSp42RYhC/PcntWRXVPr Jey9gUgFwh7zX64ube6ASf77ArHJ4zHY9v7RObwKgEu0l96Fm88N5PkYCZQfIU+fleCd O8C3lhJ1GMTau6U48sVreeXqXkBijLeBlnV4Qu/a5dW7ZGIr8RaFj0nU5w2ozg5OeDp+ UksB4nFv4IBWI1UTBAU71THwVTejNTtpUe+S5v6vQZtLBqLDHQx343B65KTG1cVdslPi kLFs145hV88gm29AGz4envktCwIWZtlBYUIX29PKNwIFIwSOdUEWLMX7EBJgM68AHmWi VLpQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=2192W8f7; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- Documentation/admin-guide/kernel-parameters.txt | 2 +- arch/x86/kernel/cpu/resctrl/core.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 6cfa6e3996cf..0ee891133d76 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -5221,7 +5221,7 @@ rdt= [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, - mba. + mba, smba, bmec. E.g. to turn on cmt and turn off mba use: rdt=cmt,!mba diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index f6af3ac1ef20..10a8c9d96f32 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -659,6 +659,8 @@ enum { RDT_FLAG_L2_CAT, RDT_FLAG_L2_CDP, RDT_FLAG_MBA, + RDT_FLAG_SMBA, + RDT_FLAG_BMEC, }; #define RDT_OPT(idx, n, f) \ @@ -682,6 +684,8 @@ static struct rdt_options rdt_options[] __initdata = { RDT_OPT(RDT_FLAG_L2_CAT, "l2cat", X86_FEATURE_CAT_L2), RDT_OPT(RDT_FLAG_L2_CDP, "l2cdp", X86_FEATURE_CDP_L2), RDT_OPT(RDT_FLAG_MBA, "mba", X86_FEATURE_MBA), + RDT_OPT(RDT_FLAG_SMBA, "smba", X86_FEATURE_SMBA), + RDT_OPT(RDT_FLAG_BMEC, "bmec", X86_FEATURE_BMEC), }; #define NUM_RDT_OPTIONS ARRAY_SIZE(rdt_options) From patchwork Fri Jan 13 15:20:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43395 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp342936wrt; Fri, 13 Jan 2023 07:52:23 -0800 (PST) X-Google-Smtp-Source: AMrXdXsi7hO/okZ8XE85NBabBY3w1U16c6C6mggosf0t0LP+sTo1eBzJFwfxCmr0AA7Z7OvZ8E7P X-Received: by 2002:a17:906:88b:b0:850:52f8:5ca9 with SMTP id n11-20020a170906088b00b0085052f85ca9mr16036114eje.28.1673625142883; Fri, 13 Jan 2023 07:52:22 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673625142; cv=pass; d=google.com; s=arc-20160816; b=eP8LqW6Pdpqbhm8AuF/1+YVgSe6wk4t30KzqKrDLkya5Lr7tS3UT9x0rxar18LQkd1 RI8vl3zTyOWYM99PotxA7dQddSZMkh45BkzyS1L4w7ZwSZw5KjC4GOB6UoI0J0gINvZI b9pyLerRqnAmgdPfeyJnosfd2FcbuQoWFxFb/8eTjz1IHUzXi8wUo9A0+yVCpOax4LtM OLhPImxMonpE4GnVxG2tHNcOchlEtWkR3EioEqTgfaGVhjmmOb1qRpmQO+FyOwzkwg4l wU0vd1l/qFS52jhl2mOAk3wV0NAJrwy6T9z2UMmuiXDMfA/kclNyPOtW/TL+wi2syrFZ ObFg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tgINMMaGyjGOt8j7LBPnaxnyoo4i4t2gT3dnWVHgbzM=; b=DUdj/QXU7nGjs2ZRQFpDKdE6yPZk5a+qCeyMvS1Wj72jF1fSTLlAnzdRsuSYpI6MZs TBXlnyT8hjLntgR9u6fo0qxomE114bqN6KQo8aL850PJ08pyXeVLqy/jJ/JDDRMZzIj4 GiO9ADBxVrJPxv3Ey081kfLXm5fLPR5WI5+Vtgj2cP9j7NLu/DgH4XclNY95/arWAjgQ gx+vCliRTpCVzVYJNNTEGq2se2Krb5ce4JidhMKbokvEwIUdGbtpgtHFBtRUzcTvTn74 o3qOssJ4SXs2+hE0smfym4m4v+F/Qi8vAmSDfCMTs+AQZhosM6o3QwC9yh9hwiLKu6wJ R6PA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=FcBCpK0d; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Fri, 13 Jan 2023 09:21:05 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 06/13] x86/resctrl: Detect and configure Slow Memory Bandwidth Allocation Date: Fri, 13 Jan 2023 09:20:32 -0600 Message-ID: <20230113152039.770054-7-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT024:EE_|IA1PR12MB6412:EE_ X-MS-Office365-Filtering-Correlation-Id: d776be53-89b3-49d5-c3e5-08daf57cd15c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: O0wXpAkcMBjeInTLGvoMq//jtdEwLspcSYVEkse2YEOZyrlV0+yCGC4nBPdh0Qr6RcxY2vkPm6DmFI1GUKUPP5DjtJNJgwoU3ylA9pbUaqEMtzBmHOM95ot3wjnjJybxqtEEzGc6QhCmtSyJKD5q0hPOfbM5CATxHU/nkH+FcEBqli335y+qDjCVjEOWrxxPwfb1v8pkWGXnsjoxh/4+bPCjN7bUY/15WnRsvZJeuExYx9uzcm2WkPgE8+J7PXj7SuPDApz2WjWTSzLoATilrMsTBluNnbqGH4vxxgh2NcPgiR9YthpC48opk3GxA2IkoX88ialNuM3gkGPXg2YF5ReNoLYJOKgtBQcaxqWcimLjIaBmFT+Htb6pp2UjewWsz+qya8b66TIXGO/ZPNqw912CdZjP8UaGZo8eCQx+A2K7JSqFHVDkcFG+UsTD9DbaAUZYKYHkFZOBZnzs1nHC9SBthX81cziTqRw3jaD3bXBgW0n0Vu3Wf7f1RkR6EQ5PCD0SQ6kR2mVSaH2JZh6cOTUH8P/epxYEbd1BIy14Iny8wVr18niEd+wjHEmpqSVcADneQU3LC4C/M44n6m8qjdWIeqCtADmdXLHLjqH1SOhZLL6VZCwejRwgoBdJfe9pG8Bh0Kj59pFbfBEA9kfW1yaNhxaKRmyJlg38Se88v8L+B33eVgbZRdINUGv3Ef2lejqFgCIz/cJjJ10wDAOcWYI3T2liVUV/JUIyOWXq0TU= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(136003)(396003)(376002)(346002)(451199015)(46966006)(36840700001)(40470700004)(70206006)(82310400005)(2906002)(7416002)(7406005)(5660300002)(44832011)(36756003)(6666004)(7696005)(70586007)(2616005)(8676002)(316002)(4326008)(54906003)(41300700001)(110136005)(478600001)(40480700001)(8936002)(26005)(186003)(336012)(1076003)(16526019)(426003)(86362001)(83380400001)(36860700001)(81166007)(47076005)(356005)(82740400003)(40460700003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 15:42:46.3145 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d776be53-89b3-49d5-c3e5-08daf57cd15c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT024.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6412 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754923158181035400?= X-GMAIL-MSGID: =?utf-8?q?1754923158181035400?= The QoS slow memory configuration details are available via CPUID_Fn80000020_EDX_x02. Detect the available details and initialize the rest to defaults. Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/include/asm/msr-index.h | 1 + arch/x86/kernel/cpu/resctrl/core.c | 36 +++++++++++++++++++++-- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 2 +- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 8 +++-- 4 files changed, 41 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index a85019756003..eaeeb7b415d6 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1068,6 +1068,7 @@ /* - AMD: */ #define MSR_IA32_MBA_BW_BASE 0xc0000200 +#define MSR_IA32_SMBA_BW_BASE 0xc0000280 /* MSR_IA32_VMX_MISC bits */ #define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 10a8c9d96f32..b4fc851f6489 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -162,6 +162,13 @@ bool is_mba_sc(struct rdt_resource *r) if (!r) return rdt_resources_all[RDT_RESOURCE_MBA].r_resctrl.membw.mba_sc; + /* + * The software controller support is only applicable to MBA resource. + * Make sure to check for resource type. + */ + if (r->rid != RDT_RESOURCE_MBA) + return false; + return r->membw.mba_sc; } @@ -225,9 +232,15 @@ static bool __rdt_get_mem_config_amd(struct rdt_resource *r) struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); union cpuid_0x10_3_eax eax; union cpuid_0x10_x_edx edx; - u32 ebx, ecx; + u32 ebx, ecx, subleaf; - cpuid_count(0x80000020, 1, &eax.full, &ebx, &ecx, &edx.full); + /* + * Query CPUID_Fn80000020_EDX_x01 for MBA and + * CPUID_Fn80000020_EDX_x02 for SMBA + */ + subleaf = (r->rid == RDT_RESOURCE_SMBA) ? 2 : 1; + + cpuid_count(0x80000020, subleaf, &eax.full, &ebx, &ecx, &edx.full); hw_res->num_closid = edx.split.cos_max + 1; r->default_ctrl = MAX_MBA_BW_AMD; @@ -750,6 +763,19 @@ static __init bool get_mem_config(void) return false; } +static __init bool get_slow_mem_config(void) +{ + struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_SMBA]; + + if (!rdt_cpu_has(X86_FEATURE_SMBA)) + return false; + + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) + return __rdt_get_mem_config_amd(&hw_res->r_resctrl); + + return false; +} + static __init bool get_rdt_alloc_resources(void) { struct rdt_resource *r; @@ -780,6 +806,9 @@ static __init bool get_rdt_alloc_resources(void) if (get_mem_config()) ret = true; + if (get_slow_mem_config()) + ret = true; + return ret; } @@ -869,6 +898,9 @@ static __init void rdt_init_res_defs_amd(void) } else if (r->rid == RDT_RESOURCE_MBA) { hw_res->msr_base = MSR_IA32_MBA_BW_BASE; hw_res->msr_update = mba_wrmsr_amd; + } else if (r->rid == RDT_RESOURCE_SMBA) { + hw_res->msr_base = MSR_IA32_SMBA_BW_BASE; + hw_res->msr_update = mba_wrmsr_amd; } } } diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c index 7eece3d2d0c3..eb07d4435391 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -209,7 +209,7 @@ static int parse_line(char *line, struct resctrl_schema *s, unsigned long dom_id; if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP && - r->rid == RDT_RESOURCE_MBA) { + (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA)) { rdt_last_cmd_puts("Cannot pseudo-lock MBA resource\n"); return -EINVAL; } diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index d23fbc45ecd1..75169680516b 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1210,7 +1210,7 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgroup *rdtgrp) list_for_each_entry(s, &resctrl_schema_all, list) { r = s->res; - if (r->rid == RDT_RESOURCE_MBA) + if (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA) continue; has_cache = true; list_for_each_entry(d, &r->domains, list) { @@ -1399,7 +1399,8 @@ static int rdtgroup_size_show(struct kernfs_open_file *of, ctrl = resctrl_arch_get_config(r, d, closid, type); - if (r->rid == RDT_RESOURCE_MBA) + if (r->rid == RDT_RESOURCE_MBA || + r->rid == RDT_RESOURCE_SMBA) size = ctrl; else size = rdtgroup_cbm_to_size(r, d, ctrl); @@ -2842,7 +2843,8 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp) list_for_each_entry(s, &resctrl_schema_all, list) { r = s->res; - if (r->rid == RDT_RESOURCE_MBA) { + if (r->rid == RDT_RESOURCE_MBA || + r->rid == RDT_RESOURCE_SMBA) { rdtgroup_init_mba(r, rdtgrp->closid); if (is_mba_sc(r)) continue; From patchwork Fri Jan 13 15:20:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43396 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp342984wrt; Fri, 13 Jan 2023 07:52:30 -0800 (PST) X-Google-Smtp-Source: AMrXdXvSkLyqX27RhHZorpuXHAYRQKa1hTyjE/A3MyKdvSQnulHZYt6NVwn7Lem62VYJl/R1bF39 X-Received: by 2002:a17:902:cd0e:b0:193:37a7:cc1c with SMTP id g14-20020a170902cd0e00b0019337a7cc1cmr18271502ply.56.1673625149930; Fri, 13 Jan 2023 07:52:29 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673625149; cv=pass; d=google.com; s=arc-20160816; b=tVw0FZ8jL+VBUmJ3KqEjnNQ8oin9B3oUKav3z2BeazSaorDpzj6QS3wdq2mq0C41cB wZ7QZtXYpfYgRJCuKBSI//FTFkNKQ76aTYS4eZczyDry58ywk0g6mznH5MzSBmpEZuRx K6J38BCPTS64pnjwIhiui6v/gNJHHyS1A2UOiG7Awh6DstpWphW4+Lm6rteem1VkUcLc ClliTP1mQMAJiMPgrjwSZdrr7apfuae72AuPoPPeYLAknxvgLhPKdXZao2yTh95fh+QN kv0BWHz+rZmyRqa24GRH+6onuFqz3tOMz74wEryEJCyU4hLJOgyQ4FREzVDMvJ5lrgxH 0ChQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OWsoBoY4ZjUGfX1NS4utLuWqwyMK3nBVSacNNs4Ti6k=; b=G3NE+DZ5ftIjV9U0pLP2Kcru56dn4qy26ijASowX35JkEEQ9ugXG8dk6PIm7TcJ2kk cQ40C5BouMobqDBEoKTb5uNG5yUR/HNB6B0+1Xni4jTokwEZna0FP6/yH5SAAmcgq0ER uvlrDj2XPAbwg0SPqgtaJWpBfnxTqm1CNBavoJpM21nLOFDXLw+SrUR7RaIdgHR4lMbf Agj0H3B+58N2NpnBnwSxgBjyggwJZAnCWmrnAPiMswIMpt0l6LpOWgulQtXDc9sg24F7 Rr8NAck115Kl76vyStoCnL4yu77wnP4QstsLk6BqRr3jlNHpmRyJ5NxyC1yElFb4YV89 Nthg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=IpJwVqGm; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Fri, 13 Jan 2023 09:21:07 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 07/13] x86/resctrl: Add __init attribute to rdt_get_mon_l3_config() Date: Fri, 13 Jan 2023 09:20:33 -0600 Message-ID: <20230113152039.770054-8-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT024:EE_|MW3PR12MB4377:EE_ X-MS-Office365-Filtering-Correlation-Id: 7b28ed0b-cce5-4c3f-42f5-08daf57cd201 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RpoD+stBsPuYQFlAlhtdKbW1HTXT4l4cJRZx7tFvDovVhyyrEbUlVYkoiQTNHsERcwdtzKc6VoDGK6h+DgLlOUDWO0WHOoMJGhAWO7FWtBrs7D7cRwkMRAJavMf/zokWOxRlcSlHPtS3K0pXhKGsHWbzZBP6ztzkOafYUoROdD058rNI1QfmCc8NcqRXPN0WnEK6wGf9PKwP2sBCaZkc8FlqjJFtZOwt/m3yQNjhx7LAB+iyZQsXEgcQ+57EFE1XmaKWNZB2E6AkSlzoSSTWHa6rVp1ZK70FCxSY+r4pdEnunMBUfmt6zRgKZtByS7RRQJZF4csBtEpJo/+iW0oPW5Pp7HfF1G4rlPOHZwX2pnkJ+S9e5pOI7pePcay/MX5qNntUhrvswsoaymHfwDrAGnGhgonLdLztKJ1QlRNtcRQPpbJAb74fhkqXpqn7/l6+T8zXjB1hAw/VbShMYDyJZVwnGy42yZobcJ1Nf1gEmfCOPgW+if/pH1dZhSB8g26XbXDqc+SngeerFZdlruA7kcHXeQGf85NYmOeiqVJi2BUMNrAPiDxtnweKURlKyGL98u+ule+LAoIXbveeVAQbd4Tjxp6SV8batpRop8EwlqMH7MLuWW8+iY+r+OxYB9g/Uu8+PY8vlzgebEFFo8czyK7VNN8WYGbLjKVpIMWLJoQ1juAgzWZmYk7ZdCWF4ICBqYimWfWk2J6OyX6W9DWb/cAAEiFFzPuYG5spPfR9HgI= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(136003)(346002)(376002)(396003)(451199015)(40470700004)(36840700001)(46966006)(426003)(83380400001)(82740400003)(47076005)(36860700001)(81166007)(86362001)(356005)(2906002)(44832011)(40480700001)(41300700001)(7416002)(7406005)(5660300002)(8936002)(82310400005)(40460700003)(6666004)(478600001)(2616005)(336012)(1076003)(16526019)(186003)(26005)(316002)(8676002)(4326008)(70586007)(70206006)(7696005)(54906003)(110136005)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 15:42:47.3769 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7b28ed0b-cce5-4c3f-42f5-08daf57cd201 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT024.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4377 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754923164856437476?= X-GMAIL-MSGID: =?utf-8?q?1754923164856437476?= In an upcoming change rdt_get_mon_l3_config() needs to call rdt_cpu_has() to query the monitor related features. It cannot be called right now because rdt_cpu_has() has the __init attribute but rdt_get_mon_l3_config() doesn't. Add the __init attribute to rdt_get_mon_l3_config() that is only called by get_rdt_mon_resources() that already has the __init attribute. Also make rdt_cpu_has() available to by rdt_get_mon_l3_config() via the internal header file. Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/core.c | 2 +- arch/x86/kernel/cpu/resctrl/internal.h | 1 + arch/x86/kernel/cpu/resctrl/monitor.c | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index b4fc851f6489..030d3b409768 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -728,7 +728,7 @@ static int __init set_rdt_options(char *str) } __setup("rdt", set_rdt_options); -static bool __init rdt_cpu_has(int flag) +bool __init rdt_cpu_has(int flag) { bool ret = boot_cpu_has(flag); struct rdt_options *o; diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index fdbbf66312ec..f16b8bc5448c 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -512,6 +512,7 @@ void closid_free(int closid); int alloc_rmid(void); void free_rmid(u32 rmid); int rdt_get_mon_l3_config(struct rdt_resource *r); +bool __init rdt_cpu_has(int flag); void mon_event_count(void *info); int rdtgroup_mondata_show(struct seq_file *m, void *arg); void mon_event_read(struct rmid_read *rr, struct rdt_resource *r, diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index 77538abeb72a..5665ab9725ce 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -763,7 +763,7 @@ static void l3_mon_evt_init(struct rdt_resource *r) list_add_tail(&mbm_local_event.list, &r->evt_list); } -int rdt_get_mon_l3_config(struct rdt_resource *r) +int __init rdt_get_mon_l3_config(struct rdt_resource *r) { unsigned int mbm_offset = boot_cpu_data.x86_cache_mbm_width_offset; struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); From patchwork Fri Jan 13 15:20:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43402 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp343344wrt; Fri, 13 Jan 2023 07:53:11 -0800 (PST) X-Google-Smtp-Source: AMrXdXuZpXeeXmUJzrcFTsVC2gUlMy4jiT4PugNV24RkWcIUGWizzcszGqCQQMcy7QiA/1iaBcGf X-Received: by 2002:a17:906:6dd4:b0:836:e6f7:8138 with SMTP id j20-20020a1709066dd400b00836e6f78138mr82996153ejt.13.1673625191721; Fri, 13 Jan 2023 07:53:11 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673625191; cv=pass; d=google.com; s=arc-20160816; b=T013bSHE8a0rOtnEr/AzIBcO+c/zcIj2PQ+/Ml2TNs39tQ8EbiAgfUyuLHgbojCGt2 nPFRsJEGlAZOafMl+WTyeKaVD5lQ3EI57kFwtnZRDEkVKME+3/FfnzboGpnrsGxByIpk cOgiKZKEwSU/BgZVJRyph5t0Og/BJ1Y8kWHXqXAfC2p2m/z6v9BvWR1S0mVow+IVjpX1 LMbyAJKa27yTAv3tFIOM/ZM4RNpkjp44c0QA3Ct2/rtPRquWqQo/eYL4aMQOHURK5fVw UfJQSljr6QQ0Bb/+FHxYEXKQ4ggI2jvrui43CYJrf03h4Ktl+EDoP153YrIxs5pFFP3H R9pw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=hJ/w7MRsnf1UDW+u5jMUtZCElSrGZ7FSYYp+dTVp/zo=; b=SbYCTKVrooxbAxTsH4IT80VD2jlVLRwxR4o4e9AAzxLEqBhKrPHOE2GMD77LgxiKiK Ndtv4SII0GMzzAmxCCuan81dAakWG7fel0Kb5AvlYhNrmqYvlMm7yugPV2RamGj92hBH aExSJIAxEafaKv9+4LIAIlvxMFtC9N8I15yKEF3UkfeE+DlQH5MjcU9cqai93nDJhqHw IWa8UoaP0SLA1geRuvtmEjVp/sc6lkaw6FcDYRhaNaqugHUeZszLcyVH199UPLj9ltKU N0h5J3nXP4gM0nMhRDKmMQuaRNZZ7laUQaneYkvp9TchyutEcICmnRg+flkw/v/Gc50c 7JyQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=WjcnwoZU; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Fri, 13 Jan 2023 09:21:08 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 08/13] x86/resctrl: Support monitor configuration Date: Fri, 13 Jan 2023 09:20:34 -0600 Message-ID: <20230113152039.770054-9-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT101:EE_|DS0PR12MB7996:EE_ X-MS-Office365-Filtering-Correlation-Id: 7f1b5067-28a9-4a8d-6ba1-08daf57cd30a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: K3jZUi6Gv67FC9d3j/HkbnB5b9dr57qbeZvsCgBRhIboe3FjQXfSoiIW66xDgjLXeB/cjUxb5VcTEj8irRBKC/cXlIqv0ip9A5Pu3LzDLsbA2GDfKz7StTCkcXrfEC0WMuFHQn8TtffC646wJxcrTVOlb9DMWANfctTR7/cblk3RAEq3v7pWPm521JAedf4s/B0NwVaAwWe5GzjVo6TOe0nd1Nbx/WLCTPBZSCoERyK//4YcxwrW3ltP2LCF8SuGEUFWeUcKE7QL7zop88xY+1EUyVh/KrS5++EoDSJ2+1hVb7ihmByeul3TSwmu4pusmWTLiRLIhiDCPIMLOUNv/kVTL04gdGsMHsBPTfq/VDZ8Eyizk5IQ2rYcVnRpMYJy3zKH9CwTLlO5RMbshFMS1oepl00iy+dK1SAPkNG8V1RWsaT1OeP0dyN82XYCudnL4gG4wdwVsaPSgWf61IU/THZGrfhtLmnQRH3Hj/DVSNPhx4v8abehxOc4oZyDiqzjWBM8IJG248sjlTS1PSCYOFRGJZWU2AP/CJKY+t66q7aCb32h512PrFLnbW+UXMppC09wpDxuCr2a3QLrf76LoD2gHoQT9L1e3rMIpoNntGaapXarVbmXCpibR/TbUQjV1c2G1xfpAJGPJg9bnFHSjrDTQYNJRfsiOJiKaC0oWqbA9pIq9I1IH4szEmlFxlZg2Mppf30aK8DspVHzvjPaOGDCHh0vAWUIggI3k7R2YzY= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(396003)(376002)(346002)(136003)(451199015)(46966006)(40470700004)(36840700001)(40480700001)(478600001)(40460700003)(36756003)(7696005)(16526019)(26005)(2616005)(6666004)(186003)(70206006)(5660300002)(70586007)(8936002)(41300700001)(8676002)(4326008)(110136005)(7416002)(54906003)(316002)(44832011)(2906002)(7406005)(86362001)(82310400005)(356005)(81166007)(83380400001)(82740400003)(336012)(1076003)(426003)(47076005)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 15:42:49.0834 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7f1b5067-28a9-4a8d-6ba1-08daf57cd30a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT101.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7996 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754923209203436841?= X-GMAIL-MSGID: =?utf-8?q?1754923209203436841?= Add a new field in struct mon_evt to support Bandwidth Monitoring Event Configuration(BMEC) and also update the "mon_features" display. The resctrl file "mon_features" will display the supported events and files that can be used to configure those events if monitor configuration is supported. Before the change. $cat /sys/fs/resctrl/info/L3_MON/mon_features llc_occupancy mbm_total_bytes mbm_local_bytes After the change when BMEC is supported. $cat /sys/fs/resctrl/info/L3_MON/mon_features llc_occupancy mbm_total_bytes mbm_total_bytes_config mbm_local_bytes mbm_local_bytes_config Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/internal.h | 2 ++ arch/x86/kernel/cpu/resctrl/monitor.c | 7 +++++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 5 ++++- 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index f16b8bc5448c..0605b04f1b7a 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -52,11 +52,13 @@ DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key); * struct mon_evt - Entry in the event list of a resource * @evtid: event id * @name: name of the event + * @configurable: true if the event is configurable * @list: entry in &rdt_resource->evt_list */ struct mon_evt { enum resctrl_event_id evtid; char *name; + bool configurable; struct list_head list; }; diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index 5665ab9725ce..cf7b6e59fa29 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -800,6 +800,13 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r) if (ret) return ret; + if (rdt_cpu_has(X86_FEATURE_BMEC)) { + if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) + mbm_total_event.configurable = true; + if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) + mbm_local_event.configurable = true; + } + l3_mon_evt_init(r); r->mon_capable = true; diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index 75169680516b..bf0bd4378e13 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -998,8 +998,11 @@ static int rdt_mon_features_show(struct kernfs_open_file *of, struct rdt_resource *r = of->kn->parent->priv; struct mon_evt *mevt; - list_for_each_entry(mevt, &r->evt_list, list) + list_for_each_entry(mevt, &r->evt_list, list) { seq_printf(seq, "%s\n", mevt->name); + if (mevt->configurable) + seq_printf(seq, "%s_config\n", mevt->name); + } return 0; } From patchwork Fri Jan 13 15:20:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43400 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp343289wrt; Fri, 13 Jan 2023 07:53:06 -0800 (PST) X-Google-Smtp-Source: AMrXdXvq79gxs2MMUZQlCrKs9+4m0i4rWuPaiH6tZN+abJYSb0oVLHnJUdAVdR3G3s6h2QWwWlG+ X-Received: by 2002:a17:906:8d03:b0:83f:743e:86d with SMTP id rv3-20020a1709068d0300b0083f743e086dmr29923399ejc.14.1673625185911; Fri, 13 Jan 2023 07:53:05 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673625185; cv=pass; d=google.com; s=arc-20160816; b=B/E+2NPDKKodgOqRiy8lLi5mr52/bO8LQx2I8mjqhUZs7cb2MNSdFWD8izMwl794XL W1kd8eQ3GLemW3d2SnQ5ZLlGJpt2iic8n8qykcbGBBPVc627ck6CmT7TbROSwURZp2xg O/OILrqm4Wv6NGczJ9HjilF/6vAfzC+YL5N7qcX3lITTOC86OrzPWIJxL5CPgrkEQ1+O l6MD0AOEsv1Pb9WnkI+6n04nZNs3EUSlMI5WjbEWZ4HqS0uimVQUS9nzdenqKc1MHgL0 mqFF6yMSlh+Nz8K2irrqFIqrXCCEpJMcEPlJcuBa1iTJWWATv2GKYaeX1nVMWnk9zjHw iI+Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OUMDDpsVQcPoPnCXldW2QX1LhTDRJWpdhLgmYDWInFY=; b=J1kf2KuIVOBlpIeF+Xe6vwZ/3M7C5DIUCtXx4wnTGXzFIC7Zawefq+VTYo5TPJJPPI S6aIs3fLnliLmNeCDhXb/oC1/az+zO2VnNYVltkedyT/qmGqGYPT6ITZH4TluPEgftfe Io0oQAX7Bml4s2lNilsAjWxUEa7kGSizaQw86EVJOicN8HTDOp7Q6fyqClNEghEOli9j xRpco0kQn/OOWbzpGFevJyf/2xqQnkZ5j1IEjOwCvkFA62xCeHBeUgm7m2F0kS2d8NHx 81iycUrADZFnMGatxuadduT3VsFXDLRXatpK2JRrU3xoOi9xIpMCzi1LBypgqeMug2M4 KEKQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=PQDCyR9c; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Fri, 13 Jan 2023 09:21:10 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 09/13] x86/resctrl: Add interface to read mbm_total_bytes_config Date: Fri, 13 Jan 2023 09:20:35 -0600 Message-ID: <20230113152039.770054-10-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT101:EE_|DM6PR12MB4300:EE_ X-MS-Office365-Filtering-Correlation-Id: 057eee94-457e-4af4-a72e-08daf57cd559 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: YweNs/MyUlg0rRqAfiVeNPxICL2/7EZll1ZUQh9eURJ6jEpcF1snvXLezQk9IL9wD1FwB47XLpmzQ4g6Q1RSJ6M2mNYUbkeXghMeH36EALdm4D65+737QnhkQHJ1Z+7Vd/ayPdvWFtggA7sNxIDaLpF7mbs4yXFamOc9NbHoinNMsbSJrnrm/xUpd3CnpgQSy8SxFVtW+CAKGriZFOPDlhP1RYjZQzO6f/RFOUsNVTUqNbePqU2JfiEGrxQ/E5N4atG1GSX2Y4OhTwrNWax1xJHVNJMOpxMeHdwTI9m5ixf/ZXZsqy0qmt/or+g25Bxya6WDUO7TozLRzNd+Bb5gb8m0juFhYqsFnzrGpDna5gpLs73KkTNMRYiBQ6DSsT3LiD4vnleNtY6lXSHgS3UAhPNDkvlc2PgfTUHD24NT44z6EHoPXRd6d6sWcEVFty9dHOnsk5CsR3KT8F1qaoMzzBp8q/rWCXtE4glhWgatfhi+X1gRWMLeB/Rzf0qIS/rRUi7j49KVx9myK1bY+huofWgAqo1nAjMFr52OOXeqC/lslcK1o2lDL9UEtwkuZSj6Qi9nHKOjoVSBa13Sl9Nr7UTrTRM+nHPVnjn67y05kKpgdvE4cAgYmtUB59mQvx6/f27q0+8XYbrHK9+qSTXq3iDu7LwN0/MsXge4Sew9JnhMJE5ffYbtN3d/kTiCQQSNoVu0d0uvUja+PuGaOdN7L79vcsdvh0T7DM2RAtjUpC0= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(136003)(346002)(376002)(396003)(451199015)(40470700004)(46966006)(36840700001)(83380400001)(426003)(47076005)(36860700001)(82740400003)(81166007)(86362001)(356005)(2906002)(44832011)(40480700001)(41300700001)(7416002)(7406005)(5660300002)(8936002)(82310400005)(40460700003)(6666004)(478600001)(2616005)(336012)(1076003)(16526019)(186003)(26005)(316002)(8676002)(4326008)(70586007)(70206006)(7696005)(54906003)(110136005)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 15:42:52.9581 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 057eee94-457e-4af4-a72e-08daf57cd559 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT101.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4300 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754923203289207489?= X-GMAIL-MSGID: =?utf-8?q?1754923203289207489?= The event configuration can be viewed by the user by reading the configuration file /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== By default, the mbm_total_bytes_config is set to 0x7f to count all the event types. For example: $cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config 0=0x7f;1=0x7f;2=0x7f;3=0x7f In this case, the event mbm_total_bytes is configured with 0x7f on domains 0 to 3. Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/include/asm/msr-index.h | 1 + arch/x86/kernel/cpu/resctrl/internal.h | 24 ++++++ arch/x86/kernel/cpu/resctrl/monitor.c | 4 +- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 102 +++++++++++++++++++++++++ 4 files changed, 130 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index eaeeb7b415d6..06b64f4050ae 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1069,6 +1069,7 @@ /* - AMD: */ #define MSR_IA32_MBA_BW_BASE 0xc0000200 #define MSR_IA32_SMBA_BW_BASE 0xc0000280 +#define MSR_IA32_EVT_CFG_BASE 0xc0000400 /* MSR_IA32_VMX_MISC bits */ #define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 0605b04f1b7a..8edecc5763d8 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -30,6 +30,29 @@ */ #define MBM_CNTR_WIDTH_OFFSET_MAX (62 - MBM_CNTR_WIDTH_BASE) +/* Reads to Local DRAM Memory */ +#define READS_TO_LOCAL_MEM BIT(0) + +/* Reads to Remote DRAM Memory */ +#define READS_TO_REMOTE_MEM BIT(1) + +/* Non-Temporal Writes to Local Memory */ +#define NON_TEMP_WRITE_TO_LOCAL_MEM BIT(2) + +/* Non-Temporal Writes to Remote Memory */ +#define NON_TEMP_WRITE_TO_REMOTE_MEM BIT(3) + +/* Reads to Local Memory the system identifies as "Slow Memory" */ +#define READS_TO_LOCAL_S_MEM BIT(4) + +/* Reads to Remote Memory the system identifies as "Slow Memory" */ +#define READS_TO_REMOTE_S_MEM BIT(5) + +/* Dirty Victims to All Types of Memory */ +#define DIRTY_VICTIMS_TO_ALL_MEM BIT(6) + +/* Max event bits supported */ +#define MAX_EVT_CONFIG_BITS GENMASK(6, 0) struct rdt_fs_context { struct kernfs_fs_context kfc; @@ -531,5 +554,6 @@ bool has_busy_rmid(struct rdt_resource *r, struct rdt_domain *d); void __check_limbo(struct rdt_domain *d, bool force_free); void rdt_domain_reconfigure_cdp(struct rdt_resource *r); void __init thread_throttle_mode_init(void); +void __init mbm_config_rftype_init(const char *config); #endif /* _ASM_X86_RESCTRL_INTERNAL_H */ diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index cf7b6e59fa29..0ff45e34d83c 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -801,8 +801,10 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r) return ret; if (rdt_cpu_has(X86_FEATURE_BMEC)) { - if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) + if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) { mbm_total_event.configurable = true; + mbm_config_rftype_init("mbm_total_bytes_config"); + } if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) mbm_local_event.configurable = true; } diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index bf0bd4378e13..cd4e668e5019 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1420,6 +1420,93 @@ static int rdtgroup_size_show(struct kernfs_open_file *of, return ret; } +struct mon_config_info { + u32 evtid; + u32 mon_config; +}; + +#define INVALID_CONFIG_INDEX UINT_MAX + +/** + * mon_event_config_index_get - get the hardware index for the + * configurable event + * @evtid: event id. + * + * Return: 0 for evtid == QOS_L3_MBM_TOTAL_EVENT_ID + * 1 for evtid == QOS_L3_MBM_LOCAL_EVENT_ID + * INVALID_CONFIG_INDEX for invalid evtid + */ +static inline unsigned int mon_event_config_index_get(u32 evtid) +{ + switch (evtid) { + case QOS_L3_MBM_TOTAL_EVENT_ID: + return 0; + case QOS_L3_MBM_LOCAL_EVENT_ID: + return 1; + default: + /* Should never reach here */ + return INVALID_CONFIG_INDEX; + } +} + +static void mon_event_config_read(void *info) +{ + struct mon_config_info *mon_info = info; + unsigned int index; + u32 h; + + index = mon_event_config_index_get(mon_info->evtid); + if (index == INVALID_CONFIG_INDEX) { + pr_warn_once("Invalid event id %d\n", mon_info->evtid); + return; + } + rdmsr(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config, h); + + /* Report only the valid event configuration bits */ + mon_info->mon_config &= MAX_EVT_CONFIG_BITS; +} + +static void mondata_config_read(struct rdt_domain *d, struct mon_config_info *mon_info) +{ + smp_call_function_any(&d->cpu_mask, mon_event_config_read, mon_info, 1); +} + +static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32 evtid) +{ + struct mon_config_info mon_info = {0}; + struct rdt_domain *dom; + bool sep = false; + + mutex_lock(&rdtgroup_mutex); + + list_for_each_entry(dom, &r->domains, list) { + if (sep) + seq_puts(s, ";"); + + memset(&mon_info, 0, sizeof(struct mon_config_info)); + mon_info.evtid = evtid; + mondata_config_read(dom, &mon_info); + + seq_printf(s, "%d=0x%02x", dom->id, mon_info.mon_config); + sep = true; + } + seq_puts(s, "\n"); + + mutex_unlock(&rdtgroup_mutex); + + return 0; +} + +static int mbm_total_bytes_config_show(struct kernfs_open_file *of, + struct seq_file *seq, void *v) +{ + struct rdt_resource *r = of->kn->parent->priv; + + mbm_config_show(seq, r, QOS_L3_MBM_TOTAL_EVENT_ID); + + return 0; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1518,6 +1605,12 @@ static struct rftype res_common_files[] = { .seq_show = max_threshold_occ_show, .fflags = RF_MON_INFO | RFTYPE_RES_CACHE, }, + { + .name = "mbm_total_bytes_config", + .mode = 0444, + .kf_ops = &rdtgroup_kf_single_ops, + .seq_show = mbm_total_bytes_config_show, + }, { .name = "cpus", .mode = 0644, @@ -1624,6 +1717,15 @@ void __init thread_throttle_mode_init(void) rft->fflags = RF_CTRL_INFO | RFTYPE_RES_MB; } +void __init mbm_config_rftype_init(const char *config) +{ + struct rftype *rft; + + rft = rdtgroup_get_rftype_by_name(config); + if (rft) + rft->fflags = RF_MON_INFO | RFTYPE_RES_CACHE; +} + /** * rdtgroup_kn_mode_restrict - Restrict user access to named resctrl file * @r: The resource group with which the file is associated. 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Fri, 13 Jan 2023 09:21:11 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 10/13] x86/resctrl: Add interface to read mbm_local_bytes_config Date: Fri, 13 Jan 2023 09:20:36 -0600 Message-ID: <20230113152039.770054-11-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT044:EE_|PH7PR12MB8055:EE_ X-MS-Office365-Filtering-Correlation-Id: 0f04a65d-55d6-4861-e0e7-08daf57cd584 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Ci42xNTibkAgEkpqf5nnV1k2YzT1QZ1UtIgu4rcpE3R/ocqG/lW9XYUnFlY6W1t3I/nm67k5rPu+nkS1OmCxY2wfOuWy1v46UEDuk56WNytX9SoL3BwK0sJelOBIFA9FPbvsQqBTjENmqzt5g/VC+5rCbXThwkWqSYB93zVlhEoTAoFIOLUWUd/oFVtWBIYSQRnpOW2KexUpfR4QO0ZrWc1lDwxHU11gB8P2b/6x1X4NQSXAbuuxzzCysqtcV5lYl2KKjZISn6HZPZZFttbQ4dM1/IGIt8Ifj8DQN6PVc8ez5Gmare2k0OS3baRObDaMeSztTmfhdvwiWcJlZxdh9zUu8TJ79gectXfqVLfvldx1Yla0J5RI+TfscfGyXKtpyNwT1Lp48Q+Px2PyoNOvV0N7Eob3FjpssrzcoyO3lqWZwA1mJYCBGaaH39dF9HqqYHtvWU2dX5L8xtCGlHIEtCXrg8H+9pwsxsf6XZXN+z4OhRCas+b14sS021KZ5lQmLRT2sTjJvjpwQ3mzZPJmCYYO6KrKoME6IdJsYsy9/xMXgRf4QjOX3Kk/+R/9ri5rGyoaPtFT/NhgDmiNAyRo4IxfZkQxnIqEc03ECC4VL5s4yLNdj/maf8cjYy70aOi+d9wcunh4x4j41K5PhhGrO87pQK/ZvPp6/taotCld2HtL3uTOU3iBEOXFA9om106pQwTghWuaSd3GIv9VvoFnzTN9W0tqVBhkI6ZvkJ7TTDE= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(346002)(136003)(39860400002)(396003)(451199015)(36840700001)(40470700004)(46966006)(2906002)(110136005)(40460700003)(5660300002)(7416002)(7406005)(316002)(54906003)(44832011)(36756003)(2616005)(1076003)(82310400005)(36860700001)(336012)(83380400001)(426003)(47076005)(7696005)(86362001)(26005)(40480700001)(16526019)(81166007)(356005)(186003)(82740400003)(478600001)(8936002)(8676002)(6666004)(70206006)(70586007)(4326008)(41300700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 15:42:53.2570 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0f04a65d-55d6-4861-e0e7-08daf57cd584 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT044.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8055 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754923198741380464?= X-GMAIL-MSGID: =?utf-8?q?1754923198741380464?= The event configuration can be viewed by the user by reading the configuration file /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== By default, the mbm_local_bytes_config is set to 0x15 to count all the local event types. For example: $cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config 0=0x15;1=0x15;2=0x15;3=0x15 In this case, the event mbm_local_bytes is configured with 0x15 on domains 0 to 3. Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/monitor.c | 4 +++- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 16 ++++++++++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index 0ff45e34d83c..28c65008fce1 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -805,8 +805,10 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r) mbm_total_event.configurable = true; mbm_config_rftype_init("mbm_total_bytes_config"); } - if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) + if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) { mbm_local_event.configurable = true; + mbm_config_rftype_init("mbm_local_bytes_config"); + } } l3_mon_evt_init(r); diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index cd4e668e5019..ad3c7014adf6 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1507,6 +1507,16 @@ static int mbm_total_bytes_config_show(struct kernfs_open_file *of, return 0; } +static int mbm_local_bytes_config_show(struct kernfs_open_file *of, + struct seq_file *seq, void *v) +{ + struct rdt_resource *r = of->kn->parent->priv; + + mbm_config_show(seq, r, QOS_L3_MBM_LOCAL_EVENT_ID); + + return 0; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1611,6 +1621,12 @@ static struct rftype res_common_files[] = { .kf_ops = &rdtgroup_kf_single_ops, .seq_show = mbm_total_bytes_config_show, }, + { + .name = "mbm_local_bytes_config", + .mode = 0444, + .kf_ops = &rdtgroup_kf_single_ops, + .seq_show = mbm_local_bytes_config_show, + }, { .name = "cpus", .mode = 0644, From patchwork Fri Jan 13 15:20:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43398 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp343254wrt; Fri, 13 Jan 2023 07:53:00 -0800 (PST) X-Google-Smtp-Source: AMrXdXtVClqEQdQ1n3cKDUmHKq6QSHr2WZt8C5fO1ZnyJz4aCFFlgXL5usCF98+n+JR3ryeDU/vV X-Received: by 2002:a17:907:c242:b0:7c1:9e6:d38e with SMTP id tj2-20020a170907c24200b007c109e6d38emr83437016ejc.67.1673625180431; Fri, 13 Jan 2023 07:53:00 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673625180; cv=pass; d=google.com; s=arc-20160816; b=dU2jfgYyEu2/JVATOjZ7nFW99Hyrnf3Dc9iYXW3QrWGYDlpF3txTZ+Hz/mWsbrl9ME hdMQ7hC1CUWjUrKCcLVh2ps95KXOCuK1M3QKKXwcMJpoP1s3o4eC/VKe6ArWBJUsoSMA +NXTSKKIMyFT7YhR+4YjWTVP3lCRCYk5L6lD2hhpf9+PjYJircxalC+ABxp5iS1jpHJL J0H/Fqbv++ttstDG18vMFL4Kmi/CfYdeBkTsckaeOE2wg/WtqD7qx420I9r/MVyLvWQx FqrdTGXSoLh1ttbXusIE72qBcZZKDBFsPw0I3Zn//8IHdthyU8l+jN3CTG3Z8/sttHHX BVpg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=oRQTDxcaZV9G3e8WvLWHgvElYZj0LabsmmzMHSq3PAE=; b=dZezDHBqu/FpU9IqB4osvCRg8eC3I3p8plxKsIl42UAcFEpfZstjyqSzjkHCmf7OMp yZAjcjTefEesOnGTufGDgZFhhrrEsO1R0d6jH1LUTkXk15foGFlkmdG9mIAq1klhBsME sbWKPUNfcGrA0idSXr13yreAPzTyETU84FP+rfEOrtDJq98nk+nzRINfhfQqZNYRK/vZ nybuTe1GN6K7nMJcRLrua76oDzr9Q3C37Bf6fRJ/R+7LErdpnmPpAdowTb1189VtC9Sw h2uKmkZnzrazfslYTvwMl8sU6OvGfLG6GeWftnYn5xNnBel8kSXeNc3z4tUDUJZrCi2F 43Rw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=Pw7aBDdp; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Fri, 13 Jan 2023 09:21:13 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 11/13] x86/resctrl: Add interface to write mbm_total_bytes_config Date: Fri, 13 Jan 2023 09:20:37 -0600 Message-ID: <20230113152039.770054-12-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT101:EE_|CH2PR12MB4231:EE_ X-MS-Office365-Filtering-Correlation-Id: 3f6c40ce-fc21-4a7e-8c93-08daf57cd5c2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PKbidA9dOVqg2j8sWJ7Vd8ZXNkbL7RyUmy39Nll0XNTVDqwvBu06EVkBYWn6FAXSGwBo31oKiCpWjatridFak0107rOEnC0q8YNVu9CaoIZCCRnUQLukbiqcxZWbeBk4d3FlvO3LvCRSw2z29syDiTVcPSp2En+Ag0trnTnDoMl51/ZjbKs/03lU5btNy/l1D4/Md2IqrqC1zX4ksT9atxSoIrWcsOhQItkgVhu2MV+5XTG7wubAfDbrB9tQ1I7MsAk2BzjB0BfNEhVLHM94beKQHa8Nsl5VD49gkvGN9DRmAjw/edkDiEI6OSc4Pvtr31CmW53mA0Qi+z6GY5UIVCgY6ZboI14/UA7AAznDRIcV7wV9w2oKGUQMHtehYBtri3o/NWybp1P/zOEooYPPdVCKzBjZv6QqK4e2K62expy6kXBq7wWaT3cUr+5Maf7tRCDIRJBJdJWUqhdJp5IxR2dI0PLWPip7zEGJ5/XL0SGt2x1ldPp9m18qYQyC/uoaenY7xVYQYosT3b6kPQ+uvKBLJNHd4HY/7KGaUNza3DKbYqsHfCSzRj1Y+4w0bC4q77vQZgW50pT3EbdmXmDcxVRhPsYwXRzENyYiUxdXE5LDVjEkihFLhgyCWNK96kJ0iBx14bWhgTdMmImEjzi94CJB4jxa6+iJ1Eja9LYt7tT8jUDle9dT3UtNEhFm2SlrKWj/MVR4AVnFLyKa5CnYjgYK2d80vAKZAA4z90TZIwE= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(136003)(346002)(376002)(396003)(451199015)(40470700004)(36840700001)(46966006)(426003)(83380400001)(82740400003)(47076005)(36860700001)(81166007)(86362001)(356005)(2906002)(44832011)(40480700001)(41300700001)(7416002)(7406005)(5660300002)(8936002)(82310400005)(40460700003)(6666004)(478600001)(2616005)(336012)(1076003)(16526019)(186003)(26005)(316002)(8676002)(4326008)(70586007)(70206006)(7696005)(54906003)(110136005)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 15:42:53.6455 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3f6c40ce-fc21-4a7e-8c93-08daf57cd5c2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT101.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4231 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754923197157365494?= X-GMAIL-MSGID: =?utf-8?q?1754923197157365494?= The event configuration for mbm_total_bytes can be changed by the user by writing to the file /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config. The event configuration settings are domain specific and affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== For example: To change the mbm_total_bytes to count only reads on domain 0, the bits 0, 1, 4 and 5 needs to be set, which is 110011b (in hex 0x33). Run the command. $echo 0=0x33 > /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config To change the mbm_total_bytes to count all the slow memory reads on domain 1, the bits 4 and 5 needs to be set which is 110000b (in hex 0x30). Run the command. $echo 1=0x30 > /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/monitor.c | 17 ++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 124 ++++++++++++++++++++++++- include/linux/resctrl.h | 11 +++ 3 files changed, 151 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index 28c65008fce1..7fe51488e136 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -204,6 +204,23 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d, } } +/* + * Assumes that hardware counters are also reset and thus that there is + * no need to record initial non-zero counts. + */ +void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain *d) +{ + struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(d); + + if (is_mbm_total_enabled()) + memset(hw_dom->arch_mbm_total, 0, + sizeof(*hw_dom->arch_mbm_total) * r->num_rmid); + + if (is_mbm_local_enabled()) + memset(hw_dom->arch_mbm_local, 0, + sizeof(*hw_dom->arch_mbm_local) * r->num_rmid); +} + static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr, unsigned int width) { u64 shift = 64 - width, chunks; diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index ad3c7014adf6..03284a61c1a0 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1517,6 +1517,127 @@ static int mbm_local_bytes_config_show(struct kernfs_open_file *of, return 0; } +static void mon_event_config_write(void *info) +{ + struct mon_config_info *mon_info = info; + unsigned int index; + + index = mon_event_config_index_get(mon_info->evtid); + if (index == INVALID_CONFIG_INDEX) { + pr_warn_once("Invalid event id %d\n", mon_info->evtid); + return; + } + wrmsr(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config, 0); +} + +static int mbm_config_write_domain(struct rdt_resource *r, + struct rdt_domain *d, u32 evtid, u32 val) +{ + struct mon_config_info mon_info = {0}; + int ret = 0; + + /* mon_config cannot be more than the supported set of events */ + if (val > MAX_EVT_CONFIG_BITS) { + rdt_last_cmd_puts("Invalid event configuration\n"); + return -EINVAL; + } + + /* + * Read the current config value first. If both are the same then + * no need to write it again. + */ + mon_info.evtid = evtid; + mondata_config_read(d, &mon_info); + if (mon_info.mon_config == val) + goto out; + + mon_info.mon_config = val; + + /* + * Update MSR_IA32_EVT_CFG_BASE MSR on one of the CPUs in the + * domain. The MSRs offset from MSR MSR_IA32_EVT_CFG_BASE + * are scoped at the domain level. Writing any of these MSRs + * on one CPU is observed by all the CPUs in the domain. + */ + smp_call_function_any(&d->cpu_mask, mon_event_config_write, + &mon_info, 1); + + /* + * When an Event Configuration is changed, the bandwidth counters + * for all RMIDs and Events will be cleared by the hardware. The + * hardware also sets MSR_IA32_QM_CTR.Unavailable (bit 62) for + * every RMID on the next read to any event for every RMID. + * Subsequent reads will have MSR_IA32_QM_CTR.Unavailable (bit 62) + * cleared while it is tracked by the hardware. Clear the + * mbm_local and mbm_total counts for all the RMIDs. + */ + resctrl_arch_reset_rmid_all(r, d); + +out: + return ret; +} + +static int mon_config_write(struct rdt_resource *r, char *tok, u32 evtid) +{ + char *dom_str = NULL, *id_str; + unsigned long dom_id, val; + struct rdt_domain *d; + int ret = 0; + +next: + if (!tok || tok[0] == '\0') + return 0; + + /* Start processing the strings for each domain */ + dom_str = strim(strsep(&tok, ";")); + id_str = strsep(&dom_str, "="); + + if (!id_str || kstrtoul(id_str, 10, &dom_id)) { + rdt_last_cmd_puts("Missing '=' or non-numeric domain id\n"); + return -EINVAL; + } + + if (!dom_str || kstrtoul(dom_str, 16, &val)) { + rdt_last_cmd_puts("Non-numeric event configuration value\n"); + return -EINVAL; + } + + list_for_each_entry(d, &r->domains, list) { + if (d->id == dom_id) { + ret = mbm_config_write_domain(r, d, evtid, val); + if (ret) + return -EINVAL; + goto next; + } + } + + return -EINVAL; +} + +static ssize_t mbm_total_bytes_config_write(struct kernfs_open_file *of, + char *buf, size_t nbytes, + loff_t off) +{ + struct rdt_resource *r = of->kn->parent->priv; + int ret; + + /* Valid input requires a trailing newline */ + if (nbytes == 0 || buf[nbytes - 1] != '\n') + return -EINVAL; + + mutex_lock(&rdtgroup_mutex); + + rdt_last_cmd_clear(); + + buf[nbytes - 1] = '\0'; + + ret = mon_config_write(r, buf, QOS_L3_MBM_TOTAL_EVENT_ID); + + mutex_unlock(&rdtgroup_mutex); + + return ret ?: nbytes; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1617,9 +1738,10 @@ static struct rftype res_common_files[] = { }, { .name = "mbm_total_bytes_config", - .mode = 0444, + .mode = 0644, .kf_ops = &rdtgroup_kf_single_ops, .seq_show = mbm_total_bytes_config_show, + .write = mbm_total_bytes_config_write, }, { .name = "mbm_local_bytes_config", diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 0cee154abc9f..8334eeacfec5 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -250,6 +250,17 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d, void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d, u32 rmid, enum resctrl_event_id eventid); +/** + * resctrl_arch_reset_rmid_all() - Reset all private state associated with + * all rmids and eventids. + * @r: The resctrl resource. + * @d: The domain for which all architectural counter state will + * be cleared. + * + * This can be called from any CPU. + */ +void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain *d); + extern unsigned int resctrl_rmid_realloc_threshold; extern unsigned int resctrl_rmid_realloc_limit; From patchwork Fri Jan 13 15:20:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43403 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp343386wrt; Fri, 13 Jan 2023 07:53:17 -0800 (PST) X-Google-Smtp-Source: AMrXdXs5qv3DcnHJYNhZtRS1kHl88nz3ke709UT5TsY1Duh//jQ51edR6mVK+vX6JgXaKa4oLKd/ X-Received: by 2002:a17:907:a688:b0:84d:1c67:97d7 with SMTP id vv8-20020a170907a68800b0084d1c6797d7mr23404216ejc.30.1673625197603; Fri, 13 Jan 2023 07:53:17 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673625197; cv=pass; d=google.com; s=arc-20160816; b=E0Ko1wGSXo5Z8VW5UrN2qHe53qLpkGBi/DyAo5muUxdUTSDZsrT9IkCl6IGwhaWZSH T6yt1+zprlk6JkhMS6vRtMOhkz4JZyQ12Q56njEt0f6DpBma3k8fD3pbJ/W7d6YlsGyE 8yR2i3aCJUENuYXAHPADcd9Kd0jjCR1kzghVj5OdCP6MIrlVyHdsrEr99yS3uSV05Lns fFtvQb+mlcIx/+55dhIGVukJKiEH1C5GRPgtie3UVu1nA5+seq8pqRN8RGtdjDW0W5hx vK4oUT0CmIUDW/je7nZbDzzRRCnxCh3OHjcoXdaQd2cpdgBate7CyWLAWL2Hql+H1wWc Sg0Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wUx5/xazjhDZXHda27FNgtfe4fEKA3csrPyF9PE7PCw=; b=oAgkFU3Fa7qybClQ1tSSBfcO+79Dr1+OWyGf/FT5dnZKw9zm7VEdAgYwzKkXaGSMAo A5x5wg9OnGuPo/Kts2bPvTOYtbsezLZ4A1H+HvPZj1uIUQfDaz878dLNlirmHheeDhlc J5yZWo4phE3aj3clEQ/efO8n9e+G7qoQ7CgGz1skdFcMlep+/Ri7mehTtb/c7iqQVZRw SxKgZWv3o7Pw6nfCswKPizkm2XFIBLcBjIEL4ZoOEPsTNo+2N4hr/gYAKUCFEUj5Q072 C8blBXG1rwjaxLIT+VcqkL2HiOA+RM503tZzZTYWZGp+rFRcgmLwLvZhSSMiLC/YvB2L DCjw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=SOTq6YaJ; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Fri, 13 Jan 2023 09:21:15 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 12/13] x86/resctrl: Add interface to write mbm_local_bytes_config Date: Fri, 13 Jan 2023 09:20:38 -0600 Message-ID: <20230113152039.770054-13-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230113152039.770054-1-babu.moger@amd.com> References: <20230113152039.770054-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT027:EE_|SA1PR12MB7247:EE_ X-MS-Office365-Filtering-Correlation-Id: 4973e8f7-2553-4cf7-12ea-08daf57cd743 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qJVqhqoQnan+6EVKZRoJHAI5L41tTNqamCifTiM+XCWE+oxZhMwayBVN4q6qCNd99Lg+97lqcCEjP2CNUaImoOaxOj0E6NgfDjHD2ZahER4xnR0Uym/wg5uZq0TChuzup3r4tjGjYIw/IbrvttQ1I8HUruiryWe6ZSuiPDFxtKNZvxhoAYFJaqyASq2WHfBrmT4+u9z/CIzzp9tV/Kn9GoszUgr9LMYZRMnm4gMkSK0NePB49+iknpZ/nlKsfK6QnVD49svvOMyDbTkRnRAdwCdmhLK3TofO6xtOymWmwoqTSBUgyIOSm+papVAwG5dz1r0VeV+Em7Ffc/3Uozha7Q1iUmIRrflLrM635ZfkISY+XnZku2nFypcNs0aNZqpb1QJMMZ4/4MWY3zXmoDAlhebLb0w+A3ZaBWfNPgJvvqtSwqiJtoQKbN03SxBXxHKbGI1cNhTKGXNhLC56C1m/ZhbLagA0WOKmryd8KZCkAGva/dSxQnfFgUve+xd94qiAkI4by/atCBLTz/Askr3DWv0mH3ejuf6wk0IEERhXXyOYnTV2GuqYj5GLnLiwc6nyyzNMFjfgsGY86GiwYz/ZmirJ5Yj/ycRnnzOB761mh4VOkCtuXnMU1JluB36tEbv34sH30LgxogllmeL6Kcmi3aN771W+4foTm1ExnzvhhjL4UIdjCKBNlvTfaANELicncDLg7aEnPts0t3GVLk1uQXkwBK4Vn7qfajFAUzbytNM= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(39860400002)(136003)(396003)(346002)(451199015)(46966006)(40470700004)(36840700001)(426003)(4326008)(82740400003)(478600001)(356005)(47076005)(81166007)(70586007)(16526019)(41300700001)(1076003)(40460700003)(86362001)(54906003)(110136005)(2616005)(316002)(26005)(336012)(7696005)(82310400005)(186003)(70206006)(40480700001)(36756003)(8676002)(7416002)(6666004)(36860700001)(7406005)(5660300002)(2906002)(44832011)(8936002)(83380400001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 15:42:56.2124 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4973e8f7-2553-4cf7-12ea-08daf57cd743 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT027.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7247 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754923215381970149?= X-GMAIL-MSGID: =?utf-8?q?1754923215381970149?= The event configuration for mbm_local_bytes can be changed by the user by writing to the configuration file /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== For example: To change the mbm_local_bytes_config to count all the non-temporal writes on domain 0, the bits 2 and 3 needs to be set which is 1100b (in hex 0xc). Run the command. $echo 0=0xc > /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config To change the mbm_local_bytes to count only reads to local NUMA domain 1, the bit 0 needs to be set which 1b (in hex 0x1). Run the command. $echo 1=0x1 > /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 27 +++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index 03284a61c1a0..5990589f8a21 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1638,6 +1638,30 @@ static ssize_t mbm_total_bytes_config_write(struct kernfs_open_file *of, return ret ?: nbytes; } +static ssize_t mbm_local_bytes_config_write(struct kernfs_open_file *of, + char *buf, size_t nbytes, + loff_t off) +{ + struct rdt_resource *r = of->kn->parent->priv; + int ret; + + /* Valid input requires a trailing newline */ + if (nbytes == 0 || buf[nbytes - 1] != '\n') + return -EINVAL; + + mutex_lock(&rdtgroup_mutex); + + rdt_last_cmd_clear(); + + buf[nbytes - 1] = '\0'; + + ret = mon_config_write(r, buf, QOS_L3_MBM_LOCAL_EVENT_ID); + + mutex_unlock(&rdtgroup_mutex); + + return ret ?: nbytes; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1745,9 +1769,10 @@ static struct rftype res_common_files[] = { }, { .name = "mbm_local_bytes_config", - .mode = 0444, + .mode = 0644, .kf_ops = &rdtgroup_kf_single_ops, .seq_show = mbm_local_bytes_config_show, + .write = mbm_local_bytes_config_write, }, { .name = "cpus", From patchwork Fri Jan 13 15:20:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 43404 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp343550wrt; Fri, 13 Jan 2023 07:53:35 -0800 (PST) X-Google-Smtp-Source: AMrXdXuX8UTjT9C1JIep/gGprvWlCueTi0LqdwSg+tuIvo8reI0op4WifbsfSSBOxWN7PSrd9w0Z X-Received: by 2002:a05:6402:2b93:b0:47e:5b70:de79 with SMTP id fj19-20020a0564022b9300b0047e5b70de79mr73565667edb.17.1673625215460; Fri, 13 Jan 2023 07:53:35 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1673625215; cv=pass; d=google.com; s=arc-20160816; b=AiiU9TDy7LupQXrsGHtF515mT3dhIXXBpGj73MrWbKQYFt1fF6+UrO9e6ytukUy3on A8dVmGr8RTxF9BI4WClOKqDHl08z9LJ4RsCQ9IjC9vem2lSNiFAngmT7/CGonQnJIJg8 d8wjlsUdN3U/oC/hWOX3wQMzqNhdslfhFPde4GnqM40EBxY1aRKFbV2lcPqXaE5C68pw 4iQ+bV8jXpT23bDf/9lVUKs8I+/g72QXix+MNGB2lAzeOp1i06e7dUcsdx5CH51x8jNI EnS3izPm6aEC82hUpwBlb6oL7ydeHsBbVGHTcR+VOf8rTwEzSHgxfsrgab+OGVGbWluX pebg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=VrIq7l2IxWft6eeo6eLD5zZHhkdsQHF/JdoqUmitJnI=; b=Rxx/d+52cfPo+cNpeOmEbcd+Fmt6mHpqsfAmpAXqpQj57AaGTZbreRh/HmVW0+mJu1 KZzuhDbI85/TDpdyTGGdKJ2varLdAS1t6ei839SW51oMPRIAik/8OZtJ/UTST5qPA+M1 EUUKOI1u9tEm5mHf18CwN6dvySgAzmozRXhsCISJlV/uCuuijfIfO9MGxyJUoZs+6S9K 884Po7ybFcSNwiSmI9HS3YE34Jluv1mUgWJRXTRWsZLY0WITqnRla0ReMjznCbaOwLs0 FlpY6XiNOY5N2tKIf4W9ykmYe1fxSu9xe1ChboZCEfA62uhmCb7Vz9cmXZX+g7sRxe4Z dyxw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=28OBaT1X; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Slow Memory Bandwidth allocation (SMBA). With this feature, the QOS enforcement policies can be applied to the external slow memory connected to the host. QOS enforcement is accomplished by assigning a Class Of Service (COS) to a processor and specifying allocations or limits for that COS for each resource to be allocated. 2. Bandwidth Monitoring Event Configuration (BMEC). The bandwidth monitoring events mbm_total_bytes and mbm_local_bytes are set to count all the total and local reads/writes respectively. With the introduction of slow memory, the two counters are not enough to count all the different types of memory events. With the feature BMEC, the users have the option to configure mbm_total_bytes and mbm_local_bytes to count the specific type of events. Also add configuration instructions with examples. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- Documentation/x86/resctrl.rst | 147 +++++++++++++++++++++++++++++++++- 1 file changed, 145 insertions(+), 2 deletions(-) diff --git a/Documentation/x86/resctrl.rst b/Documentation/x86/resctrl.rst index 71a531061e4e..058257dc56c8 100644 --- a/Documentation/x86/resctrl.rst +++ b/Documentation/x86/resctrl.rst @@ -17,14 +17,21 @@ AMD refers to this feature as AMD Platform Quality of Service(AMD QoS). This feature is enabled by the CONFIG_X86_CPU_RESCTRL and the x86 /proc/cpuinfo flag bits: -============================================= ================================ +=============================================== ================================ RDT (Resource Director Technology) Allocation "rdt_a" CAT (Cache Allocation Technology) "cat_l3", "cat_l2" CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc" MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" MBA (Memory Bandwidth Allocation) "mba" -============================================= ================================ +SMBA (Slow Memory Bandwidth Allocation) "" +BMEC (Bandwidth Monitoring Event Configuration) "" +=============================================== ================================ + +Historically, new features were made visible by default in /proc/cpuinfo. This +resulted in the feature flags becoming hard to parse by humans. Adding a new +flag to /proc/cpuinfo should be avoided if user space can obtain information +about the feature from resctrl's info directory. To use the feature mount the file system:: @@ -161,6 +168,83 @@ with the following files: "mon_features": Lists the monitoring events if monitoring is enabled for the resource. + Example:: + + # cat /sys/fs/resctrl/info/L3_MON/mon_features + llc_occupancy + mbm_total_bytes + mbm_local_bytes + + If the system supports Bandwidth Monitoring Event + Configuration (BMEC), then the bandwidth events will + be configurable. The output will be:: + + # cat /sys/fs/resctrl/info/L3_MON/mon_features + llc_occupancy + mbm_total_bytes + mbm_total_bytes_config + mbm_local_bytes + mbm_local_bytes_config + +"mbm_total_bytes_config", "mbm_local_bytes_config": + Read/write files containing the configuration for the mbm_total_bytes + and mbm_local_bytes events, respectively, when the Bandwidth + Monitoring Event Configuration (BMEC) feature is supported. + The event configuration settings are domain specific and affect + all the CPUs in the domain. When either event configuration is + changed, the bandwidth counters for all RMIDs of both events + (mbm_total_bytes as well as mbm_local_bytes) are cleared for that + domain. The next read for every RMID will report "Unavailable" + and subsequent reads will report the valid value. + + Following are the types of events supported: + + ==== ======================================================== + Bits Description + ==== ======================================================== + 6 Dirty Victims from the QOS domain to all types of memory + 5 Reads to slow memory in the non-local NUMA domain + 4 Reads to slow memory in the local NUMA domain + 3 Non-temporal writes to non-local NUMA domain + 2 Non-temporal writes to local NUMA domain + 1 Reads to memory in the non-local NUMA domain + 0 Reads to memory in the local NUMA domain + ==== ======================================================== + + By default, the mbm_total_bytes configuration is set to 0x7f to count + all the event types and the mbm_local_bytes configuration is set to + 0x15 to count all the local memory events. + + Examples: + + * To view the current configuration:: + :: + + # cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config + 0=0x7f;1=0x7f;2=0x7f;3=0x7f + + # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config + 0=0x15;1=0x15;3=0x15;4=0x15 + + * To change the mbm_total_bytes to count only reads on domain 0, + the bits 0, 1, 4 and 5 needs to be set, which is 110011b in binary + (in hexadecimal 0x33): + :: + + # echo "0=0x33" > /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config + + # cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config + 0=0x33;1=0x7f;2=0x7f;3=0x7f + + * To change the mbm_local_bytes to count all the slow memory reads on + domain 0 and 1, the bits 4 and 5 needs to be set, which is 110000b + in binary (in hexadecimal 0x30): + :: + + # echo "0=0x30;1=0x30" > /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config + + # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config + 0=0x30;1=0x30;3=0x15;4=0x15 "max_threshold_occupancy": Read/write file provides the largest value (in @@ -464,6 +548,25 @@ Memory bandwidth domain is L3 cache. MB:=bw_MBps0;=bw_MBps1;... +Slow Memory Bandwidth Allocation (SMBA) +--------------------------------------- +AMD hardware supports Slow Memory Bandwidth Allocation (SMBA). +CXL.memory is the only supported "slow" memory device. With the +support of SMBA, the hardware enables bandwidth allocation on +the slow memory devices. If there are multiple such devices in +the system, the throttling logic groups all the slow sources +together and applies the limit on them as a whole. + +The presence of SMBA (with CXL.memory) is independent of slow memory +devices presence. If there are no such devices on the system, then +configuring SMBA will have no impact on the performance of the system. + +The bandwidth domain for slow memory is L3 cache. Its schemata file +is formatted as: +:: + + SMBA:=bandwidth0;=bandwidth1;... + Reading/writing the schemata file --------------------------------- Reading the schemata file will show the state of all resources @@ -479,6 +582,46 @@ which you wish to change. E.g. L3DATA:0=fffff;1=fffff;2=3c0;3=fffff L3CODE:0=fffff;1=fffff;2=fffff;3=fffff +Reading/writing the schemata file (on AMD systems) +-------------------------------------------------- +Reading the schemata file will show the current bandwidth limit on all +domains. The allocated resources are in multiples of one eighth GB/s. +When writing to the file, you need to specify what cache id you wish to +configure the bandwidth limit. + +For example, to allocate 2GB/s limit on the first cache id: + +:: + + # cat schemata + MB:0=2048;1=2048;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + + # echo "MB:1=16" > schemata + # cat schemata + MB:0=2048;1= 16;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + +Reading/writing the schemata file (on AMD systems) with SMBA feature +-------------------------------------------------------------------- +Reading and writing the schemata file is the same as without SMBA in +above section. + +For example, to allocate 8GB/s limit on the first cache id: + +:: + + # cat schemata + SMBA:0=2048;1=2048;2=2048;3=2048 + MB:0=2048;1=2048;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + + # echo "SMBA:1=64" > schemata + # cat schemata + SMBA:0=2048;1= 64;2=2048;3=2048 + MB:0=2048;1=2048;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + Cache Pseudo-Locking ==================== CAT enables a user to specify the amount of cache space that an