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Fri, 13 Jan 2023 15:03:37 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 30DF3aAr006875 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Jan 2023 15:03:36 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 13 Jan 2023 07:03:31 -0800 From: devi priya To: , , , , , , , , , CC: , , , , , , Subject: [PATCH 1/6] soc: qcom: smd-rpm: Add IPQ9574 compatible Date: Fri, 13 Jan 2023 20:33:05 +0530 Message-ID: <20230113150310.29709-2-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230113150310.29709-1-quic_devipriy@quicinc.com> References: <20230113150310.29709-1-quic_devipriy@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: RxEiWHHPoIQOXHQUD8_L0G7_38OQYxd7 X-Proofpoint-ORIG-GUID: RxEiWHHPoIQOXHQUD8_L0G7_38OQYxd7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-13_07,2023-01-13_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 clxscore=1015 impostorscore=0 mlxlogscore=966 spamscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301130099 X-Spam-Status: No, score=0.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754920952446972523?= X-GMAIL-MSGID: =?utf-8?q?1754920952446972523?= Adding compatible string to support RPM communication over SMD for IPQ9574 SoC Co-developed-by: Praveenkumar I Signed-off-by: Praveenkumar I Signed-off-by: devi priya --- drivers/soc/qcom/smd-rpm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c index 7e3b6a7ea34c..523627d5d398 100644 --- a/drivers/soc/qcom/smd-rpm.c +++ b/drivers/soc/qcom/smd-rpm.c @@ -233,6 +233,7 @@ static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev) static const struct of_device_id qcom_smd_rpm_of_match[] = { { .compatible = "qcom,rpm-apq8084" }, { .compatible = "qcom,rpm-ipq6018" }, + { .compatible = "qcom,rpm-ipq9574" }, { .compatible = "qcom,rpm-msm8226" }, { .compatible = "qcom,rpm-msm8909" }, { .compatible = "qcom,rpm-msm8916" }, From patchwork Fri Jan 13 15:03:06 2023 Content-Type: text/plain; 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Fri, 13 Jan 2023 15:03:48 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 30DF3lN0010310 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Jan 2023 15:03:47 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 13 Jan 2023 07:03:41 -0800 From: devi priya To: , , , , , , , , , CC: , , , , , , Subject: [PATCH 3/6] regulator: qcom_smd: Add MP5496 regulators Date: Fri, 13 Jan 2023 20:33:07 +0530 Message-ID: <20230113150310.29709-4-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230113150310.29709-1-quic_devipriy@quicinc.com> References: <20230113150310.29709-1-quic_devipriy@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 8VvaDIIKYzpHBK3yGet0taJ0UdKMGrV1 X-Proofpoint-ORIG-GUID: 8VvaDIIKYzpHBK3yGet0taJ0UdKMGrV1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-13_07,2023-01-13_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 impostorscore=0 priorityscore=1501 mlxscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301130099 X-Spam-Status: No, score=0.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754920956870215507?= X-GMAIL-MSGID: =?utf-8?q?1754920956870215507?= Adding support for PMIC MP5496 on IPQ9574 SoC Co-developed-by: Praveenkumar I Signed-off-by: Praveenkumar I Signed-off-by: devi priya --- drivers/regulator/qcom_smd-regulator.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c index 9f2b58458841..1eb17d378897 100644 --- a/drivers/regulator/qcom_smd-regulator.c +++ b/drivers/regulator/qcom_smd-regulator.c @@ -767,6 +767,15 @@ static const struct regulator_desc mp5496_ldoa2 = { .ops = &rpm_mp5496_ops, }; +static const struct regulator_desc ipq9574_mp5496_smpa1 = { + .linear_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(600000, 0, 37, 12500), + }, + .n_linear_ranges = 1, + .n_voltages = 38, + .ops = &rpm_mp5496_ops, +}; + static const struct regulator_desc pm2250_lvftsmps = { .linear_ranges = (struct linear_range[]) { REGULATOR_LINEAR_RANGE(320000, 0, 269, 4000), @@ -799,6 +808,11 @@ static const struct rpm_regulator_data rpm_mp5496_regulators[] = { {} }; +static const struct rpm_regulator_data rpm_ipq9574_mp5496_regulators[] = { + { "s1", QCOM_SMD_RPM_SMPA, 1, &ipq9574_mp5496_smpa1, "s1" }, + {} +}; + static const struct rpm_regulator_data rpm_pm2250_regulators[] = { { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" }, { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" }, @@ -1320,6 +1334,8 @@ static const struct rpm_regulator_data rpm_pms405_regulators[] = { }; static const struct of_device_id rpm_of_match[] = { + { .compatible = "qcom,rpm-ipq9574-mp5496-regulators", + .data = &rpm_ipq9574_mp5496_regulators }, { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators }, { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators }, { .compatible = "qcom,rpm-pm6125-regulators", .data = &rpm_pm6125_regulators }, From patchwork Fri Jan 13 15:03:08 2023 Content-Type: text/plain; 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Fri, 13 Jan 2023 15:03:53 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 30DF3psp027993 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Jan 2023 15:03:51 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 13 Jan 2023 07:03:46 -0800 From: devi priya To: , , , , , , , , , CC: , , , , , , Subject: [PATCH 4/6] regulator: qcom_smd: Add PMIC compatible for IPQ9574 Date: Fri, 13 Jan 2023 20:33:08 +0530 Message-ID: <20230113150310.29709-5-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230113150310.29709-1-quic_devipriy@quicinc.com> References: <20230113150310.29709-1-quic_devipriy@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: MTYOGwN7WXa5O-fqgnTqnbfY_1iTi5Ja X-Proofpoint-ORIG-GUID: MTYOGwN7WXa5O-fqgnTqnbfY_1iTi5Ja X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-13_07,2023-01-13_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 malwarescore=0 mlxscore=0 suspectscore=0 priorityscore=1501 phishscore=0 clxscore=1015 bulkscore=0 impostorscore=0 mlxlogscore=911 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301130099 X-Spam-Status: No, score=1.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_SBL_CSS,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Level: * X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754920974659329201?= X-GMAIL-MSGID: =?utf-8?q?1754920974659329201?= Add mp5496 PMIC compatible string for IPQ9574 SoC Co-developed-by: Praveenkumar I Signed-off-by: Praveenkumar I Signed-off-by: devi priya --- .../devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml index 8c45f53212b1..7907d9385583 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml @@ -22,7 +22,7 @@ description: Each sub-node is identified using the node's name, with valid values listed for each of the pmics below. - For mp5496, s2 + For mp5496, s1, s2 For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22 @@ -84,6 +84,7 @@ properties: compatible: enum: - qcom,rpm-mp5496-regulators + - qcom,rpm-ipq9574-mp5496-regulators - qcom,rpm-pm2250-regulators - qcom,rpm-pm6125-regulators - qcom,rpm-pm660-regulators From patchwork Fri Jan 13 15:03:09 2023 Content-Type: text/plain; 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Fri, 13 Jan 2023 15:03:57 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 30DF3uvH028034 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Jan 2023 15:03:56 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 13 Jan 2023 07:03:51 -0800 From: devi priya To: , , , , , , , , , CC: , , , , , , Subject: [PATCH 5/6] arm64: dts: qcom: ipq9574: Add cpufreq & RPM related nodes Date: Fri, 13 Jan 2023 20:33:09 +0530 Message-ID: <20230113150310.29709-6-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230113150310.29709-1-quic_devipriy@quicinc.com> References: <20230113150310.29709-1-quic_devipriy@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: qU16GqnnAhG3WO1UJBZKfaydsmVNSqhr X-Proofpoint-GUID: qU16GqnnAhG3WO1UJBZKfaydsmVNSqhr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-13_07,2023-01-13_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 phishscore=0 malwarescore=0 spamscore=0 bulkscore=0 mlxscore=0 priorityscore=1501 adultscore=0 suspectscore=0 impostorscore=0 mlxlogscore=899 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301130099 X-Spam-Status: No, score=0.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754920986182835931?= X-GMAIL-MSGID: =?utf-8?q?1754920986182835931?= Add CPU Freq and RPM related nodes in the device tree Co-developed-by: Praveenkumar I Signed-off-by: Praveenkumar I Signed-off-by: devi priya --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 80 +++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 5a2244b437ed..79fa5d91882c 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -75,6 +76,10 @@ reg = <0x0>; enable-method = "psci"; next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu_opp_table>; + cpu0-supply = <&ipq9574_s1>; }; CPU1: cpu@1 { @@ -83,6 +88,10 @@ reg = <0x1>; enable-method = "psci"; next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&ipq9574_s1>; }; CPU2: cpu@2 { @@ -91,6 +100,10 @@ reg = <0x2>; enable-method = "psci"; next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&ipq9574_s1>; }; CPU3: cpu@3 { @@ -99,6 +112,10 @@ reg = <0x3>; enable-method = "psci"; next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&ipq9574_s1>; }; L2_0: l2-cache { @@ -107,6 +124,42 @@ }; }; + cpu_opp_table: opp-table-cpu { + compatible = "operating-points-v2"; + opp-shared; + + opp-936000000 { + opp-hz = /bits/ 64 <936000000>; + opp-microvolt = <725000>; + clock-latency-ns = <200000>; + }; + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <787500>; + clock-latency-ns = <200000>; + }; + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <862500>; + clock-latency-ns = <200000>; + }; + opp-1488000000 { + opp-hz = /bits/ 64 <1488000000>; + opp-microvolt = <925000>; + clock-latency-ns = <200000>; + }; + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <987500>; + clock-latency-ns = <200000>; + }; + opp-2208000000 { + opp-hz = /bits/ 64 <2208000000>; + opp-microvolt = <1062500>; + clock-latency-ns = <200000>; + }; + }; + memory@40000000 { device_type = "memory"; /* We expect the bootloader to fill in the size */ @@ -128,6 +181,11 @@ #size-cells = <2>; ranges; + rpm_msg_ram: memory@60000 { + reg = <0x0 0x00060000 0x0 0x6000>; + no-map; + }; + tz_region: memory@4a600000 { reg = <0x0 0x4a600000 0x0 0x400000>; no-map; @@ -324,6 +382,28 @@ }; }; + rpm-glink { + compatible = "qcom,glink-rpm"; + interrupts = ; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + mboxes = <&apcs_glb 0>; + + rpm_requests: glink-channel { + compatible = "qcom,rpm-ipq9574"; + qcom,glink-channels = "rpm_requests"; + + regulators { + compatible = "qcom,rpm-ipq9574-mp5496-regulators"; + + ipq9574_s1: s1 { + regulator-min-microvolt = <587500>; + regulator-max-microvolt = <1075000>; + regulator-always-on; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = , From patchwork Fri Jan 13 15:03:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devi Priya X-Patchwork-Id: 43375 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp326630wrt; Fri, 13 Jan 2023 07:20:13 -0800 (PST) X-Google-Smtp-Source: AMrXdXv7S9qd9mURCRW/+NcKPhu/LqprQASwTkwKJpezZNAtKH0zsFrkfxo6SroeIwEz4XtlcIwx X-Received: by 2002:a17:906:3c1b:b0:84d:122d:4af3 with SMTP id h27-20020a1709063c1b00b0084d122d4af3mr3204685ejg.27.1673623213693; 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During regulator registration, the voltage variable is just declared and it is zero. Based on that, the regulator framework considers current the voltage as zero and tries to bring up each regulator to minimum the supported voltage. This introduces a dip in the voltage during kernel boot and gets stabilized once the voltage scaling comes into picture. To avoid the voltage dip, adding support to define the bootup voltage set by the boodloaders and based on it, regulator framework understands that proper voltage is already set Co-developed-by: Praveenkumar I Signed-off-by: Praveenkumar I Signed-off-by: devi priya --- drivers/regulator/qcom_smd-regulator.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c index 1eb17d378897..49a36b07397c 100644 --- a/drivers/regulator/qcom_smd-regulator.c +++ b/drivers/regulator/qcom_smd-regulator.c @@ -800,6 +800,7 @@ struct rpm_regulator_data { u32 id; const struct regulator_desc *desc; const char *supply; + int boot_uV; /* To store the bootup voltage set by bootloaders */ }; static const struct rpm_regulator_data rpm_mp5496_regulators[] = { @@ -809,7 +810,7 @@ static const struct rpm_regulator_data rpm_mp5496_regulators[] = { }; static const struct rpm_regulator_data rpm_ipq9574_mp5496_regulators[] = { - { "s1", QCOM_SMD_RPM_SMPA, 1, &ipq9574_mp5496_smpa1, "s1" }, + { "s1", QCOM_SMD_RPM_SMPA, 1, &ipq9574_mp5496_smpa1, "s1", 875000 }, {} }; @@ -1394,6 +1395,9 @@ static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev vreg->type = rpm_data->type; vreg->id = rpm_data->id; + if (rpm_data->boot_uV) + vreg->uV = rpm_data->boot_uV; + memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc)); vreg->desc.name = rpm_data->name; vreg->desc.supply_name = rpm_data->supply;