From patchwork Tue Jan 10 11:07:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 41408 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2683998wrt; Tue, 10 Jan 2023 03:11:25 -0800 (PST) X-Google-Smtp-Source: AMrXdXsWXiMPh1EeuhqDodN/M5tAeqVXWCfl99/M15KEiwIODHXLEHLKiuHJDN9K3rqb6oHL0yCH X-Received: by 2002:a05:6402:240d:b0:46d:731f:d726 with SMTP id t13-20020a056402240d00b0046d731fd726mr66910568eda.22.1673349085047; Tue, 10 Jan 2023 03:11:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673349085; cv=none; d=google.com; s=arc-20160816; b=zGC8+F00l/ZjgMoR/XbQwfD5cqoqmbDQw0JfJbwKlxchH0oPgfUWDjvDEEK18UHnyS yUjSWYNOxsqKgTEJxxPTXfmyNj37hDOyB8n0UTdse/o4RTwZm9VeOMn8V0rX/yLX65NX Wevdm6rgEPQCu9eTE91O2FeS698Gs2zDNK6DR8soVlHaku4QV3SH3jabwfgOnQ1gnawF 1Vpmbdxw2uq964Ah5EyxlltpfO4WdaVQktAHre8TDZr6ByzOzRu3g72DstSJ8NqKZcPi haP1PnU0mp1ovNKw0kb5/4bee/Y+9NJ7FfOjYo1Tiha4Pfuhq7d4gWwPhYyzlBY0m2MX ZAaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=VgyRpx0XJEaMyQXetV3+Mo66InbAbc4s6GcbuzlQQ3w=; b=swtKhH2KsjlUWkIqs4MDmdPT7sb+nN+0EmBAR1Zjbo6z70ACzCASz3Do1BcQ/v6mvf 54+ZrL6BB19NjTDlTGbh9ebNO0BmJms48PskhUbPIbzdRPIRTxkjIAWBFjTr1b67FUxB UUa0G5xu7BnkiOgMmeA9zt7pGd48sFPgaYhBzpuwo6fwm8R2vd0O63CEW51AXCmC8H6W 9YRRU0sHmv95+SXCiPfvWY6XkFNBAY3ijAKjKCx0Mu12ZXlnPzS5YU2oTZc3FNQ4JHYn LeM5YXQPCxVPbYKWN/GacQbw2ZSxcyKd68j5vpppw7AQbiWExKwhdg1jRbz4hcAdstwo pe6A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e5-20020a170906844500b007c10bb9225bsi1852656ejy.975.2023.01.10.03.11.01; Tue, 10 Jan 2023 03:11:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232906AbjAJLKi (ORCPT + 99 others); Tue, 10 Jan 2023 06:10:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238358AbjAJLIw (ORCPT ); Tue, 10 Jan 2023 06:08:52 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1412245652 for ; Tue, 10 Jan 2023 03:08:10 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C3FB0AD7; Tue, 10 Jan 2023 03:08:51 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 342573F587; Tue, 10 Jan 2023 03:08:08 -0800 (PST) From: James Clark To: coresight@lists.linaro.org, quic_jinlmao@quicinc.com, suzuki.poulose@arm.com, mike.leach@linaro.org Cc: James Clark , Mathieu Poirier , Leo Yan , Alexander Shishkin , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/3] coresight: cti: Prevent negative values of enable count Date: Tue, 10 Jan 2023 11:07:34 +0000 Message-Id: <20230110110736.2709917-2-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230110110736.2709917-1-james.clark@arm.com> References: <20230110110736.2709917-1-james.clark@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754633690305487904?= X-GMAIL-MSGID: =?utf-8?q?1754633690305487904?= Writing 0 to the enable control repeatedly results in a negative value for enable_req_count. After this, writing 1 to the enable control appears to not work until the count returns to positive. Change it so that it's impossible for enable_req_count to be < 0. Return an error to indicate that the disable request was invalid. Fixes: 835d722ba10a ("coresight: cti: Initial CoreSight CTI Driver") Tested-by: Jinlong Mao Signed-off-by: James Clark reviewed-by: Mike Leach --- drivers/hwtracing/coresight/coresight-cti-core.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwtracing/coresight/coresight-cti-core.c index d2cf4f4848e1..838872f2484d 100644 --- a/drivers/hwtracing/coresight/coresight-cti-core.c +++ b/drivers/hwtracing/coresight/coresight-cti-core.c @@ -151,9 +151,16 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) { struct cti_config *config = &drvdata->config; struct coresight_device *csdev = drvdata->csdev; + int ret = 0; spin_lock(&drvdata->spinlock); + /* don't allow negative refcounts, return an error */ + if (!atomic_read(&drvdata->config.enable_req_count)) { + ret = -EINVAL; + goto cti_not_disabled; + } + /* check refcount - disable on 0 */ if (atomic_dec_return(&drvdata->config.enable_req_count) > 0) goto cti_not_disabled; @@ -171,12 +178,12 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) coresight_disclaim_device_unlocked(csdev); CS_LOCK(drvdata->base); spin_unlock(&drvdata->spinlock); - return 0; + return ret; /* not disabled this call */ cti_not_disabled: spin_unlock(&drvdata->spinlock); - return 0; + return ret; } void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 value) From patchwork Tue Jan 10 11:07:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 41409 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2684051wrt; Tue, 10 Jan 2023 03:11:33 -0800 (PST) X-Google-Smtp-Source: AMrXdXsjg6gsYXETydZ/RM/s90aVNCcfSYi3qkn2CuRlHtrUZX5pJ6vZzSo9fWR2hzVng/Y+ZzFC X-Received: by 2002:a17:906:124c:b0:7c0:d60b:2883 with SMTP id u12-20020a170906124c00b007c0d60b2883mr44877831eja.50.1673349092847; Tue, 10 Jan 2023 03:11:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673349092; cv=none; d=google.com; s=arc-20160816; b=US8ka0XPGjicd6VlNCYwIupRgtwHjCc2+a4Bw5pPegibST4PT6daXLFX+vgXbbU/Il CMnCEP26e/QT+pd+zNcrZm9PR/0nVsclqDpZQPIHFBXNgqpkydVHyTXFR28M9GKh6J/H HPpsyi1QttaDPZm5h0O6ZRtzwGTp70TKFNJerx/L3Vk/xmcP9gZtxscBOKVVkYIUUj8T UC+zMDuv6Jq6MzDBMs2OZmEb4JbPrvCN56FWetus2IJqwVFMoE+91van/D0rYev9xPpb Ju6g2U1qTiT6cmDC0uxFh2Z9KGBaAA3DK23IZCF+d9qdz+7NFWOeL7yfxbn9Db7dDy7A Zp3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=iLjB9aB7QWjVvIbkI/qqz0AWK9xcBdJfvanIpEyIU2I=; b=aOncShBku51o92hIYmwE6t5Ij2I6s+83Z15HRxJxthL7/OoSCAtnt5b9vHQKpbrOP1 OcBcse8zsnfpNKb9OpeZGmqprZB9VY/5+6pFjD9CI1P5Ye4hyxQlUpRoXvuWMUAxYu2B H54VKoHuATu61QSBKVQzW9/WvzbwjsOH/AfG3hE1q27a0cw1r1XBoiFJiyX9pE14qntQ 5kCFEpFVSoDQR3gjdRD8/tpCx5BIJ0VH4xrQBdTHGANUBKW+CcBAy/DpsiT38xvvC/Hq yu+GfRKLale47yyeFx8PBmUYNq/GkvcKp8qieCL/jMH28RZRYJcjO3DnBZoXs1G120ai T1Pw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z10-20020aa7cf8a000000b00485731f9eb0si483876edx.345.2023.01.10.03.11.08; Tue, 10 Jan 2023 03:11:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235755AbjAJLKp (ORCPT + 99 others); Tue, 10 Jan 2023 06:10:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238364AbjAJLIx (ORCPT ); Tue, 10 Jan 2023 06:08:53 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 446A832E8C for ; Tue, 10 Jan 2023 03:08:12 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 143E04B3; Tue, 10 Jan 2023 03:08:54 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 789A53F587; Tue, 10 Jan 2023 03:08:10 -0800 (PST) From: James Clark To: coresight@lists.linaro.org, quic_jinlmao@quicinc.com, suzuki.poulose@arm.com, mike.leach@linaro.org Cc: James Clark , Mathieu Poirier , Leo Yan , Alexander Shishkin , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/3] coresight: cti: Add PM runtime call in enable_store Date: Tue, 10 Jan 2023 11:07:35 +0000 Message-Id: <20230110110736.2709917-3-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230110110736.2709917-1-james.clark@arm.com> References: <20230110110736.2709917-1-james.clark@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754633657663696112?= X-GMAIL-MSGID: =?utf-8?q?1754633698147619845?= From: Mao Jinlong In commit 6746eae4bbad ("coresight: cti: Fix hang in cti_disable_hw()") PM runtime calls are removed from cti_enable_hw/cti_disable_hw. When enabling CTI by writing enable sysfs node, clock for accessing CTI register won't be enabled. Device will crash due to register access issue. Add PM runtime call in enable_store to fix this issue. Fixes: 6746eae4bbad ("coresight: cti: Fix hang in cti_disable_hw()") Signed-off-by: Mao Jinlong [Change to only call pm_runtime_put if a disable happened] Tested-by: Jinlong Mao Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-cti-sysfs.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c index 6d59c815ecf5..71e7a8266bb3 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -108,10 +108,19 @@ static ssize_t enable_store(struct device *dev, if (ret) return ret; - if (val) + if (val) { + ret = pm_runtime_resume_and_get(dev->parent); + if (ret) + return ret; ret = cti_enable(drvdata->csdev); - else + if (ret) + pm_runtime_put(dev->parent); + } else { ret = cti_disable(drvdata->csdev); + if (!ret) + pm_runtime_put(dev->parent); + } + if (ret) return ret; return size; From patchwork Tue Jan 10 11:07:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 41410 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2684179wrt; Tue, 10 Jan 2023 03:11:54 -0800 (PST) X-Google-Smtp-Source: AMrXdXuHMPuOer0zvuUJHPktBCdJMkQFAnpZ5Ii3xvcLuw2wxW9RSIFRU97/NgtjifuhYjR0BGJF X-Received: by 2002:a05:6402:3203:b0:499:8849:5fb7 with SMTP id g3-20020a056402320300b0049988495fb7mr7696102eda.29.1673349114383; Tue, 10 Jan 2023 03:11:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673349114; cv=none; d=google.com; s=arc-20160816; b=Gg9Z0kfVjARN/Z9tiFyIkgK647HwsfTmPJMJtKAgJ+EgOV2jQm1bqEkMJ6rrg4CaHl MIJQoRtvB2tkKruJU4AcTURM0F9M4h9RWRmF1cNNgz2tYR4Z4t4i5yTo16bgcUhpfIlF vQEFQ/wn2P/Dq5U3+T/tvEIOWmTiUXfVcLhRYr1sd2lahypNSA0uUhSsvmGg+CLc2VfF SoUlkZsiHR2+7knkqSGdJtvWpYW/2qAldv3ROdgey/omxPO6gNnIO7YZqQ4NhMQ5JmWY 6EEMIYTXcPLVQsZTbdv5vvNvdiI7OW56kes3ks0x6jwSFGOT5uB5hBU0tVRLlCnYcWZo VKjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=un/+3nd+MF+10pVy1TiuQXO/nIH4zE4iSKe+sAsEbD4=; b=Ieg9OBPA8UHadIVHXzH8yZZxegCPG8uMlETrHOJ/a46ObnzuD7rBWBCs0rFzh4sl1P mKUxMrv1jsbHz9EvKxUFJ9rMwp4NZtBVwU1S9vZb68UlfY/A3x3bszUuWvQPjhH7ayUH vnI8LSbqUf0t1jZr0QgC8GIw3w2tSCh/Ju2iu8VtrQxFEJSpv/5MLB673dhBsOy5q7ov bL6lOQXuruVMH5V3bnOQbuCWNKVjPWnjmpNHG0S87ES4oMXDDvIeNEg77Lkv0NzcDgbH kjfHEdUXS+cZP8farUlp98vnK6Mnz+EY0RhfIEJKyBEjD4blpXD+IbI/PPOwsyK6jZs5 MDpQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d26-20020a056402401a00b004812e6f2d97si1068866eda.537.2023.01.10.03.11.31; Tue, 10 Jan 2023 03:11:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238296AbjAJLKw (ORCPT + 99 others); Tue, 10 Jan 2023 06:10:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233058AbjAJLIy (ORCPT ); Tue, 10 Jan 2023 06:08:54 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 996CC3752E for ; Tue, 10 Jan 2023 03:08:14 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 60D9FAD7; Tue, 10 Jan 2023 03:08:56 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C528C3F587; Tue, 10 Jan 2023 03:08:12 -0800 (PST) From: James Clark To: coresight@lists.linaro.org, quic_jinlmao@quicinc.com, suzuki.poulose@arm.com, mike.leach@linaro.org Cc: James Clark , Mathieu Poirier , Leo Yan , Alexander Shishkin , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/3] coresight: cti: Remove atomic type from enable_req_count Date: Tue, 10 Jan 2023 11:07:36 +0000 Message-Id: <20230110110736.2709917-4-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230110110736.2709917-1-james.clark@arm.com> References: <20230110110736.2709917-1-james.clark@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754633721024712167?= X-GMAIL-MSGID: =?utf-8?q?1754633721024712167?= enable_req_count is only ever accessed inside the spinlock, so to avoid confusion that there are concurrent accesses and simplify the code, change it to an int. One access outside of the spinlock is in enable_show() which appears to allow partially written data to be displayed between enable_req_count, powered and enabled so move this one inside the spin lock too. Signed-off-by: James Clark Reviewed-by: Mike Leach --- drivers/hwtracing/coresight/coresight-cti-core.c | 14 +++++++------- drivers/hwtracing/coresight/coresight-cti-sysfs.c | 2 +- drivers/hwtracing/coresight/coresight-cti.h | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwtracing/coresight/coresight-cti-core.c index 838872f2484d..277c890a1f1f 100644 --- a/drivers/hwtracing/coresight/coresight-cti-core.c +++ b/drivers/hwtracing/coresight/coresight-cti-core.c @@ -107,12 +107,12 @@ static int cti_enable_hw(struct cti_drvdata *drvdata) cti_write_all_hw_regs(drvdata); config->hw_enabled = true; - atomic_inc(&drvdata->config.enable_req_count); + drvdata->config.enable_req_count++; spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; cti_state_unchanged: - atomic_inc(&drvdata->config.enable_req_count); + drvdata->config.enable_req_count++; /* cannot enable due to error */ cti_err_not_enabled: @@ -129,7 +129,7 @@ static void cti_cpuhp_enable_hw(struct cti_drvdata *drvdata) config->hw_powered = true; /* no need to do anything if no enable request */ - if (!atomic_read(&drvdata->config.enable_req_count)) + if (!drvdata->config.enable_req_count) goto cti_hp_not_enabled; /* try to claim the device */ @@ -156,13 +156,13 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) spin_lock(&drvdata->spinlock); /* don't allow negative refcounts, return an error */ - if (!atomic_read(&drvdata->config.enable_req_count)) { + if (!drvdata->config.enable_req_count) { ret = -EINVAL; goto cti_not_disabled; } /* check refcount - disable on 0 */ - if (atomic_dec_return(&drvdata->config.enable_req_count) > 0) + if (--drvdata->config.enable_req_count > 0) goto cti_not_disabled; /* no need to do anything if disabled or cpu unpowered */ @@ -239,7 +239,7 @@ static void cti_set_default_config(struct device *dev, /* Most regs default to 0 as zalloc'ed except...*/ config->trig_filter_enable = true; config->ctigate = GENMASK(config->nr_ctm_channels - 1, 0); - atomic_set(&config->enable_req_count, 0); + config->enable_req_count = 0; } /* @@ -696,7 +696,7 @@ static int cti_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd, drvdata->config.hw_enabled = false; /* check enable reference count to enable HW */ - if (atomic_read(&drvdata->config.enable_req_count)) { + if (drvdata->config.enable_req_count) { /* check we can claim the device as we re-power */ if (coresight_claim_device(csdev)) goto cti_notify_exit; diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c index 71e7a8266bb3..e528cff9d4e2 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -84,8 +84,8 @@ static ssize_t enable_show(struct device *dev, bool enabled, powered; struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); - enable_req = atomic_read(&drvdata->config.enable_req_count); spin_lock(&drvdata->spinlock); + enable_req = drvdata->config.enable_req_count; powered = drvdata->config.hw_powered; enabled = drvdata->config.hw_enabled; spin_unlock(&drvdata->spinlock); diff --git a/drivers/hwtracing/coresight/coresight-cti.h b/drivers/hwtracing/coresight/coresight-cti.h index acf7b545e6b9..8b106b13a244 100644 --- a/drivers/hwtracing/coresight/coresight-cti.h +++ b/drivers/hwtracing/coresight/coresight-cti.h @@ -141,7 +141,7 @@ struct cti_config { int nr_trig_max; /* cti enable control */ - atomic_t enable_req_count; + int enable_req_count; bool hw_enabled; bool hw_powered;