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[8.43.85.97]) by mx.google.com with ESMTPS id c12-20020a50f60c000000b004593c35a8bcsi13349072edn.214.2022.10.11.20.00.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Oct 2022 20:00:38 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=FUXX5ir2; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4C0BE3856DC3 for ; Wed, 12 Oct 2022 03:00:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4C0BE3856DC3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1665543637; bh=1U3C6nuzOCd2dz3gnUHj5m6Kp/ycXc8fBgkuYxm5YT8=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=FUXX5ir2hsQwxBzTGz+V86tL3y4rfsYIC997sBIeBqz+mQaMTneDZKPJM0wIX0K4f 4qd3cpLzcm2s4eRGhkJDoNwhx+ca7ohdX3t+9V4zmm1EEx7MiVXIRg5BO9x6KMIrL5 Wfoxb+nkJulSsCeeUtszWmFI9ZmjDRktKTMhtJWU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by sourceware.org (Postfix) with ESMTPS id B84423856DC3 for ; Wed, 12 Oct 2022 02:59:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B84423856DC3 X-IronPort-AV: E=McAfee;i="6500,9779,10497"; a="302293647" X-IronPort-AV: E=Sophos;i="5.95,177,1661842800"; d="scan'208";a="302293647" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2022 19:59:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10497"; a="695304958" X-IronPort-AV: E=Sophos;i="5.95,177,1661842800"; d="scan'208";a="695304958" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga004.fm.intel.com with ESMTP; 11 Oct 2022 19:59:47 -0700 Received: from shgcc10.sh.intel.com (shgcc10.sh.intel.com [10.239.154.125]) by scymds01.sc.intel.com with ESMTP id 29C2xk4t003526; Tue, 11 Oct 2022 19:59:46 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS Date: Wed, 12 Oct 2022 10:59:45 +0800 Message-Id: <20221012025945.578-1-lili.cui@intel.com> X-Mailer: git-send-email 2.17.1 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Cui,Lili via Gcc-patches" From: "Li, Pan2 via Gcc-patches" Reply-To: "Cui,Lili" Cc: hongjiu.lu@intel.com, hongtao.liu@intel.com Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746449085843842699?= X-GMAIL-MSGID: =?utf-8?q?1746449085843842699?= Hi Hontao, This patch is to remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS. The new intel ISE removes AVX512_VP2INTERSECT from SAPPHIRERAPIDS, AVX512_VP2INTERSECT is only supportted in Tigerlake. Hi Uros, This patch is to remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS. The new intel ISE removes AVX512_VP2INTERSECT from SAPPHIRERAPIDS, AVX512_VP2INTERSECT is only supportted in Tigerlake. Bootstrap is ok, and no regressions for i386/x86-64 testsuite. OK for master? gcc/ChangeLog: * config/i386/driver-i386.cc (host_detect_local_cpu): Move sapphirerapids out of AVX512_VP2INTERSECT. * config/i386/i386.h: Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS * doc/invoke.texi: Remove AVX512_VP2INTERSECT from SAPPHIRERAPIDS --- gcc/config/i386/driver-i386.cc | 13 +++++-------- gcc/config/i386/i386.h | 7 +++---- gcc/doc/invoke.texi | 8 ++++---- 3 files changed, 12 insertions(+), 16 deletions(-) diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc index 3c702fdca33..ef567045c67 100644 --- a/gcc/config/i386/driver-i386.cc +++ b/gcc/config/i386/driver-i386.cc @@ -589,15 +589,12 @@ const char *host_detect_local_cpu (int argc, const char **argv) /* This is unknown family 0x6 CPU. */ if (has_feature (FEATURE_AVX)) { + /* Assume Tiger Lake */ if (has_feature (FEATURE_AVX512VP2INTERSECT)) - { - if (has_feature (FEATURE_TSXLDTRK)) - /* Assume Sapphire Rapids. */ - cpu = "sapphirerapids"; - else - /* Assume Tiger Lake */ - cpu = "tigerlake"; - } + cpu = "tigerlake"; + /* Assume Sapphire Rapids. */ + else if (has_feature (FEATURE_TSXLDTRK)) + cpu = "sapphirerapids"; /* Assume Cooper Lake */ else if (has_feature (FEATURE_AVX512BF16)) cpu = "cooperlake"; diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 900a3bc3673..372a2cff8fe 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2326,10 +2326,9 @@ constexpr wide_int_bitmask PTA_ICELAKE_SERVER = PTA_ICELAKE_CLIENT constexpr wide_int_bitmask PTA_TIGERLAKE = PTA_ICELAKE_CLIENT | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_CLWB | PTA_AVX512VP2INTERSECT | PTA_KL | PTA_WIDEKL; constexpr wide_int_bitmask PTA_SAPPHIRERAPIDS = PTA_ICELAKE_SERVER | PTA_MOVDIRI - | PTA_MOVDIR64B | PTA_AVX512VP2INTERSECT | PTA_ENQCMD | PTA_CLDEMOTE - | PTA_PTWRITE | PTA_WAITPKG | PTA_SERIALIZE | PTA_TSXLDTRK | PTA_AMX_TILE - | PTA_AMX_INT8 | PTA_AMX_BF16 | PTA_UINTR | PTA_AVXVNNI | PTA_AVX512FP16 - | PTA_AVX512BF16; + | PTA_MOVDIR64B | PTA_ENQCMD | PTA_CLDEMOTE | PTA_PTWRITE | PTA_WAITPKG + | PTA_SERIALIZE | PTA_TSXLDTRK | PTA_AMX_TILE | PTA_AMX_INT8 | PTA_AMX_BF16 + | PTA_UINTR | PTA_AVXVNNI | PTA_AVX512FP16 | PTA_AVX512BF16; constexpr wide_int_bitmask PTA_KNL = PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD | PTA_PREFETCHWT1; constexpr wide_int_bitmask PTA_BONNELL = PTA_CORE2 | PTA_MOVBE; diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 271c8bb8468..a9ecc4426a4 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -32057,11 +32057,11 @@ Intel sapphirerapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, -AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2 +AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2, VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB, -MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, -SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16 -and AVX512BF16 instruction set support. +MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK, +UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16 and AVX512BF16 +instruction set support. @item alderlake Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,