From patchwork Mon Jan 9 14:38:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40903 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2196226wrt; Mon, 9 Jan 2023 06:47:36 -0800 (PST) X-Google-Smtp-Source: AMrXdXseesRwsZYe/NmDZtIeqLE2rzIXoK2FIliUynfNEJjdXqdLleOM6UpNsSESUQhDuEFdD65R X-Received: by 2002:a17:906:3095:b0:809:c1f4:ea09 with SMTP id 21-20020a170906309500b00809c1f4ea09mr51315183ejv.69.1673275655831; Mon, 09 Jan 2023 06:47:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275655; cv=none; d=google.com; s=arc-20160816; b=IJkNaCfIE9vAtw0g/2zSAcSjvITDiO49nu/xE2gLNUUIEGShJ8yYtngwcaBLtY/Dr+ URt+hrHhHD9rSfQHFL+Xi/4k6xgyBzg7sg2/gmeGuZTHSp/KPXjAbyI1sAIG/712mj2S GYqV3y7gHuE6UFnTUbSuTnmzQ4xRXLfD/SP+wnQbIhqeq5n+mu03LqL83ckTc4q5dMbc oaqUtx8bvLx90SUf1+A6j7FMtDeydiRP31TCBXSjaG8fLM8TPPde1BLmmNZVX4vCGWxK LN9PDO81tQacGpILxla1IbsZqtkeN0qpQxFn3rr+AGeatCeSgf8NPXohEMpTzSi+x6FC 0IaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9648VuOhk39mU4vg9P8mrkFGTnpgxLJ7uh8m6YPwrNA=; b=OVA+cVTEMjVKgL0giAZAIKNC8AFZe8PYXAJF1mrbKR3reDI1QgnqbdYJ7MMGDFaqxD cfViMsXl46WcgwcOWCuIJFlTUcOsnXCdPd5RQYCQJWSyGJRU8RPW7tfDwVy9mEy0+u6L Wq+zfAh1ZBU4IDonSmd0tIbErOQ2XncRc6Tl7B/c+BqZLccWx7wE6mApLN2qEVn1YQor IHuXndOvMkVUjzdBMjDmoJv6JI7461SXTJwalDpLWpwpemHpfpsSvR5NcuyPlOSwOw4f 9aaBy2zbEZYyMWoGAMu/5p1ont/vBHRYiEw/LqUuNPB1iM44GeJKFk18EeunlNlzkQ4f aNug== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=NMPPemoP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id xi3-20020a170906dac300b0084c41b233a4si9443656ejb.327.2023.01.09.06.47.11; Mon, 09 Jan 2023 06:47:35 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=NMPPemoP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231876AbjAIOoU (ORCPT + 99 others); Mon, 9 Jan 2023 09:44:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233446AbjAIOoE (ORCPT ); Mon, 9 Jan 2023 09:44:04 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3493C1DF02 for ; Mon, 9 Jan 2023 06:44:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=9648VuOhk39mU4vg9P8mrkFGTnpgxLJ7uh8m6YPwrNA=; b=NMPPemoP+IGrVEVN7n9QvaBAEc xnsdpArCjxljyG+xkK+NSzx9kcYcpp3MM+SCH1sHSIbB5AgNnYpzlcp91xRyIRwPemLFkOPT2j1Ij esfPb4u2z3zDGc4+6PQRvGeQHd4z0HwXF3ihgULOT6P/Ycs8AnNWWEFdR0vIZi+QG6w+ajnffhBdD x/gbiBJ+/HYn/QiFKmRWbk3toGrzTI1WMs+rJZvZvKyVgM2qP+HYIJWlugxU1TyEadmjGrL0rIg35 RjzFh06bbyRZBk5lBk4cayR6G6m1BO/nbjWUxExXKNvOQoxgxi+kvUGXmijc+b5GM+oyAxVwwvZxA W9d3LIMw==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNL-003TyM-DW; Mon, 09 Jan 2023 15:43:47 +0100 From: Melissa Wen To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 01/18] drm: Add 3D LUT mode and its attributes Date: Mon, 9 Jan 2023 13:38:29 -0100 Message-Id: <20230109143846.1966301-2-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556694436046595?= X-GMAIL-MSGID: =?utf-8?q?1754556694436046595?= From: Alex Hung A struct is defined for 3D LUT modes to be supported by hardware. The elements includes lut_size, lut_stride, bit_depth, color_format and flags. Note: A patchset "IGT tests for pre-blending 3D LUT interfaces" for this proposal is sent to IGT mailing list. Signed-off-by: Alex Hung --- include/uapi/drm/drm_mode.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index fa953309d9ce..fddb86dad4db 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -849,6 +849,23 @@ struct drm_color_lut { __u16 reserved; }; +/* + * struct drm_mode_lut3d_mode - 3D LUT mode information. + * @lut_size: number of valid points on every dimension of 3D LUT. + * @lut_stride: number of points on every dimension of 3D LUT. + * @bit_depth: number of bits of RGB. If color_mode defines entries with higher + * bit_depth the least significant bits will be truncated. + * @color_format: fourcc values, ex. DRM_FORMAT_XRGB16161616 or DRM_FORMAT_XBGR16161616. + * @flags: flags for hardware-sepcific features + */ +struct drm_mode_lut3d_mode { + __u16 lut_size; + __u16 lut_stride[3]; + __u16 bit_depth; + __u32 color_format; + __u32 flags; +}; + /** * struct hdr_metadata_infoframe - HDR Metadata Infoframe Data. * From patchwork Mon Jan 9 14:38:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40891 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2195149wrt; Mon, 9 Jan 2023 06:45:32 -0800 (PST) X-Google-Smtp-Source: AMrXdXtoA+AN1PwaXCSSX2k0PmScPG0UFVAHCCeQnYDBkLbsBUEUJJCK2e4NEeojzO/8oB6ce9Ie X-Received: by 2002:a17:906:5f98:b0:84d:1b67:cecb with SMTP id a24-20020a1709065f9800b0084d1b67cecbmr10433264eju.43.1673275532580; Mon, 09 Jan 2023 06:45:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275532; cv=none; d=google.com; s=arc-20160816; b=Yrq6Q6+ZSqNdWjGeB1KflQAZ7SDcmkmNgTfijM6zBiaphF4PXQQntShG8HHQYmgQkD kr5fRkl3l6ZxW4yBtQ9evnoJHj1alx7qfUJcwADNW6xCfslYAqulwyvHA0M6EPtacpwX OdT5wxwKTSfSo/wCsfBpcBa/MbWRnciIhvqPJRbgocVMQ/BD02mtIBY/WG2QzOjHuydg YIb4uZsU50q0XkmmTW9zc9ouf/YeXGFiskAbdmKKKIxL3eH6JcwGSBl2HQIUguSTQSWM bbKwtCELH/dkiYcEPENFv1LaBPiNQIJw98Mh3pxqDYC58haREATVVy0jiFH8xTlQPrIN CJIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7CfsYtEI18MX2i5Kgmt0jdgzbdIqqCHC3Q3agzts8+c=; b=S0GwLFkzpDNUDUCABukXpCqvxuhwpGaBL17eDxFZHZlx4ccm6oOMxcznVLvePcexmj uK3dTfCZ/odWSNLuRuW5mAOnZF9Mm6+n2gzHUbur3+b8Np8FFtWEMRlBja6ZUYwocbPc iGBRP5y5VUu9BIP+poctd8bxZH0dXVYb2KaIQMkwQ0Rq4zUAqClQcMLmdho8o/4+k9/t 6oWbWV7V+kryR3SaQb4VbX0nDYzBB9YHZGg7psoU8G9KpGfpmXYTMkUiN9sgPjPvTS6w WqTjbW8olhGpClCLI09Ktj9ujLiRpyAaY1u03J49wrnpqUcYsmf9aFZqswk57qWYQ4/E r7mg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=UL3SEY9M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y13-20020a50eb0d000000b0047338d1bfcfsi9190374edp.166.2023.01.09.06.45.09; Mon, 09 Jan 2023 06:45:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=UL3SEY9M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232079AbjAIOoZ (ORCPT + 99 others); Mon, 9 Jan 2023 09:44:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233713AbjAIOoJ (ORCPT ); Mon, 9 Jan 2023 09:44:09 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBE6B1DF32 for ; Mon, 9 Jan 2023 06:44:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=7CfsYtEI18MX2i5Kgmt0jdgzbdIqqCHC3Q3agzts8+c=; b=UL3SEY9MNm/HRAKaMOiG/xmouZ nJE2ZeA7LGNDnge+AfX5rDtZxdQADFu/s0tBBYtXi3aWuyFDqF52dGmPw0CsbtVDBZH00EViWc0T+ Un/e+ipU7hHiQmwpqF0OU/p6n31/LPV3wXBwWQttPk6cixPZz478nsgJLUmJV/Ys/X6ZRPcDyeXux UStywPZtxU5KTxlBEUeust2jYLyW0JCrtRsN0HEI1ElSZWj4ps/dpZ99mekh/DJdd8rVVWiF4ae6w fFaAGdEncCudi3rcCTnPXQQjTxU2RhJcQQWRFjI97JTqgzlvMth5LB/oWi+cesiVflyD8yYicJbg+ x0XCFixg==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNP-003TyM-Pi; Mon, 09 Jan 2023 15:43:51 +0100 From: Melissa Wen To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 02/18] drm/drm_color_mgmt: add shaper LUT to color mgmt properties Date: Mon, 9 Jan 2023 13:38:30 -0100 Message-Id: <20230109143846.1966301-3-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556564859303836?= X-GMAIL-MSGID: =?utf-8?q?1754556564859303836?= Shaper LUT is used to shape the content after blending, i.e., de-linearize or normalize space before applying a 3D LUT color correction. In the next patch, we add 3D LUT property to DRM color management after this shaper LUT and before the current gamma LUT. Signed-off-by: Melissa Wen --- drivers/gpu/drm/drm_atomic_state_helper.c | 4 ++++ drivers/gpu/drm/drm_atomic_uapi.c | 10 ++++++++++ drivers/gpu/drm/drm_color_mgmt.c | 18 ++++++++++++++++++ drivers/gpu/drm/drm_fb_helper.c | 3 +++ drivers/gpu/drm/drm_mode_config.c | 14 ++++++++++++++ include/drm/drm_crtc.h | 14 ++++++++++++-- include/drm/drm_mode_config.h | 12 ++++++++++++ include/drm/drm_mode_object.h | 2 +- 8 files changed, 74 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index bf31b9d92094..4bc860d6cf75 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -141,8 +141,11 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, drm_property_blob_get(state->degamma_lut); if (state->ctm) drm_property_blob_get(state->ctm); + if (state->shaper_lut) + drm_property_blob_get(state->shaper_lut); if (state->gamma_lut) drm_property_blob_get(state->gamma_lut); + state->mode_changed = false; state->active_changed = false; state->planes_changed = false; @@ -214,6 +217,7 @@ void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state) drm_property_blob_put(state->mode_blob); drm_property_blob_put(state->degamma_lut); drm_property_blob_put(state->ctm); + drm_property_blob_put(state->shaper_lut); drm_property_blob_put(state->gamma_lut); } EXPORT_SYMBOL(__drm_atomic_helper_crtc_destroy_state); diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 79730fa1dd8e..5339350c858d 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -430,6 +430,14 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, &replaced); state->color_mgmt_changed |= replaced; return ret; + } else if (property == config->shaper_lut_property) { + ret = drm_atomic_replace_property_blob_from_id(dev, + &state->shaper_lut, + val, + -1, sizeof(struct drm_color_lut), + &replaced); + state->color_mgmt_changed |= replaced; + return ret; } else if (property == config->gamma_lut_property) { ret = drm_atomic_replace_property_blob_from_id(dev, &state->gamma_lut, @@ -481,6 +489,8 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc, *val = (state->degamma_lut) ? state->degamma_lut->base.id : 0; else if (property == config->ctm_property) *val = (state->ctm) ? state->ctm->base.id : 0; + else if (property == config->shaper_lut_property) + *val = (state->shaper_lut) ? state->shaper_lut->base.id : 0; else if (property == config->gamma_lut_property) *val = (state->gamma_lut) ? state->gamma_lut->base.id : 0; else if (property == config->prop_out_fence_ptr) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index d021497841b8..cf6a998b4298 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -69,6 +69,24 @@ * boot-up state too. Drivers can access the blob for the color conversion * matrix through &drm_crtc_state.ctm. * + * “SHAPER_LUT”: + * Blob property to set the shaper lut shaping pixel data after the color + * transformation matrix and before applying 3D Lookup Table (3D LUT). It + * can be used to delinearize content to get an effective 3D LUT mapping. + * The data is interpreted as an array of &struct drm_color_lut elements. + * + * Setting this to NULL (blob property value set to 0) means the output + * color is identical to the input color. This is generally the driver + * boot-up state too. Drivers can access this blob through + * &drm_crtc_state.gamma_lut. + * + * “SHAPER_LUT_SIZE”: + * Unsigned range property to give the size of the shaper lookup table to + * be set on the SHAPER_LUT property (the size depends on the underlying + * hardware). If drivers support multiple LUT sizes then they should + * publish the largest size, and sub-sample smaller sized LUTs + * appropriately. + * * “GAMMA_LUT”: * Blob property to set the gamma lookup table (LUT) mapping pixel data * after the transformation matrix to data sent to the connector. The diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 71edb80fe0fb..f8b4611cbb4a 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -1129,8 +1129,11 @@ static int setcmap_atomic(struct fb_cmap *cmap, struct fb_info *info) replaced = drm_property_replace_blob(&crtc_state->degamma_lut, NULL); replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL); + replaced |= drm_property_replace_blob(&crtc_state->shaper_lut, + NULL); replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, gamma_lut); + crtc_state->color_mgmt_changed |= replaced; } diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index 939d621c9ad4..6468cecc7081 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -354,6 +354,20 @@ static int drm_mode_create_standard_properties(struct drm_device *dev) return -ENOMEM; dev->mode_config.ctm_property = prop; + prop = drm_property_create(dev, + DRM_MODE_PROP_BLOB, + "SHAPER_LUT", 0); + if (!prop) + return -ENOMEM; + dev->mode_config.shaper_lut_property = prop; + + prop = drm_property_create_range(dev, + DRM_MODE_PROP_IMMUTABLE, + "SHAPER_LUT_SIZE", 0, UINT_MAX); + if (!prop) + return -ENOMEM; + dev->mode_config.shaper_lut_size_property = prop; + prop = drm_property_create(dev, DRM_MODE_PROP_BLOB, "GAMMA_LUT", 0); diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 8e1cbc75143e..7f289e0153aa 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -152,8 +152,9 @@ struct drm_crtc_state { bool zpos_changed : 1; /** * @color_mgmt_changed: Color management properties have changed - * (@gamma_lut, @degamma_lut or @ctm). Used by the atomic helpers and - * drivers to steer the atomic commit control flow. + * (@shaper_lut, @gamma_lut, @degamma_lut or @ctm). Used by + * the atomic helpers and drivers to steer the atomic commit control + * flow. */ bool color_mgmt_changed : 1; @@ -279,6 +280,15 @@ struct drm_crtc_state { */ struct drm_property_blob *gamma_lut; + /** + * @shaper_lut: + * + * Lookup table used to de-linearize pixel data for gamma correction. + * See drm_crtc_enable_color_mgmt(). The blob (if not NULL) is an array + * of &struct drm_color_lut. + */ + struct drm_property_blob *shaper_lut; + /** * @target_vblank: * diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 6b5e01295348..c174d3a7c951 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -800,6 +800,18 @@ struct drm_mode_config { * degamma LUT. */ struct drm_property *ctm_property; + + /** + * @shaper_lut_property: Optional CRTC property to set the shaper LUT used to + * convert colors before 3D LUT conversion. + */ + struct drm_property *shaper_lut_property; + /** + * @shaper_lut_size_property: Optional CRTC property for the size of the + * shaper LUT as supported by the driver (read-only). + */ + struct drm_property *shaper_lut_size_property; + /** * @gamma_lut_property: Optional CRTC property to set the LUT used to * convert the colors, after the CTM matrix, to the gamma space of the diff --git a/include/drm/drm_mode_object.h b/include/drm/drm_mode_object.h index 912f1e415685..5e75b51936e6 100644 --- a/include/drm/drm_mode_object.h +++ b/include/drm/drm_mode_object.h @@ -60,7 +60,7 @@ struct drm_mode_object { void (*free_cb)(struct kref *kref); }; -#define DRM_OBJECT_MAX_PROPERTY 24 +#define DRM_OBJECT_MAX_PROPERTY 26 /** * struct drm_object_properties - property tracking for &drm_mode_object */ From patchwork Mon Jan 9 14:38:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40900 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2196147wrt; Mon, 9 Jan 2023 06:47:28 -0800 (PST) X-Google-Smtp-Source: AMrXdXv6Puu4154raRpHdbz47eSNvbKPLWwyR7dOYNghVwVloyD64HgRUdKjGxJM8WjSbkjxfDUb X-Received: by 2002:a17:906:958:b0:7c0:be4d:46d6 with SMTP id j24-20020a170906095800b007c0be4d46d6mr50377818ejd.59.1673275648238; Mon, 09 Jan 2023 06:47:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275648; cv=none; d=google.com; s=arc-20160816; b=xPMj1d2KKEnCX2gQQjRtPjSaKpKuxpTypY+E+oJ+K8MYEMgGnugInY06xyaNSxJXfE 7Qb9lklPN32JTpq8PnlKiy51PhFC7qB75IYd7T4vqWRoBRSoR7CkE/vGY98QNXp+86RL v22bKcXd1tsN4ttTE1vqKQGXRtBL1SYP3xl34MJA6+MvfSrHz1m5OhlW//7CWptoeXYm kL0hAGLnaJaR8CItFaeA4Y42UkjRkNVkqhTEQZu1wsSz/xE5cQ/t0XAPGBnREIhBinTT +1agFUBBTRNy/35ChvdgBZVSMyYwNMVo5pwsLHhqNrawfIX/vBGTpn0jrgYm6el/1BLH FX9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jMSYSfJzahufrlrBXYv6MHo37VWug9MHt0sn3JWK32A=; b=MARSrQTAwg5YEASJA2CWa3ilhFA47phZlIyySeFEQFLM4faJpaA9pSXzkSxjh6DaOW Mj3Nf4vZvtFZv8TJIFiVntSnI6VmTHIHXRF/t61f30pi7qUEZbbVGwyqd7SQWVrqpUCv bkaBsTnjD7d+vVVVgURIqNpO527/I/HZTU6yzjxyF4YMpzTQl/l1MhFoEZqj0/ah87Ut x6hBivw47CFfmZcRlg4Dmc+/KZJ4pADHTEkK+3Wa8nHbaA57BXbhZjaQ8XQ//CGMeThJ 4UQiIwAeDVdmGdhVdCN6YUUWsSvjj5XNbvkXh5vtPFmUd+twvgliKjAygW0PHCafLBG7 ZZZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=NbUuCutE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id xc2-20020a170907074200b0078c3197bf86si10351032ejb.533.2023.01.09.06.47.04; Mon, 09 Jan 2023 06:47:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=NbUuCutE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234203AbjAIOob (ORCPT + 99 others); Mon, 9 Jan 2023 09:44:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233825AbjAIOoJ (ORCPT ); Mon, 9 Jan 2023 09:44:09 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0A8C1DF3C for ; Mon, 9 Jan 2023 06:44:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=jMSYSfJzahufrlrBXYv6MHo37VWug9MHt0sn3JWK32A=; b=NbUuCutEZIA1CwE6LAAMFEoZvo V7T66kPVPBJ2c3VViNxi5izJ06I1fqOjNTWi2MBZwDPZmueA1qRGMuLAHnLBAt0V1+VHqHxQTFX5e LlFeTCoV8QNyCDpt+BiNLAvBuvU/SxRiopzVBJ1/DWQI4DSZ+CF8HUi1YrbQp97+JVETnc3ubjd7/ icdu0RAUCs17eNqdV/RLG1bkQfhW32Nic/ywJBIm0I7WSt80PHDDijgrJqNDgugjQ7aHadxjD1McV jG14ZDLm1FzBWDrhTwiYxxImFNqw0SCqa8GDaG7hOaeb1FERtmI1mVG/QUDEaEAy4sXj0eWFbjF/O OOMruEcg==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNS-003TyM-LS; Mon, 09 Jan 2023 15:43:54 +0100 From: Melissa Wen To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 03/18] drm/drm_color_mgmt: add 3D LUT props to DRM color mgmt Date: Mon, 9 Jan 2023 13:38:31 -0100 Message-Id: <20230109143846.1966301-4-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556686107570754?= X-GMAIL-MSGID: =?utf-8?q?1754556686107570754?= Add 3D LUT for gammar correction using a 3D lookup table. The position in the color correction pipeline where 3D LUT is applied depends on hw design, being after CTM or gamma. If just after CTM, a shaper lut must be set to shape the content for a non-linear space. That details should be handled by the driver according to its color capabilities. --- v3: - refactor CRTC 3D LUT API to use Alex Hung proposal for planes Signed-off-by: Melissa Wen --- drivers/gpu/drm/drm_atomic_state_helper.c | 3 +++ drivers/gpu/drm/drm_atomic_uapi.c | 14 ++++++++++++++ drivers/gpu/drm/drm_color_mgmt.c | 19 +++++++++++++++++++ drivers/gpu/drm/drm_fb_helper.c | 2 ++ drivers/gpu/drm/drm_mode_config.c | 7 +++++++ include/drm/drm_crtc.h | 20 +++++++++++++++++++- include/drm/drm_mode_config.h | 13 +++++++++++++ include/drm/drm_mode_object.h | 2 +- 8 files changed, 78 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index 4bc860d6cf75..6e70f08e2f44 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -143,6 +143,8 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, drm_property_blob_get(state->ctm); if (state->shaper_lut) drm_property_blob_get(state->shaper_lut); + if (state->lut3d) + drm_property_blob_get(state->lut3d); if (state->gamma_lut) drm_property_blob_get(state->gamma_lut); @@ -218,6 +220,7 @@ void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state) drm_property_blob_put(state->degamma_lut); drm_property_blob_put(state->ctm); drm_property_blob_put(state->shaper_lut); + drm_property_blob_put(state->lut3d); drm_property_blob_put(state->gamma_lut); } EXPORT_SYMBOL(__drm_atomic_helper_crtc_destroy_state); diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 5339350c858d..29297badf028 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -438,6 +438,16 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, &replaced); state->color_mgmt_changed |= replaced; return ret; + } else if (property == config->lut3d_property) { + ret = drm_atomic_replace_property_blob_from_id(dev, + &state->lut3d, + val, + -1, sizeof(struct drm_color_lut), + &replaced); + state->color_mgmt_changed |= replaced; + return ret; + } else if (property == config->lut3d_mode_property) { + state->lut3d_mode = val; } else if (property == config->gamma_lut_property) { ret = drm_atomic_replace_property_blob_from_id(dev, &state->gamma_lut, @@ -491,6 +501,10 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc, *val = (state->ctm) ? state->ctm->base.id : 0; else if (property == config->shaper_lut_property) *val = (state->shaper_lut) ? state->shaper_lut->base.id : 0; + else if (property == config->lut3d_property) + *val = (state->lut3d) ? state->lut3d->base.id : 0; + else if (property == config->lut3d_mode_property) + *val = state->lut3d_mode; else if (property == config->gamma_lut_property) *val = (state->gamma_lut) ? state->gamma_lut->base.id : 0; else if (property == config->prop_out_fence_ptr) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index cf6a998b4298..f92633b3b67e 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -87,6 +87,25 @@ * publish the largest size, and sub-sample smaller sized LUTs * appropriately. * + * “LUT3D”: + * Blob property to set the 3D LUT mapping pixel data after the color + * transformation matrix and before gamma 1D lut correction. The + * data is interpreted as an array of &struct drm_color_lut elements. + * Hardware might choose not to use the full precision of the LUT + * elements. + * + * Setting this to NULL (blob property value set to 0) means a the output + * color is identical to the input color. This is generally the driver + * boot-up state too. Drivers can access this blob through + * &drm_crtc_state.gamma_lut. + * + * “LUT3D_MODE”: + * Enum property to give the mode of the 3D lookup table to be set on the + * LUT3D property. A mode specifies size, stride, bit depth and color + * format and depends on the underlying hardware). If drivers support + * multiple 3D LUT modes, they should be declared in a array of + * drm_color_lut3d_mode and they will be advertised as an enum. + * * “GAMMA_LUT”: * Blob property to set the gamma lookup table (LUT) mapping pixel data * after the transformation matrix to data sent to the connector. The diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index f8b4611cbb4a..6130c44c79f6 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -1131,6 +1131,8 @@ static int setcmap_atomic(struct fb_cmap *cmap, struct fb_info *info) replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL); replaced |= drm_property_replace_blob(&crtc_state->shaper_lut, NULL); + replaced |= drm_property_replace_blob(&crtc_state->lut3d, + NULL); replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, gamma_lut); diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index 6468cecc7081..5c37d84cdabf 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -368,6 +368,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev) return -ENOMEM; dev->mode_config.shaper_lut_size_property = prop; + prop = drm_property_create(dev, + DRM_MODE_PROP_BLOB, + "LUT3D", 0); + if (!prop) + return -ENOMEM; + dev->mode_config.lut3d_property = prop; + prop = drm_property_create(dev, DRM_MODE_PROP_BLOB, "GAMMA_LUT", 0); diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 7f289e0153aa..805a50c36a70 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -152,7 +152,7 @@ struct drm_crtc_state { bool zpos_changed : 1; /** * @color_mgmt_changed: Color management properties have changed - * (@shaper_lut, @gamma_lut, @degamma_lut or @ctm). Used by + * (@shaper_lut, @lut3d, @gamma_lut, @degamma_lut or @ctm). Used by * the atomic helpers and drivers to steer the atomic commit control * flow. */ @@ -289,6 +289,24 @@ struct drm_crtc_state { */ struct drm_property_blob *shaper_lut; + /** + * @lut3d: + * + * 3D Lookup table for converting pixel data. Position where it takes + * place depends on hw design, after @ctm or @gamma_lut. See + * drm_crtc_enable_color_mgmt(). The blob (if not NULL) is an array of + * &struct drm_color_lut. + */ + struct drm_property_blob *lut3d; + + /** + * @lut3d_mode: + * This is a blob_id and exposes the platform capabilities wrt + * various 3dlut. This also helps user select a 3dlut mode amongst + * the supported ones. + */ + u32 lut3d_mode; + /** * @target_vblank: * diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index c174d3a7c951..6cb96f403de2 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -812,6 +812,19 @@ struct drm_mode_config { */ struct drm_property *shaper_lut_size_property; + /** + * @lut3d_property: Optional CRTC property to set the 3D LUT used to + * convert colors; before or after gamma conversion depends on hw + * design. A shaper LUT can be used to delinearize content before apply + * 3D LUT correction. + */ + struct drm_property *lut3d_property; + /** + * @lut3d_mode_property: Optional CRTC property to describe 3D LUT modes + * supported by the driver. + */ + struct drm_property *lut3d_mode_property; + /** * @gamma_lut_property: Optional CRTC property to set the LUT used to * convert the colors, after the CTM matrix, to the gamma space of the diff --git a/include/drm/drm_mode_object.h b/include/drm/drm_mode_object.h index 5e75b51936e6..d39ee21f26db 100644 --- a/include/drm/drm_mode_object.h +++ b/include/drm/drm_mode_object.h @@ -60,7 +60,7 @@ struct drm_mode_object { void (*free_cb)(struct kref *kref); }; -#define DRM_OBJECT_MAX_PROPERTY 26 +#define DRM_OBJECT_MAX_PROPERTY 28 /** * struct drm_object_properties - property tracking for &drm_mode_object */ From patchwork Mon Jan 9 14:38:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40901 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2196158wrt; Mon, 9 Jan 2023 06:47:29 -0800 (PST) X-Google-Smtp-Source: AMrXdXuG5uJtlxQf5hp68hjeDVmRIPDLwzhzMk67k4x87gL/OMBYUMKoSKsuQQPipkFYMmapLLV+ X-Received: by 2002:a17:906:5611:b0:7c1:4e5d:d8a0 with SMTP id f17-20020a170906561100b007c14e5dd8a0mr59946577ejq.76.1673275649675; Mon, 09 Jan 2023 06:47:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275649; cv=none; d=google.com; s=arc-20160816; b=XgqDIrkq5f1Qb7wT26MU/jpYbirCn9CSBrmRjy394TdhcGBcGYQ8aQlVCdmp0KRy9o j7hE1nyCHmGhw0et2yBZMZGxNcGe6WRMQSXSPr6DsGVbxWL4ZnN2ssH2DpQuI/eOR/+V Tt2t8HfhnDYF+7Mgozbhxtgz9zMAtcxUa1ZfNQ8PvJcjn0/aGVMSq7ceT48+7HcsY7tf qhr+Y8i2U/EGBbqIKXsHs+42/1wekNeJoJKaEW6uN/ZGCDGYr1tcA7HtUW1uRqq0yfpG GFJ9Y+W70z7Qnm+/ZdFff6cSP3Zjb7ZLGCVS0CVCRIws4Lya2ZZL2/tFgNAGAl9UMtD5 R6PQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OWwQ8u7sFMDvTmb5fE9F6XuAX0AS2r8sgD2pqpPqgV4=; b=i17KqHjeyz5nw3U0IwnHNT0L4W3/fPFhbz1iuIPLZFBL8YpN3xHd06vADy0s/qzWSh FadLa6jv+EY79E73BkC+AhR8JsikEuRSgdlXAaxn2lZNqLc1EI7Jj2V+F7alfup46pkA 7N3dB03/PgJ/DSVh4iszhMM4VbpyGvpkiJ9e+C9X2BdrQhVVxmPYBYAyFzsgVmyIPwwW rXKNE4Qt/BPdPhZ/5RkpH6uLmvmFqU4hdoaPzSkc2J05NWcC0ahCgKs2VlZSLyY40Z1V TNW/dRObsYufzcjPm75G+wyuIq3wuEZ6AXk5Y0rI7ugun6gKOwcn8BEP7Kmzwx62h7x2 5oow== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=kAFclU16; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hw20-20020a170907a0d400b0084cd9dba34bsi7186110ejc.973.2023.01.09.06.47.05; Mon, 09 Jan 2023 06:47:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=kAFclU16; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234266AbjAIOog (ORCPT + 99 others); Mon, 9 Jan 2023 09:44:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233629AbjAIOoK (ORCPT ); Mon, 9 Jan 2023 09:44:10 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1A771E3E8 for ; Mon, 9 Jan 2023 06:44:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=OWwQ8u7sFMDvTmb5fE9F6XuAX0AS2r8sgD2pqpPqgV4=; b=kAFclU16RCUbRS43TnofiwMD4I 88haYRtghBErhgU7N0Vs3/2oMPK0osGqyXOle7pnwfTdPC8zxA7afgyaxB847zmvzZZS5YR9QJxBt SYeGP6aRLiGt3gcVIG27e6YTKlj6fvtgBT57xGhAth6lUdKlbUIgRycghvWcnECWiWPT522+cAICU sjm/VokbHlvGZuBpICqX0vG79oWW06ljrIZfkvQutAr6IwuHZU81nfyFC7Wsi814RIYhBvuynavZ8 MfZ8/y0ypnhMKZCYbV/aRhb7WHLaXhQA3Dz/QpgNM3vgt4RFrrDvZMZD8jNJr8B6C5XNfU4FkPMVX tcpMWhsA==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNV-003TyM-Oo; Mon, 09 Jan 2023 15:43:57 +0100 From: Melissa Wen To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 04/18] drm/drm_color_mgmt: add function to create 3D LUT modes supported Date: Mon, 9 Jan 2023 13:38:32 -0100 Message-Id: <20230109143846.1966301-5-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556687676056834?= X-GMAIL-MSGID: =?utf-8?q?1754556687676056834?= DRM color function to create modes for lut3d mode property from an array of drm_color_lut3d_mode modes supported by the HW and advertise to userspace. Userspace can get the description of a specific mode in the enum list from its blob data. Signed-off-by: Melissa Wen --- drivers/gpu/drm/drm_color_mgmt.c | 43 +++++++++++++++++++++++++++++++- include/drm/drm_color_mgmt.h | 4 +++ 2 files changed, 46 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index f92633b3b67e..6ce48007cdd4 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -104,7 +104,7 @@ * LUT3D property. A mode specifies size, stride, bit depth and color * format and depends on the underlying hardware). If drivers support * multiple 3D LUT modes, they should be declared in a array of - * drm_color_lut3d_mode and they will be advertised as an enum. + * drm_mode_lut3d_mode and they will be advertised as an enum. * * “GAMMA_LUT”: * Blob property to set the gamma lookup table (LUT) mapping pixel data @@ -228,6 +228,47 @@ void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, } EXPORT_SYMBOL(drm_crtc_enable_color_mgmt); +int drm_crtc_create_lut3d_mode_property(struct drm_crtc *crtc, + const struct drm_mode_lut3d_mode modes[], + unsigned int num_modes) +{ + struct drm_device *dev = crtc->dev; + struct drm_property_blob *blob; + struct drm_property *prop; + char *name; + int ret; + + if (dev->mode_config.lut3d_mode_property) + return 0; + + prop = drm_property_create(dev, DRM_MODE_PROP_ENUM, "LUT3D_MODE", num_modes); + if (!prop) + return -EINVAL; + + for (int i = 0; i < num_modes; i++) { + blob = drm_property_create_blob(dev, sizeof(modes[i]), &modes[i]); + if (IS_ERR(blob)) + return PTR_ERR(blob); + + name = kasprintf(GFP_KERNEL, "lut3d_%d_%dbit", + modes[i].lut_size, modes[i].bit_depth); + if (!name) + return -ENOMEM; + + ret = drm_property_add_enum(prop, blob->base.id, name); + if (ret) { + drm_property_blob_put(blob); + kfree(name); + return ret; + } + kfree(name); + } + dev->mode_config.lut3d_mode_property = prop; + + return 0; +} +EXPORT_SYMBOL(drm_crtc_create_lut3d_mode_property); + /** * drm_mode_crtc_set_gamma_size - set the gamma table size * @crtc: CRTC to set the gamma table size for diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index 81c298488b0c..af9305925572 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -59,6 +59,10 @@ void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, bool has_ctm, uint gamma_lut_size); +int drm_crtc_create_lut3d_mode_property(struct drm_crtc *crtc, + const struct drm_mode_lut3d_mode modes[], + unsigned int num_modes); + int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc, int gamma_size); From patchwork Mon Jan 9 14:38:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40902 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2196188wrt; Mon, 9 Jan 2023 06:47:32 -0800 (PST) X-Google-Smtp-Source: AMrXdXu/ozICIPGW3zN68Mr8q50U6fRGvzxCUQZlpbJ72U2vDDkQTUvOX2FaYUWxucSUjQ6gkFU/ X-Received: by 2002:a17:907:3e96:b0:7c4:f501:e5b1 with SMTP id hs22-20020a1709073e9600b007c4f501e5b1mr74431336ejc.51.1673275652134; Mon, 09 Jan 2023 06:47:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275652; cv=none; d=google.com; s=arc-20160816; b=PXNNvF7zNxBC2BoSPy88IzFtpwpGPk3BJaJvoEJzDtEPGbCm6gE+9OLCbwfvkNRYzL CIHHYU66Tb5ilF7xCxUs5CkHXhLbPsJkMhr23CB0Bc1B3suXTx1l/NJmCtpbVP9fpNM7 w0DqBCBVcynR/Jc0Z7wcWqTAYAXy5u67bFqfCK4MUiLHdrYGF2AvkuVhVhS2MFMx9Dwd XnVM6CMzrJAEgd40QMAh0kC1QoSAFstQVnOZWMJgMvxGkEuN0/cWxfrs1iXbSaasS14R aeALsfYEj0LasNSj8oSeR/A/OzxiB5bTpd0hxBEkwOCHrDTPIHZrS77mswB5ZmFRVOIr CmlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0r/YKTFRwpqtasaSu+TXALDbDG9nOKnJqiwlyrK/4as=; b=RRfxVK+y9gPJusJkeD5YWAEPjyWHJ01G2wlLF1oj2cNefE2lw1tffSbucJDpK+eGX2 JG7OTIEexMInLhkEkMtYIBueh87DSv9fqlijwgNHEHq03UMo9r5ta8O5Pi/IVI6G6WNk GT79GByZnU2SdUulQ2nzjIxc+zSG9pQFnNZgc7ci/goAiPyYMHRmc6CB1eHxES6t5kw8 d4zQfOrpewfV+Q6qMBks3MY5Nj7TFxgw8ZTRMRKiLBllnW5/oSM8usln87wgkikgJwp6 Fw1fVuiGaUueYhVnSPJBkUagj3d/aOXxSdGMCf4QM+I+4VZ70TKPh56ZKrbYxBoquLYh 77Dg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="IUDT/m33"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ds17-20020a170907725100b008225eae8867si8842540ejc.108.2023.01.09.06.47.08; Mon, 09 Jan 2023 06:47:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="IUDT/m33"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230013AbjAIOom (ORCPT + 99 others); Mon, 9 Jan 2023 09:44:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33446 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233660AbjAIOoM (ORCPT ); Mon, 9 Jan 2023 09:44:12 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA35B1E3C0 for ; Mon, 9 Jan 2023 06:44:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=0r/YKTFRwpqtasaSu+TXALDbDG9nOKnJqiwlyrK/4as=; b=IUDT/m33kXvkNtSdS/4qsMQINo dq0n9SoMUor3bd/Rw5LOOIuDpC9ngY9awRLDxP3azAfNHsZ6/s2xQJo8xaWiRTBqAiOUJcVzif2/F iLHuQPa74RA90u1PoRZlzhZgcHUO/EdvvjyI3tlvowW2B5gRy+Nitf8r0vIxCYWibFKz7/jk1J+8o qp9mPE/c6nozubFOIaq0dh0mJMBP01vBrn/OJ/fWempQWUBiawc58yWeV6nnHeY3bK/6wKfkdl38H j+DiNdjAapYxucLFEUWUdk1gIwsBvzQbvqpzybRB2IJyF3GuuaSdCoX7koVe8dYnwHkrvJWDVlT2R l6abuV2A==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNY-003TyM-8V; Mon, 09 Jan 2023 15:44:00 +0100 From: Melissa Wen To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 05/18] drm/drm_color_mgmt: add function to attach 3D LUT props Date: Mon, 9 Jan 2023 13:38:33 -0100 Message-Id: <20230109143846.1966301-6-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556690281758021?= X-GMAIL-MSGID: =?utf-8?q?1754556690281758021?= If the driver supports user 3D LUT then it calls a drm function to attach 3D LUT related properties according to HW caps. Signed-off-by: Melissa Wen --- drivers/gpu/drm/drm_color_mgmt.c | 35 ++++++++++++++++++++++++++++++++ include/drm/drm_color_mgmt.h | 3 +++ 2 files changed, 38 insertions(+) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index 6ce48007cdd4..06503f693ecd 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -269,6 +269,41 @@ int drm_crtc_create_lut3d_mode_property(struct drm_crtc *crtc, } EXPORT_SYMBOL(drm_crtc_create_lut3d_mode_property); +/** + * drm_crtc_enable_lut3d - enable 3D LUT properties + * @crtc: DRM CRTC + * @shaper_lut_size: the size of shaper lut + * + * This function lets the driver enable the 3D LUT color correction property + * on a CRTC. This includes 3D LUT and also a shaper LUT, if set. The shaper + * LUT property is only attached if its size is not 0 and 3D LUT is set, being + * therefore optional. + */ +void drm_crtc_enable_lut3d(struct drm_crtc *crtc, + uint shaper_lut_size) +{ + struct drm_device *dev = crtc->dev; + struct drm_mode_config *config = &dev->mode_config; + + if (!config->lut3d_mode_property) + return; + + drm_object_attach_property(&crtc->base, + config->lut3d_property, 0); + drm_object_attach_property(&crtc->base, + config->lut3d_mode_property, 0); + + if (!shaper_lut_size) + return; + + drm_object_attach_property(&crtc->base, + config->shaper_lut_property, 0); + drm_object_attach_property(&crtc->base, + config->shaper_lut_size_property, + shaper_lut_size); +} +EXPORT_SYMBOL(drm_crtc_enable_lut3d); + /** * drm_mode_crtc_set_gamma_size - set the gamma table size * @crtc: CRTC to set the gamma table size for diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index af9305925572..db2026dc825e 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -63,6 +63,9 @@ int drm_crtc_create_lut3d_mode_property(struct drm_crtc *crtc, const struct drm_mode_lut3d_mode modes[], unsigned int num_modes); +void drm_crtc_enable_lut3d(struct drm_crtc *crtc, + uint shaper_lut_size); + int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc, int gamma_size); From patchwork Mon Jan 9 14:38:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40904 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2196327wrt; Mon, 9 Jan 2023 06:47:48 -0800 (PST) X-Google-Smtp-Source: AMrXdXvD5562nLgp2AW8qxIfFFoRTYLJz5sDZS2xCbO99jm6ok1XwhpbheeDv8SazF/pyvMNiZxT X-Received: by 2002:a17:906:ce3a:b0:84d:242c:13a with SMTP id sd26-20020a170906ce3a00b0084d242c013amr8515569ejb.74.1673275667772; Mon, 09 Jan 2023 06:47:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275667; cv=none; d=google.com; s=arc-20160816; b=MACTGtybtjFPQEHnTneb7j5A7LbDYkKsr2hbAhzeOgqXRVKiXiEWaqGtg+cK0u8s+i 7GW/CNHVvMy14K8eEHUEzgD3kSvXq0Vvqk75L2ewnIWARi+WwCRI9YW5xE19W7vvAhlr D/EmyvzoWGV05ks00ZEDBPfJDyTxcB0V1NcSkXhI/vO4YKaPbMWy8pxKCAZ8l39Xm4rp 4UVUncX+DipsjoMoTUl+iKOfJwqduAdzfnLayGwsxVcQNL1WkgfVocuWdBeTvbgAYcrH NYv2RitUf858IOnuxJBibJP5rFEntX7LHXuH3s/uWE0VTlauUySI4asfRwJvqAG0DP67 BXAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OfJZdZE/V/ZvpMRh36U0jcNUuCeLwAP2JLdu4FaqZsM=; b=gRMgxKzHSEcmeWgK0EYHlkVTUQOmEgnRqynlpFeFTINFjb7qGrkt31XiQ0BJj2aJcA OIJ6Ia98ljaE9Jt6jjQ7raGGO1+SSRwhjv7A7t2VuB67srIfrATOYgyW0qOAKx5kI0dU 1PXohK7ZhMT+5/kVNMfx4QhbefTL7BdeK4VrQsaOLKJBllt6cnnMjss0/jKSWJjmTUe1 Ons9C3l5pQGWAapcIb2sY6gcVInggz2SKm81IuxpYrYTSM+Jc2mwygb7YJNyVmuV2+0y RqXVS7zzcrKc/I+dngArbLe5kPBG9W2dtA9kUeUfqOOmJIzV5K1sp4esbLoXwYY3yQrt feeQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="JHBNX7/v"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id xf9-20020a17090731c900b0084d0b4b4fdbsi9743931ejb.555.2023.01.09.06.47.23; Mon, 09 Jan 2023 06:47:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="JHBNX7/v"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231258AbjAIOot (ORCPT + 99 others); Mon, 9 Jan 2023 09:44:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232429AbjAIOoP (ORCPT ); Mon, 9 Jan 2023 09:44:15 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 884861DF32 for ; Mon, 9 Jan 2023 06:44:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=OfJZdZE/V/ZvpMRh36U0jcNUuCeLwAP2JLdu4FaqZsM=; b=JHBNX7/vGX/O5LzLAHWKxyjD85 zn/TvGUHh0lPLjc34lNvMR3GD6CdgpqSd40ppq7yjeENLS0lF3nUuPwTYBrlL8sD/hT1THDzMohWB j2QMfc+tnOwcVccvM373aYiw4mtuDQfhlo2jrn4yH6DT2j2tyOKZJSEoppBwMWF+1RMo4sDrBCgRB 3Ydz2LG7B38W+m0HPPSrubVVVIY7Dzsgxj6LFAu/FG+lVXDmzLpRpKKYgLh9k2M+Iaz1gsDqLX7IB cjPdYetmgMkmLvFVcQhkHPTD1NiP49sSWzDiKFMH6bzQZkUib3Ieo3JJYHYrnAgFE8KAdPHDU8DHB 7Ndp951A==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNa-003TyM-Sh; Mon, 09 Jan 2023 15:44:03 +0100 From: Melissa Wen To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 06/18] drm/drm_color_mgmt: set first lut3d mode as default Date: Mon, 9 Jan 2023 13:38:34 -0100 Message-Id: <20230109143846.1966301-7-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556706330704614?= X-GMAIL-MSGID: =?utf-8?q?1754556706330704614?= Signed-off-by: Melissa Wen --- drivers/gpu/drm/drm_color_mgmt.c | 18 ++++++++++++++++-- include/drm/drm_color_mgmt.h | 3 ++- 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index 06503f693ecd..d6283f049881 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -280,18 +280,32 @@ EXPORT_SYMBOL(drm_crtc_create_lut3d_mode_property); * therefore optional. */ void drm_crtc_enable_lut3d(struct drm_crtc *crtc, - uint shaper_lut_size) + uint shaper_lut_size, + bool first_value_as_default) { struct drm_device *dev = crtc->dev; struct drm_mode_config *config = &dev->mode_config; + struct drm_property_enum *prop; + uint init_value = 0; if (!config->lut3d_mode_property) return; drm_object_attach_property(&crtc->base, config->lut3d_property, 0); + + if (first_value_as_default) { + prop = list_first_entry_or_null(&config->lut3d_mode_property->enum_list, + typeof(*prop), head); + init_value = prop ? prop->value : 0; + } + drm_object_attach_property(&crtc->base, - config->lut3d_mode_property, 0); + config->lut3d_mode_property, + init_value); + + if (crtc->state && prop) + crtc->state->lut3d_mode = init_value; if (!shaper_lut_size) return; diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index db2026dc825e..d13e99e2e877 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -64,7 +64,8 @@ int drm_crtc_create_lut3d_mode_property(struct drm_crtc *crtc, unsigned int num_modes); void drm_crtc_enable_lut3d(struct drm_crtc *crtc, - uint shaper_lut_size); + uint shaper_lut_size, + bool first_value_as_default); int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc, int gamma_size); From patchwork Mon Jan 9 14:38:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40892 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2195520wrt; Mon, 9 Jan 2023 06:46:13 -0800 (PST) X-Google-Smtp-Source: AMrXdXvElHv+yatwBEDC8GFsAtgrx7NV65Lhv7pZlovcAziKqjMSn2WNOEgsN9B+X/tJK4vvb2Cx X-Received: by 2002:a17:907:cbc9:b0:7ad:b6d8:c9d0 with SMTP id vk9-20020a170907cbc900b007adb6d8c9d0mr60428611ejc.53.1673275573468; Mon, 09 Jan 2023 06:46:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275573; cv=none; d=google.com; s=arc-20160816; b=mnkZ4405wFQM0dn8UemMT4Dbfr4iwIeNkW+VzRGo6QnnkVCiRiCsSlF9sXWYRRjsLR ZgqvoqrIzYOonfzkA1F5Q/6jdgwfE1AvtxfqUyJQ/vWSuIy4ameOwy0STMoIbFblH/vz qraQ2EfP98S9HlagFHqZiLoCy+DW+GOHlILTKVYB0QsLXIvNF9CxZlOjKimWj2kAskmV Hn9LVXLj2RJz+u9w/QIPQQw1Rh3/4WZTxrTFJgqCshOMWJCs4hxGdpG3ZqUqlFq4Lp24 eFlhVhdxJdIKTPB8ES6cct0wZwroghKVCWou0XtR3jmYMUBgQMCLYTor+KnmhlINtdun 6hyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eUiu9Wjf4cO16yZY2bNhlA8qvES7ZdJnbNszqoBABJk=; b=E9/2cHjSRQzh+hs/YKZvcvrUeSidK5YhIfS5ZT8pQJBN9E8M3bZD1U5m6+8JEDQxj5 yUQYk1X1vSHQMMzjhzGve/R32KvZ48y2xjieANEuE7+XMsoT6BzownFOP70xTG3KX7FC E8fR1tXe7byOZIqCjqvhVC1rlnqlD5sHzs9wUaU+L+geNW0Lf1gMWYeDUgjQWgHR0V2b QUUOLeFL6vyHeyu4LAO/e70aR7biOa6kr7okx6F+vqEP0ZI/I76qRvCyKYDMF24KEbYl l8vREEtsjRYp3UNZ0eBGDXyYIX16GUiZEO7XX5f/FNvQhjtwvDGfTIPdrbxTB5iNxGQ/ gOKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=AcFBRRJP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id gn11-20020a1709070d0b00b007c13387a548si10149399ejc.26.2023.01.09.06.45.49; Mon, 09 Jan 2023 06:46:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=AcFBRRJP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234529AbjAIOox (ORCPT + 99 others); Mon, 9 Jan 2023 09:44:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230493AbjAIOoT (ORCPT ); Mon, 9 Jan 2023 09:44:19 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 054BF1DF3C for ; Mon, 9 Jan 2023 06:44:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=eUiu9Wjf4cO16yZY2bNhlA8qvES7ZdJnbNszqoBABJk=; b=AcFBRRJPlEyliGEC7GMXryCRso +PtpcH1KZao7XWkZvq6yU2ttxiXjMGPocxbxuXhqDxmaxPG3sfm7u++kHlqBEUImCa9aC+YLWBV3/ teSel5vTH7vn2CxnEMOlwUnSObf9iE4N816Uh47bQ5EKZOr3ku9imykLH7QVSHw4tzjjwbUp6p8hQ A36echmG6vsG3XeED97XdS+E0Q7+jiCQUo6cDjSvKVUuZ+z5uGMZuwpgcBNZFKJLNfaUufrboCLsL y2pOJejCbEO9j4jqz8qlKZImBUWJket+kd96gNEEEAAf8DSV0rUD/U7oo4uxvfaHdlVoTDbHZoZ3G QX8/If7A==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNe-003TyM-7Z; Mon, 09 Jan 2023 15:44:06 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 07/18] drm/amd/display: remove unused regamma condition Date: Mon, 9 Jan 2023 13:38:35 -0100 Message-Id: <20230109143846.1966301-8-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556608028510620?= X-GMAIL-MSGID: =?utf-8?q?1754556608028510620?= The function __set_output_tf is only called by amdgpu_dm_update_crtc_color_mgmt() when using atomic regamma. In this situation, func->tf == TRANSFER_FUNCTION_LINEAR (the original if condition) and it never falls into tf != LINEAR (the else condition). Therefore, remove unused condition to avoid misunderstandings here. Signed-off-by: Melissa Wen --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 32 ++++++------------- 1 file changed, 10 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index a4cb23d059bd..10a29d131424 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -255,14 +255,13 @@ static int __set_legacy_tf(struct dc_transfer_func *func, * @func: transfer function * @lut: lookup table that defines the color space * @lut_size: size of respective lut - * @has_rom: if ROM can be used for hardcoded curve * * Returns: * 0 in case of success. -ENOMEM if fails. */ static int __set_output_tf(struct dc_transfer_func *func, - const struct drm_color_lut *lut, uint32_t lut_size, - bool has_rom) + const struct drm_color_lut *lut, + uint32_t lut_size) { struct dc_gamma *gamma = NULL; struct calculate_buffer cal_buffer = {0}; @@ -279,24 +278,13 @@ static int __set_output_tf(struct dc_transfer_func *func, gamma->num_entries = lut_size; __drm_lut_to_dc_gamma(lut, gamma, false); - if (func->tf == TRANSFER_FUNCTION_LINEAR) { - /* - * Color module doesn't like calculating regamma params - * on top of a linear input. But degamma params can be used - * instead to simulate this. - */ - gamma->type = GAMMA_CUSTOM; - res = mod_color_calculate_degamma_params(NULL, func, - gamma, true); - } else { - /* - * Assume sRGB. The actual mapping will depend on whether the - * input was legacy or not. - */ - gamma->type = GAMMA_CS_TFM_1D; - res = mod_color_calculate_regamma_params(func, gamma, false, - has_rom, NULL, &cal_buffer); - } + /* + * Color module doesn't like calculating regamma params + * on top of a linear input. But degamma params can be used + * instead to simulate this. + */ + gamma->type = GAMMA_CUSTOM; + res = mod_color_calculate_degamma_params(NULL, func, gamma, true); dc_gamma_release(&gamma); @@ -450,7 +438,7 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) stream->out_transfer_func->tf = TRANSFER_FUNCTION_LINEAR; r = __set_output_tf(stream->out_transfer_func, regamma_lut, - regamma_size, has_rom); + regamma_size); if (r) return r; } else { From patchwork Mon Jan 9 14:38:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40893 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2195579wrt; Mon, 9 Jan 2023 06:46:20 -0800 (PST) X-Google-Smtp-Source: AMrXdXsMYqCT1NuxGhNAUzgjs8KOwceOVW79KaYZsuOCXMcm9e2y9qc+GXd2AG809qHFRPsRrtd2 X-Received: by 2002:a17:907:a641:b0:7c1:4e8f:df2f with SMTP id vu1-20020a170907a64100b007c14e8fdf2fmr64964529ejc.17.1673275580159; Mon, 09 Jan 2023 06:46:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275580; cv=none; d=google.com; s=arc-20160816; b=XoXjJ6g0ag4FT4m9AZAf0CxsfYG7sZhUUmNp0gJUTX5KECuDxrJGS41AJkEQfLqfCa ZZpiLulexB2LptNilJ3ZLjuT3PQxAE/pJXhujqbTV/i1UFCDllN0R+PyxrNbTKfoj6BH H5PvsG5CRQQw7src5QQOwGNlQVprcAC11KRcwmmFhTXGmp+klFT7zBnSrsaa/dyVTxls PcmOkigDYO1f71voIh+Z/e5q19gYCjHUEFh0h9uuQ+92kOO3Xbyf+Tcz4l5+XE9vzzT/ XMa2wsV6k4sxiJ0y5Ley6W+UVMTYEwBUJdTu24TgIrgOQpPAzArpz4MoM1dFUv1/zeAE jaYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=yZ+XADzHjwvGta78ZXBVQh4OGwv1Wat6G9lgsepYSyM=; b=igg+wJhSlQc+gwIkrQC+K90xaPtMGoVinxsAgpgJH1k/8C0f4rt9QcLuMWtPYSYosC H1CTrun1Mws0P5BLGT/vSapsquWtrxaIqYkmj8LwhzYUTBiOB/OWiR/JiqXLIqjC7PP+ 9Ah1qQJNsdOLJuYGzJSwVXSkMVEQ8NB6bIsh+EoAkr4JEC0JgzTC/BVXfhhYopqc3Vii i78zZNogubLaQnpuPPzBgymvnWRt57vQwwZe9gEzIcTwAH48Ow6q47IwhotTLetNBYFi Z3emXoOdRvHJYJV6XQCHiqg2F29EPpvX0yb6PyI/CTFgAXhtH591900Fsst2nQONQVnm VKGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="A/BXeZXW"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a20-20020a17090680d400b007ad9adaf33dsi7488530ejx.372.2023.01.09.06.45.55; Mon, 09 Jan 2023 06:46:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="A/BXeZXW"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234676AbjAIOpB (ORCPT + 99 others); Mon, 9 Jan 2023 09:45:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232776AbjAIOoV (ORCPT ); Mon, 9 Jan 2023 09:44:21 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A9CFB1E3F9 for ; Mon, 9 Jan 2023 06:44:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=yZ+XADzHjwvGta78ZXBVQh4OGwv1Wat6G9lgsepYSyM=; b=A/BXeZXWL4HuH8i/jEvBcxdnAv ZDsm7EoqvVho9tRzSvxMx5l4aPf22MNse6N3kGsUoap3ZhaioKJwEu3AabOZ0SCuQyzQGjymoJIxn dFdeJ+/UaZT78/RRF8hzAL1vgoSkiPYc5W4WBtxJoxrYZiRDqvs5IYjuvy9m3P20Om7NgHGfBXYoj onOeJwyXdUwGEwix+YsVHbjprxp2c85esOC/K8ZvQLYJfkACHj/FfyRZRJaFyZxT5djIDBXBWjRqu V5K9X5grXuwBaSqY27q01RexqFEuzv9eQLEUnWCmEAvOZgoZ3vLyR5UG1fFFg247+d0p1ghdRQOQg djDdGOsA==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNh-003TyM-5k; Mon, 09 Jan 2023 15:44:09 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 08/18] drm/amd/display: add comments to describe DM crtc color mgmt behavior Date: Mon, 9 Jan 2023 13:38:36 -0100 Message-Id: <20230109143846.1966301-9-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556614810135877?= X-GMAIL-MSGID: =?utf-8?q?1754556614810135877?= Describe some expected behavior of the AMD DM color mgmt programming. Signed-off-by: Melissa Wen --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 10a29d131424..b54ef1392895 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -428,12 +428,23 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) stream->out_transfer_func->type = TF_TYPE_DISTRIBUTED_POINTS; stream->out_transfer_func->tf = TRANSFER_FUNCTION_SRGB; + /* Note: even if we pass has_rom as parameter here, we never + * actually use ROM because the color module only takes the ROM + * path if transfer_func->type == PREDEFINED. + * + * See more in mod_color_calculate_regamma_params() + */ r = __set_legacy_tf(stream->out_transfer_func, regamma_lut, regamma_size, has_rom); if (r) return r; } else if (has_regamma) { - /* If atomic regamma, CRTC RGM goes into RGM LUT. */ + /* CRTC RGM goes into RGM LUT. + * + * Note: here there is no implicit sRGB regamma. We are using + * degamma calculation from color module to calculate the curve + * from a linear base. + */ stream->out_transfer_func->type = TF_TYPE_DISTRIBUTED_POINTS; stream->out_transfer_func->tf = TRANSFER_FUNCTION_LINEAR; From patchwork Mon Jan 9 14:38:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40896 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2195679wrt; Mon, 9 Jan 2023 06:46:32 -0800 (PST) X-Google-Smtp-Source: AMrXdXssqcbfJimFIc45fC8lFUrZgn0dKoY19Vgnv7q5q+BrXqG1Qr0qAZmADAlfDBUXrF/a2iuQ X-Received: by 2002:a17:906:819:b0:7ad:e67d:f15c with SMTP id e25-20020a170906081900b007ade67df15cmr62526111ejd.48.1673275592732; Mon, 09 Jan 2023 06:46:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275592; cv=none; d=google.com; s=arc-20160816; b=0f/S+0M1vx8YZ31p9lGUt9M7qskt8t4LtDftmxu10AqVlQjIbBPnmra7ckrikD/10r vdCmb0lPs2bCREpZIeyOnKONAEQ8gX+N4x6dhg6/Q02Wk3cZKKa5kSc0KeiovpNs5stD AX4evNZy/tISXMdzIdnV6rS3E+JdmtN6zRmYKGOL000T4pMgz0EWrc+JWPBp0xU9nTq3 iTo5ZO6PzAlRILbbJIwP016f2UmuPM3xnmnPeWHtM63aWQzijx3f8SeqPdYzRPjHCVS6 uFBFh5mea+dSMhtbZJvBsGlvAvLgL9IBsno7SBXNXC9MwdDSBuGlpgtjLo5UoA3Pjrfq BLqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Dv8TSHDNAro72IZgP4TBGST9tD70PdSgMAoaPaXFYjA=; b=VBPyG+PV/VRF5QOSQjg/l3mrNOlvCcbpAaPTHkCMZxtLtrfxJwDKL9fQACNH/MzVQa WcVLf4y6pGrsqWv24kCk0Uq7veb9NL3FwSOD/cg3xEK9mZAo/3bOFAby/urQHU/q5aqF 8e2cEonoquEB4ctTqOKC373LSvwkDJNImEF9hPr64PlmaYiHbr9/OvyFavMfZdmEYc0z 9/uZoHbKvxxghq7cDV47Fm8V2jX8+cBRg6FMgaaytR6exfEc1U25tg+OvyV5ELDQMqAp L3cQK2gKG8Pl9275LVahLOm+7cPXyPoNMdh+lD0qU08qVjKABkxfB/EhCNtUhUxyDiil 1XZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=dMseIfbl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dr11-20020a170907720b00b007c0d95413bfsi9019519ejc.665.2023.01.09.06.46.07; Mon, 09 Jan 2023 06:46:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=dMseIfbl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234781AbjAIOpI (ORCPT + 99 others); Mon, 9 Jan 2023 09:45:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233849AbjAIOo1 (ORCPT ); Mon, 9 Jan 2023 09:44:27 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 894351EC73 for ; Mon, 9 Jan 2023 06:44:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=Dv8TSHDNAro72IZgP4TBGST9tD70PdSgMAoaPaXFYjA=; b=dMseIfbldn976aWH7M42s84hjC e/k/kalfXPDw9ej+Ie0mXfYT7p+QWyIG3OK5iNBnnTFZeMj+/Ux/pSceAd7QiJWyTCFIG65houhAm znB5K2uIJkvZZxFV2LhaGj4LEc5OKtofnFuI8IU7JXbveSk7bPGgmtt3WOs3YyzD1teQbdGVHWpE6 sqq6G/LyZE6kWa6Uc+kGlaZEbMN5fW6BgFzsBycjV7xZCxU1HtxP62hNeN0hjT82DPNHYMU7DDc0S 755Wku2S7ww5JOdcfmh/QA9bD237HYOU6uX2LB3u8z1GuHAeJ0vsqv+bG4uiJUx+HmERR9OMDzLXB u3mEW2kQ==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNk-003TyM-1d; Mon, 09 Jan 2023 15:44:12 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 09/18] drm/amd/display: encapsulate atomic regamma operation Date: Mon, 9 Jan 2023 13:38:37 -0100 Message-Id: <20230109143846.1966301-10-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556628403512417?= X-GMAIL-MSGID: =?utf-8?q?1754556628403512417?= We are introducing DRM 3D LUT property to DM color pipeline in the next patch, but so far, only for atomic interface. By checking .set_output_transfer_func in DC drivers with MPC 3D LUT support, we can verify that regamma is only programmed when 3D LUT programming fails. As a groundwork to introduce 3D LUT programming and better understand each step, detach atomic regamma programming from the crtc colocr updating code. Signed-off-by: Melissa Wen --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 52 ++++++++++++------- 1 file changed, 33 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index b54ef1392895..54d95745f0f0 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -291,6 +291,36 @@ static int __set_output_tf(struct dc_transfer_func *func, return res ? 0 : -ENOMEM; } +static int amdgpu_dm_set_atomic_regamma(struct dc_stream_state *stream, + const struct drm_color_lut *regamma_lut, + uint32_t regamma_size) +{ + int ret = 0; + + if (regamma_size) { + /* CRTC RGM goes into RGM LUT. + * + * Note: here there is no implicit sRGB regamma. We are using + * degamma calculation from color module to calculate the curve + * from a linear base. + */ + stream->out_transfer_func->type = TF_TYPE_DISTRIBUTED_POINTS; + stream->out_transfer_func->tf = TRANSFER_FUNCTION_LINEAR; + + ret = __set_output_tf(stream->out_transfer_func, regamma_lut, + regamma_size); + } else { + /* + * No CRTC RGM means we can just put the block into bypass + * since we don't have any plane level adjustments using it. + */ + stream->out_transfer_func->type = TF_TYPE_BYPASS; + stream->out_transfer_func->tf = TRANSFER_FUNCTION_LINEAR; + } + + return ret; +} + /** * __set_input_tf - calculates the input transfer function based on expected * input space. @@ -438,27 +468,11 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) regamma_size, has_rom); if (r) return r; - } else if (has_regamma) { - /* CRTC RGM goes into RGM LUT. - * - * Note: here there is no implicit sRGB regamma. We are using - * degamma calculation from color module to calculate the curve - * from a linear base. - */ - stream->out_transfer_func->type = TF_TYPE_DISTRIBUTED_POINTS; - stream->out_transfer_func->tf = TRANSFER_FUNCTION_LINEAR; - - r = __set_output_tf(stream->out_transfer_func, regamma_lut, - regamma_size); + } else { + regamma_size = has_regamma ? regamma_size : 0; + r = amdgpu_dm_set_atomic_regamma(stream, regamma_lut, regamma_size); if (r) return r; - } else { - /* - * No CRTC RGM means we can just put the block into bypass - * since we don't have any plane level adjustments using it. - */ - stream->out_transfer_func->type = TF_TYPE_BYPASS; - stream->out_transfer_func->tf = TRANSFER_FUNCTION_LINEAR; } /* From patchwork Mon Jan 9 14:38:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40898 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2196004wrt; Mon, 9 Jan 2023 06:47:09 -0800 (PST) X-Google-Smtp-Source: AMrXdXvSbkSLpuX/IXmNnJg4VGql+GUwh/IDl6msOziMEx5aIFVfeKIJqe8RfATMl8Vj+TumslUd X-Received: by 2002:a05:6402:380d:b0:47e:eaae:9a5b with SMTP id es13-20020a056402380d00b0047eeaae9a5bmr54918020edb.42.1673275629085; Mon, 09 Jan 2023 06:47:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275629; cv=none; d=google.com; s=arc-20160816; b=RnmYdZ+qQihR0jafbJvQWk8lkepAxLnoLVE0d+d081ZGUjmIXRrsgxpYbOJgWnh58Q Ikc5szMx7Iw08EAC6W+BigbOS8w5GhV9gEhKaxMG8GN4f5a77r7tuobqWNF7JrT1PPbZ X9g/HtcZCWsRXUzUvhkBwDqxmxUzPW91AINhf7YNgKBvSAbaxtGrGqr1KntH/h8LZ1hc EzFtseBL7RoSF/OddDTJ9IL0NQDlIjgIQtgqPUyhYzsAkcsZw0PNNAGg6wNtxRRVWfl9 iLRhLVppmZJwP7E2xVI8K290UqOcO+V3c3qDDala31CWTgi2WGmjl23orGX7DQzFc8YP cTuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nDAiETVpEvUgb7mqS6Y9TlEIy67mC7r1XqqTtdFTtiY=; b=V7CXqa1JlsrAkFGblxEV3ApuBtKcHWgeNBOVbMNHCdqbjLJzRAh6mO0XxmRpYlmobl dVTzi9otyniULUAE2EAqLUluzMLtHSLKgPUhhboVjVy5midXpGCqBl3u5++EH04kZWyS YRHxl6598woaNykrzY/wbcgvEri3n1X5OpSZdwUr5Nwg/ir5GpzhR2XzqKgzcvFu0ef5 CyEYQG8znwBn4yJa5ytzXQ1P5DFljfrq9OLQ+i2QRowIpg4SgphcsK0gANMB1mdVKLpS n+Oz0j8+vPnHR66lCf2Ocs2Pkt6fFf2Rc7cPSW3ZG+3az3XKpgMdCsRpOGqvMU7vQsia 5nWw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=kHyTtVGw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m23-20020aa7d357000000b0046a0331778dsi8273167edr.118.2023.01.09.06.46.44; Mon, 09 Jan 2023 06:47:09 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=kHyTtVGw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231232AbjAIOpo (ORCPT + 99 others); Mon, 9 Jan 2023 09:45:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234615AbjAIOoz (ORCPT ); Mon, 9 Jan 2023 09:44:55 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7408F34D57 for ; Mon, 9 Jan 2023 06:44:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=nDAiETVpEvUgb7mqS6Y9TlEIy67mC7r1XqqTtdFTtiY=; b=kHyTtVGwbnVzhzXBtMOs71gktY Ie73QRlCKbRBdTSjXoGo/ArajaRk41KPu+1YdmWbhgvc2qKOFPK3gQsrtSiqOq1cgPsTp4WZmJO+4 0qcBRxvxrKMYIFzdGx6gGfLUUWZ/VHDF31/5SBXqVADhdo2hxhQmfl3CNbOkWWSn9PZ7QQR2hwamb 6AP2zQ3IHyOs7SBrkeEms8rtNK1ot7SfTdo2gaYYKAzEH6YviSli630lSGSoOaQlohu2svXmQN141 reDGPodRElCD2SUYzfrqxPWeOJVzTOJZ/NnrOCoq8D8DKiSRZzHoGbNAoHMAUC4lCYx8WMhunx3lb yDsf57Yg==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNm-003TyM-TO; Mon, 09 Jan 2023 15:44:15 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 10/18] drm/amd/display: update lut3d and shaper lut to stream Date: Mon, 9 Jan 2023 13:38:38 -0100 Message-Id: <20230109143846.1966301-11-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556666228627732?= X-GMAIL-MSGID: =?utf-8?q?1754556666228627732?= It follows the same path of out_transfer_func for stream updates, since shaper LUT and 3D LUT is programmed in funcs.set_output_transfer_func() and this function is called in the atomic commit_tail when update_flags.bits.out_tf is set. Signed-off-by: Melissa Wen --- drivers/gpu/drm/amd/display/dc/core/dc.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 2c18c8527079..88f1130c3b83 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -2562,7 +2562,7 @@ static enum surface_update_type check_update_surfaces_for_stream( stream_update->integer_scaling_update) su_flags->bits.scaling = 1; - if (stream_update->out_transfer_func) + if (stream_update->out_transfer_func || stream_update->lut3d_func) su_flags->bits.out_tf = 1; if (stream_update->abm_level) @@ -2911,6 +2911,14 @@ static void copy_stream_update_to_stream(struct dc *dc, sizeof(struct dc_transfer_func_distributed_points)); } + if (update->func_shaper && + stream->func_shaper != update->func_shaper) + stream->func_shaper = update->func_shaper; + + if (update->lut3d_func && + stream->lut3d_func != update->lut3d_func) + stream->lut3d_func = update->lut3d_func; + if (update->hdr_static_metadata) stream->hdr_static_metadata = *update->hdr_static_metadata; From patchwork Mon Jan 9 14:38:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40897 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2195951wrt; Mon, 9 Jan 2023 06:47:02 -0800 (PST) X-Google-Smtp-Source: AMrXdXsYbkLmPUs/XWYDc50YtIHsg2y2OHD5KMFVE6lo+jyZVrEVw9f7SJDi9w5O9D7odMxoh7Ax X-Received: by 2002:a05:6402:448e:b0:48e:8971:d28e with SMTP id er14-20020a056402448e00b0048e8971d28emr30994837edb.15.1673275622695; Mon, 09 Jan 2023 06:47:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275622; cv=none; d=google.com; s=arc-20160816; b=sK0MiQ+EqT57mNOqrMqz1rbnSQYepD1Z28NxK0A9/l2VTUS+tUmKrFP3fQmUwcEYwd IV8rO4Fjtpn9VMrppqnMyEDCen3ibW7U6aYV4Hu7WNUjQEsEOFL6LKvungFRt5EbqKGN 4mniBzoGvGPRFlnrOfUNXtXKc2UGZPulxRxSMQ6E71gZpK9wQRP8QBFdDe+b97Z/JlG6 4hP4y3vmyRAc47C7OhthORlFRqNCDx62gwd8b55Odwdgz2tT/x/jSdCJeysvtTQxWWi0 HwedrtUbypAfgYmUPpIyvZOdXVWE+SRaOHr3fPLbKo/bzgTb+JuoUMelJPODhd8WVpE2 CeDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JvdJXnslHHYsgYx1+6dyB2NO+WCy/ybpW/Ce1OI2Y1Y=; b=IPh+84TNueNmfPWNvNFiHGM7V0G7bet6lROotusjmcGmOWEFyNu7f+8golwIvcNB8q Xy6NC6E9qpc4FKw15wXIG20uYRNr2zTxSxbGHyK6pIkeQFmRm6Hg4l+7WyDqSd253b5d EmGYL95tHcmQyQw3m+WcYvUqL0MlLfP/LueSznlW+Mqawro6UcX5CyA5eBPTA2tfYNel SN6anTwHEfw5ji3EKeAO41z+5czPIxEH1XoUNS2CGIpA956CxPss7EXynwSEnueOSUqo VTXbqlaF8WEWlGqK5+1beCkN0g9r42Aj1eorJElJ3V1LgIVQ9k986txsHFSmzB2FyO9Q YeUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="oFeG4//h"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hj1-20020a1709069fc100b007c179af6e06si9428354ejc.955.2023.01.09.06.46.38; Mon, 09 Jan 2023 06:47:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="oFeG4//h"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231827AbjAIOpe (ORCPT + 99 others); Mon, 9 Jan 2023 09:45:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234441AbjAIOol (ORCPT ); Mon, 9 Jan 2023 09:44:41 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F025934D53 for ; Mon, 9 Jan 2023 06:44:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=JvdJXnslHHYsgYx1+6dyB2NO+WCy/ybpW/Ce1OI2Y1Y=; b=oFeG4//hpK2jBA7q7YDjh9O3MP MrTl+XG5rT7dFkVcuflFVAxGYcHkBStWwZEn1I+g1hKW44inrZscTIF89dliIBAmFAp9Yht9FBzCZ yK0OGg9D8EjtcmRb9ofCB3z12mqk7T8cVO645dW7vr8E886R+/0VMdLhkJ5S94PrlFBXVwTkBiX46 +FjtlTsZze7KVLJivFkCIIzlqKFebegFw6to/HBPRPCFveVo1kTYCqXTDjyWFZ0yeD8m/h22MWLvq If3wd1EvsviA/NSTlQhIkXMQXfoKVzQ+BqM/+nYHaaqXPUX6snH1qwqjaOF55XJbpJYqQxwTkbG68 Ka8ZgSmg==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNp-003TyM-JJ; Mon, 09 Jan 2023 15:44:17 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 11/18] drm/amd/display: handle MPC 3D LUT resources for a given context Date: Mon, 9 Jan 2023 13:38:39 -0100 Message-Id: <20230109143846.1966301-12-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556659466444673?= X-GMAIL-MSGID: =?utf-8?q?1754556659466444673?= In the original dc_acquire_release_mpc_3dlut(), only current ctx is considered, which doesn't fit the steps for atomic checking new ctx. Therefore, create a function to handle 3D LUT resource for a given context, so that we can check resources availability in atomic_check time and handle failures properly. Signed-off-by: Melissa Wen --- drivers/gpu/drm/amd/display/dc/core/dc.c | 39 ++++++++++++++++++++++++ drivers/gpu/drm/amd/display/dc/dc.h | 8 +++++ 2 files changed, 47 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 88f1130c3b83..76270d21286a 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -2085,6 +2085,45 @@ bool dc_acquire_release_mpc_3dlut( return ret; } +bool +dc_acquire_release_mpc_3dlut_for_ctx(struct dc *dc, + bool acquire, + struct dc_state *state, + struct dc_stream_state *stream, + struct dc_3dlut **lut, + struct dc_transfer_func **shaper) +{ + int pipe_idx; + bool ret = false; + bool found_pipe_idx = false; + const struct resource_pool *pool = dc->res_pool; + struct resource_context *res_ctx = &state->res_ctx; + int mpcc_id = 0; + + if (pool && res_ctx) { + if (acquire) { + /*find pipe idx for the given stream*/ + for (pipe_idx = 0; pipe_idx < pool->pipe_count; pipe_idx++) { + if (res_ctx->pipe_ctx[pipe_idx].stream == stream) { + found_pipe_idx = true; + mpcc_id = res_ctx->pipe_ctx[pipe_idx].plane_res.hubp->inst; + break; + } + } + } else + found_pipe_idx = true;/*for release pipe_idx is not required*/ + + if (found_pipe_idx) { + if (acquire && pool->funcs->acquire_post_bldn_3dlut) + ret = pool->funcs->acquire_post_bldn_3dlut(res_ctx, pool, mpcc_id, lut, shaper); + else if (!acquire && pool->funcs->release_post_bldn_3dlut) + ret = pool->funcs->release_post_bldn_3dlut(res_ctx, pool, lut, shaper); + } + } + return ret; +} + + static bool is_flip_pending_in_pipes(struct dc *dc, struct dc_state *context) { int i; diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 72963617553e..a5abf7f308c3 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -1345,6 +1345,14 @@ bool dc_acquire_release_mpc_3dlut( struct dc_3dlut **lut, struct dc_transfer_func **shaper); +bool +dc_acquire_release_mpc_3dlut_for_ctx(struct dc *dc, + bool acquire, + struct dc_state *state, + struct dc_stream_state *stream, + struct dc_3dlut **lut, + struct dc_transfer_func **shaper); + void dc_resource_state_copy_construct( const struct dc_state *src_ctx, struct dc_state *dst_ctx); From patchwork Mon Jan 9 14:38:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40899 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2196069wrt; Mon, 9 Jan 2023 06:47:18 -0800 (PST) X-Google-Smtp-Source: AMrXdXvV5fckZwd3xDzB1BySNAPhad/o1SVu7m7HeoGfRcCm+Hys8dTNmpbgPAtAvEGmKR8sXOZB X-Received: by 2002:a17:906:5042:b0:841:e5b3:c95f with SMTP id e2-20020a170906504200b00841e5b3c95fmr53823721ejk.29.1673275638353; Mon, 09 Jan 2023 06:47:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275638; cv=none; d=google.com; s=arc-20160816; b=BjuIyZ2gL71GWKrAPOIesmU9fEjPj1W/qP7NMSmmd+PZeFdZp68Rk9QfpK1OyPGq63 sF7r1gq59g3RxI19PVjXqD7fPrVp3yTubVDFO3PbO/TLywKNGNL5AXwtHoh/LI97dq83 wbt1jnYFJHIpmlO5cAJa+qrS4iZu2mdo7AUpkJHEL7C7Tql870tO9ofRsK5P/qTrxSIc KIahIMuwmxB4NAWqSDczMIitiJDPmXaoYR/3xRSodZOeH1GwEl/vK2OIGlzGfWmsZ8Ni H+bWIyXVfnS9gXByoGZg7z7oiUmFmaZ4g5/wv9CGbJbLQZ8ZPcTQD7ajnyBWzPg9+k9R Qpng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=cKIgQ2NkBMGH8emqa7YtqDB/L0xQKuwdjNrEqIF3P4M=; b=JeLEqegrzGWKrhY2Bwb1hsmjFY64VBJAKuVysZUEKaU+wZ9Fh2ns3q7ZePrCBLRNPq 2K2H5tylTcpRl2E0qz8P2y0b2Eeb2bEm+dpY1B+8IsOuGAM/B0N4cqtzgqJDaGhC/Fvr dKQZ7ZChWdbSbM414+E88db5C5GmoKbvn9Btlt+Vbj6PlpqehyMPTQthqmezUrnn0KE1 7VHboNOpk+DuQVtiPUZDriD/I6qReBDxhfOWfhaTFDUqDuP+50gFAIJpCxHTxBc50Bku fkcYO3MYs4wCiyKzARk/KF2mIMZHSWPfzl0TaauWZaogXjH61YQotkJtWLuZhmHuWVCB IsOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=KydMXJYo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id sh39-20020a1709076ea700b008361e2a67b2si9374033ejc.0.2023.01.09.06.46.55; Mon, 09 Jan 2023 06:47:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=KydMXJYo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234368AbjAIOpu (ORCPT + 99 others); Mon, 9 Jan 2023 09:45:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234723AbjAIOpG (ORCPT ); Mon, 9 Jan 2023 09:45:06 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09B5B3591C for ; Mon, 9 Jan 2023 06:44:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=cKIgQ2NkBMGH8emqa7YtqDB/L0xQKuwdjNrEqIF3P4M=; b=KydMXJYozSRjwD7sxmrNzx74C+ RMz3tPCTbB6hNYG1aEeMkMGEAJLl8mjAsTqD/ewUWWEN1piHTlumNaX3yKfqdSRmJgnbXep+7GcEL 75jfb/AilU3RnAbKzZNU/oMuaA5lrQmfhR5SInbLz9PhFdwzo5Tsj0kf2kNFDReaIdOAb1/3yk7oo 2Gt3+ixBw9Ju92ttxATxODpwBvQel9wTng+5qq37UpRnFrf7MfzCtJ2VHmlSBl9yGR5I9eksK+H76 o0V9quBXJG6DFp1WArCbriL876r71WmZHe8iLga0rc/QGK1OZjV6zTznB8ffpyc7YQA8yaDIrV28M hU+Er4dQ==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNs-003TyM-8H; Mon, 09 Jan 2023 15:44:20 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 12/18] drm/amd/display: acquire/release 3D LUT resources for ctx on DCN301 Date: Mon, 9 Jan 2023 13:38:40 -0100 Message-Id: <20230109143846.1966301-13-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556675782110069?= X-GMAIL-MSGID: =?utf-8?q?1754556675782110069?= Acquire and release 3D LUT and shaper LUT every time we create/remove a new ctx and add/remove stream to/from it. 3D LUT acquire/release can fail and therefore we should check its availability during atomic check considering the new context created not the current one. Signed-off-by: Melissa Wen --- .../amd/display/dc/dcn301/dcn301_resource.c | 47 ++++++++++++++++++- 1 file changed, 45 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c index ee62ae3eb98f..5bae0972bd5e 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c @@ -1260,6 +1260,49 @@ static struct display_stream_compressor *dcn301_dsc_create( return &dsc->base; } +static enum dc_status +dcn301_add_stream_to_ctx(struct dc *dc, + struct dc_state *new_ctx, + struct dc_stream_state *dc_stream) +{ + enum dc_status result = DC_ERROR_UNEXPECTED; + struct dc_3dlut *lut3d_func_new = NULL; + struct dc_transfer_func *func_shaper_new = NULL; + + result = dcn20_add_stream_to_ctx(dc, new_ctx, dc_stream); + if (result != DC_OK) + return result; + + if (!dc_acquire_release_mpc_3dlut_for_ctx(dc, true, new_ctx, dc_stream, + &lut3d_func_new, &func_shaper_new)) + return DC_ERROR_UNEXPECTED; + + dc_stream->lut3d_func = lut3d_func_new; + dc_stream->func_shaper = func_shaper_new; + + return DC_OK; +} + +static enum dc_status +dcn301_remove_stream_from_ctx(struct dc *dc, + struct dc_state *new_ctx, + struct dc_stream_state *dc_stream) +{ + struct dc_3dlut *lut3d_func; + struct dc_transfer_func *func_shaper; + + lut3d_func = (struct dc_3dlut *)dc_stream->lut3d_func; + func_shaper = (struct dc_transfer_func *)dc_stream->func_shaper; + + if (!dc_acquire_release_mpc_3dlut_for_ctx(dc, false, new_ctx, dc_stream, + &lut3d_func, &func_shaper)) + return DC_ERROR_UNEXPECTED; + + dc_stream->lut3d_func = lut3d_func; + dc_stream->func_shaper = func_shaper; + + return dcn20_remove_stream_from_ctx(dc, new_ctx, dc_stream); +} static void dcn301_destroy_resource_pool(struct resource_pool **pool) { @@ -1406,9 +1449,9 @@ static struct resource_funcs dcn301_res_pool_funcs = { .update_soc_for_wm_a = dcn30_update_soc_for_wm_a, .populate_dml_pipes = dcn30_populate_dml_pipes_from_context, .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer, - .add_stream_to_ctx = dcn30_add_stream_to_ctx, + .add_stream_to_ctx = dcn301_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, - .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, + .remove_stream_from_ctx = dcn301_remove_stream_from_ctx, .populate_dml_writeback_from_context = dcn30_populate_dml_writeback_from_context, .set_mcif_arb_params = dcn30_set_mcif_arb_params, .find_first_free_match_stream_enc_for_link = dcn10_find_first_free_match_stream_enc_for_link, From patchwork Mon Jan 9 14:38:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40905 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2196681wrt; Mon, 9 Jan 2023 06:48:34 -0800 (PST) X-Google-Smtp-Source: AMrXdXsVMwtMdEMSGcBWzFLGPp/W8xJsicmADk1XcFNwsUAx8yX4IaQV66rn+thkJqKt1OawaXtL X-Received: by 2002:a17:906:850c:b0:7c1:9020:72a9 with SMTP id i12-20020a170906850c00b007c1902072a9mr52167262ejx.43.1673275714504; Mon, 09 Jan 2023 06:48:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275714; cv=none; d=google.com; s=arc-20160816; b=erVX9d4FIlI+OyOld/FVwxXRt5aPLROcx+Eh3g/v+/8i4Kw02VdxqCm9UHw9CBCdBI NxXvxJV3zkyAFVYLa5AWV2fnW8C3B3zDs4s9aWvs4RZgfhTXvCgLQst7aeOkQ5BNJeYv Aq7y8EIfmtbf0Uj3aya3+fX9W/cTYR94+RXzw3OFLlxFC3RpDmgIDhcPhl9D4gyMJJem zllEZgfMeZUbUGSv4oIu3GBmWL6jWY4ZgYVbbXNLTKoOpcDiE2pTsb4fQ0usLDvWwLAM G8F2KLUjlpWYcSagVj5/a/qLB1wNbDF5giibSW/bvmjta8oSXEUI6xwy2iPgPB9S9eMP oBag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=cUoeBdofxkXT9xFOFSawmIrJOWQdaUxVUBcCykFvQKk=; b=dJasCxZ4rAS0TJErdOAOraJGy+kl5N6PUI6xD28++KWeb22+srzTKMoItivN4WDpHc W4D5/4GhApmftOgsEYFnqbkte/FQPyi4aQGv3wlxUe67mX5+jF8azAUUHLOU/i1Xocx5 5E7IWt1XE+hWmoDD5we/gPLuZnGDHuFB7Mj+fYgO9Uy+o5DfDxWWlMYUEOQHYoQ4ny7v 5W8L3RZIkMrKJlJmW//GKhYirt3wVBazOR/+/wvOad/SID62WeQIYYn7Pwx4ruUn7dyA 313Wxo5sDBPJuTZ+gQhDLH9A0owrsbKK9jXwSAdgFiKPhz+iErmBh5oOFKKi+YqYEBRk jVVg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=PbpZ4nD0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id xi3-20020a170906dac300b0084c3a089f39si10139142ejb.350.2023.01.09.06.48.10; Mon, 09 Jan 2023 06:48:34 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=PbpZ4nD0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234464AbjAIOpy (ORCPT + 99 others); Mon, 9 Jan 2023 09:45:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233491AbjAIOpL (ORCPT ); Mon, 9 Jan 2023 09:45:11 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2E383591D for ; Mon, 9 Jan 2023 06:44:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=cUoeBdofxkXT9xFOFSawmIrJOWQdaUxVUBcCykFvQKk=; b=PbpZ4nD0OTMS3q3O0nQsr54b3O GqC9EJeBrL8zeqDYc6S74QTyTMFncpixOmXOs+QL71atJRURwswLPZ3rkffhW6th+uJefkjfvPauc nzuvo9Znfu+d/uybFmKXDkwG/qlQyv7pjEyyc8DkWC4ZskaIJcJXw4RhL22kho7U5aLcyAKSFPfJh sG3B/0blpbXjNxJNmFQcyr8tcpLhsmjRCCCdYZbeg/3fYR+/yvOav9W9rDFj9qeH2xM1kFeR1D0WL P6SRgKAIY2xPlKhUlPK/kcdRGw9L2IQIxHbL7micTwx9852i3bEHw8AHXVl0K5pDyU3gpqL3aqcNp s+1cN9Tg==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNu-003TyM-OC; Mon, 09 Jan 2023 15:44:22 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 13/18] drm/amd/display: Define 3D LUT struct for HDR planes Date: Mon, 9 Jan 2023 13:38:41 -0100 Message-Id: <20230109143846.1966301-14-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556755516497038?= X-GMAIL-MSGID: =?utf-8?q?1754556755516497038?= From: Alex Hung Add a 3D LUT mode supported by amdgpu driver. Note: A patchset "IGT tests for pre-blending 3D LUT interfaces" for this proposal is sent to IGT mailing list. Signed-off-by: Alex Hung --- .../gpu/drm/amd/display/modules/color/color_gamma.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/amd/display/modules/color/color_gamma.h b/drivers/gpu/drm/amd/display/modules/color/color_gamma.h index 2893abf48208..8e159b1eb9c6 100644 --- a/drivers/gpu/drm/amd/display/modules/color/color_gamma.h +++ b/drivers/gpu/drm/amd/display/modules/color/color_gamma.h @@ -27,6 +27,7 @@ #define COLOR_MOD_COLOR_GAMMA_H_ #include "color_table.h" +#include struct dc_transfer_func; struct dc_gamma; @@ -35,6 +36,17 @@ struct dc_rgb_fixed; struct dc_color_caps; enum dc_transfer_func_predefined; +/* + * 3D LUT mode for 17x17x17 LUT and 12 bits of color depth + */ +static const struct drm_mode_lut3d_mode lut3d_mode_17_12bit = { + .lut_size = 17, + .lut_stride = {17, 17, 18}, + .bit_depth = 12, + .color_format = DRM_FORMAT_XRGB16161616, + .flags = 0, +}; + /* For SetRegamma ADL interface support * Must match escape type */ From patchwork Mon Jan 9 14:38:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40906 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2196857wrt; Mon, 9 Jan 2023 06:49:03 -0800 (PST) X-Google-Smtp-Source: AMrXdXteq83EXDDzdSkVdJoRPAIlW9xiZ+QLM3+LYctQ0yPZGDl4/YVojds2f65h1ZRisHZ0Tpke X-Received: by 2002:a62:f246:0:b0:581:bc9:8b49 with SMTP id y6-20020a62f246000000b005810bc98b49mr52342220pfl.11.1673275743225; Mon, 09 Jan 2023 06:49:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275743; cv=none; d=google.com; s=arc-20160816; b=iCyCKqBJ/LQPGUx4M7XmlxIVBArT6FYXkTYJ863ZBaqAJdAySYRpjfwy4VfTOI4b2R DNEPhcwAImMrhMKytyGl8spHAoNzv97k18d3rX/yTkkFcXU+QqSRwMxGZbFlhiNy5/sz d/sA+uJz9Wysnufxoi8+e8pu+gUXyOgwdlTSnxtzSMD4QxQHbnokqQLsnlW8q9wC1rwq XA6TKgE6GGBHb3sSVnX2mIt6j88yP/Zi3ibHwe8jztwHGNEzh2ygqxs6PpbQ1ni6mgTs nHr2EOr3wBlOQtek4ddeUWoU8m296DVV3ngD7IJEzz/q9Q1f497ukQKpsAqQaALEhDur V1sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=TnpDW0+fbBbPza9wMiMd8HlnPnuskPiG6Rgbq1iBi8g=; b=JEUq+kWfC9dp6wLncIK3NT0n20Rhtf0W/rJ9ctrCKAZPOLhNrg2LvyOH3WRkA03JBF SPUCMRzJ25dV8o1uQW2261UcxmtS3+HJV2Gp2b1gslYa77ivZ9Ld1cs7MgSQ5BOdvA/y B6MLkKIbIrsVd8JQX3g9TLklW2CBqMZcSp8MD5p6Bp/yDJ7T29+dsZkzcAatQw8VnpOs EfjG19VbUzqYSWMvH7VcTrGpL/jzAqt24j4CouURFxcnnbXjpGOo2VfY/7Hh4uJQEGOO w90FWjE4QXLtFEBEF5KA6dVGP34FH03klDEk/PTJbn75H1R2+lbwfXgT8Mjpa5Jdxmk5 nJiw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=TWlBIDGP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id cn15-20020a056a00340f00b0057349f5fa8asi9070630pfb.112.2023.01.09.06.48.49; Mon, 09 Jan 2023 06:49:03 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=TWlBIDGP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232753AbjAIOqG (ORCPT + 99 others); Mon, 9 Jan 2023 09:46:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232742AbjAIOpW (ORCPT ); Mon, 9 Jan 2023 09:45:22 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3369338AFB for ; Mon, 9 Jan 2023 06:44:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=TnpDW0+fbBbPza9wMiMd8HlnPnuskPiG6Rgbq1iBi8g=; b=TWlBIDGPLku7ghz50n9qdn+SRR rSsoJ5irFxQwjH15eFYk2IYJNrqpRurnCYXnxw8WGxnaWVqs7UDlgQyYIBvLG24rYFugu5wijcoZv D0f6aZZUucwt2K6Z8czdhtetq5QjYHLt51W5IrZuwDpY0zWIa8YnszsUXY/aF8qtWcguCFcJ+L14a X89hvd3/m7fir50TxzHQv1WUOJfvo4JiUrZMeQt9uNvQf6xeUrKn9r+fuIGn43F4m6BQRYWY1LPoa 45WaPqH8IRnEpNo9jpedCoIFIWWrEiWODP/gUFrutpPMPqb06Dt/vkFD/F0gu1cjz6kCdboGFe/fX xiBK5j1w==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtNx-003TyM-HA; Mon, 09 Jan 2023 15:44:25 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 14/18] drm/amd/display: expand array of supported 3D LUT modes Date: Mon, 9 Jan 2023 13:38:42 -0100 Message-Id: <20230109143846.1966301-15-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556785289321178?= X-GMAIL-MSGID: =?utf-8?q?1754556785289321178?= AMD MPC block support 3D LUTs of dimensions 17 and 9, and also bit depth 12 and 10, therefore, advertise them to the userspace. Signed-off-by: Melissa Wen --- .../amd/display/modules/color/color_gamma.h | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/amd/display/modules/color/color_gamma.h b/drivers/gpu/drm/amd/display/modules/color/color_gamma.h index 8e159b1eb9c6..69b9a1aa6dd4 100644 --- a/drivers/gpu/drm/amd/display/modules/color/color_gamma.h +++ b/drivers/gpu/drm/amd/display/modules/color/color_gamma.h @@ -47,6 +47,37 @@ static const struct drm_mode_lut3d_mode lut3d_mode_17_12bit = { .flags = 0, }; +static const struct drm_mode_lut3d_mode amdgpu_lut3d_modes[] = { + { + .lut_size = 17, + .lut_stride = {17, 17, 18}, + .bit_depth = 12, + .color_format = DRM_FORMAT_XRGB16161616, + .flags = 0, + }, + { + .lut_size = 17, + .lut_stride = {17, 17, 18}, + .bit_depth = 10, + .color_format = DRM_FORMAT_XRGB16161616, + .flags = 0, + }, + { + .lut_size = 9, + .lut_stride = {9, 9, 10}, + .bit_depth = 12, + .color_format = DRM_FORMAT_XRGB16161616, + .flags = 0, + }, + { + .lut_size = 9, + .lut_stride = {9, 9, 10}, + .bit_depth = 10, + .color_format = DRM_FORMAT_XRGB16161616, + .flags = 0, + }, +}; + /* For SetRegamma ADL interface support * Must match escape type */ From patchwork Mon Jan 9 14:38:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40907 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2197005wrt; Mon, 9 Jan 2023 06:49:20 -0800 (PST) X-Google-Smtp-Source: AMrXdXvM70oioJBrKEuH5UYFDoTkM5oHknDutWOwCtzBQwQhqR/B8VuBw0Y6RrVwVxsfxv+FvZYO X-Received: by 2002:aa7:8a45:0:b0:586:ad46:ed6c with SMTP id n5-20020aa78a45000000b00586ad46ed6cmr7363010pfa.22.1673275760040; Mon, 09 Jan 2023 06:49:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275760; cv=none; d=google.com; s=arc-20160816; b=y/c4u18ot2rbruPM3lnQI36fyxvvl3QotqvJHLpFAYNO64/ybu/l0zjpsv65OZahJw 5iZ61y3DFoZvLm/KYwVOWu44IAbfV846KlDvND241VOpdP5qylFlq+d6PDvZKx8gyc/E WvNGCDL/17vR+OUrGQhh7uq3oWrD1LfVK89dsyj2pxk6opl4p9Vyo1zuRNr5ItvnN6m1 sPDVr5LzrKHOtH/7titBQOIgAiTv5YzCWMMvUmhJZWl/03teRNJDeU3Xb/a4xjg6lVzK CEjgpPp2McUlAL4KRRtkEW/q+LAzpZdKPQdKCkqkotPkI8gU5+mOyBRUwFGVeLoH4KNh PGTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ZCptQBuswI/6532/AawbFb3j3pOVVg8UESVSw9Oz040=; b=AJDsUzkDprFlvyZ2u7u8syuI7Y0OIPIXsGA30CcR4ZO8n7pqbpQmlzVUTaGXAp8w7Y kY18RUDZZm0B9amTG6SWA7J9EegWGVpXdxG6UH627eUXLgCE8eUOnNSydWkxEvT9Z/Fo Rue72cp+FDCLZ/FklyCrpJjyejY4UpNV+hSCF8UTaB94v5BbqYTnBCbiSNdKmWlxhiuZ kNPBXCd8SS1NLFZH8FDQ7pv94CwfSmcl9VdaEIhmJccttWI3b1gawjWaG35sa73G1p13 RLLVHfDBU7kFQlidZioV5iLwYPHSE43P0mquWuLLei4Emr6FnFKe77SCTVG+qH2RiAw7 SXsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=SDt7HTph; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Mon, 09 Jan 2023 15:44:28 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 15/18] drm/amd/display: enable 3D-LUT DRM properties if supported Date: Mon, 9 Jan 2023 13:38:43 -0100 Message-Id: <20230109143846.1966301-16-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754556803121561778?= X-GMAIL-MSGID: =?utf-8?q?1754556803121561778?= Enable DRM crtc properties related to 3D LUT resources (shaper LUT, 3D LUT and 3D LUT modes) if it's supported by DCN HW, that means DCN families 3.0+ Signed-off-by: Melissa Wen --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 + .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 25 +++++++++++++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 2 ++ 3 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index abbbb3813c1e..6f04719d0c1f 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -786,6 +786,7 @@ void amdgpu_dm_trigger_timing_sync(struct drm_device *dev); void amdgpu_dm_init_color_mod(void); int amdgpu_dm_verify_lut_sizes(const struct drm_crtc_state *crtc_state); +void amdgpu_dm_enable_lut3d_prop(struct amdgpu_display_manager *dm, struct drm_crtc *crtc); int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc); int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc, struct dc_plane_state *dc_plane_state); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 54d95745f0f0..c547957acd73 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -388,6 +388,31 @@ int amdgpu_dm_verify_lut_sizes(const struct drm_crtc_state *crtc_state) return 0; } +static bool has_mpc_lut3d_caps(struct amdgpu_display_manager *dm) +{ + return dm->dc->caps.color.mpc.num_3dluts ? true : false; +} + +/** + * amdgpu_dm_enable_lut3d_prop - enable 3D LUT DRM props if HW supports + * @crtc: DRM crtc + * @dm: amdgpu display manager + */ +void amdgpu_dm_enable_lut3d_prop(struct amdgpu_display_manager *dm, struct drm_crtc *crtc) +{ + int res; + + if (!has_mpc_lut3d_caps(dm)) + return; + + res = drm_crtc_create_lut3d_mode_property(crtc, amdgpu_lut3d_modes, + ARRAY_SIZE(amdgpu_lut3d_modes)); + if (res) + drm_dbg(crtc->dev, "CRTC init: Failed to create LUT 3D mode properties\n"); + + drm_crtc_enable_lut3d(crtc, MAX_COLOR_LUT_ENTRIES, true); +} + /** * amdgpu_dm_update_crtc_color_mgmt: Maps DRM color management to DC stream. * @crtc: amdgpu_dm crtc state diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c index 22125daf9dcf..96494f72a6f4 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c @@ -461,6 +461,8 @@ int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm, drm_crtc_enable_color_mgmt(&acrtc->base, is_dcn ? MAX_COLOR_LUT_ENTRIES : 0, true, MAX_COLOR_LUT_ENTRIES); + amdgpu_dm_enable_lut3d_prop(dm, &acrtc->base); + drm_mode_crtc_set_gamma_size(&acrtc->base, MAX_COLOR_LEGACY_LUT_ENTRIES); return 0; From patchwork Mon Jan 9 14:38:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40912 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2207756wrt; Mon, 9 Jan 2023 07:08:42 -0800 (PST) X-Google-Smtp-Source: AMrXdXtwizSNYQZZ9RwZWw16x70KO/7pxzBlIVF+0DUd4fd+PpGOxFlZdAkcD2N53T+n8akWD6Qw X-Received: by 2002:a05:6a20:4b25:b0:a4:fa9d:d2ee with SMTP id fp37-20020a056a204b2500b000a4fa9dd2eemr87229206pzb.46.1673276921686; Mon, 09 Jan 2023 07:08:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673276921; cv=none; d=google.com; s=arc-20160816; b=NeLlqWOkskMzhBN5R+z4AhnsW1ENwCmWbPu4dXDUqjepqWn1lx8Wryxhghjkxtzxl7 BZEBqm3WQHscgzuKQehV5kGw1RTTqCHevmaVy93koefQEmbEQPi6YwZVgv/f04gRBA2Q khCytlJlaJI92Ssyij/L61y0g8sZsTD8SPy9bVa67lm6HksIXxvF7O8j6osY7qOoTccn F7etjWhh3m/tXLqp4yCGoFGF3DjSqO6Z8K9ZGnD8ww3IrsyObM0VAQIC0Wsr3uhcB0wC wQOTRdnERm5Ev4zUk8RnmfJg+VYEiFSo0/QfKfIYE4l1K13XfL89LB6Vkl5VT6ZonbsA uvYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=HeVvASVwSPvTBBOKCtKle28VHGRGJ5Bf1epIXUPS7F8=; b=H9h9pTUpLc4tqfPT2UzZqzn51e8DLH9iPhtkJPKDXYvRYw+dVHEauPMrORNeI70SMX bbGhDaWOMiccuYnUopbg3VPmsHi0ng0ZxMxEt1XIyaK37c9xMxI80ez6T6pNjcPNaLTy xxbfigu6owCtC4ojB3PDcQURVQizNpm85J/Drt/pEDtUrchsjU6Txia0zsRnKoBa6FSr V7/1DQM6/jkhrrwBvLGpimSLaOoLaLZHnco7XhRb9QQK2sxMDlouz9xk041Xl+tdQMhE o6yxnvpa6mBIaieibqPG26tDKAE3tnQDO1Ihs8Vu2CdnM6HFfZXdpfYSj/NVLZANJw4n 91kQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=GybGvlWq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h63-20020a638342000000b004b3bad0c227si2801803pge.195.2023.01.09.07.08.25; Mon, 09 Jan 2023 07:08:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=GybGvlWq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233499AbjAIOqi (ORCPT + 99 others); Mon, 9 Jan 2023 09:46:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234750AbjAIOqA (ORCPT ); Mon, 9 Jan 2023 09:46:00 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C30EB3C0EB for ; Mon, 9 Jan 2023 06:44:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=HeVvASVwSPvTBBOKCtKle28VHGRGJ5Bf1epIXUPS7F8=; b=GybGvlWqfm6ovfBUhiN4m7QaBC yHuX0i7B2fggXdbV1+pVjWEQsWb0TktWrKmzjra1hUFrJDs6eE96WES99JfRnWQCl0F+/KCwwq2j7 GKD5aBqcho/K+4Cxd83yHeqoVDtDIbydeZypcMhT3c/ymRGzJZ1K2ClwagI4jkb3Pf/M2n5jUY+wT E+iA9/x7RF/TX476mmK/Ft7sWH6Py8Bm/fsryd3cuVCnn5B2j6rV7eRDnHU7+XS69DTn7lumiTuey aO8Vz4vjJo5/GoCb3RVfI7LGvg6JwzELF1C7NzoylJysyMxyF+ZkQtuhrlQCWCCj0FjQS2D9Kv7NB Zm3+bUUw==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtO4-003TyM-6y; Mon, 09 Jan 2023 15:44:32 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 16/18] drm/amd/display: add user 3D LUT support to the amdgpu_dm color pipeline Date: Mon, 9 Jan 2023 13:38:44 -0100 Message-Id: <20230109143846.1966301-17-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754558021275118348?= X-GMAIL-MSGID: =?utf-8?q?1754558021275118348?= Map DRM 3D LUT in the atomic color mgmt pipeline to DC. 3D LUT works better in a non-linear color space, therefore using a degamma to linearize the input space may produce unexpected results. The next patch introduces shaper LUT support that can be used to delinearize the color space before applying 3D LUT conversion. Note that there is no implicit sRGB degamma/regamma in the current implementation for DRM atomic color mgmt. Atomic degamma/regamma 1D LUT is applied considering a linear base. For reference, see IGT test amdgpu/amd_color and commit cf020d49b3c4 ("drm/amd/display: Rework CRTC color management") dc_acquire_release_mpc_3dlut initializes the bits required to program 3DLUT in DC MPC hw block, that is applied by set_output_transfer_func(). I still need to double check the timing to acquire and release shaper and 3D LUTs from the resource pool. Signed-off-by: Melissa Wen --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 + .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 + .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 189 ++++++++++++++++++ 3 files changed, 197 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index b8638f0508b0..7aa41dd2143b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -9704,6 +9704,12 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, goto fail; } + ret = amdgpu_dm_verify_lut3d_size(adev, new_crtc_state); + if (ret) { + DRM_DEBUG_DRIVER("amdgpu_dm_verify_lut_sizes() failed\n"); + goto fail; + } + if (!new_crtc_state->enable) continue; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index 6f04719d0c1f..59ab1b8f7b05 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -786,6 +786,8 @@ void amdgpu_dm_trigger_timing_sync(struct drm_device *dev); void amdgpu_dm_init_color_mod(void); int amdgpu_dm_verify_lut_sizes(const struct drm_crtc_state *crtc_state); +int amdgpu_dm_verify_lut3d_size(struct amdgpu_device *adev, + const struct drm_crtc_state *crtc_state); void amdgpu_dm_enable_lut3d_prop(struct amdgpu_display_manager *dm, struct drm_crtc *crtc); int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc); int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc, diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index c547957acd73..0fb1244c8aef 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -413,6 +413,175 @@ void amdgpu_dm_enable_lut3d_prop(struct amdgpu_display_manager *dm, struct drm_c drm_crtc_enable_lut3d(crtc, MAX_COLOR_LUT_ENTRIES, true); } +static void __to_dc_lut3d_color(struct dc_rgb *rgb, + const struct drm_color_lut lut, + int bit_precision) +{ + rgb->red = drm_color_lut_extract(lut.red, bit_precision); + rgb->green = drm_color_lut_extract(lut.green, bit_precision); + rgb->blue = drm_color_lut_extract(lut.blue, bit_precision); +} + +static void __drm_3dlut_to_dc_3dlut(const struct drm_color_lut *lut, + uint32_t lut3d_size, + struct tetrahedral_params *params, + bool use_tetrahedral_9, + int bit_depth) +{ + struct dc_rgb *lut0; + struct dc_rgb *lut1; + struct dc_rgb *lut2; + struct dc_rgb *lut3; + int lut_i, i; + + + if (use_tetrahedral_9) { + lut0 = params->tetrahedral_9.lut0; + lut1 = params->tetrahedral_9.lut1; + lut2 = params->tetrahedral_9.lut2; + lut3 = params->tetrahedral_9.lut3; + } else { + lut0 = params->tetrahedral_17.lut0; + lut1 = params->tetrahedral_17.lut1; + lut2 = params->tetrahedral_17.lut2; + lut3 = params->tetrahedral_17.lut3; + } + + for (lut_i = 0, i = 0; i < lut3d_size - 4; lut_i++, i += 4) { + /* We should consider the 3dlut RGB values are distributed + * along four arrays lut0-3 where the first sizes 1229 and the + * other 1228. The bit depth supported for 3dlut channel is + * 12-bit, but DC also supports 10-bit. + * + * TODO: improve color pipeline API to enable the userspace set + * bit depth and 3D LUT size/stride, as specified by VA-API. + */ + __to_dc_lut3d_color(&lut0[lut_i], lut[i], bit_depth); + __to_dc_lut3d_color(&lut1[lut_i], lut[i + 1], bit_depth); + __to_dc_lut3d_color(&lut2[lut_i], lut[i + 2], bit_depth); + __to_dc_lut3d_color(&lut3[lut_i], lut[i + 3], bit_depth); + } + /* lut0 has 1229 points (lut_size/4 + 1) */ + __to_dc_lut3d_color(&lut0[lut_i], lut[i], bit_depth); +} + +/* amdgpu_dm_atomic_lut3d - set DRM 3D LUT to DC stream + * @stream: DC stream state to set shaper LUT and 3D LUT + * @drm_lut3d: DRM CRTC (user) 3D LUT + * @drm_lut3d_size: size of 3D LUT + * @lut3d: DC 3D LUT + * + * Map DRM CRTC 3D LUT to DC 3D LUT and all necessary bits to program it + * on DCN MPC accordingly. + */ +static void amdgpu_dm_atomic_lut3d(struct dc_stream_state *stream, + const struct drm_color_lut *drm_lut, + uint32_t drm_lut3d_size, + const struct drm_mode_lut3d_mode *mode, + struct dc_3dlut *lut) +{ + int size = mode->lut_size * mode->lut_size * mode->lut_size; + + ASSERT(lut && drm_lut3d_size == size); + + /* Stride and bit depth is not programmable by API so far. Therefore, + * only supports 17x17x17 3D LUT with 12-bit. + */ + lut->lut_3d.use_tetrahedral_9 = mode->lut_size == 9; + lut->lut_3d.use_12bits = mode->bit_depth == 12; + lut->state.bits.initialized = 1; + + __drm_3dlut_to_dc_3dlut(drm_lut, size, &lut->lut_3d, + lut->lut_3d.use_tetrahedral_9, mode->bit_depth); + + stream->lut3d_func = lut; +} + +/* amdgpu_dm_atomic_shaper_lut3d - set DRM CRTC shaper LUT and 3D LUT to DC + * interface + * @dc: Display Core control structure + * @stream: DC stream state to set shaper LUT and 3D LUT + * @drm_lut3d: DRM CRTC (user) 3D LUT + * @drm_lut3d_size: size of 3D LUT + * + * Returns: + * 0 on success. + */ +static int amdgpu_dm_atomic_shaper_lut3d(struct dc *dc, + struct dc_stream_state *stream, + const struct drm_color_lut *drm_lut3d, + uint32_t drm_lut3d_size, + const struct drm_mode_lut3d_mode *mode) +{ + struct dc_3dlut *lut3d_func_new; + struct dc_transfer_func *func_shaper_new; + + lut3d_func_new = (struct dc_3dlut *) stream->lut3d_func; + func_shaper_new = (struct dc_transfer_func *) stream->func_shaper; + + /* We don't get DRM shaper LUT yet. We assume the input color space is + * already delinearized, so we don't need a shaper LUT and we can just + * BYPASS. + */ + func_shaper_new->type = TF_TYPE_BYPASS; + func_shaper_new->tf = TRANSFER_FUNCTION_LINEAR; + stream->func_shaper = func_shaper_new; + + amdgpu_dm_atomic_lut3d(stream, drm_lut3d, drm_lut3d_size, + mode, lut3d_func_new); + + return 0; +} + +static const struct drm_mode_lut3d_mode * +get_lut3d_mode(struct amdgpu_device *adev, + const struct drm_crtc_state *crtc_state) +{ + struct drm_property_blob *blob; + + if (!has_mpc_lut3d_caps(&adev->dm)) + return NULL; + + blob = drm_property_lookup_blob(crtc_state->state->dev, + crtc_state->lut3d_mode); + + return blob ? (const struct drm_mode_lut3d_mode *)blob->data : NULL; +} + +/** + * amdgpu_dm_verify_lut3d_size - verifies if 3D LUT is supported and if DRM 3D + * LUT matches the hw supported size + * @adev: amdgpu device + * @crtc_state: the DRM CRTC state + * + * Verifies if post-blending (MPC) 3D LUT is supported by the HW (DCN 3.0 or + * newer) and if the DRM 3D LUT matches the supported size. + * + * Returns: + * 0 on success. -EINVAL if lut size are invalid. + */ +int amdgpu_dm_verify_lut3d_size(struct amdgpu_device *adev, + const struct drm_crtc_state *crtc_state) +{ + const struct drm_color_lut *lut3d = NULL; + const struct drm_mode_lut3d_mode *mode; + uint32_t exp_size, size; + + mode = get_lut3d_mode(adev, crtc_state); + exp_size = mode ? mode->lut_size * mode->lut_size * mode->lut_size : 0; + + lut3d = __extract_blob_lut(crtc_state->lut3d, &size); + + if (lut3d && size != exp_size) { + DRM_DEBUG_DRIVER("Invalid Gamma 3D LUT size. Should be %u but got %u.\n", + exp_size, size); + return -EINVAL; + } + + return 0; +} + + /** * amdgpu_dm_update_crtc_color_mgmt: Maps DRM color management to DC stream. * @crtc: amdgpu_dm crtc state @@ -442,8 +611,11 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) bool has_rom = adev->asic_type <= CHIP_RAVEN; struct drm_color_ctm *ctm = NULL; const struct drm_color_lut *degamma_lut, *regamma_lut; + const struct drm_color_lut *lut3d; uint32_t degamma_size, regamma_size; + uint32_t lut3d_size; bool has_regamma, has_degamma; + bool has_lut3d; bool is_legacy; int r; @@ -451,12 +623,19 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) if (r) return r; + r = amdgpu_dm_verify_lut3d_size(adev, &crtc->base); + if (r) + return r; + degamma_lut = __extract_blob_lut(crtc->base.degamma_lut, °amma_size); + lut3d = __extract_blob_lut(crtc->base.lut3d, &lut3d_size); regamma_lut = __extract_blob_lut(crtc->base.gamma_lut, ®amma_size); has_degamma = degamma_lut && !__is_lut_linear(degamma_lut, degamma_size); + has_lut3d = lut3d != NULL; + has_regamma = regamma_lut && !__is_lut_linear(regamma_lut, regamma_size); @@ -494,6 +673,16 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) if (r) return r; } else { + if (has_lut3d) { + r = amdgpu_dm_atomic_shaper_lut3d(adev->dm.dc, stream, lut3d, lut3d_size, + get_lut3d_mode(adev, &crtc->base)); + if (r) + return r; + } + /* Note: OGAM is disabled if 3D LUT is successfully programmed. + * See params and set_output_gamma in + * dcn30_set_output_transfer_func() + */ regamma_size = has_regamma ? regamma_size : 0; r = amdgpu_dm_set_atomic_regamma(stream, regamma_lut, regamma_size); if (r) From patchwork Mon Jan 9 14:38:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40909 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2198555wrt; Mon, 9 Jan 2023 06:53:08 -0800 (PST) X-Google-Smtp-Source: AMrXdXu45qJpWU3mvp7b5b1TqrfRWNHeKWQdzldTCc3kqb3SjVOxeHL1wH1zZDjyv/uG/9QzqPgS X-Received: by 2002:a05:6a20:1455:b0:af:e13e:cd67 with SMTP id a21-20020a056a20145500b000afe13ecd67mr100057518pzi.6.1673275988406; Mon, 09 Jan 2023 06:53:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275988; cv=none; d=google.com; s=arc-20160816; b=C40xsK8u35CCtKYWbhnnoKcaXrtIO/s1IGG/Dn62hKJfAvULO1AoZSohfX6p0NeNeO wCCJdgJhbkVB0GVUpObcXr2euNd/e6SIZvRJFIkJ1nUta79cyIVt4/Iz2Yrp3ScUWu+a YDCiZPV1Qju395lTVyB8iHZXfLAO10aOO4Hedvhref4Hkg4/mSmdfu7sEBilnY9mg2At rdlR+OpyLn/zTc04kGAvLoRNY6z+2bi2mEbH+wVVa3UmaoExTNArvHKunFp5UzrDeP0N K2LE4hSEUG6qhl/v8HWVe1dohoWpnEZYegntJJjkfKB2XJg3cH2vJlOaCLGX1O+QiDmm yjMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2zK6khS89ThpmVaHiRDcsbcddbtTFdwhm1vSRQdPNqQ=; b=kCnA6oP1HPAeQOf1LIBxZ7QOo5M5JxXKSo3aVbf2LlJFIIF/RvwXZWvataemLnDT3/ OMLJKO0cBY0gbSPHuaOudAmXzmUtaa0WLv8XrOLHK4Ir9rpYngETWlbZEtEEL24QQ1MJ EMmktKXNJHaXtyBZc7fpukp83Hr5WPAcjQ7VxfZKOqANtfVBK7F+VnqufcUq4yBgWTOB QA6wKSnbDZNkb7AHbVLwx3yYi0az5gEYnBqcI5SV8sovr1euh6tjbNQSvA3vLFQw4gjp bgNYiHxXF/NEOeUugSo3sdwxrRFqci5LpgHykI7mXp4captNIM7f+ps4DdJMSDTGEBna WPmA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=f1FH40gS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h17-20020a631211000000b0049db2d690fcsi9000390pgl.231.2023.01.09.06.52.55; Mon, 09 Jan 2023 06:53:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=f1FH40gS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233753AbjAIOqm (ORCPT + 99 others); Mon, 9 Jan 2023 09:46:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231811AbjAIOqF (ORCPT ); Mon, 9 Jan 2023 09:46:05 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1C983C38E for ; Mon, 9 Jan 2023 06:44:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=2zK6khS89ThpmVaHiRDcsbcddbtTFdwhm1vSRQdPNqQ=; b=f1FH40gSKxdQJGhbFNvdkdwPo2 2X2NSIOskXk+ypl8si36Usf3NWqtJqUwuak0ujIcj1akVquJuy5uooBVl5gdOtYW15GVUP5eQl4Rv 41f/Ukbr7PJ6dGpgqi4hcQd4siyK38kSRKkaIenpC0PszhAy5cXygnEYs1RdODCMHI/rC+qeqVFNF 9rcB8IeJ7za8s1OKx6lQTdK/b5dI9hw/gqb7TIEkJkWkkO0K0TAnH2RhdO6wgC4lqa8ss2yH0avGO gNuDzcLqnZbA/WVl+FD5QCfdavInGcUBEFB4eLZBPFJxQO/b4qB0WYroX+S9NM07+VHO3qZah/O2g JI1IZbZA==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtO7-003TyM-73; Mon, 09 Jan 2023 15:44:35 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 17/18] drm/amd/display: decouple steps to reuse in shaper LUT support Date: Mon, 9 Jan 2023 13:38:45 -0100 Message-Id: <20230109143846.1966301-18-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754557042380572853?= X-GMAIL-MSGID: =?utf-8?q?1754557042380572853?= Decouple steps of shaper LUT setup and LUT size validation according to HW caps as a preparation for shaper LUT support. Signed-off-by: Melissa Wen --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 22 ++++++++++++------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 0fb1244c8aef..8a930f9bce60 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -497,6 +497,19 @@ static void amdgpu_dm_atomic_lut3d(struct dc_stream_state *stream, stream->lut3d_func = lut; } +static int amdgpu_dm_atomic_shaper_lut(struct dc_stream_state *stream, + struct dc_transfer_func *func_shaper_new) +{ + /* We don't get DRM shaper LUT yet. We assume the input color space is already + * delinearized, so we don't need a shaper LUT and we can just BYPASS + */ + func_shaper_new->type = TF_TYPE_BYPASS; + func_shaper_new->tf = TRANSFER_FUNCTION_LINEAR; + stream->func_shaper = func_shaper_new; + + return 0; +} + /* amdgpu_dm_atomic_shaper_lut3d - set DRM CRTC shaper LUT and 3D LUT to DC * interface * @dc: Display Core control structure @@ -519,18 +532,11 @@ static int amdgpu_dm_atomic_shaper_lut3d(struct dc *dc, lut3d_func_new = (struct dc_3dlut *) stream->lut3d_func; func_shaper_new = (struct dc_transfer_func *) stream->func_shaper; - /* We don't get DRM shaper LUT yet. We assume the input color space is - * already delinearized, so we don't need a shaper LUT and we can just - * BYPASS. - */ - func_shaper_new->type = TF_TYPE_BYPASS; - func_shaper_new->tf = TRANSFER_FUNCTION_LINEAR; - stream->func_shaper = func_shaper_new; amdgpu_dm_atomic_lut3d(stream, drm_lut3d, drm_lut3d_size, mode, lut3d_func_new); - return 0; + return amdgpu_dm_atomic_shaper_lut(stream, func_shaper_new); } static const struct drm_mode_lut3d_mode * From patchwork Mon Jan 9 14:38:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 40908 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2198389wrt; Mon, 9 Jan 2023 06:52:45 -0800 (PST) X-Google-Smtp-Source: AMrXdXsdjzbdRfKXVd0mB2DhSiyHqJkUW+g2i4/ubIDwalnET5OpH1Vr66C0WmrMMgkoW2VHT5a5 X-Received: by 2002:a17:90b:4f4e:b0:219:89c3:2847 with SMTP id pj14-20020a17090b4f4e00b0021989c32847mr68049710pjb.44.1673275964803; Mon, 09 Jan 2023 06:52:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673275964; cv=none; d=google.com; s=arc-20160816; b=EIhVm+5cKIYBYeZN2rcZ5aLJkCIUEvnnCXe0rUO61dTaYLKqg9k8cBNyn1m3l5RA2u teD9D6+p3mi8yYAgCgNO2GvnS/RSnsmYu/qdJAdIJErpnpjcfCvtDn8zDM/3su/jXg9g lI+5dA0kvb8yj7sIAkD83ev5DCLKeM1Ut5FLF+7KxNpzaJZs8VolgXz16yJ4Qo9Pyi7D ta5fi0Ei959oIW2TS2ilhSdqrdx9OTr7QgT1VxNG+cl4ICbojyfXN0++KuQBRLPgaQ9c SSHylCqzaxmmXy2lH93SqYiSS9xGm46D/cToTvym+S7T6d8cI46Hc0zbvX6VlmFiETHA WFmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qSDyQmdE5bEHApGBRVBbuA6qGY5F6QCsHw91603xSjI=; b=Xr6Yjw+/kUzAOHS0SeF7CdD4WaEeQjuJmpM/XNT8vu4+yfe+PHpNZtVQSEf5OBrpuf DDFSWgktZmbsi2uExbDW+QD4jV9R4rdZNo6Hsj2m2+NZGTYdX1FnFMf9oVSGhbzFfymj COOCaOsMiXTiDSpbHf7GRJWkr6QC+6BTzbDf8kyV9vv62ExmKiDe+nOVIRJTdmJpEZoD Mum5DrNKgSzDhXPoXvDQIxAY8drbTGuP3D2zuX0dfUyNKwcjJFs9ma54jiHyUjWmdsT0 o7B7MQMXKIz7jNPuMMia8/yoltNMgzX5pH/NfePl4ysB1r8Z/es7RC4LWet/bPBmPAyU tpiA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=KMTWCybU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r2-20020a63a002000000b004788c847617si10485561pge.292.2023.01.09.06.52.31; Mon, 09 Jan 2023 06:52:44 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=KMTWCybU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234961AbjAIOqx (ORCPT + 99 others); Mon, 9 Jan 2023 09:46:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234870AbjAIOqK (ORCPT ); Mon, 9 Jan 2023 09:46:10 -0500 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B1DE3C704 for ; Mon, 9 Jan 2023 06:44:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=qSDyQmdE5bEHApGBRVBbuA6qGY5F6QCsHw91603xSjI=; b=KMTWCybUZ+YkUUT62lAo6SbkVV 6OHaMQn50EPHQJgSxAqHag3gg0B+/lxw009HeBHyRgzWWXAJhlDtCOsx5EThomWvNX0Wsy5uQDX3h oMdMJMuNCWnU6KfWoDNGnAoU2noWDMybh702kg/8QyLTihZCFgAamCGTd5QybGiamrLGoEaNhWfuX oYk78oRwZj0i9HvLi6at0HFV2NZ0XO1ivQbDYK6K4WmyomusE0J1dPnwfi9Kf19sQQ/MgkqUJrrTQ sLIDtYKMZQTG8wkfVs+S5uAfLR9jRHuDJGL5bD39SbxQLAiUnqsiV5RicGSJ0v7iFSbYxFTzKBp+F NbVewx4A==; Received: from [41.74.137.107] (helo=killbill.home) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pEtO9-003TyM-Nv; Mon, 09 Jan 2023 15:44:37 +0100 From: Melissa Wen To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , alex.hung@amd.com, nicholas.kazlauskas@amd.com, sungjoon.kim@amd.com, seanpaul@chromium.org, bhawanpreet.lakha@amd.com, Shashank Sharma , ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, kernel-dev@igalia.com, laurent.pinchart+renesas@ideasonboard.com, Melissa Wen , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 18/18] drm/amd/display: add user shaper LUT support to amdgpu_dm color pipeline Date: Mon, 9 Jan 2023 13:38:46 -0100 Message-Id: <20230109143846.1966301-19-mwen@igalia.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230109143846.1966301-1-mwen@igalia.com> References: <20230109143846.1966301-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754557017758755534?= X-GMAIL-MSGID: =?utf-8?q?1754557017758755534?= Now, we can use shaper LUT to delinearize and/or normalize the color space for a more efficient 3D LUT support (so far, only for DRM atomic color mgmt). If a degamma 1D LUT is passed to linearize the color space, a custom shaper 1D LUT can be used before applying 3D LUT. Signed-off-by: Melissa Wen --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 95 ++++++++++++++++--- 1 file changed, 83 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 8a930f9bce60..81b20ac9ff19 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -497,14 +497,62 @@ static void amdgpu_dm_atomic_lut3d(struct dc_stream_state *stream, stream->lut3d_func = lut; } +static int __set_func_shaper(struct dc_transfer_func *shaper_func, + const struct drm_color_lut *lut, uint32_t lut_size) +{ + struct dc_gamma *gamma = NULL; + struct calculate_buffer cal_buffer = {0}; + bool res; + + ASSERT(lut && lut_size == MAX_COLOR_LUT_ENTRIES); + + cal_buffer.buffer_index = -1; + + gamma = dc_create_gamma(); + if (!gamma) + return -ENOMEM; + + gamma->num_entries = lut_size; + __drm_lut_to_dc_gamma(lut, gamma, false); + + /* + * Color module doesn't like calculating gamma params + * on top of a linear input. But degamma params can be used + * instead to simulate this. + */ + gamma->type = GAMMA_CUSTOM; + res = mod_color_calculate_degamma_params(NULL, shaper_func, gamma, true); + + dc_gamma_release(&gamma); + + return res ? 0 : -ENOMEM; +} + static int amdgpu_dm_atomic_shaper_lut(struct dc_stream_state *stream, + const struct drm_color_lut *shaper_lut, + uint32_t shaper_size, struct dc_transfer_func *func_shaper_new) { - /* We don't get DRM shaper LUT yet. We assume the input color space is already + /* If no DRM shaper LUT, we assume the input color space is already * delinearized, so we don't need a shaper LUT and we can just BYPASS */ - func_shaper_new->type = TF_TYPE_BYPASS; - func_shaper_new->tf = TRANSFER_FUNCTION_LINEAR; + if (!shaper_size) { + func_shaper_new->type = TF_TYPE_BYPASS; + func_shaper_new->tf = TRANSFER_FUNCTION_LINEAR; + } else { + int r; + + /* If DRM shaper LUT is set, we assume a linear color space + * (linearized by DRM degamma 1D LUT or not) + */ + func_shaper_new->type = TF_TYPE_DISTRIBUTED_POINTS; + func_shaper_new->tf = TRANSFER_FUNCTION_LINEAR; + + r = __set_func_shaper(func_shaper_new, shaper_lut, shaper_size); + if (r) + return r; + } + stream->func_shaper = func_shaper_new; return 0; @@ -514,6 +562,8 @@ static int amdgpu_dm_atomic_shaper_lut(struct dc_stream_state *stream, * interface * @dc: Display Core control structure * @stream: DC stream state to set shaper LUT and 3D LUT + * @drm_shaper_lut: DRM CRTC (user) shaper LUT + * @drm_shaper_size: size of shaper LUT * @drm_lut3d: DRM CRTC (user) 3D LUT * @drm_lut3d_size: size of 3D LUT * @@ -522,6 +572,8 @@ static int amdgpu_dm_atomic_shaper_lut(struct dc_stream_state *stream, */ static int amdgpu_dm_atomic_shaper_lut3d(struct dc *dc, struct dc_stream_state *stream, + const struct drm_color_lut *drm_shaper_lut, + uint32_t drm_shaper_size, const struct drm_color_lut *drm_lut3d, uint32_t drm_lut3d_size, const struct drm_mode_lut3d_mode *mode) @@ -532,11 +584,11 @@ static int amdgpu_dm_atomic_shaper_lut3d(struct dc *dc, lut3d_func_new = (struct dc_3dlut *) stream->lut3d_func; func_shaper_new = (struct dc_transfer_func *) stream->func_shaper; - amdgpu_dm_atomic_lut3d(stream, drm_lut3d, drm_lut3d_size, mode, lut3d_func_new); - return amdgpu_dm_atomic_shaper_lut(stream, func_shaper_new); + return amdgpu_dm_atomic_shaper_lut(stream, drm_shaper_lut, + drm_shaper_size, func_shaper_new); } static const struct drm_mode_lut3d_mode * @@ -569,13 +621,23 @@ get_lut3d_mode(struct amdgpu_device *adev, int amdgpu_dm_verify_lut3d_size(struct amdgpu_device *adev, const struct drm_crtc_state *crtc_state) { - const struct drm_color_lut *lut3d = NULL; + const struct drm_color_lut *shaper = NULL, *lut3d = NULL; const struct drm_mode_lut3d_mode *mode; uint32_t exp_size, size; + /* shaper LUT is only available if 3D LUT color caps*/ + exp_size = has_mpc_lut3d_caps(&adev->dm) ? MAX_COLOR_LUT_ENTRIES : 0; + shaper = __extract_blob_lut(crtc_state->shaper_lut, &size); + + if (shaper && size != exp_size) { + DRM_DEBUG_DRIVER( + "Invalid Shaper LUT size. Should be %u but got %u.\n", + exp_size, size); + return -EINVAL; + } + mode = get_lut3d_mode(adev, crtc_state); exp_size = mode ? mode->lut_size * mode->lut_size * mode->lut_size : 0; - lut3d = __extract_blob_lut(crtc_state->lut3d, &size); if (lut3d && size != exp_size) { @@ -617,11 +679,11 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) bool has_rom = adev->asic_type <= CHIP_RAVEN; struct drm_color_ctm *ctm = NULL; const struct drm_color_lut *degamma_lut, *regamma_lut; - const struct drm_color_lut *lut3d; + const struct drm_color_lut *shaper_lut, *lut3d; uint32_t degamma_size, regamma_size; - uint32_t lut3d_size; + uint32_t lut3d_size, shaper_size; bool has_regamma, has_degamma; - bool has_lut3d; + bool has_lut3d, has_shaper_lut; bool is_legacy; int r; @@ -634,12 +696,14 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) return r; degamma_lut = __extract_blob_lut(crtc->base.degamma_lut, °amma_size); + shaper_lut = __extract_blob_lut(crtc->base.shaper_lut, &shaper_size); lut3d = __extract_blob_lut(crtc->base.lut3d, &lut3d_size); regamma_lut = __extract_blob_lut(crtc->base.gamma_lut, ®amma_size); has_degamma = degamma_lut && !__is_lut_linear(degamma_lut, degamma_size); + has_shaper_lut = shaper_lut != NULL; has_lut3d = lut3d != NULL; has_regamma = @@ -680,10 +744,17 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) return r; } else { if (has_lut3d) { - r = amdgpu_dm_atomic_shaper_lut3d(adev->dm.dc, stream, lut3d, lut3d_size, + /* enable 3D LUT only for DRM atomic color mgmt */ + shaper_size = has_shaper_lut ? shaper_size : 0; + + r = amdgpu_dm_atomic_shaper_lut3d(adev->dm.dc, stream, + shaper_lut, shaper_size, + lut3d, lut3d_size, get_lut3d_mode(adev, &crtc->base)); - if (r) + if (r) { + DRM_DEBUG_DRIVER("Failed to set shaper and 3D LUT\n"); return r; + } } /* Note: OGAM is disabled if 3D LUT is successfully programmed. * See params and set_output_gamma in