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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id k23-20020a2e92d7000000b0027fd02c99d4sm1947071ljh.75.2023.01.04.05.29.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Jan 2023 05:29:18 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Sibi Sankar , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: interconnect: OSM L3: Add SM6350 OSM L3 compatible Date: Wed, 4 Jan 2023 14:29:13 +0100 Message-Id: <20230104132915.667946-1-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754099050740797182?= X-GMAIL-MSGID: =?utf-8?q?1754099050740797182?= SM6350, similarly to SDM845, uses OSM hardware for L3 scaling. Document it. Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 00afbbca9038..9d0a98d77ae9 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -22,6 +22,7 @@ properties: - qcom,sc7180-osm-l3 - qcom,sc8180x-osm-l3 - qcom,sdm845-osm-l3 + - qcom,sm6350-osm-l3 - qcom,sm8150-osm-l3 - const: qcom,osm-l3 - items: From patchwork Wed Jan 4 13:29:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 38926 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp5145296wrt; Wed, 4 Jan 2023 05:33:38 -0800 (PST) X-Google-Smtp-Source: AMrXdXtRMRN1kutGXzWYr96zrO+viRPKPkU8vHSuQx3MudFqehwVn6hy9T3I1lZ3/DxfbIPg7j9N X-Received: by 2002:a17:907:7d8f:b0:7c1:f63:8f66 with SMTP id oz15-20020a1709077d8f00b007c10f638f66mr8535741ejc.51.1672839218276; Wed, 04 Jan 2023 05:33:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672839218; cv=none; d=google.com; s=arc-20160816; b=qIsIKmJlZNNz3SOE9//QoM0g5J0Sv9zAX+ulFPOVmcWn//J0euZfMpZ6ihyTaeRN6/ iGNroV9Y+i9V2a+8QQ4GTC+Z+fiRqYELaFV6UNwLw+lyB4QgTH4v73kLavPPqWcJRgMh onMaajuRHTs6NVpHguxreCo/V2s9/yxmTobQdXoOZ1wEIP9nMD3dcchwtbQQ8Sj/Pqk/ 2/cIkATi6O84Fy+m2JAKhKOYCDXMrgDohPCOhefwbszFRNwl36tygKk/t0yTyLZYi97y wtzycPrvHGdxyHG84H5aShvlYuolASXqurkIFlYqWLeaNVFN1FKBx2Tc4sgJspDW7N12 P3aA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pBIconjpYg789mB0QT5q7S9l7fWGDmPA4DJamBY4g6A=; b=I213ar7E0nDodD4EwNCyUKa5kBDW22PImMTfFwhBmiTLeoSBXwWxpMA55kMQXe7D6G IcmythH5HSKu3zJTMGOSTHESv25COsQZ1Rmywqrz+Ox/TvyQ5+V7xd9dnhrxz0C5Ce2P SCifI7OQC67awd03iy7PE6si84xpFh/lbpeDPZp2nbiTOTS58kXhzKDrTCHks4FUn+wk 6hgj/o1ky6zpmEtt0Oohok/xijKpQWYHjRDiufjEXJiIIbBLCddVrJR1ASeZRLlg5UJM PIfmBn4O9VNgyHlxrCjJD94kbVgNspGumtqao4/wAlDJkRxhPBep1WsHV95jf7iMHwJR F6ug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U+hXx0tT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id k23-20020a2e92d7000000b0027fd02c99d4sm1947071ljh.75.2023.01.04.05.29.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Jan 2023 05:29:20 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Sibi Sankar , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: qcom: sm6350: Add OSM L3 node Date: Wed, 4 Jan 2023 14:29:14 +0100 Message-Id: <20230104132915.667946-2-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230104132915.667946-1-konrad.dybcio@linaro.org> References: <20230104132915.667946-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754099056382690236?= X-GMAIL-MSGID: =?utf-8?q?1754099056382690236?= Enable the OSM block responsible for scaling the L3 cache. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index e71ffc31d41e..893a1ffb5e3d 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -2040,6 +2040,16 @@ apps_bcm_voter: bcm-voter { }; }; + osm_l3: interconnect@18321000 { + compatible = "qcom,sm6350-osm-l3", "qcom,osm-l3"; + reg = <0x0 0x18321000 0x0 0x1000>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@18323000 { compatible = "qcom,cpufreq-hw"; reg = <0 0x18323000 0 0x1000>, <0 0x18325800 0 0x1000>; From patchwork Wed Jan 4 13:29:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 38928 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp5145478wrt; Wed, 4 Jan 2023 05:34:03 -0800 (PST) X-Google-Smtp-Source: AMrXdXskVnga9PjtBACkFvGU/DomzoLaQAOai2GYP0cPiZes17ChveSky3x4uq5G4kM22i8qUuXZ X-Received: by 2002:a17:907:1a8c:b0:7c0:f5d7:cac9 with SMTP id mi12-20020a1709071a8c00b007c0f5d7cac9mr38208715ejc.11.1672839243521; Wed, 04 Jan 2023 05:34:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672839243; cv=none; d=google.com; s=arc-20160816; b=gY5bYlfxqySRZMQ3WQyGWklUd37WHr3VNrT7t2V6Byc/OzTEB7+y8icbaS4sziumTA j5cArndSRo84bL9hFuSCO/0X2xOGxoPJ0OXo31f4HZFR60enwDCXX0h0U6TLRyryRlBK ErAtlIH0pj9uwmukzmeLoMn8NSTJz/CMPt3sF1QZaO8t4vIEOsaDDYw9wMEBhQaiRdmB 9Fn4X9PI7m78uhmcjMFy+izcHrAu0KqplJboVv4/cs8uqGBKYx0Wj3UvnrSYFQZyayQn +E3FaJwd9NsFYWy+MF8KD0HxDeENU44sG79jVtcv3BaIt6vC/+OYR8t2rc/Lr6EDZhfz b20Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xVuXOvsxO/ihY44a6eTHqj7za6so2owzQQFtxjcx7GU=; b=pRbQSkw6HumrqSYtngRRyE76yYCEcB0Sa+SbxRafm7EHZ9Y0erUW8+Lj/6cu8oQep2 ocXeBoTgdcDKpjHvoIY5GEcARxLoHQzjwz8EIZz5fJrBLAO7fYZwfPeW1dN5GbtHaykV IzLn2jblO5QwJAwswLquTqrfILTva5FvexxMQOJatwivS93de+AxDfLKOfjLMCEyPvHN hAcq6bX7UtqeO21t0zXHWuDY14+DBRO1RjdesqlmAoGzny5+SLmTkc0XEjBEH267XvfT CdIfmQpS56Osc7nmlCk+e/cJvGVWKDJNNYqy+SdSnRtPbwc0PmnlzeFTg8+ExfOQOGrz mpJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T703tyuF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id k23-20020a2e92d7000000b0027fd02c99d4sm1947071ljh.75.2023.01.04.05.29.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Jan 2023 05:29:22 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Sibi Sankar , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: qcom: sm6350: Set up DDR & L3 scaling Date: Wed, 4 Jan 2023 14:29:15 +0100 Message-Id: <20230104132915.667946-3-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230104132915.667946-1-konrad.dybcio@linaro.org> References: <20230104132915.667946-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754099082641002054?= X-GMAIL-MSGID: =?utf-8?q?1754099082641002054?= Add the CPU OPP tables including core frequency and L3 bus frequency. The L3 throughput values were chosen by studying the frequencies available in HW LUT and picking the highest one that's less than the CPU frequency. DDR clock rates come from the vendor kernel. Available values from the HW LUT: 300000000 556800000 652800000 806400000 844800000 940800000 1132800000 1209600000 1286400000 1401600000 1459200000 Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 131 +++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm7225.dtsi | 19 ++++ 2 files changed, 150 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 893a1ffb5e3d..411a8279f84f 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -49,6 +50,9 @@ CPU0: cpu@0 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_0>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; @@ -68,6 +72,9 @@ CPU1: cpu@100 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_100>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; @@ -84,6 +91,9 @@ CPU2: cpu@200 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_200>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; @@ -100,6 +110,9 @@ CPU3: cpu@300 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_300>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; @@ -116,6 +129,9 @@ CPU4: cpu@400 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_400>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; @@ -132,6 +148,9 @@ CPU5: cpu@500 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_500>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; @@ -149,6 +168,9 @@ CPU6: cpu@600 { dynamic-power-coefficient = <703>; next-level-cache = <&L2_600>; qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu6_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; @@ -165,6 +187,9 @@ CPU7: cpu@700 { dynamic-power-coefficient = <703>; next-level-cache = <&L2_700>; qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu6_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; @@ -222,6 +247,112 @@ memory@80000000 { reg = <0x0 0x80000000 0x0 0x0>; }; + cpu0_opp_table: opp-table-cpu0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + /* DDR: 4-wide, 2 channels, double data rate, L3: 16-wide, 2 channels */ + opp-peak-kBps = <(200000 * 4 * 2 * 2) (300000 * 16 * 2)>; + }; + + opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + opp-peak-kBps = <(547000 * 4 * 2 * 2) (556800 * 16 * 2)>; + }; + + opp-768000000 { + opp-hz = /bits/ 64 <768000000>; + opp-peak-kBps = <(768000 * 4 * 2 * 2) (652800 * 16 * 2)>; + }; + + opp-1017600000 { + opp-hz = /bits/ 64 <1017600000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (940800 * 16 * 2)>; + }; + + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (1209600 * 16 * 2)>; + }; + + opp-1324800000 { + opp-hz = /bits/ 64 <1324800000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (1286400 * 16 * 2)>; + }; + + opp-1516800000 { + opp-hz = /bits/ 64 <1516800000>; + opp-peak-kBps = <(1353000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-1612800000 { + opp-hz = /bits/ 64 <1612800000>; + opp-peak-kBps = <(1555000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-1708800000 { + opp-hz = /bits/ 64 <1708800000>; + opp-peak-kBps = <(1555000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + }; + + cpu6_opp_table: opp-table-cpu6 { + compatible = "operating-points-v2"; + opp-shared; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-peak-kBps = <(200000 * 4 * 2 * 2) (300000 * 16 * 2)>; + }; + + opp-787200000 { + opp-hz = /bits/ 64 <787200000>; + opp-peak-kBps = <(768000 * 4 * 2 * 2) (652800 * 16 * 2)>; + }; + + opp-979200000 { + opp-hz = /bits/ 64 <979200000>; + opp-peak-kBps = <(768000 * 4 * 2 * 2) (940800 * 16 * 2)>; + }; + + opp-1036800000 { + opp-hz = /bits/ 64 <1036800000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (940800 * 16 * 2)>; + }; + + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (1209600 * 16 * 2)>; + }; + + opp-1401600000 { + opp-hz = /bits/ 64 <1401600000>; + opp-peak-kBps = <(1353000 * 4 * 2 * 2) (1401600 * 16 * 2)>; + }; + + opp-1555200000 { + opp-hz = /bits/ 64 <1555200000>; + opp-peak-kBps = <(1555000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-1766400000 { + opp-hz = /bits/ 64 <1766400000>; + opp-peak-kBps = <(1555000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-1900800000 { + opp-hz = /bits/ 64 <1900800000>; + opp-peak-kBps = <(1804000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-2073600000 { + opp-hz = /bits/ 64 <2073600000>; + opp-peak-kBps = <(2092000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + }; + pmu { compatible = "arm,armv8-pmuv3"; interrupts = ; diff --git a/arch/arm64/boot/dts/qcom/sm7225.dtsi b/arch/arm64/boot/dts/qcom/sm7225.dtsi index 7b2a002ca7ff..b7b4044e9bb0 100644 --- a/arch/arm64/boot/dts/qcom/sm7225.dtsi +++ b/arch/arm64/boot/dts/qcom/sm7225.dtsi @@ -14,3 +14,22 @@ &CPU5 { compatible = "qcom,kryo570"; }; &CPU6 { compatible = "qcom,kryo570"; }; &CPU7 { compatible = "qcom,kryo570"; }; + +&cpu0_opp_table { + opp-1804800000 { + opp-hz = /bits/ 64 <1804800000>; + opp-peak-kBps = <(1804000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; +}; + +&cpu6_opp_table { + opp-2131200000 { + opp-hz = /bits/ 64 <2131200000>; + opp-peak-kBps = <(2092000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-2208000000 { + opp-hz = /bits/ 64 <2208000000>; + opp-peak-kBps = <(2092000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; +};