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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:16 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/18] arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:58:54 +0100 Message-Id: <20221231125911.437599-2-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734575172858010?= X-GMAIL-MSGID: =?utf-8?q?1753734575172858010?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 67 ++++++++++++++++++++++----- 1 file changed, 55 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 2ceae73a6069..17e15a06254f 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -146,7 +146,7 @@ reserved-memory { ranges; rpm_msg_ram: memory@60000 { - reg = <0x0 0x60000 0x0 0x6000>; + reg = <0x0 0x00060000 0x0 0x6000>; no-map; }; @@ -181,7 +181,7 @@ soc: soc { prng: qrng@e1000 { compatible = "qcom,prng-ee"; - reg = <0x0 0xe3000 0x0 0x1000>; + reg = <0x0 0x000e3000 0x0 0x1000>; clocks = <&gcc GCC_PRNG_AHB_CLK>; clock-names = "core"; }; @@ -366,6 +366,49 @@ qpic_nand: nand-controller@79b0000 { status = "disabled"; }; + usb3: usb@8af8800 { + compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; + reg = <0x0 0x08af8800 0x0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; + assigned-clock-rates = <133330000>, + <133330000>, + <20000000>; + + resets = <&gcc GCC_USB0_BCR>; + status = "disabled"; + + dwc_0: usb@8a00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08a00000 0x0 0xcd00>; + interrupts = ; + phys = <&qusb_phy_0>, <&usb0_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + clocks = <&xo>; + clock-names = "ref"; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode = "host"; + }; + }; + intc: interrupt-controller@b000000 { compatible = "qcom,msm-qgic2"; #address-cells = <2>; @@ -388,7 +431,7 @@ v2m@0 { pcie_phy: phy@84000 { compatible = "qcom,ipq6018-qmp-pcie-phy"; - reg = <0x0 0x84000 0x0 0x1bc>; /* Serdes PLL */ + reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */ status = "disabled"; #address-cells = <2>; #size-cells = <2>; @@ -404,10 +447,10 @@ pcie_phy: phy@84000 { "common"; pcie_phy0: phy@84200 { - reg = <0x0 0x84200 0x0 0x16c>, /* Serdes Tx */ - <0x0 0x84400 0x0 0x200>, /* Serdes Rx */ - <0x0 0x84800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ - <0x0 0x84c00 0x0 0xf4>; /* pcs_misc */ + reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */ + <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */ + <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ + <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */ #phy-cells = <0>; clocks = <&gcc GCC_PCIE0_PIPE_CLK>; @@ -623,7 +666,7 @@ mdio: mdio@90000 { #address-cells = <1>; #size-cells = <0>; compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio"; - reg = <0x0 0x90000 0x0 0x64>; + reg = <0x0 0x00090000 0x0 0x64>; clocks = <&gcc GCC_MDIO_AHB_CLK>; clock-names = "gcc_mdio_ahb_clk"; status = "disabled"; @@ -631,7 +674,7 @@ mdio: mdio@90000 { qusb_phy_1: qusb@59000 { compatible = "qcom,ipq6018-qusb2-phy"; - reg = <0x0 0x059000 0x0 0x180>; + reg = <0x0 0x00059000 0x0 0x180>; #phy-cells = <0>; clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, @@ -664,7 +707,7 @@ usb2: usb@70f8800 { dwc_1: usb@7000000 { compatible = "snps,dwc3"; - reg = <0x0 0x7000000 0x0 0xcd00>; + reg = <0x0 0x07000000 0x0 0xcd00>; interrupts = ; phys = <&qusb_phy_1>; phy-names = "usb2-phy"; @@ -679,7 +722,7 @@ dwc_1: usb@7000000 { ssphy_0: ssphy@78000 { compatible = "qcom,ipq6018-qmp-usb3-phy"; - reg = <0x0 0x78000 0x0 0x1c4>; + reg = <0x0 0x00078000 0x0 0x1c4>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -708,7 +751,7 @@ usb0_ssphy: phy@78200 { qusb_phy_0: qusb@79000 { compatible = "qcom,ipq6018-qusb2-phy"; - reg = <0x0 0x079000 0x0 0x180>; + reg = <0x0 0x00079000 0x0 0x180>; #phy-cells = <0>; clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, From patchwork Sat Dec 31 12:58:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37854 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3331312wrt; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:17 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/18] arm64: dts: qcom: ipq6018: Use tabs instead of spaces Date: Sat, 31 Dec 2022 13:58:55 +0100 Message-Id: <20221231125911.437599-3-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734723663170358?= X-GMAIL-MSGID: =?utf-8?q?1753734723663170358?= The dwc3 subnode was indented using spaces for some reason. Fix it. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 17e15a06254f..4b74eee35971 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -706,17 +706,17 @@ usb2: usb@70f8800 { status = "disabled"; dwc_1: usb@7000000 { - compatible = "snps,dwc3"; - reg = <0x0 0x07000000 0x0 0xcd00>; - interrupts = ; - phys = <&qusb_phy_1>; - phy-names = "usb2-phy"; - tx-fifo-resize; - snps,is-utmi-l1-suspend; - snps,hird-threshold = /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - dr_mode = "host"; + compatible = "snps,dwc3"; + reg = <0x0 0x07000000 0x0 0xcd00>; + interrupts = ; + phys = <&qusb_phy_1>; + phy-names = "usb2-phy"; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode = "host"; }; }; From patchwork Sat Dec 31 12:58:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37843 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330048wrt; Sat, 31 Dec 2022 05:00:38 -0800 (PST) X-Google-Smtp-Source: AMrXdXtKBoOSyyMUt9dUw0oL5ejG0Xbbd1KFYQtASi+Q8X13s90Z9ZhzMzI8gs9pb65wX3SSwokt X-Received: by 2002:a17:906:6d97:b0:78d:f455:c386 with SMTP id h23-20020a1709066d9700b0078df455c386mr28208644ejt.44.1672491638034; Sat, 31 Dec 2022 05:00:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491638; cv=none; d=google.com; s=arc-20160816; b=Ddt8vBY98Ui2cybfliOhX84ZGX38ZtxU8wpCZa1Zf/gzv8dp1wwH240Qy0BNB95pao 6SltNh6+puTFkdhqLitRxsDcKMCH+LLlNEJvlXFotFFXZOLcSrkeghqULpEQBgwHYr0t GXbwIMKNAuFvmcYf0fDfm8GXdubOyRxX6vzeZHrCBsmXYjHCJi6QeJX3x0WJUOVtjDLi nC773UCJG+FgBkl38goylqsZN1L9IpKe5zQhCusl0WAyTXW3TXXh1kK8Qpy5TWlEIGWp 1hSJwFLxyyhIBXe2xu31zbk/BpcjXrN0Zu3f30R3isRdQ3kkLyh5EsV57S+S2qjzJjHS bumg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+8/HGl1ikZaZXvFG58c/YgEm8cWJJkyzsj32eX0ELCU=; b=Kr5ChJCR68QTodNOhpX5FfcsMkan3cyS9B2ZlXawymGNMHeq8KvWZiGisHxEMvKjJ1 Vm8nLIoCrpPdd7MM+zZVn1frt/iM8YqiIWrSy9aV7gLB8pWpJUODjM26wDOe+9cPPKF4 F0Y17ISVnUSq4muHtl9ck4YE/WrGpUQrhg/klICEadJ5ZoJgDrcXKLcPyxCrml76incY scTQSEM1bcAcAXqZ3LdhyfUMdALepT9+GYI8zqTjedLf1bIlUlNNTCTf6r5iDP4P1Ql1 wkuVuqqG56vR2bomK8PWKGwvWpXPTLYC01RgTXK8bEHFX8rNPW4KU6cABAeulksujJ+2 WsgQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wZAS974N; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:19 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/18] arm64: dts: qcom: ipq6018: Sort nodes properly Date: Sat, 31 Dec 2022 13:58:56 +0100 Message-Id: <20221231125911.437599-4-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734591852286247?= X-GMAIL-MSGID: =?utf-8?q?1753734591852286247?= Order nodes by unit address if one exists and alphabetically otherwise. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 489 ++++++++++++-------------- 1 file changed, 223 insertions(+), 266 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 4b74eee35971..2026000f3dc7 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -87,6 +87,12 @@ L2_0: l2-cache { }; }; + firmware { + scm { + compatible = "qcom,scm-ipq6018", "qcom,scm"; + }; + }; + cpu_opp_table: opp-table-cpu { compatible = "operating-points-v2"; opp-shared; @@ -123,12 +129,6 @@ opp-1800000000 { }; }; - firmware { - scm { - compatible = "qcom,scm-ipq6018", "qcom,scm"; - }; - }; - pmuv8: pmu { compatible = "arm,cortex-a53-pmu"; interrupts = ; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + mboxes = <&apcs_glb 0>; + + rpm_requests: glink-channel { + compatible = "qcom,rpm-ipq6018"; + qcom,glink-channels = "rpm_requests"; + + regulators { + compatible = "qcom,rpm-mp5496-regulators"; + + ipq6018_s2: s2 { + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1062500>; + regulator-always-on; + }; + }; + }; + }; + smem { compatible = "qcom,smem"; memory-region = <&smem_region>; @@ -179,6 +201,102 @@ soc: soc { dma-ranges; compatible = "simple-bus"; + qusb_phy_1: qusb@59000 { + compatible = "qcom,ipq6018-qusb2-phy"; + reg = <0x0 0x00059000 0x0 0x180>; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, + <&xo>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2_1_PHY_BCR>; + status = "disabled"; + }; + + ssphy_0: ssphy@78000 { + compatible = "qcom,ipq6018-qmp-usb3-phy"; + reg = <0x0 0x00078000 0x0 0x1c4>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_USB0_AUX_CLK>, + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>; + clock-names = "aux", "cfg_ahb", "ref"; + + resets = <&gcc GCC_USB0_PHY_BCR>, + <&gcc GCC_USB3PHY_0_PHY_BCR>; + reset-names = "phy","common"; + status = "disabled"; + + usb0_ssphy: phy@78200 { + reg = <0x0 0x00078200 0x0 0x130>, /* Tx */ + <0x0 0x00078400 0x0 0x200>, /* Rx */ + <0x0 0x00078800 0x0 0x1f8>, /* PCS */ + <0x0 0x00078600 0x0 0x044>; /* PCS misc */ + #phy-cells = <0>; + #clock-cells = <0>; + clocks = <&gcc GCC_USB0_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "gcc_usb0_pipe_clk_src"; + }; + }; + + qusb_phy_0: qusb@79000 { + compatible = "qcom,ipq6018-qusb2-phy"; + reg = <0x0 0x00079000 0x0 0x180>; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, + <&xo>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2_0_PHY_BCR>; + status = "disabled"; + }; + + pcie_phy: phy@84000 { + compatible = "qcom,ipq6018-qmp-pcie-phy"; + reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */ + status = "disabled"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_PCIE0_AUX_CLK>, + <&gcc GCC_PCIE0_AHB_CLK>; + clock-names = "aux", "cfg_ahb"; + + resets = <&gcc GCC_PCIE0_PHY_BCR>, + <&gcc GCC_PCIE0PHY_PHY_BCR>; + reset-names = "phy", + "common"; + + pcie_phy0: phy@84200 { + reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */ + <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */ + <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ + <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */ + #phy-cells = <0>; + + clocks = <&gcc GCC_PCIE0_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "gcc_pcie0_pipe_clk_src"; + #clock-cells = <0>; + }; + }; + + mdio: mdio@90000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio"; + reg = <0x0 0x00090000 0x0 0x64>; + clocks = <&gcc GCC_MDIO_AHB_CLK>; + clock-names = "gcc_mdio_ahb_clk"; + status = "disabled"; + }; + prng: qrng@e1000 { compatible = "qcom,prng-ee"; reg = <0x0 0x000e3000 0x0 0x1000>; @@ -257,6 +375,41 @@ tcsr: syscon@1937000 { reg = <0x0 0x01937000 0x0 0x21000>; }; + usb2: usb@70f8800 { + compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; + reg = <0x0 0x070F8800 0x0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + clocks = <&gcc GCC_USB1_MASTER_CLK>, + <&gcc GCC_USB1_SLEEP_CLK>, + <&gcc GCC_USB1_MOCK_UTMI_CLK>; + clock-names = "core", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>, + <&gcc GCC_USB1_MOCK_UTMI_CLK>; + assigned-clock-rates = <133330000>, + <24000000>; + resets = <&gcc GCC_USB1_BCR>; + status = "disabled"; + + dwc_1: usb@7000000 { + compatible = "snps,dwc3"; + reg = <0x0 0x07000000 0x0 0xcd00>; + interrupts = ; + phys = <&qusb_phy_1>; + phy-names = "usb2-phy"; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode = "host"; + }; + }; + blsp_dma: dma-controller@7884000 { compatible = "qcom,bam-v1.7.0"; reg = <0x0 0x07884000 0x0 0x2b000>; @@ -374,13 +527,13 @@ usb3: usb@8af8800 { ranges; clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, - <&gcc GCC_USB0_MASTER_CLK>, - <&gcc GCC_USB0_SLEEP_CLK>, - <&gcc GCC_USB0_MOCK_UTMI_CLK>; + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; clock-names = "cfg_noc", - "core", - "sleep", - "mock_utmi"; + "core", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, <&gcc GCC_USB0_MASTER_CLK>, @@ -429,107 +582,6 @@ v2m@0 { }; }; - pcie_phy: phy@84000 { - compatible = "qcom,ipq6018-qmp-pcie-phy"; - reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */ - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - clocks = <&gcc GCC_PCIE0_AUX_CLK>, - <&gcc GCC_PCIE0_AHB_CLK>; - clock-names = "aux", "cfg_ahb"; - - resets = <&gcc GCC_PCIE0_PHY_BCR>, - <&gcc GCC_PCIE0PHY_PHY_BCR>; - reset-names = "phy", - "common"; - - pcie_phy0: phy@84200 { - reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */ - <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */ - <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ - <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */ - #phy-cells = <0>; - - clocks = <&gcc GCC_PCIE0_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "gcc_pcie0_pipe_clk_src"; - #clock-cells = <0>; - }; - }; - - pcie0: pci@20000000 { - compatible = "qcom,pcie-ipq6018"; - reg = <0x0 0x20000000 0x0 0xf1d>, - <0x0 0x20000f20 0x0 0xa8>, - <0x0 0x20001000 0x0 0x1000>, - <0x0 0x80000 0x0 0x4000>, - <0x0 0x20100000 0x0 0x1000>; - reg-names = "dbi", "elbi", "atu", "parf", "config"; - - device_type = "pci"; - linux,pci-domain = <0>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - max-link-speed = <3>; - #address-cells = <3>; - #size-cells = <2>; - - phys = <&pcie_phy0>; - phy-names = "pciephy"; - - ranges = <0x81000000 0 0x20200000 0 0x20200000 - 0 0x10000>, /* downstream I/O */ - <0x82000000 0 0x20220000 0 0x20220000 - 0 0xfde0000>; /* non-prefetchable memory */ - - interrupts = ; - interrupt-names = "msi"; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 75 - IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 78 - IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 79 - IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 83 - IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, - <&gcc GCC_PCIE0_AXI_M_CLK>, - <&gcc GCC_PCIE0_AXI_S_CLK>, - <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>, - <&gcc PCIE0_RCHNG_CLK>; - clock-names = "iface", - "axi_m", - "axi_s", - "axi_bridge", - "rchng"; - - resets = <&gcc GCC_PCIE0_PIPE_ARES>, - <&gcc GCC_PCIE0_SLEEP_ARES>, - <&gcc GCC_PCIE0_CORE_STICKY_ARES>, - <&gcc GCC_PCIE0_AXI_MASTER_ARES>, - <&gcc GCC_PCIE0_AXI_SLAVE_ARES>, - <&gcc GCC_PCIE0_AHB_ARES>, - <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>, - <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>; - reset-names = "pipe", - "sleep", - "sticky", - "axi_m", - "axi_s", - "ahb", - "axi_m_sticky", - "axi_s_sticky"; - - status = "disabled"; - }; - watchdog@b017000 { compatible = "qcom,kpss-wdt"; interrupts = ; @@ -662,147 +714,74 @@ qrtr_requests { }; }; - mdio: mdio@90000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio"; - reg = <0x0 0x00090000 0x0 0x64>; - clocks = <&gcc GCC_MDIO_AHB_CLK>; - clock-names = "gcc_mdio_ahb_clk"; - status = "disabled"; - }; - - qusb_phy_1: qusb@59000 { - compatible = "qcom,ipq6018-qusb2-phy"; - reg = <0x0 0x00059000 0x0 0x180>; - #phy-cells = <0>; - - clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, - <&xo>; - clock-names = "cfg_ahb", "ref"; - - resets = <&gcc GCC_QUSB2_1_PHY_BCR>; - status = "disabled"; - }; - - usb2: usb@70f8800 { - compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; - reg = <0x0 0x070F8800 0x0 0x400>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - clocks = <&gcc GCC_USB1_MASTER_CLK>, - <&gcc GCC_USB1_SLEEP_CLK>, - <&gcc GCC_USB1_MOCK_UTMI_CLK>; - clock-names = "core", - "sleep", - "mock_utmi"; - - assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>, - <&gcc GCC_USB1_MOCK_UTMI_CLK>; - assigned-clock-rates = <133330000>, - <24000000>; - resets = <&gcc GCC_USB1_BCR>; - status = "disabled"; - - dwc_1: usb@7000000 { - compatible = "snps,dwc3"; - reg = <0x0 0x07000000 0x0 0xcd00>; - interrupts = ; - phys = <&qusb_phy_1>; - phy-names = "usb2-phy"; - tx-fifo-resize; - snps,is-utmi-l1-suspend; - snps,hird-threshold = /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - dr_mode = "host"; - }; - }; + pcie0: pci@20000000 { + compatible = "qcom,pcie-ipq6018"; + reg = <0x0 0x20000000 0x0 0xf1d>, + <0x0 0x20000f20 0x0 0xa8>, + <0x0 0x20001000 0x0 0x1000>, + <0x0 0x80000 0x0 0x4000>, + <0x0 0x20100000 0x0 0x1000>; + reg-names = "dbi", "elbi", "atu", "parf", "config"; - ssphy_0: ssphy@78000 { - compatible = "qcom,ipq6018-qmp-usb3-phy"; - reg = <0x0 0x00078000 0x0 0x1c4>; - #address-cells = <2>; + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + max-link-speed = <3>; + #address-cells = <3>; #size-cells = <2>; - ranges; - - clocks = <&gcc GCC_USB0_AUX_CLK>, - <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>; - clock-names = "aux", "cfg_ahb", "ref"; - resets = <&gcc GCC_USB0_PHY_BCR>, - <&gcc GCC_USB3PHY_0_PHY_BCR>; - reset-names = "phy","common"; - status = "disabled"; - - usb0_ssphy: phy@78200 { - reg = <0x0 0x00078200 0x0 0x130>, /* Tx */ - <0x0 0x00078400 0x0 0x200>, /* Rx */ - <0x0 0x00078800 0x0 0x1f8>, /* PCS */ - <0x0 0x00078600 0x0 0x044>; /* PCS misc */ - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB0_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "gcc_usb0_pipe_clk_src"; - }; - }; - - qusb_phy_0: qusb@79000 { - compatible = "qcom,ipq6018-qusb2-phy"; - reg = <0x0 0x00079000 0x0 0x180>; - #phy-cells = <0>; + phys = <&pcie_phy0>; + phy-names = "pciephy"; - clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, - <&xo>; - clock-names = "cfg_ahb", "ref"; + ranges = <0x81000000 0 0x20200000 0 0x20200000 + 0 0x10000>, /* downstream I/O */ + <0x82000000 0 0x20220000 0 0x20220000 + 0 0xfde0000>; /* non-prefetchable memory */ - resets = <&gcc GCC_QUSB2_0_PHY_BCR>; - status = "disabled"; - }; + interrupts = ; + interrupt-names = "msi"; - usb3: usb@8af8800 { - compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; - reg = <0x0 0x8af8800 0x0 0x400>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 75 + IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 78 + IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 79 + IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 83 + IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, - <&gcc GCC_USB0_MASTER_CLK>, - <&gcc GCC_USB0_SLEEP_CLK>, - <&gcc GCC_USB0_MOCK_UTMI_CLK>; - clock-names = "cfg_noc", - "core", - "sleep", - "mock_utmi"; + clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, + <&gcc GCC_PCIE0_AXI_M_CLK>, + <&gcc GCC_PCIE0_AXI_S_CLK>, + <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>, + <&gcc PCIE0_RCHNG_CLK>; + clock-names = "iface", + "axi_m", + "axi_s", + "axi_bridge", + "rchng"; - assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, - <&gcc GCC_USB0_MASTER_CLK>, - <&gcc GCC_USB0_MOCK_UTMI_CLK>; - assigned-clock-rates = <133330000>, - <133330000>, - <20000000>; + resets = <&gcc GCC_PCIE0_PIPE_ARES>, + <&gcc GCC_PCIE0_SLEEP_ARES>, + <&gcc GCC_PCIE0_CORE_STICKY_ARES>, + <&gcc GCC_PCIE0_AXI_MASTER_ARES>, + <&gcc GCC_PCIE0_AXI_SLAVE_ARES>, + <&gcc GCC_PCIE0_AHB_ARES>, + <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>, + <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>; + reset-names = "pipe", + "sleep", + "sticky", + "axi_m", + "axi_s", + "ahb", + "axi_m_sticky", + "axi_s_sticky"; - resets = <&gcc GCC_USB0_BCR>; status = "disabled"; - - dwc_0: usb@8a00000 { - compatible = "snps,dwc3"; - reg = <0x0 0x8a00000 0x0 0xcd00>; - interrupts = ; - phys = <&qusb_phy_0>, <&usb0_ssphy>; - phy-names = "usb2-phy", "usb3-phy"; - clocks = <&xo>; - clock-names = "ref"; - tx-fifo-resize; - snps,is-utmi-l1-suspend; - snps,hird-threshold = /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - dr_mode = "host"; - }; }; }; @@ -837,26 +816,4 @@ wcss_smp2p_in: slave-kernel { #interrupt-cells = <2>; }; }; - - rpm-glink { - compatible = "qcom,glink-rpm"; - interrupts = ; - qcom,rpm-msg-ram = <&rpm_msg_ram>; - mboxes = <&apcs_glb 0>; - - rpm_requests: glink-channel { - compatible = "qcom,rpm-ipq6018"; - qcom,glink-channels = "rpm_requests"; - - regulators { - compatible = "qcom,rpm-mp5496-regulators"; - - ipq6018_s2: s2 { - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1062500>; - regulator-always-on; - }; - }; - }; - }; }; From patchwork Sat Dec 31 12:58:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37844 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330186wrt; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:21 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation Date: Sat, 31 Dec 2022 13:58:57 +0100 Message-Id: <20221231125911.437599-5-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734606475558631?= X-GMAIL-MSGID: =?utf-8?q?1753734606475558631?= Some properties were not indented consistently. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 40 +++++++++++++-------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 2026000f3dc7..5452bb85f8e1 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -249,7 +249,7 @@ qusb_phy_0: qusb@79000 { #phy-cells = <0>; clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, - <&xo>; + <&xo>; clock-names = "cfg_ahb", "ref"; resets = <&gcc GCC_QUSB2_0_PHY_BCR>; @@ -265,11 +265,11 @@ pcie_phy: phy@84000 { ranges; clocks = <&gcc GCC_PCIE0_AUX_CLK>, - <&gcc GCC_PCIE0_AHB_CLK>; + <&gcc GCC_PCIE0_AHB_CLK>; clock-names = "aux", "cfg_ahb"; resets = <&gcc GCC_PCIE0_PHY_BCR>, - <&gcc GCC_PCIE0PHY_PHY_BCR>; + <&gcc GCC_PCIE0PHY_PHY_BCR>; reset-names = "phy", "common"; @@ -319,8 +319,8 @@ crypto: crypto@73a000 { compatible = "qcom,crypto-v5.1"; reg = <0x0 0x0073a000 0x0 0x6000>; clocks = <&gcc GCC_CRYPTO_AHB_CLK>, - <&gcc GCC_CRYPTO_AXI_CLK>, - <&gcc GCC_CRYPTO_CLK>; + <&gcc GCC_CRYPTO_AXI_CLK>, + <&gcc GCC_CRYPTO_CLK>; clock-names = "iface", "bus", "core"; dmas = <&cryptobam 2>, <&cryptobam 3>; dma-names = "rx", "tx"; @@ -425,7 +425,7 @@ blsp1_uart3: serial@78b1000 { reg = <0x0 0x078b1000 0x0 0x200>; interrupts = ; clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; + <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; @@ -438,7 +438,7 @@ blsp1_spi1: spi@78b5000 { interrupts = ; spi-max-frequency = <50000000>; clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; + <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; dmas = <&blsp_dma 12>, <&blsp_dma 13>; dma-names = "tx", "rx"; @@ -453,7 +453,7 @@ blsp1_spi2: spi@78b6000 { interrupts = ; spi-max-frequency = <50000000>; clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; + <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; dmas = <&blsp_dma 14>, <&blsp_dma 15>; dma-names = "tx", "rx"; @@ -511,8 +511,8 @@ qpic_nand: nand-controller@79b0000 { clock-names = "core", "aon"; dmas = <&qpic_bam 0>, - <&qpic_bam 1>, - <&qpic_bam 2>; + <&qpic_bam 1>, + <&qpic_bam 2>; dma-names = "tx", "rx", "cmd"; pinctrl-0 = <&qpic_pins>; pinctrl-names = "default"; @@ -527,13 +527,13 @@ usb3: usb@8af8800 { ranges; clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, - <&gcc GCC_USB0_MASTER_CLK>, - <&gcc GCC_USB0_SLEEP_CLK>, - <&gcc GCC_USB0_MOCK_UTMI_CLK>; + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; clock-names = "cfg_noc", - "core", - "sleep", - "mock_utmi"; + "core", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, <&gcc GCC_USB0_MASTER_CLK>, @@ -568,10 +568,10 @@ intc: interrupt-controller@b000000 { #size-cells = <2>; interrupt-controller; #interrupt-cells = <0x3>; - reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/ - <0x0 0x0b002000 0x0 0x1000>, /*GICC*/ - <0x0 0x0b001000 0x0 0x1000>, /*GICH*/ - <0x0 0x0b004000 0x0 0x1000>; /*GICV*/ + reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/ + <0x0 0x0b002000 0x0 0x1000>, /*GICC*/ + <0x0 0x0b001000 0x0 0x1000>, /*GICH*/ + <0x0 0x0b004000 0x0 0x1000>; /*GICV*/ interrupts = ; ranges = <0 0 0 0xb00a000 0 0xffd>; From patchwork Sat Dec 31 12:58:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37847 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330377wrt; Sat, 31 Dec 2022 05:01:13 -0800 (PST) X-Google-Smtp-Source: AMrXdXuAyFDHrAUvNnRGJT1k4sIghLR1citsrwOwNsN6Qu/deNEElhS3SQJ6wCqRQRwDS0/P2aoi X-Received: by 2002:a05:6402:8d9:b0:462:8a68:1398 with SMTP id d25-20020a05640208d900b004628a681398mr40346635edz.1.1672491672887; Sat, 31 Dec 2022 05:01:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491672; cv=none; d=google.com; s=arc-20160816; b=Albt+y+epdthVwEjRDppG0WXBsFktsIW9RwO3bKJz5yRXQjnWkbPs/4sQUWx8mUpNC e4nBfOIUvV4cDSrJLqalRZbB+VfC9NUDCram0psRSpAJvnyBKp/JI3pyERvfdP23Uag5 bnTxBt7ImnmMrXYw3PjkKP6SIWAtFgRwtYIrutHpBOYK033fzjichOgyixsBUXulw0Rw yx34XGzyRS5ZFW8rfqJvAL0YDnJW44Dlfp9VIxLD0zeIsgw9gqpZuYhr08BemC1kE2/o K49ueyxuP5BHVS7x7R9XL74j6RLTdehf1lLZfaOQTKK6vIFZcXGywBGDGt5ISFvQ08Y7 6f3Q== ARC-Message-Signature: i=1; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:22 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/18] arm64: dts: qcom: ipq6018: Add/remove some newlines Date: Sat, 31 Dec 2022 13:58:58 +0100 Message-Id: <20221231125911.437599-6-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734628266395016?= X-GMAIL-MSGID: =?utf-8?q?1753734628266395016?= Some lines were broken very aggresively, presumably to fit under 80 chars and some places could have used a newline, particularly between subsequent nodes. Address all that and remove redundant comments near PCIe ranges while at it so as not to exceed 100 chars needlessly. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 5452bb85f8e1..6b4f653239ab 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -102,26 +102,31 @@ opp-864000000 { opp-microvolt = <725000>; clock-latency-ns = <200000>; }; + opp-1056000000 { opp-hz = /bits/ 64 <1056000000>; opp-microvolt = <787500>; clock-latency-ns = <200000>; }; + opp-1320000000 { opp-hz = /bits/ 64 <1320000000>; opp-microvolt = <862500>; clock-latency-ns = <200000>; }; + opp-1440000000 { opp-hz = /bits/ 64 <1440000000>; opp-microvolt = <925000>; clock-latency-ns = <200000>; }; + opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <987500>; clock-latency-ns = <200000>; }; + opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1062500>; @@ -131,8 +136,7 @@ opp-1800000000 { pmuv8: pmu { compatible = "arm,cortex-a53-pmu"; - interrupts = ; + interrupts = ; }; psci: psci { @@ -734,24 +738,18 @@ pcie0: pci@20000000 { phys = <&pcie_phy0>; phy-names = "pciephy"; - ranges = <0x81000000 0 0x20200000 0 0x20200000 - 0 0x10000>, /* downstream I/O */ - <0x82000000 0 0x20220000 0 0x20220000 - 0 0xfde0000>; /* non-prefetchable memory */ + ranges = <0x81000000 0 0x20200000 0 0x20200000 0 0x10000>, + <0x82000000 0 0x20220000 0 0x20220000 0 0xfde0000>; interrupts = ; interrupt-names = "msi"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 75 - IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 78 - IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 79 - IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 83 - IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + interrupt-map = <0 0 0 1 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, <&gcc GCC_PCIE0_AXI_M_CLK>, From patchwork Sat Dec 31 12:58:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37845 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330212wrt; Sat, 31 Dec 2022 05:00:55 -0800 (PST) X-Google-Smtp-Source: AMrXdXsuC7VpkWZkMDNl9qLRda8gSm6ov9Oap4+uDUTZWoGBTBpQlAoSguHMehqSDmFBxcO2ke6j X-Received: by 2002:a17:907:3e96:b0:7c4:f501:e5b1 with SMTP id hs22-20020a1709073e9600b007c4f501e5b1mr40310190ejc.51.1672491655576; Sat, 31 Dec 2022 05:00:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491655; cv=none; d=google.com; s=arc-20160816; b=ll9aHkegrxNLafzSQLNPO6agEMqW67cKCIOlkUfcxTt1TIGQhPsIA7RwzU6/xc0/m2 XRMDa7deDoTLviLbVkLQOUDVi8Ud/DdTdNLfnVwhcMBulzebK1H4/fOBThjZYN5vF7Ny kNrhMq3qC2mJSp5wXsx6Fyrv5NA+ozDhNgqoL1MS5F97c8x1ftEb+8qaYGSyZovM3luW PzmSh7pyxoZg42IXr3svH9JS4YDCaCUeQjEk25jaX0fI9PK+9b1vAJKaMl3QiZi2A9Ez RFr2/MCA5Damb53c+AsvQXbaNXzE835tnC6XrMk7tb9EZvGgsa8q5IoaHxywySZ1w7Au ekFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wC4KquS4PXG80qs7tBamab98eZOLfMD9893rTZBGhoc=; b=P/l2apIxikocvqOazMUuhhZUKQ/9VIxZrA5/sFNbSLNecdgf8AtzRYii7lLDxi5eff VzVvhJG9RMgF3PHdhF8NxF7k0DOkxcCCxQnJfAO9cvRon0wwcZ/N5n50Q/6eJlFhpqyW oW1tl/bhgtzak7Ib7OWwtdzzwA+R6ATagyctuUqqkZakhq6sLVmEHMG/qMudMCEHSUz8 oiGagcDqip/JLfVGjMDU1a7rcsnexw5FG5KSIuwjGbKdVMov5tUm2UADm6DUI+OFURtg YEyOewX2b44BUy+dk0xs7GHVxh3jDF8nmzsF+XNZjsrnkjp1LDrI+lAM18l7ckBg3Gda wMqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ujtBjonN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:24 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/18] arm64: dts: qcom: ipq6018: Use lowercase hex Date: Sat, 31 Dec 2022 13:58:59 +0100 Message-Id: <20221231125911.437599-7-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734610293506503?= X-GMAIL-MSGID: =?utf-8?q?1753734610293506503?= One value escaped my previous lowercase hexification. Take care of it. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 6b4f653239ab..8e95ed633071 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -381,7 +381,7 @@ tcsr: syscon@1937000 { usb2: usb@70f8800 { compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; - reg = <0x0 0x070F8800 0x0 0x400>; + reg = <0x0 0x070f8800 0x0 0x400>; #address-cells = <2>; #size-cells = <2>; ranges; From patchwork Sat Dec 31 12:59:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37851 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330918wrt; Sat, 31 Dec 2022 05:02:02 -0800 (PST) X-Google-Smtp-Source: AMrXdXvislq7lkqlg6eMc4/uieBp3WE/h9D7CtA2vnlS0a+WPNInxcjWC7GH11s4uSWXSc0+YjSQ X-Received: by 2002:a05:6a20:a687:b0:af:7cf6:1d4b with SMTP id ba7-20020a056a20a68700b000af7cf61d4bmr45677549pzb.23.1672491721974; Sat, 31 Dec 2022 05:02:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491721; cv=none; d=google.com; s=arc-20160816; b=ZyJzUGJSpWeZKbfqaUxljCDrZ1sJycNXkxJpL+6Splf6M/Fu5n4JP4x+mdXBqSfKbL +nCHj/xY2Y3ZNfOk+PYvilRt5E3BpwP1C4fMEewVPCTwu20TBEz+9RAgPj5Bh1A30SlP VO84SJUbGuHI1bWGVKC6QUiF11pZQJjU1VUMrq5AmV0s3Z6miBFaNxvMjNwBYq70n9lw aV9scTWUR2z3cBDm2+SLTZlXkgJ+fL1pUXi/fVqWPxSX6WG7EzAGJEz41aV/oRJ6v7Bf aACsY+w5SHJzjgI69rFtQ8cOmYevuBZaCJCBHnR7Uz1XzLGV786tUrs5ZNRAoCpuyeij HzDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Y0/yh30TX3P3thMHhy5QlVltGsQL16sP6TloiMVZS0E=; b=CWJDf8/JOcrYjK3CJilU7EMzS5qnu+eIFC/q4Rk3NuGCfmR47kpPIPl/urnO9mYmKt z4XS4FjxsQ0VUnkziMoARLkoSfYfBtCCpsPvRihLtPodFaA9tVuHoRwo7/6eQUp/R+bS c3k8RSXl0dkMUY1ptBZvloywJyNDgcwM0ZBODxzV4JJrG4gnGTXxhaXKAva7aormeHUg ZGWf9nvwyY3Neli5+Z5WdAnggA0wzgEeVRW5j+1azCjnxzrqfDtHZSNwFzmLEg5mZHeA DduQQLa8f20CrG9gZ5BTHl/BtCZfKVHj32a7pJ5HnFuxlYuvBb/eJQlt7soVIGUQ3iDQ vFkw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="l/wOdi5F"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:25 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/18] arm64: dts: qcom: sc8280xp: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:00 +0100 Message-Id: <20221231125911.437599-8-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734680059723018?= X-GMAIL-MSGID: =?utf-8?q?1753734680059723018?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 109c9d2b684d..a359ced4b6b4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1765,7 +1765,7 @@ usb_1_ssphy: usb3-phy@8903400 { pmu@9091000 { compatible = "qcom,sc8280xp-llcc-bwmon", "qcom,sc7280-llcc-bwmon"; - reg = <0 0x9091000 0 0x1000>; + reg = <0 0x09091000 0 0x1000>; interrupts = ; From patchwork Sat Dec 31 12:59:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37846 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330259wrt; Sat, 31 Dec 2022 05:00:59 -0800 (PST) X-Google-Smtp-Source: AMrXdXvmXu7p4/pojqjBdhsxFXA0CfzrSKyiEfkPALhf3KdOM3Afv5kaZQ35X4ui0/qgRLMG9/uN X-Received: by 2002:a05:6402:4518:b0:46c:b2a7:1e03 with SMTP id ez24-20020a056402451800b0046cb2a71e03mr26522866edb.36.1672491659672; Sat, 31 Dec 2022 05:00:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491659; cv=none; d=google.com; s=arc-20160816; b=pLQjpXOp3d9nB6Hyw+5qSDywqzLw6vXi1z0J3ARgfrDGbJjB3mmbXfJYrecl1i80ZR GsSg+mZ9IIX4u4CCui7WETDJ9IvnAFuO5uhpMBsQwcem30IVRZnD5thTlFLWpep208ZO mMztCtjnRNWoGrPyE5PdBOzpfh/1/xVhCPHYlTaMtg4wGdCToXz5IOlV4IhaN0VNTvWD Q1k08X24pwXOjqijMe35arVI7tf/qdmzM9qQboCOORrqDNcnqfzA0ygfUQkfYQuCAQ9c hLjg5Nu7NPoUn8uPqfzZ8NDnQ9ZEhJ0Di9e1Gs6LmixbvZ3GtXwyQWjvVGNq3mVJ9rvu r7NQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=78M1VxkQEgQNebOsb03CLOsZ6h3IoIME+2i3SA10AUc=; b=p2h3/9nIQ8pFgXlG8WoiDeKDGpczTlcEUUi43Rt1Ihv7qfv3DsrVJ2pl8nITeP891H yH/qDdI1yiSrwzw9th0Zr3IhlYBrRKaRdLR3JWl1gXF4SR8Bjqgm/QgJ/7rsMpsLK4EG iFuockdoU3UjqIae5xatdhZzgIVkYxGVKRSPdToVZ28g7bqZoVQhyqccZ9mNNAY3gyzF 24e1KWU8uwJbR3DB5HY4MdC5S6l1yijqrnyPvfiXZqnHKbw3lUcpVNyzl0sC+p7EiyRA 1Qqmrl9vto/fdmHvhMGn4gw2XI9SACBABodffdVDCjtQfwRqvElIF1RNIERxFbkcMrIB uf6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JsbqEg2x; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:27 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/18] arm64: dts: qcom: sm8150: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:01 +0100 Message-Id: <20221231125911.437599-9-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734614574108142?= X-GMAIL-MSGID: =?utf-8?q?1753734614574108142?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 68 ++++++++++++++-------------- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 73f39bbeab13..f6b16c31e8b0 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -890,7 +890,7 @@ gcc: clock-controller@100000 { gpi_dma0: dma-controller@800000 { compatible = "qcom,sm8150-gpi-dma", "qcom,sdm845-gpi-dma"; - reg = <0 0x800000 0 0x60000>; + reg = <0 0x00800000 0 0x60000>; interrupts = , , , @@ -979,7 +979,7 @@ i2c0: i2c@880000 { spi0: spi@880000 { compatible = "qcom,geni-spi"; - reg = <0 0x880000 0 0x4000>; + reg = <0 0x00880000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; @@ -1013,7 +1013,7 @@ i2c1: i2c@884000 { spi1: spi@884000 { compatible = "qcom,geni-spi"; - reg = <0 0x884000 0 0x4000>; + reg = <0 0x00884000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; @@ -1047,7 +1047,7 @@ i2c2: i2c@888000 { spi2: spi@888000 { compatible = "qcom,geni-spi"; - reg = <0 0x888000 0 0x4000>; + reg = <0 0x00888000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; @@ -1081,7 +1081,7 @@ i2c3: i2c@88c000 { spi3: spi@88c000 { compatible = "qcom,geni-spi"; - reg = <0 0x88c000 0 0x4000>; + reg = <0 0x0088c000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; @@ -1115,7 +1115,7 @@ i2c4: i2c@890000 { spi4: spi@890000 { compatible = "qcom,geni-spi"; - reg = <0 0x890000 0 0x4000>; + reg = <0 0x00890000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; @@ -1149,7 +1149,7 @@ i2c5: i2c@894000 { spi5: spi@894000 { compatible = "qcom,geni-spi"; - reg = <0 0x894000 0 0x4000>; + reg = <0 0x00894000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; @@ -1183,7 +1183,7 @@ i2c6: i2c@898000 { spi6: spi@898000 { compatible = "qcom,geni-spi"; - reg = <0 0x898000 0 0x4000>; + reg = <0 0x00898000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; @@ -1217,7 +1217,7 @@ i2c7: i2c@89c000 { spi7: spi@89c000 { compatible = "qcom,geni-spi"; - reg = <0 0x89c000 0 0x4000>; + reg = <0 0x0089c000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; @@ -1236,7 +1236,7 @@ spi7: spi@89c000 { gpi_dma1: dma-controller@a00000 { compatible = "qcom,sm8150-gpi-dma", "qcom,sdm845-gpi-dma"; - reg = <0 0xa00000 0 0x60000>; + reg = <0 0x00a00000 0 0x60000>; interrupts = , , , @@ -1287,7 +1287,7 @@ i2c8: i2c@a80000 { spi8: spi@a80000 { compatible = "qcom,geni-spi"; - reg = <0 0xa80000 0 0x4000>; + reg = <0 0x00a80000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; @@ -1321,7 +1321,7 @@ i2c9: i2c@a84000 { spi9: spi@a84000 { compatible = "qcom,geni-spi"; - reg = <0 0xa84000 0 0x4000>; + reg = <0 0x00a84000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; @@ -1355,7 +1355,7 @@ i2c10: i2c@a88000 { spi10: spi@a88000 { compatible = "qcom,geni-spi"; - reg = <0 0xa88000 0 0x4000>; + reg = <0 0x00a88000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; @@ -1389,7 +1389,7 @@ i2c11: i2c@a8c000 { spi11: spi@a8c000 { compatible = "qcom,geni-spi"; - reg = <0 0xa8c000 0 0x4000>; + reg = <0 0x00a8c000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; @@ -1432,7 +1432,7 @@ i2c12: i2c@a90000 { spi12: spi@a90000 { compatible = "qcom,geni-spi"; - reg = <0 0xa90000 0 0x4000>; + reg = <0 0x00a90000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; @@ -1450,7 +1450,7 @@ spi12: spi@a90000 { i2c16: i2c@94000 { compatible = "qcom,geni-i2c"; - reg = <0 0x0094000 0 0x4000>; + reg = <0 0x00094000 0 0x4000>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>, @@ -1466,7 +1466,7 @@ i2c16: i2c@94000 { spi16: spi@a94000 { compatible = "qcom,geni-spi"; - reg = <0 0xa94000 0 0x4000>; + reg = <0 0x00a94000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; @@ -1485,7 +1485,7 @@ spi16: spi@a94000 { gpi_dma2: dma-controller@c00000 { compatible = "qcom,sm8150-gpi-dma", "qcom,sdm845-gpi-dma"; - reg = <0 0xc00000 0 0x60000>; + reg = <0 0x00c00000 0 0x60000>; interrupts = , , , @@ -1537,7 +1537,7 @@ i2c17: i2c@c80000 { spi17: spi@c80000 { compatible = "qcom,geni-spi"; - reg = <0 0xc80000 0 0x4000>; + reg = <0 0x00c80000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; @@ -1571,7 +1571,7 @@ i2c18: i2c@c84000 { spi18: spi@c84000 { compatible = "qcom,geni-spi"; - reg = <0 0xc84000 0 0x4000>; + reg = <0 0x00c84000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; @@ -1605,7 +1605,7 @@ i2c19: i2c@c88000 { spi19: spi@c88000 { compatible = "qcom,geni-spi"; - reg = <0 0xc88000 0 0x4000>; + reg = <0 0x00c88000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; @@ -1639,7 +1639,7 @@ i2c13: i2c@c8c000 { spi13: spi@c8c000 { compatible = "qcom,geni-spi"; - reg = <0 0xc8c000 0 0x4000>; + reg = <0 0x00c8c000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; @@ -1673,7 +1673,7 @@ i2c14: i2c@c90000 { spi14: spi@c90000 { compatible = "qcom,geni-spi"; - reg = <0 0xc90000 0 0x4000>; + reg = <0 0x00c90000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; @@ -1707,7 +1707,7 @@ i2c15: i2c@c94000 { spi15: spi@c94000 { compatible = "qcom,geni-spi"; - reg = <0 0xc94000 0 0x4000>; + reg = <0 0x00c94000 0 0x4000>; reg-names = "se"; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; @@ -1864,10 +1864,10 @@ pcie0_phy: phy@1c06000 { status = "disabled"; pcie0_lane: phy@1c06200 { - reg = <0 0x1c06200 0 0x170>, /* tx */ - <0 0x1c06400 0 0x200>, /* rx */ - <0 0x1c06800 0 0x1f0>, /* pcs */ - <0 0x1c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ + reg = <0 0x01c06200 0 0x170>, /* tx */ + <0 0x01c06400 0 0x200>, /* rx */ + <0 0x01c06800 0 0x1f0>, /* pcs */ + <0 0x01c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; clock-names = "pipe0"; @@ -1963,12 +1963,12 @@ pcie1_phy: phy@1c0e000 { status = "disabled"; pcie1_lane: phy@1c0e200 { - reg = <0 0x1c0e200 0 0x170>, /* tx0 */ - <0 0x1c0e400 0 0x200>, /* rx0 */ - <0 0x1c0ea00 0 0x1f0>, /* pcs */ - <0 0x1c0e600 0 0x170>, /* tx1 */ - <0 0x1c0e800 0 0x200>, /* rx1 */ - <0 0x1c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ + reg = <0 0x01c0e200 0 0x170>, /* tx0 */ + <0 0x01c0e400 0 0x200>, /* rx0 */ + <0 0x01c0ea00 0 0x1f0>, /* pcs */ + <0 0x01c0e600 0 0x170>, /* tx1 */ + <0 0x01c0e800 0 0x200>, /* rx1 */ + <0 0x01c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; clock-names = "pipe0"; From patchwork Sat Dec 31 12:59:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37848 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330503wrt; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:28 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/18] arm64: dts: qcom: sm6350: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:02 +0100 Message-Id: <20221231125911.437599-10-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734639598410792?= X-GMAIL-MSGID: =?utf-8?q?1753734639598410792?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 8944dcbbe3a2..e71ffc31d41e 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -557,7 +557,7 @@ gpi_dma0: dma-controller@800000 { qupv3_id_0: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; - reg = <0x0 0x8c0000 0x0 0x2000>; + reg = <0x0 0x008c0000 0x0 0x2000>; clock-names = "m-ahb", "s-ahb"; clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; @@ -630,7 +630,7 @@ gpi_dma1: dma-controller@900000 { qupv3_id_1: geniqup@9c0000 { compatible = "qcom,geni-se-qup"; - reg = <0x0 0x9c0000 0x0 0x2000>; + reg = <0x0 0x009c0000 0x0 0x2000>; clock-names = "m-ahb", "s-ahb"; clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; @@ -702,7 +702,7 @@ i2c8: i2c@988000 { uart9: serial@98c000 { compatible = "qcom,geni-debug-uart"; - reg = <0 0x98c000 0 0x4000>; + reg = <0 0x0098c000 0 0x4000>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; pinctrl-names = "default"; @@ -1654,11 +1654,11 @@ aoss_qmp: power-controller@c300000 { spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; - reg = <0 0xc440000 0 0x1100>, - <0 0xc600000 0 0x2000000>, - <0 0xe600000 0 0x100000>, - <0 0xe700000 0 0xa0000>, - <0 0xc40a000 0 0x26000>; + reg = <0 0x0c440000 0 0x1100>, + <0 0x0c600000 0 0x2000000>, + <0 0x0e600000 0 0x100000>, + <0 0x0e700000 0 0xa0000>, + <0 0x0c40a000 0 0x26000>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; From patchwork Sat Dec 31 12:59:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37849 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330672wrt; Sat, 31 Dec 2022 05:01:41 -0800 (PST) X-Google-Smtp-Source: AMrXdXv3qu0HOolmN6S+JsYbs6bAJ8mJAi0OuvBNiqlE54ewqjB/y0AI445bNlj6duzA0UkwjPee X-Received: by 2002:a17:907:9b06:b0:83f:8e58:6427 with SMTP id kn6-20020a1709079b0600b0083f8e586427mr27868235ejc.63.1672491701418; Sat, 31 Dec 2022 05:01:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491701; cv=none; d=google.com; s=arc-20160816; b=INqdMdBDSwAwKYwdH0TZzwXiaNGmlry0rgW0Ny0sk25sEYFlukjc5xIE8OThGpVmfm mctQu54gWHlrjOglnN7X5StYGj9oi3bcdmoKAXL46Vn1GtgGhjCjvELcq7YMLf4/9Sbm 6+lqXglbt0XYG5+6+VXQ0hKSwYtfSzu9NmKju++7tijop0RxV+I8DUWx5O3i+yWR5Ruy sMG+BQ56QZFnly7r9pQUMaoBpLVvmPmsdOD+iXQOveCdxGiHJXyUUH21sH8FmZGEfdbL iNXDHDJGrMt4aDIzWw40JL/FfwlFFH/9Gkn25tpsgM7sT1GwMaL14xc+RNDxbQ3HKMYY NcsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iOBtY/5KLzv3pd6FD2rBqtPQmNoLaC+FYAfgDPpsDhk=; b=qDgJlKNl8xPaj2w2G20jlOJvYcj0xXFBLnxTPs47vEUtQY75sl9JveO6EZkpnCLI1N qvLcbDSEpEMT9HrhJYj9mRsUCed49j7qrRmYb5wLRh+r6C8vm1jMsj8o0QKx0CltLM8j hc5k5KlTMWx2KYL+6I1Ctkezt5dOc8Emd7gEE0nbKzqZdNOItBmpcVAbHTOQYtzDX2Ij xAgCBhkQExjqHN+JAwq9n8w/8+wpxw9hsScKnOWyRp3LPbkJksfjYo3AbrByJBXDPmcj n7gVovKGAqipsJFZOILGk3bhC8w2ziF1b2e3m6TZtqZB7nmTyDqNoVZ9QU4dZAI6lw4q f4Jg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GCZSnJqW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:29 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/18] arm64: dts: qcom: sdm845: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:03 +0100 Message-Id: <20221231125911.437599-11-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734658523721571?= X-GMAIL-MSGID: =?utf-8?q?1753734658523721571?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 46 ++++++++++++++-------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 154f5054a200..44bb3509df62 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2585,9 +2585,9 @@ ipa: ipa@1e40000 { iommus = <&apps_smmu 0x720 0x0>, <&apps_smmu 0x722 0x0>; - reg = <0 0x1e40000 0 0x7000>, - <0 0x1e47000 0 0x2000>, - <0 0x1e04000 0 0x2c000>; + reg = <0 0x01e40000 0 0x7000>, + <0 0x01e47000 0 0x2000>, + <0 0x01e04000 0 0x2c000>; reg-names = "ipa-reg", "ipa-shared", "gsi"; @@ -4237,16 +4237,16 @@ videocc: clock-controller@ab00000 { camss: camss@a00000 { compatible = "qcom,sdm845-camss"; - reg = <0 0xacb3000 0 0x1000>, - <0 0xacba000 0 0x1000>, - <0 0xacc8000 0 0x1000>, - <0 0xac65000 0 0x1000>, - <0 0xac66000 0 0x1000>, - <0 0xac67000 0 0x1000>, - <0 0xac68000 0 0x1000>, - <0 0xacaf000 0 0x4000>, - <0 0xacb6000 0 0x4000>, - <0 0xacc4000 0 0x4000>; + reg = <0 0x0acb3000 0 0x1000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc8000 0 0x1000>, + <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0ac68000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acc4000 0 0x4000>; reg-names = "csid0", "csid1", "csid2", @@ -4575,11 +4575,11 @@ mdss_dp: displayport-controller@ae90000 { status = "disabled"; compatible = "qcom,sdm845-dp"; - reg = <0 0xae90000 0 0x200>, - <0 0xae90200 0 0x200>, - <0 0xae90400 0 0x600>, - <0 0xae90a00 0 0x600>, - <0 0xae91000 0 0x600>; + reg = <0 0x0ae90000 0 0x200>, + <0 0x0ae90200 0 0x200>, + <0 0x0ae90400 0 0x600>, + <0 0x0ae90a00 0 0x600>, + <0 0x0ae91000 0 0x600>; interrupt-parent = <&mdss>; interrupts = <12>; @@ -4788,7 +4788,7 @@ dsi1_phy: phy@ae96400 { gpu: gpu@5000000 { compatible = "qcom,adreno-630.2", "qcom,adreno"; - reg = <0 0x5000000 0 0x40000>, <0 0x509e000 0 0x10>; + reg = <0 0x05000000 0 0x40000>, <0 0x509e000 0 0x10>; reg-names = "kgsl_3d0_reg_memory", "cx_mem"; /* @@ -4858,7 +4858,7 @@ opp-257000000 { adreno_smmu: iommu@5040000 { compatible = "qcom,sdm845-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2"; - reg = <0 0x5040000 0 0x10000>; + reg = <0 0x05040000 0 0x10000>; #iommu-cells = <1>; #global-interrupts = <2>; interrupts = , @@ -4881,9 +4881,9 @@ adreno_smmu: iommu@5040000 { gmu: gmu@506a000 { compatible = "qcom,adreno-gmu-630.2", "qcom,adreno-gmu"; - reg = <0 0x506a000 0 0x30000>, - <0 0xb280000 0 0x10000>, - <0 0xb480000 0 0x10000>; + reg = <0 0x0506a000 0 0x30000>, + <0 0x0b280000 0 0x10000>, + <0 0x0b480000 0 0x10000>; reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq"; interrupts = , From patchwork Sat Dec 31 12:59:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37850 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330856wrt; Sat, 31 Dec 2022 05:01:56 -0800 (PST) X-Google-Smtp-Source: AMrXdXtROPJobdWahIFJKlUmEa8sBUAQSKoYEHvKnBWepOm5GGwfNinB2cphe65KWer62V+r3PtO X-Received: by 2002:a17:907:8d03:b0:7c0:d522:decb with SMTP id tc3-20020a1709078d0300b007c0d522decbmr31547491ejc.76.1672491716593; Sat, 31 Dec 2022 05:01:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491716; cv=none; d=google.com; s=arc-20160816; b=bOdYuMqaYOwGTdUg27Aax0cha46cfXEZUIMT3OM8Q0AN1uF+2kc3DMWOclnV6dviSd 05cz/S+Tgh43cutXVF2R/26f1bSh7w3qIna0jo+yczoYNb81m24jp3r9h+SICeWXAJYu aAotEaj3D+ZlnV0dRGPk5kW+pjugH+elLIxrGj+P2PqkgjtwBPXYoYKEx/jnXW9+qZIU rMp9jkvP/ElkrwBCM7eAvfwhLynMC5tnb9kxGdyEofvMHl1T2BgdI/bdllECRpRK+lK8 Axuhgse/kjhKLPYLlwsqbmX/mLjmWv0pUEPxyiiZXd3k76dy5HrakLUqhjsHftXsXjLN j9kQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=lJ65VvJ3kX6hIqWv3QscxYLubIMP/hUfG0etyqa3ojA=; b=fPDOyR50m48b0MMMQDq56RVwsd/5TrOBGCEqFmix6zn/g1vFAyjaYr6mhwEI5yco2C j/W5VjE4qQwO5iaZw+SoPFhdiEfjud8JsNL75nXA0lXcfLp5pRiQszqS4aj+Tuec5BzF c5zNeKnwXZuWWw/dTgyiqjNSvrxJ6eJF1sn7iNS7iUqXwd/cVlOPWSBT8Z0KfcwOlg1g ZdMDT/cgHuLIuLvcWuIN7nZmEMW10fYLHVjEn3T6ugQ02aYs9BATpUaDVnzYJdlTgW9k K7s3a3ttQRTYZ7sWsTGL/nLKGW5FaujM5OPZ4PbSKd7l76nSHGAirsXFgX8ChkKnKtdc HnAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mLFszxd4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:31 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/18] arm64: dts: qcom: sm8250: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:04 +0100 Message-Id: <20221231125911.437599-12-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734673842659359?= X-GMAIL-MSGID: =?utf-8?q?1753734673842659359?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 54 ++++++++++++++-------------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 0b6a6a809503..a642ff1af094 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1899,10 +1899,10 @@ pcie0_phy: phy@1c06000 { status = "disabled"; pcie0_lane: phy@1c06200 { - reg = <0 0x1c06200 0 0x170>, /* tx */ - <0 0x1c06400 0 0x200>, /* rx */ - <0 0x1c06800 0 0x1f0>, /* pcs */ - <0 0x1c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ + reg = <0 0x01c06200 0 0x170>, /* tx */ + <0 0x01c06400 0 0x200>, /* rx */ + <0 0x01c06800 0 0x1f0>, /* pcs */ + <0 0x01c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; clock-names = "pipe0"; @@ -2005,12 +2005,12 @@ pcie1_phy: phy@1c0e000 { status = "disabled"; pcie1_lane: phy@1c0e200 { - reg = <0 0x1c0e200 0 0x170>, /* tx0 */ - <0 0x1c0e400 0 0x200>, /* rx0 */ - <0 0x1c0ea00 0 0x1f0>, /* pcs */ - <0 0x1c0e600 0 0x170>, /* tx1 */ - <0 0x1c0e800 0 0x200>, /* rx1 */ - <0 0x1c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ + reg = <0 0x01c0e200 0 0x170>, /* tx0 */ + <0 0x01c0e400 0 0x200>, /* rx0 */ + <0 0x01c0ea00 0 0x1f0>, /* pcs */ + <0 0x01c0e600 0 0x170>, /* tx1 */ + <0 0x01c0e800 0 0x200>, /* rx1 */ + <0 0x01c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; clock-names = "pipe0"; @@ -2094,7 +2094,7 @@ pcie2: pci@1c10000 { pcie2_phy: phy@1c16000 { compatible = "qcom,sm8250-qmp-modem-pcie-phy"; - reg = <0 0x1c16000 0 0x1c0>; + reg = <0 0x01c16000 0 0x1c0>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -2113,12 +2113,12 @@ pcie2_phy: phy@1c16000 { status = "disabled"; pcie2_lane: phy@1c16200 { - reg = <0 0x1c16200 0 0x170>, /* tx0 */ - <0 0x1c16400 0 0x200>, /* rx0 */ - <0 0x1c16a00 0 0x1f0>, /* pcs */ - <0 0x1c16600 0 0x170>, /* tx1 */ - <0 0x1c16800 0 0x200>, /* rx1 */ - <0 0x1c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ + reg = <0 0x01c16200 0 0x170>, /* tx0 */ + <0 0x01c16400 0 0x200>, /* rx0 */ + <0 0x01c16a00 0 0x1f0>, /* pcs */ + <0 0x01c16600 0 0x170>, /* tx1 */ + <0 0x01c16800 0 0x200>, /* rx1 */ + <0 0x01c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; clock-names = "pipe0"; @@ -3792,16 +3792,16 @@ camss: camss@ac6a000 { compatible = "qcom,sm8250-camss"; status = "disabled"; - reg = <0 0xac6a000 0 0x2000>, - <0 0xac6c000 0 0x2000>, - <0 0xac6e000 0 0x1000>, - <0 0xac70000 0 0x1000>, - <0 0xac72000 0 0x1000>, - <0 0xac74000 0 0x1000>, - <0 0xacb4000 0 0xd000>, - <0 0xacc3000 0 0xd000>, - <0 0xacd9000 0 0x2200>, - <0 0xacdb200 0 0x2200>; + reg = <0 0x0ac6a000 0 0x2000>, + <0 0x0ac6c000 0 0x2000>, + <0 0x0ac6e000 0 0x1000>, + <0 0x0ac70000 0 0x1000>, + <0 0x0ac72000 0 0x1000>, + <0 0x0ac74000 0 0x1000>, + <0 0x0acb4000 0 0xd000>, + <0 0x0acc3000 0 0xd000>, + <0 0x0acd9000 0 0x2200>, + <0 0x0acdb200 0 0x2200>; reg-names = "csiphy0", "csiphy1", "csiphy2", From patchwork Sat Dec 31 12:59:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37858 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3332145wrt; Sat, 31 Dec 2022 05:04:13 -0800 (PST) X-Google-Smtp-Source: AMrXdXtDQ9B9KwIWyyQq0DGeWMGtsrcM3uSuKREfxQwkm6/MOAYpjdtH9f4F6WAe/bDK7Ggcc3hX X-Received: by 2002:a17:90a:b306:b0:218:d7ee:d4ba with SMTP id d6-20020a17090ab30600b00218d7eed4bamr39299780pjr.3.1672491853610; Sat, 31 Dec 2022 05:04:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491853; cv=none; d=google.com; s=arc-20160816; b=RWdAT+WmKLiZieo7i51LDm6iEuGjceBBCPF/YjTPXxf3SFVN50OQGafIJzxHuoV/Z+ 98WrCJVCpjxcYUqHK4aEr59XKT6eop5nOwuo6xpYtRDEtnkKxQYU7pBJnl7VPoBH+Bl/ ZTftZHMvswvNU03VNhwTi50MS7C/AJTETbEMxLuj139pONG+gxjMkw9nIjc4h4PvE7Pn +IOn6Tr++0h0I2d0gHjbweEWLq0NBY36NdJhnKyTiNJoeVrn/8dDQ0wKrLSrfo8dGDyJ nptxnee4AAj95I6/IOaOSRGupgmUz7FVANQRHjjWDs47D+iGOGVnqmoAPsGPrgF56LMQ 9ZgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=oblM6MazKj47KI6mVE2SFSZqU9kEVRoASZWd8seUR0E=; b=HJ51yanYSnZKIX3IIDeo9VCyvC6OqrgmDQ1kDslyk6k6Q/mFKwpUDul/VebMSphPuf p5IvLVJMf3W/l92v/4In1FM8vhhHTJNbqRLDV7wVXTRgizScOAnXct5dKeZFVoGzbcFT 0zW1reDpYCDXTS60Ua53ixnO9e8NamOorllh5yef0ehzCzuMGEKwMM1/m979mNBshvLj aBVMTTycCZ/iKHMZoOgFu8pDC7jemjvNfAvMy9LMom/R1Y/mj8cmAtKp8ZUDoxks9mCc mvMbvJ6op/KpnfoaJPRm03q4wSMJWlJXx5yvwNQppr9xKC3CmMwNgJsDKmas6zl7ATur VUkg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Qk5YLsv2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:33 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 12/18] arm64: dts: qcom: sm8350: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:05 +0100 Message-Id: <20221231125911.437599-13-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734817750835057?= X-GMAIL-MSGID: =?utf-8?q?1753734817750835057?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 067613ca9c03..5f191ebbf724 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -1598,9 +1598,9 @@ ipa: ipa@1e40000 { iommus = <&apps_smmu 0x5c0 0x0>, <&apps_smmu 0x5c2 0x0>; - reg = <0 0x1e40000 0 0x8000>, - <0 0x1e50000 0 0x4b20>, - <0 0x1e04000 0 0x23000>; + reg = <0 0x01e40000 0 0x8000>, + <0 0x01e50000 0 0x4b20>, + <0 0x01e04000 0 0x23000>; reg-names = "ipa-reg", "ipa-shared", "gsi"; @@ -1731,11 +1731,11 @@ sram@c3f0000 { spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; - reg = <0x0 0xc440000 0x0 0x1100>, - <0x0 0xc600000 0x0 0x2000000>, - <0x0 0xe600000 0x0 0x100000>, - <0x0 0xe700000 0x0 0xa0000>, - <0x0 0xc40a000 0x0 0x26000>; + reg = <0x0 0x0c440000 0x0 0x1100>, + <0x0 0x0c600000 0x0 0x2000000>, + <0x0 0x0e600000 0x0 0x100000>, + <0x0 0x0e700000 0x0 0xa0000>, + <0x0 0x0c40a000 0x0 0x26000>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; From patchwork Sat Dec 31 12:59:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37852 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3330967wrt; Sat, 31 Dec 2022 05:02:08 -0800 (PST) X-Google-Smtp-Source: AMrXdXvwpdqOzbyoglhcZzSfjboW1sKOsTKu8D7NuZHDKHtKd5W1UOqsnc5WzQmqE0t7Qx4b+fjj X-Received: by 2002:a17:902:8ec7:b0:192:4f85:b91d with SMTP id x7-20020a1709028ec700b001924f85b91dmr40935483plo.46.1672491728649; Sat, 31 Dec 2022 05:02:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491728; cv=none; d=google.com; s=arc-20160816; b=KsULcrJFyy46q2bSVuYRxCODb1ObZwgu8R5Kqxh2GIlvVe+EcopwEuLPDCbDVgv1nJ 4JAmM0kid0tIjGV1j/8/nSwFXprOAgmaeNecPsyRBdC1SK17Eq9vu1VdCp/rjCswted7 sPMOzf/ANSIVYrSruy4IoDhg1LcxQ1v/RX2wuHl0ZresnjB7mW7dKBLSrkohgAbrRElc /wp8DcTEfKP5lbGIvYcjfX4R0mOY2EaTLFAqMZ5Ib+77sicfURCUy11+5L3T1mVka9Hh 9nZ0f6RPytt9IzMZ4rLEwj0+fq+lrUbWvgdZmVFjZTUF5HV99huwf9SE8+teI42RRdDX uiqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=AvCj7sLe5EEXOiZsxA6DWV2OM1HHkgdGS5svQOsp/pk=; b=LyP/ZXzAUXVr6jt0r1JRiewTpkpDEZIhWbleAJxU/E7fvARC0Ywfv0vEAb2J1wVE60 LzXt2PrD45yC2M3LXmHG+JAAEqHSoCEc6FlTPlB99NSrWw/HUNKcfs28U3/NtOSC0zlQ tC8h64YEz/sqLOUbz+C7GDxC6B1orKBb52hMDLx+p9lnrRHbkajdEgRGsQ755k8RahSp gXLTxLHmygBYnMgjUsPgqcfiNuFhLyVioVtyKj57h/yBuH4mnx0eak6xW/F4aZUsr79F ePIeuapDVc0YGPeNyB8b09+jt7OPUjXGutU/wvCp5/bTQiSoWz1Nop/kyqaugQM0TGKy vl9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KUF5ypyk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:35 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/18] arm64: dts: qcom: sc7180: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:06 +0100 Message-Id: <20221231125911.437599-14-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734686723944125?= X-GMAIL-MSGID: =?utf-8?q?1753734686723944125?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f71cf21a8dd8..67b9ae3eff83 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -690,8 +690,8 @@ gpu_speed_bin: gpu_speed_bin@1d2 { sdhc_1: mmc@7c4000 { compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; - reg = <0 0x7c4000 0 0x1000>, - <0 0x07c5000 0 0x1000>; + reg = <0 0x007c4000 0 0x1000>, + <0 0x007c5000 0 0x1000>; reg-names = "hc", "cqhci"; iommus = <&apps_smmu 0x60 0x0>; @@ -1421,9 +1421,9 @@ ipa: ipa@1e40000 { iommus = <&apps_smmu 0x440 0x0>, <&apps_smmu 0x442 0x0>; - reg = <0 0x1e40000 0 0x7000>, - <0 0x1e47000 0 0x2000>, - <0 0x1e04000 0 0x2c000>; + reg = <0 0x01e40000 0 0x7000>, + <0 0x01e47000 0 0x2000>, + <0 0x01e04000 0 0x2c000>; reg-names = "ipa-reg", "ipa-shared", "gsi"; @@ -3116,11 +3116,11 @@ mdss_dp: displayport-controller@ae90000 { compatible = "qcom,sc7180-dp"; status = "disabled"; - reg = <0 0xae90000 0 0x200>, - <0 0xae90200 0 0x200>, - <0 0xae90400 0 0xc00>, - <0 0xae91000 0 0x400>, - <0 0xae91400 0 0x400>; + reg = <0 0x0ae90000 0 0x200>, + <0 0x0ae90200 0 0x200>, + <0 0x0ae90400 0 0xc00>, + <0 0x0ae91000 0 0x400>, + <0 0x0ae91400 0 0x400>; interrupt-parent = <&mdss>; interrupts = <12>; From patchwork Sat Dec 31 12:59:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37859 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3332152wrt; Sat, 31 Dec 2022 05:04:14 -0800 (PST) X-Google-Smtp-Source: AMrXdXsNNwhX79HHAk6Ee6dDYTtFWhVDjlKlG63/uJUed8CPaM0Ha6Mzbr9IxRGFsmmTrgO3NNZr X-Received: by 2002:a17:90b:2712:b0:219:e1ae:8dc2 with SMTP id px18-20020a17090b271200b00219e1ae8dc2mr37466699pjb.35.1672491854347; Sat, 31 Dec 2022 05:04:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491854; cv=none; d=google.com; s=arc-20160816; b=Hkaj864n7nEJ0Mpz3FOXepHbUbH/3Js4hEdQu4QPmGNxTE7tJcCsccOHv7GVA6rYZ+ Zv8N8xL0AiFgLEie73qrJDxwztoI3ckqm46UNfCbRZQ7sg+yVeK8OJEJPJbCVozgRfso WjhH9UZ7+Yhryr9PL6OsEN8W54UXwWtVfTtPCkILLLKCQ/0ohCxUNlXyIEEcDh3TUa7g EFAQaTpaFwjOb0LTzeHFXo5eobqvwOr04qtu1ThC0WrwGWWbYfkqI5Y0jPcN7/qdEjGO ghg7RSuwycCMw3fWXraogxRfJJ2ITYUMLvlIRpCzi7ZVepg4YYcYQHYYN+kldkBHK/Bp rVFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=fHHZiDJH4yLcL25GvBawR0gVWLB+uV7msCDoplyv15c=; b=oAyjOtymLFGDSk63EVs3Doc7CKaQ4QX5RKbdtahmzHNxxS6nXZCk+rZMetwTJo24ly ANG0/QPPcHVY3pD0tiX0LZLW1jrw0p3GL7KpJP+5lGM2qc83FPI0cVHOpw0sa1aicxC1 Uu3f0TpKC7ISMaL2yL2VkLDDhx0uz0jqJ8dtm4esIh6nAL3SKlna+jk5P1Zwk39n4CYt 2Oo+QKig0RcH8YAQje1M8MRiAyYQJHQCW+1AReHTZ168iej2Zm0V0G8eHQhIAJNXMn0w 02JWNPdG0Sf8ZyVWSwZg3KAIR8dp07eMpugElG6qkZ4QQacfYytePKiIvw84l8e38CuD jVMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qifh4ljb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:36 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 14/18] arm64: dts: qcom: sc7280: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:07 +0100 Message-Id: <20221231125911.437599-15-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734818513645880?= X-GMAIL-MSGID: =?utf-8?q?1753734818513645880?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 46 ++++++++++++++-------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 0adf13399e64..cbf571baca9b 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2171,9 +2171,9 @@ ipa: ipa@1e40000 { iommus = <&apps_smmu 0x480 0x0>, <&apps_smmu 0x482 0x0>; - reg = <0 0x1e40000 0 0x8000>, - <0 0x1e50000 0 0x4ad0>, - <0 0x1e04000 0 0x23000>; + reg = <0 0x01e40000 0 0x8000>, + <0 0x01e50000 0 0x4ad0>, + <0 0x01e04000 0 0x23000>; reg-names = "ipa-reg", "ipa-shared", "gsi"; @@ -2455,7 +2455,7 @@ lpass_cpu: audio@3987000 { lpass_hm: clock-controller@3c00000 { compatible = "qcom,sc7280-lpasshm"; - reg = <0 0x3c00000 0 0x28>; + reg = <0 0x03c00000 0 0x28>; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "bi_tcxo"; #clock-cells = <1>; @@ -3489,7 +3489,7 @@ IPCC_MPROC_SIGNAL_GLINK_QMP pmu@9091000 { compatible = "qcom,sc7280-llcc-bwmon"; - reg = <0 0x9091000 0 0x1000>; + reg = <0 0x09091000 0 0x1000>; interrupts = ; @@ -3571,7 +3571,7 @@ dc_noc: interconnect@90e0000 { }; gem_noc: interconnect@9100000 { - reg = <0 0x9100000 0 0xe2200>; + reg = <0 0x09100000 0 0xe2200>; compatible = "qcom,sc7280-gem-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; @@ -3586,8 +3586,8 @@ system-cache-controller@9200000 { eud: eud@88e0000 { compatible = "qcom,sc7280-eud","qcom,eud"; - reg = <0 0x88e0000 0 0x2000>, - <0 0x88e2000 0 0x1000>; + reg = <0 0x088e0000 0 0x2000>, + <0 0x088e2000 0 0x1000>; interrupts-extended = <&pdc 11 IRQ_TYPE_LEVEL_HIGH>; ports { port@0 { @@ -3750,7 +3750,7 @@ opp-460000048 { videocc: clock-controller@aaf0000 { compatible = "qcom,sc7280-videocc"; - reg = <0 0xaaf0000 0 0x10000>; + reg = <0 0x0aaf0000 0 0x10000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>; clock-names = "bi_tcxo", "bi_tcxo_ao"; @@ -3773,7 +3773,7 @@ camcc: clock-controller@ad00000 { dispcc: clock-controller@af00000 { compatible = "qcom,sc7280-dispcc"; - reg = <0 0xaf00000 0 0x20000>; + reg = <0 0x0af00000 0 0x20000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_DISP_GPLL0_CLK_SRC>, <&mdss_dsi_phy 0>, @@ -4001,10 +4001,10 @@ mdss_edp: edp@aea0000 { pinctrl-names = "default"; pinctrl-0 = <&edp_hot_plug_det>; - reg = <0 0xaea0000 0 0x200>, - <0 0xaea0200 0 0x200>, - <0 0xaea0400 0 0xc00>, - <0 0xaea1000 0 0x400>; + reg = <0 0x0aea0000 0 0x200>, + <0 0x0aea0200 0 0x200>, + <0 0x0aea0400 0 0xc00>, + <0 0x0aea1000 0 0x400>; interrupt-parent = <&mdss>; interrupts = <14>; @@ -4076,10 +4076,10 @@ opp-810000000 { mdss_edp_phy: phy@aec2a00 { compatible = "qcom,sc7280-edp-phy"; - reg = <0 0xaec2a00 0 0x19c>, - <0 0xaec2200 0 0xa0>, - <0 0xaec2600 0 0xa0>, - <0 0xaec2000 0 0x1c0>; + reg = <0 0x0aec2a00 0 0x19c>, + <0 0x0aec2200 0 0xa0>, + <0 0x0aec2600 0 0xa0>, + <0 0x0aec2000 0 0x1c0>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_EDP_CLKREF_EN>; @@ -4095,11 +4095,11 @@ mdss_edp_phy: phy@aec2a00 { mdss_dp: displayport-controller@ae90000 { compatible = "qcom,sc7280-dp"; - reg = <0 0xae90000 0 0x200>, - <0 0xae90200 0 0x200>, - <0 0xae90400 0 0xc00>, - <0 0xae91000 0 0x400>, - <0 0xae91400 0 0x400>; + reg = <0 0x0ae90000 0 0x200>, + <0 0x0ae90200 0 0x200>, + <0 0x0ae90400 0 0xc00>, + <0 0x0ae91000 0 0x400>, + <0 0x0ae91400 0 0x400>; interrupt-parent = <&mdss>; interrupts = <12>; From patchwork Sat Dec 31 12:59:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37857 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3331926wrt; Sat, 31 Dec 2022 05:03:47 -0800 (PST) X-Google-Smtp-Source: AMrXdXt1XSezI2xfvjI6Lv29WeP3QUlsOVUBgBgCHXvo0Kr83BjaN+T/AKpS9FvSwai2elFTs1YJ X-Received: by 2002:a17:90b:187:b0:218:fa0b:b225 with SMTP id t7-20020a17090b018700b00218fa0bb225mr39347779pjs.24.1672491827502; Sat, 31 Dec 2022 05:03:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491827; cv=none; d=google.com; s=arc-20160816; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:38 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 15/18] arm64: dts: qcom: msm8994-octagon: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:08 +0100 Message-Id: <20221231125911.437599-16-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734790696532919?= X-GMAIL-MSGID: =?utf-8?q?1753734790696532919?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- .../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 52 +++++++++---------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi index 9b67f0d3820c..4520a7e86d5b 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi @@ -127,98 +127,98 @@ reserved-memory { */ uefi_mem: memory@200000 { - reg = <0 0x200000 0 0x100000>; + reg = <0 0x00200000 0 0x100000>; no-map; }; mppark_mem: memory@300000 { - reg = <0 0x300000 0 0x80000>; + reg = <0 0x00300000 0 0x80000>; no-map; }; fbpt_mem: memory@380000 { - reg = <0 0x380000 0 0x1000>; + reg = <0 0x00380000 0 0x1000>; no-map; }; dbg2_mem: memory@381000 { - reg = <0 0x381000 0 0x4000>; + reg = <0 0x00381000 0 0x4000>; no-map; }; capsule_mem: memory@385000 { - reg = <0 0x385000 0 0x1000>; + reg = <0 0x00385000 0 0x1000>; no-map; }; tpmctrl_mem: memory@386000 { - reg = <0 0x386000 0 0x3000>; + reg = <0 0x00386000 0 0x3000>; no-map; }; uefiinfo_mem: memory@389000 { - reg = <0 0x389000 0 0x1000>; + reg = <0 0x00389000 0 0x1000>; no-map; }; reset_mem: memory@389000 { - reg = <0 0x389000 0 0x1000>; + reg = <0 0x00389000 0 0x1000>; no-map; }; resuncached_mem: memory@38e000 { - reg = <0 0x38e000 0 0x72000>; + reg = <0 0x0038e000 0 0x72000>; no-map; }; disp_mem: memory@400000 { - reg = <0 0x400000 0 0x800000>; + reg = <0 0x00400000 0 0x800000>; no-map; }; uefistack_mem: memory@c00000 { - reg = <0 0xc00000 0 0x40000>; + reg = <0 0x00c00000 0 0x40000>; no-map; }; cpuvect_mem: memory@c40000 { - reg = <0 0xc40000 0 0x10000>; + reg = <0 0x00c40000 0 0x10000>; no-map; }; rescached_mem: memory@400000 { - reg = <0 0xc50000 0 0xb0000>; + reg = <0 0x00c50000 0 0xb0000>; no-map; }; tzapps_mem: memory@6500000 { - reg = <0 0x6500000 0 0x500000>; + reg = <0 0x06500000 0 0x500000>; no-map; }; smem_mem: memory@6a00000 { - reg = <0 0x6a00000 0 0x200000>; + reg = <0 0x06a00000 0 0x200000>; no-map; }; hyp_mem: memory@6c00000 { - reg = <0 0x6c00000 0 0x100000>; + reg = <0 0x06c00000 0 0x100000>; no-map; }; tz_mem: memory@6d00000 { - reg = <0 0x6d00000 0 0x160000>; + reg = <0 0x06d00000 0 0x160000>; no-map; }; rfsa_adsp_mem: memory@6e60000 { - reg = <0 0x6e60000 0 0x10000>; + reg = <0 0x06e60000 0 0x10000>; no-map; }; rfsa_mpss_mem: memory@6e70000 { compatible = "qcom,rmtfs-mem"; - reg = <0 0x6e70000 0 0x10000>; + reg = <0 0x06e70000 0 0x10000>; no-map; qcom,client-id = <1>; @@ -229,7 +229,7 @@ rfsa_mpss_mem: memory@6e70000 { * MPSS_EFS / SBL */ mba_mem: memory@6e80000 { - reg = <0 0x6e80000 0 0x180000>; + reg = <0 0x06e80000 0 0x180000>; no-map; }; @@ -239,33 +239,33 @@ mba_mem: memory@6e80000 { */ mpss_mem: memory@7000000 { - reg = <0 0x7000000 0 0x5a00000>; + reg = <0 0x07000000 0 0x5a00000>; no-map; }; adsp_mem: memory@ca00000 { - reg = <0 0xca00000 0 0x1800000>; + reg = <0 0x0ca00000 0 0x1800000>; no-map; }; venus_mem: memory@e200000 { - reg = <0 0xe200000 0 0x500000>; + reg = <0 0x0e200000 0 0x500000>; no-map; }; pil_metadata_mem: memory@e700000 { - reg = <0 0xe700000 0 0x4000>; + reg = <0 0x0e700000 0 0x4000>; no-map; }; memory@e704000 { - reg = <0 0xe704000 0 0x7fc000>; + reg = <0 0x0e704000 0 0x7fc000>; no-map; }; /* Peripheral Image loader region end */ cnss_mem: memory@ef00000 { - reg = <0 0xef00000 0 0x300000>; + reg = <0 0x0ef00000 0 0x300000>; no-map; }; }; From patchwork Sat Dec 31 12:59:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37853 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3331238wrt; Sat, 31 Dec 2022 05:02:37 -0800 (PST) X-Google-Smtp-Source: AMrXdXsD9vBSNJ6SYMY0VfINRlyJO63dn25MdWvHcfnCUsjVYyB5x6F6Fo8if7zC+bL5BVIyLB9V X-Received: by 2002:a05:6402:3998:b0:46b:203:f388 with SMTP id fk24-20020a056402399800b0046b0203f388mr38625333edb.39.1672491756772; Sat, 31 Dec 2022 05:02:36 -0800 (PST) ARC-Seal: i=1; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:40 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 16/18] arm64: dts: qcom: sm8450: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:09 +0100 Message-Id: <20221231125911.437599-17-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734716606324902?= X-GMAIL-MSGID: =?utf-8?q?1753734716606324902?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 48 ++++++++++++++-------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 2194bbac8ee0..bca859cde31c 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -743,7 +743,7 @@ gcc: clock-controller@100000 { gpi_dma2: dma-controller@800000 { compatible = "qcom,sm8450-gpi-dma", "qcom,sm6350-gpi-dma"; #dma-cells = <3>; - reg = <0 0x800000 0 0x60000>; + reg = <0 0x00800000 0 0x60000>; interrupts = , , , @@ -1064,7 +1064,7 @@ spi21: spi@898000 { gpi_dma0: dma-controller@900000 { compatible = "qcom,sm8450-gpi-dma", "qcom,sm6350-gpi-dma"; #dma-cells = <3>; - reg = <0 0x900000 0 0x60000>; + reg = <0 0x00900000 0 0x60000>; interrupts = , , , @@ -1345,7 +1345,7 @@ spi5: spi@994000 { i2c6: i2c@998000 { compatible = "qcom,geni-i2c"; - reg = <0x0 0x998000 0x0 0x4000>; + reg = <0x0 0x00998000 0x0 0x4000>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; pinctrl-names = "default"; @@ -1365,7 +1365,7 @@ i2c6: i2c@998000 { spi6: spi@998000 { compatible = "qcom,geni-spi"; - reg = <0x0 0x998000 0x0 0x4000>; + reg = <0x0 0x00998000 0x0 0x4000>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; interrupts = ; @@ -1400,7 +1400,7 @@ uart7: serial@99c000 { gpi_dma1: dma-controller@a00000 { compatible = "qcom,sm8450-gpi-dma", "qcom,sm6350-gpi-dma"; #dma-cells = <3>; - reg = <0 0xa00000 0 0x60000>; + reg = <0 0x00a00000 0 0x60000>; interrupts = , , , @@ -1810,10 +1810,10 @@ pcie0_phy: phy@1c06000 { status = "disabled"; pcie0_lane: phy@1c06200 { - reg = <0 0x1c06e00 0 0x200>, /* tx */ - <0 0x1c07000 0 0x200>, /* rx */ - <0 0x1c06200 0 0x200>, /* pcs */ - <0 0x1c06600 0 0x200>; /* pcs_pcie */ + reg = <0 0x01c06e00 0 0x200>, /* tx */ + <0 0x01c07000 0 0x200>, /* rx */ + <0 0x01c06200 0 0x200>, /* pcs */ + <0 0x01c06600 0 0x200>; /* pcs_pcie */ clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; clock-names = "pipe0"; @@ -1917,12 +1917,12 @@ pcie1_phy: phy@1c0f000 { status = "disabled"; pcie1_lane: phy@1c0e000 { - reg = <0 0x1c0e000 0 0x200>, /* tx */ - <0 0x1c0e200 0 0x300>, /* rx */ - <0 0x1c0f200 0 0x200>, /* pcs */ - <0 0x1c0e800 0 0x200>, /* tx */ - <0 0x1c0ea00 0 0x300>, /* rx */ - <0 0x1c0f400 0 0xc00>; /* pcs_pcie */ + reg = <0 0x01c0e000 0 0x200>, /* tx */ + <0 0x01c0e200 0 0x300>, /* rx */ + <0 0x01c0f200 0 0x200>, /* pcs */ + <0 0x01c0e800 0 0x200>, /* tx */ + <0 0x01c0ea00 0 0x300>, /* rx */ + <0 0x01c0f400 0 0xc00>; /* pcs_pcie */ clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; clock-names = "pipe0"; @@ -2147,7 +2147,7 @@ swr4: soundwire-controller@31f0000 { rxmacro: codec@3200000 { compatible = "qcom,sm8450-lpass-rx-macro"; - reg = <0 0x3200000 0 0x1000>; + reg = <0 0x03200000 0 0x1000>; clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, @@ -2168,7 +2168,7 @@ rxmacro: codec@3200000 { swr1: soundwire-controller@3210000 { compatible = "qcom,soundwire-v1.7.0"; - reg = <0 0x3210000 0 0x2000>; + reg = <0 0x03210000 0 0x2000>; interrupts = ; clocks = <&rxmacro>; clock-names = "iface"; @@ -2193,7 +2193,7 @@ swr1: soundwire-controller@3210000 { txmacro: codec@3220000 { compatible = "qcom,sm8450-lpass-tx-macro"; - reg = <0 0x3220000 0 0x1000>; + reg = <0 0x03220000 0 0x1000>; clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, @@ -2260,7 +2260,7 @@ swr0: soundwire-controller@3250000 { swr2: soundwire-controller@33b0000 { compatible = "qcom,soundwire-v1.7.0"; - reg = <0 0x33b0000 0 0x2000>; + reg = <0 0x033b0000 0 0x2000>; interrupts-extended = <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "core", "wake"; @@ -2555,7 +2555,7 @@ IPCC_MPROC_SIGNAL_GLINK_QMP cci0: cci@ac15000 { compatible = "qcom,sm8450-cci", "qcom,msm8996-cci"; - reg = <0 0xac15000 0 0x1000>; + reg = <0 0x0ac15000 0 0x1000>; interrupts = ; power-domains = <&camcc TITAN_TOP_GDSC>; @@ -2594,7 +2594,7 @@ cci0_i2c1: i2c-bus@1 { cci1: cci@ac16000 { compatible = "qcom,sm8450-cci", "qcom,msm8996-cci"; - reg = <0 0xac16000 0 0x1000>; + reg = <0 0x0ac16000 0 0x1000>; interrupts = ; power-domains = <&camcc TITAN_TOP_GDSC>; @@ -3259,8 +3259,8 @@ qup_uart20_default: qup-uart20-default-state { lpass_tlmm: pinctrl@3440000{ compatible = "qcom,sm8450-lpass-lpi-pinctrl"; - reg = <0 0x3440000 0x0 0x20000>, - <0 0x34d0000 0x0 0x10000>; + reg = <0 0x03440000 0x0 0x20000>, + <0 0x034d0000 0x0 0x10000>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpass_tlmm 0 0 23>; @@ -3847,7 +3847,7 @@ nsp_noc: interconnect@320c0000 { lpass_ag_noc: interconnect@3c40000 { compatible = "qcom,sm8450-lpass-ag-noc"; - reg = <0 0x3c40000 0 0x17200>; + reg = <0 0x03c40000 0 0x17200>; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; From patchwork Sat Dec 31 12:59:10 2022 Content-Type: text/plain; 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:41 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 17/18] arm64: dts: qcom: msm8994-kitakami: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:10 +0100 Message-Id: <20221231125911.437599-18-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734741884201047?= X-GMAIL-MSGID: =?utf-8?q?1753734741884201047?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi index f3d153c34918..3ceb86b06209 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi @@ -163,7 +163,7 @@ &blsp2_uart2 { * mainline Linux. */ &cont_splash_mem { - reg = <0 0x3401000 0 0x2200000>; + reg = <0 0x03401000 0 0x2200000>; }; &pmi8994_spmi_regulators { From patchwork Sat Dec 31 12:59:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 37855 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3331370wrt; Sat, 31 Dec 2022 05:02:51 -0800 (PST) X-Google-Smtp-Source: AMrXdXvlkxFdVCmVr+1ahre7O0dx3L5/pB5h+zabNuX0t4HlZU7zHbKD+dArFmGU20tkbcsaq+ox X-Received: by 2002:aa7:c69a:0:b0:46d:e3f8:4ed4 with SMTP id n26-20020aa7c69a000000b0046de3f84ed4mr30197779edq.21.1672491770899; Sat, 31 Dec 2022 05:02:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672491770; cv=none; d=google.com; s=arc-20160816; b=UZHWW+ZE6BsgX64Pr7zV3gieQ1ieJF5sJ2wKrdCxO3Rb0SH5SRojbmcWyrsJ0DE+Qq qdp6zNnvzIv6mUHnf7rz0OwpO9KkMpAA5E7XlZP6+FtYnIDqMf7oi4PDfuZnG7Rb7Eb8 CO4nMvynvvqrrzkX2O04ncz3VZUPWhbg5pxktBaYGm6/Gsyj8i4pj5tL/c8OmubwOEnU ckTFoWis1pWSb7r/sKfCm8dUKM7R4lyEhscAb6JnFDcpuCw4mLpUYZTLI+0VTy78kDx1 JDllCB0PcUiHbu1DbaorlUr9OoQxHDTEKozvR0+w0u5hFnzgiVOlBSAvseu8FfMv+b6d nnJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=irSxaIcjW3n1PCvBEUpCzHQASe7UMs9Blgt3PcMzjTI=; b=b97ZEgTmNd/c/5wGmNVi3/y3Xkuw4NUEqnDCFD++GaIMjsUSa0WnURXpnOMbQfiIYc Jj3yW9ar6s6wtl+z0m9j9s0WnRlIET6fedrlM9Nn+C9dPNc6rfxqbTL8J9wPpA9dBqTY fRasMrxKd+LAGEaLYcxCEXaIN5pjzCckmTgKDlzkkKrA6EC4ujVRUf60JAB/zHRc4BP8 8ciGdHYagdjgOZ69Vawl0O648fMEF9dp4OkYb89Xqsgt3GnGYQaa+HyWbd7+DbwPxLA0 3D39D8wM4nJVhfKVX2yAfNu3ceWxCYqN22joJTbxfC+iUwCOBfuHhaNZSUrnCNv37R9d MHhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VgaVL9fw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id d10-20020a0565123d0a00b004cb344a8c77sm22266lfv.54.2022.12.31.04.59.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Dec 2022 04:59:43 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 18/18] arm64: dts: qcom: sm6115: Pad addresses to 8 hex digits Date: Sat, 31 Dec 2022 13:59:11 +0100 Message-Id: <20221231125911.437599-19-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org> References: <20221231125911.437599-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753734730903648362?= X-GMAIL-MSGID: =?utf-8?q?1753734730903648362?= Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index b3ed6ec16205..76dab4c2e8ed 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -831,9 +831,9 @@ ufs_mem_phy: phy@4807000 { status = "disabled"; ufs_mem_phy_lanes: phy@4807400 { - reg = <0 0x4807400 0 0x098>, - <0 0x4807600 0 0x130>, - <0 0x4807c00 0 0x16c>; + reg = <0 0x04807400 0 0x098>, + <0 0x04807600 0 0x130>, + <0 0x04807c00 0 0x16c>; #phy-cells = <0>; }; };