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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b14-20020a63eb4e000000b0049069de0f5bsi19529913pgk.216.2022.12.29.02.51.01; Thu, 29 Dec 2022 02:51:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@metrotek.ru header.s=mail header.b=ewZSxubG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233150AbiL2KtY (ORCPT + 99 others); Thu, 29 Dec 2022 05:49:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233212AbiL2KtL (ORCPT ); Thu, 29 Dec 2022 05:49:11 -0500 Received: from mail.pr-group.ru (mail.pr-group.ru [178.18.215.3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D043812AE0; Thu, 29 Dec 2022 02:49:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=metrotek.ru; s=mail; h=from:subject:date:message-id:to:cc:mime-version:content-transfer-encoding: in-reply-to:references; bh=h2DTo7/i07c/BjtQnTqU/wo+M4tvHQruZoqERkWx+rQ=; b=ewZSxubGIP2TR4oPjjbVWYqu6Fg4x8kENup3K58m2z/vo6Z1aWsFA6BIJtG2W6NIFk2xlFHsNCIqq c1QHXF6Ig71wLgnB5P6abJvAPowD6lnwHOtkO+QRkH2uvCoqyth9APdu1FZDloUN+y7AjGplm9LqdY bXsoTh5j56L2vIzFtW1JTRSSczx/2zRcMETV/WRtdT/2bWEsJ8LJ4bCUWlVaOdqK3VKtyfTo+XUJKr 4CmVsjMbjYwG4T2sYDUAFD5QxXpEDy2zA1H3NOT181+JCU5hZda9Yy/4Jd9YnTHYiw9kfmTuakDHpl yy1Z3f1tqSc3fU7KfZO6maSx53e5VSQ== X-Kerio-Anti-Spam: Build: [Engines: 2.16.5.1460, Stamp: 3], Multi: [Enabled, t: (0.000011,0.030701)], BW: [Enabled, t: (0.000018,0.000001)], RTDA: [Enabled, t: (0.083405), Hit: No, Details: v2.42.0; Id: 15.52k7hj.1glenvavj.ipl2; mclb], total: 0(700) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Level: X-Footer: bWV0cm90ZWsucnU= Received: from h-e2.ddg ([85.143.252.66]) (authenticated user i.bornyakov@metrotek.ru) by mail.pr-group.ru with ESMTPSA (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256 bits)); Thu, 29 Dec 2022 13:48:43 +0300 From: Ivan Bornyakov To: linux-fpga@vger.kernel.org Cc: Ivan Bornyakov , Conor Dooley , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , linux-kernel@vger.kernel.org, system@metrotek.ru Subject: [PATCH v4 1/3] fpga: microchip-spi: move SPI I/O buffers out of stack Date: Thu, 29 Dec 2022 13:46:02 +0300 Message-Id: <20221229104604.2496-2-i.bornyakov@metrotek.ru> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221229104604.2496-1-i.bornyakov@metrotek.ru> References: <20221229104604.2496-1-i.bornyakov@metrotek.ru> MIME-Version: 1.0 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753545257087708314?= X-GMAIL-MSGID: =?utf-8?q?1753545257087708314?= As spi-summary doc says: > I/O buffers use the usual Linux rules, and must be DMA-safe. > You'd normally allocate them from the heap or free page pool. > Don't use the stack, or anything that's declared "static". Replace spi_write() with spi_write_then_read(), which is dma-safe for on-stack buffers. Use allocated buffers for transfers used in spi_sync_transfer(). Although everything works OK with stack-located I/O buffers, better follow the doc to be safe. Fixes: 5f8d4a900830 ("fpga: microchip-spi: add Microchip MPF FPGA manager") Signed-off-by: Ivan Bornyakov Acked-by: Conor Dooley --- drivers/fpga/microchip-spi.c | 93 ++++++++++++++++++------------------ 1 file changed, 47 insertions(+), 46 deletions(-) diff --git a/drivers/fpga/microchip-spi.c b/drivers/fpga/microchip-spi.c index 7436976ea904..e72fedd93a27 100644 --- a/drivers/fpga/microchip-spi.c +++ b/drivers/fpga/microchip-spi.c @@ -42,46 +42,55 @@ struct mpf_priv { struct spi_device *spi; bool program_mode; + u8 tx __aligned(ARCH_KMALLOC_MINALIGN); + u8 rx __aligned(ARCH_KMALLOC_MINALIGN); }; -static int mpf_read_status(struct spi_device *spi) +static int mpf_read_status(struct mpf_priv *priv) { - u8 status = 0, status_command = MPF_SPI_READ_STATUS; - struct spi_transfer xfers[2] = { 0 }; - int ret; - /* * HW status is returned on MISO in the first byte after CS went * active. However, first reading can be inadequate, so we submit * two identical SPI transfers and use result of the later one. */ - xfers[0].tx_buf = &status_command; - xfers[1].tx_buf = &status_command; - xfers[0].rx_buf = &status; - xfers[1].rx_buf = &status; - xfers[0].len = 1; - xfers[1].len = 1; - xfers[0].cs_change = 1; + struct spi_transfer xfers[2] = { + { + .tx_buf = &priv->tx, + .rx_buf = &priv->rx, + .len = 1, + .cs_change = 1, + }, { + .tx_buf = &priv->tx, + .rx_buf = &priv->rx, + .len = 1, + }, + }; + u8 status; + int ret; + + priv->tx = MPF_SPI_READ_STATUS; + + ret = spi_sync_transfer(priv->spi, xfers, 2); + if (ret) + return ret; - ret = spi_sync_transfer(spi, xfers, 2); + status = priv->rx; if ((status & MPF_STATUS_SPI_VIOLATION) || (status & MPF_STATUS_SPI_ERROR)) - ret = -EIO; + return -EIO; - return ret ? : status; + return status; } static enum fpga_mgr_states mpf_ops_state(struct fpga_manager *mgr) { struct mpf_priv *priv = mgr->priv; - struct spi_device *spi; bool program_mode; int status; - spi = priv->spi; program_mode = priv->program_mode; - status = mpf_read_status(spi); + status = mpf_read_status(priv); if (!program_mode && !status) return FPGA_MGR_STATE_OPERATING; @@ -186,12 +195,12 @@ static int mpf_ops_parse_header(struct fpga_manager *mgr, } /* Poll HW status until busy bit is cleared and mask bits are set. */ -static int mpf_poll_status(struct spi_device *spi, u8 mask) +static int mpf_poll_status(struct mpf_priv *priv, u8 mask) { int status, retries = MPF_STATUS_POLL_RETRIES; while (retries--) { - status = mpf_read_status(spi); + status = mpf_read_status(priv); if (status < 0) return status; @@ -205,32 +214,32 @@ static int mpf_poll_status(struct spi_device *spi, u8 mask) return -EBUSY; } -static int mpf_spi_write(struct spi_device *spi, const void *buf, size_t buf_size) +static int mpf_spi_write(struct mpf_priv *priv, const void *buf, size_t buf_size) { - int status = mpf_poll_status(spi, 0); + int status = mpf_poll_status(priv, 0); if (status < 0) return status; - return spi_write(spi, buf, buf_size); + return spi_write_then_read(priv->spi, buf, buf_size, NULL, 0); } -static int mpf_spi_write_then_read(struct spi_device *spi, +static int mpf_spi_write_then_read(struct mpf_priv *priv, const void *txbuf, size_t txbuf_size, void *rxbuf, size_t rxbuf_size) { const u8 read_command[] = { MPF_SPI_READ_DATA }; int ret; - ret = mpf_spi_write(spi, txbuf, txbuf_size); + ret = mpf_spi_write(priv, txbuf, txbuf_size); if (ret) return ret; - ret = mpf_poll_status(spi, MPF_STATUS_READY); + ret = mpf_poll_status(priv, MPF_STATUS_READY); if (ret < 0) return ret; - return spi_write_then_read(spi, read_command, sizeof(read_command), + return spi_write_then_read(priv->spi, read_command, sizeof(read_command), rxbuf, rxbuf_size); } @@ -242,7 +251,6 @@ static int mpf_ops_write_init(struct fpga_manager *mgr, const u8 isc_en_command[] = { MPF_SPI_ISC_ENABLE }; struct mpf_priv *priv = mgr->priv; struct device *dev = &mgr->dev; - struct spi_device *spi; u32 isc_ret = 0; int ret; @@ -251,9 +259,7 @@ static int mpf_ops_write_init(struct fpga_manager *mgr, return -EOPNOTSUPP; } - spi = priv->spi; - - ret = mpf_spi_write_then_read(spi, isc_en_command, sizeof(isc_en_command), + ret = mpf_spi_write_then_read(priv, isc_en_command, sizeof(isc_en_command), &isc_ret, sizeof(isc_ret)); if (ret || isc_ret) { dev_err(dev, "Failed to enable ISC: spi_ret %d, isc_ret %u\n", @@ -261,7 +267,7 @@ static int mpf_ops_write_init(struct fpga_manager *mgr, return -EFAULT; } - ret = mpf_spi_write(spi, program_mode, sizeof(program_mode)); + ret = mpf_spi_write(priv, program_mode, sizeof(program_mode)); if (ret) { dev_err(dev, "Failed to enter program mode: %d\n", ret); return ret; @@ -274,11 +280,9 @@ static int mpf_ops_write_init(struct fpga_manager *mgr, static int mpf_ops_write(struct fpga_manager *mgr, const char *buf, size_t count) { - u8 spi_frame_command[] = { MPF_SPI_FRAME }; struct spi_transfer xfers[2] = { 0 }; struct mpf_priv *priv = mgr->priv; struct device *dev = &mgr->dev; - struct spi_device *spi; int ret, i; if (count % MPF_SPI_FRAME_SIZE) { @@ -287,18 +291,18 @@ static int mpf_ops_write(struct fpga_manager *mgr, const char *buf, size_t count return -EINVAL; } - spi = priv->spi; - - xfers[0].tx_buf = spi_frame_command; - xfers[0].len = sizeof(spi_frame_command); + xfers[0].tx_buf = &priv->tx; + xfers[0].len = 1; for (i = 0; i < count / MPF_SPI_FRAME_SIZE; i++) { xfers[1].tx_buf = buf + i * MPF_SPI_FRAME_SIZE; xfers[1].len = MPF_SPI_FRAME_SIZE; - ret = mpf_poll_status(spi, 0); - if (ret >= 0) - ret = spi_sync_transfer(spi, xfers, ARRAY_SIZE(xfers)); + ret = mpf_poll_status(priv, 0); + if (ret >= 0) { + priv->tx = MPF_SPI_FRAME; + ret = spi_sync_transfer(priv->spi, xfers, ARRAY_SIZE(xfers)); + } if (ret) { dev_err(dev, "Failed to write bitstream frame %d/%zu\n", @@ -317,12 +321,9 @@ static int mpf_ops_write_complete(struct fpga_manager *mgr, const u8 release_command[] = { MPF_SPI_RELEASE }; struct mpf_priv *priv = mgr->priv; struct device *dev = &mgr->dev; - struct spi_device *spi; int ret; - spi = priv->spi; - - ret = mpf_spi_write(spi, isc_dis_command, sizeof(isc_dis_command)); + ret = mpf_spi_write(priv, isc_dis_command, sizeof(isc_dis_command)); if (ret) { dev_err(dev, "Failed to disable ISC: %d\n", ret); return ret; @@ -330,7 +331,7 @@ static int mpf_ops_write_complete(struct fpga_manager *mgr, usleep_range(1000, 2000); - ret = mpf_spi_write(spi, release_command, sizeof(release_command)); + ret = mpf_spi_write(priv, release_command, sizeof(release_command)); if (ret) { dev_err(dev, "Failed to exit program mode: %d\n", ret); return ret; From patchwork Thu Dec 29 10:46:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ivan Bornyakov X-Patchwork-Id: 37359 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2338160wrt; Thu, 29 Dec 2022 02:51:19 -0800 (PST) X-Google-Smtp-Source: AMrXdXuRexAlP3TorESgrEHSdq1Mdrknh5E2Aew1NLXSkII+TbLc/Qcio2pzx6v5ilz72vtcpMZm X-Received: by 2002:a17:902:a40a:b0:192:7363:f6c7 with SMTP id p10-20020a170902a40a00b001927363f6c7mr15865416plq.37.1672311079179; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id d3-20020a170903230300b0018685c559a1si18774010plh.383.2022.12.29.02.51.07; Thu, 29 Dec 2022 02:51:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@metrotek.ru header.s=mail header.b="WxPV0/QY"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233267AbiL2Ktg (ORCPT + 99 others); Thu, 29 Dec 2022 05:49:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233207AbiL2KtL (ORCPT ); Thu, 29 Dec 2022 05:49:11 -0500 Received: from mail.pr-group.ru (mail.pr-group.ru [178.18.215.3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D033C12AD7; Thu, 29 Dec 2022 02:49:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=metrotek.ru; s=mail; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=die6ad0vYZHCb65m5Hf63s1td7LWEbm4RdnqouvV7iI=; b=WxPV0/QYen/zKibDP/wLAlVvTkEkr5ICx5bL6tXz656lTRn/ZEWTvExFV1x1ZKdyvp1yNoepPuWQt vYZ5fNBsmoNqKcw1apIdQfVE24Qt9YJm085ZegeAhOCWFAltNXk8HCS/TpSJEzuIbIFuUcWW1Ttcq1 OZGhyt9roBeEZgQCDJkgSrmyr6Yusl4hsJ3QaIKYrAH9GRUqyIPhWtL0T2/ahrPaCceRxJD711We24 93nTA5Zy9fNNpDNUZBKVT0bP2Po9hqG4yEGuCqy/qCbPVFhg9sjLhiH5Nk6jyETG9IuaO5M/9cbVwc 6XQ2bcLcqFzlg4TjCDDXCafI8KnoVow== X-Kerio-Anti-Spam: Build: [Engines: 2.16.5.1460, Stamp: 3], Multi: [Enabled, t: (0.000011,0.013400)], BW: [Enabled, t: (0.000022,0.000001)], RTDA: [Enabled, t: (0.128619), Hit: No, Details: v2.42.0; Id: 15.52k5u3.1glenvb0e.j55e; mclb], total: 0(700) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Level: X-Footer: bWV0cm90ZWsucnU= Received: from h-e2.ddg ([85.143.252.66]) (authenticated user i.bornyakov@metrotek.ru) by mail.pr-group.ru with ESMTPSA (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256 bits)); Thu, 29 Dec 2022 13:48:44 +0300 From: Ivan Bornyakov To: linux-fpga@vger.kernel.org Cc: Ivan Bornyakov , Conor Dooley , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , linux-kernel@vger.kernel.org, system@metrotek.ru Subject: [PATCH v4 2/3] fpga: microchip-spi: rewrite status polling in a time measurable way Date: Thu, 29 Dec 2022 13:46:03 +0300 Message-Id: <20221229104604.2496-3-i.bornyakov@metrotek.ru> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221229104604.2496-1-i.bornyakov@metrotek.ru> References: <20221229104604.2496-1-i.bornyakov@metrotek.ru> MIME-Version: 1.0 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753545261980261103?= X-GMAIL-MSGID: =?utf-8?q?1753545261980261103?= Original busy loop with retries count in mpf_poll_status() is not too reliable, as it takes different times on different systems. Replace it with read_poll_timeout() macro. While at it, fix polling stop condition to met function's original intention declared in the comment. The issue with original polling stop condition is that it stops if any of mask bits is set, while intention was to stop if all mask bits is set. This was not noticible because only MPF_STATUS_READY is passed as mask argument and it is BIT(1). Fixes: 5f8d4a900830 ("fpga: microchip-spi: add Microchip MPF FPGA manager") Signed-off-by: Ivan Bornyakov Reviewed-by: Ilpo Järvinen Acked-by: Conor Dooley Acked-by: Xu Yilun --- drivers/fpga/microchip-spi.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/drivers/fpga/microchip-spi.c b/drivers/fpga/microchip-spi.c index e72fedd93a27..995b1964e0fe 100644 --- a/drivers/fpga/microchip-spi.c +++ b/drivers/fpga/microchip-spi.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -33,7 +34,7 @@ #define MPF_BITS_PER_COMPONENT_SIZE 22 -#define MPF_STATUS_POLL_RETRIES 10000 +#define MPF_STATUS_POLL_TIMEOUT (2 * USEC_PER_SEC) #define MPF_STATUS_BUSY BIT(0) #define MPF_STATUS_READY BIT(1) #define MPF_STATUS_SPI_VIOLATION BIT(2) @@ -194,24 +195,25 @@ static int mpf_ops_parse_header(struct fpga_manager *mgr, return 0; } -/* Poll HW status until busy bit is cleared and mask bits are set. */ static int mpf_poll_status(struct mpf_priv *priv, u8 mask) { - int status, retries = MPF_STATUS_POLL_RETRIES; + int ret, status; - while (retries--) { - status = mpf_read_status(priv); - if (status < 0) - return status; - - if (status & MPF_STATUS_BUSY) - continue; - - if (!mask || (status & mask)) - return status; - } + /* + * Busy poll HW status. Polling stops if any of the following + * conditions are met: + * - timeout is reached + * - mpf_read_status() returns an error + * - busy bit is cleared AND mask bits are set + */ + ret = read_poll_timeout(mpf_read_status, status, + (status < 0) || + ((status & (MPF_STATUS_BUSY | mask)) == mask), + 0, MPF_STATUS_POLL_TIMEOUT, false, priv); + if (ret < 0) + return ret; - return -EBUSY; + return status; } static int mpf_spi_write(struct mpf_priv *priv, const void *buf, size_t buf_size) From patchwork Thu Dec 29 10:46:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Bornyakov X-Patchwork-Id: 37360 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp2338163wrt; Thu, 29 Dec 2022 02:51:19 -0800 (PST) X-Google-Smtp-Source: AMrXdXtQRjMnBFzf/xQrc2PxXPpbHAf8HV4TywFKP75adGrEZMKlQEpcZrPXCppsiR2J+nPIgGwD X-Received: by 2002:a17:902:db05:b0:192:7c38:4842 with SMTP id m5-20020a170902db0500b001927c384842mr20453723plx.53.1672311079588; Thu, 29 Dec 2022 02:51:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672311079; cv=none; d=google.com; s=arc-20160816; b=OFl34UCHLD1IJLUk12+lD6hPOHFQ6OIXmo4MJTuwNUxfgfbqQ/X2JdWahj66d//+xW TR/p0tK4BopsNKi3wCEB7G6MVOHS9g7NE8SsxqvxfxMCK64sN0csIvWmrK3mJXeld9PJ M12wWCetdV4xmUidCynlSuaazJK2EhE5iAAlZ1l2+ZjDa0xQMAhvmsGQobtKm2ecGN1s WMrR7dQpD5BL8gars2RxUAHYfJ+reeralofeXy+HwQhAfOprUlJj7bjKP/NeXwSfrqPZ kpFpLJyduHcIu6sSuCjZ9wyfCxC9kQ1llNA6T+fpgkkptMJroZY+G3zeOr1Xf+FiuWmU Ynew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=lMC0TaTz0zW4RqoDylFHZqSCqJlhVay6PEFgr8vhhx0=; b=CQ6/nLoY5D8Kr1LyPne1MgbJEFaT08nKDKxVk7pQJR6C1W55oVR2xvfnjnW0UIEmZh Cy86Ozza8VXNjgflIY+7+wg9D7ntRN7YFTgzLZTOes0AmHX2CHFdnKQTxAfwSeV4MwhW QCCnGALIBoj+uB035yeZ3rXmNA2mova+D6nke9Z21jc2hXIZKsmbINRE3pp8b5TzR1UX olO44mC+hETsN8F1vgB9XY+jZHVqBRL4ak8t6M1McFPGoPO/LiaL4F1OCM7ROVLdAevb TM1zbGRMfrKpi5gbeUXY118YX7syiyiirJLy9Iqr3W7P7hFI/3GE6XgYUjJjYATZslm/ FfNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@metrotek.ru header.s=mail header.b=Ns25fgEf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ix6-20020a170902f80600b0019144f5893dsi17273928plb.518.2022.12.29.02.51.07; Thu, 29 Dec 2022 02:51:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@metrotek.ru header.s=mail header.b=Ns25fgEf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233237AbiL2Ktd (ORCPT + 99 others); Thu, 29 Dec 2022 05:49:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229669AbiL2KtL (ORCPT ); Thu, 29 Dec 2022 05:49:11 -0500 Received: from mail.pr-group.ru (mail.pr-group.ru [178.18.215.3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CFED912A9D; Thu, 29 Dec 2022 02:49:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=metrotek.ru; s=mail; h=from:subject:date:message-id:to:cc:mime-version:content-transfer-encoding: in-reply-to:references; bh=GI2mMm/uGWkE5p1bnryw0SBqR2l3kOJ73Yw+GoVPPS8=; b=Ns25fgEfZqwQ0qPGTbBDXXH4yrc27AJGxDDF5VY9tiHLsYdQdGKCzx/YYnNTzcDcAoTQwg8Q+/8hW mXfbCClyshrSVJ1uGHBmeTGnB2MhKlVnJOZvgFPs8MWDYnkkltDtcWGb61A3TmFeSgKLY7WgPlRmIw diujQR3S1gaI3kQ2nx/S5Cc6iFulnMZI6Mn51355hdxu5GT56L73JCAeYny5fNtG8lvqNJZeYTheuH dxods8/DW+XcokBkAiOH858xK1Pbi70+eoGb2msb2kJn2f7sO6z0PDDD+1rTJ4YgkOiJa8haaDJC07 g2/Rau2UFBuNhR5qKvIgeOHglx/qONg== X-Kerio-Anti-Spam: Build: [Engines: 2.16.5.1460, Stamp: 3], Multi: [Enabled, t: (0.000009,0.010010)], BW: [Enabled, t: (0.000021,0.000001)], RTDA: [Enabled, t: (0.090851), Hit: No, Details: v2.42.0; Id: 15.52k4ev.1glenvctm.3mn1; mclb], total: 0(700) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Level: X-Footer: bWV0cm90ZWsucnU= Received: from h-e2.ddg ([85.143.252.66]) (authenticated user i.bornyakov@metrotek.ru) by mail.pr-group.ru with ESMTPSA (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256 bits)); Thu, 29 Dec 2022 13:48:45 +0300 From: Ivan Bornyakov To: linux-fpga@vger.kernel.org Cc: Ivan Bornyakov , Conor Dooley , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , linux-kernel@vger.kernel.org, system@metrotek.ru Subject: [PATCH v4 3/3] fpga: microchip-spi: separate data frame write routine Date: Thu, 29 Dec 2022 13:46:04 +0300 Message-Id: <20221229104604.2496-4-i.bornyakov@metrotek.ru> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221229104604.2496-1-i.bornyakov@metrotek.ru> References: <20221229104604.2496-1-i.bornyakov@metrotek.ru> MIME-Version: 1.0 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753545262946094124?= X-GMAIL-MSGID: =?utf-8?q?1753545262946094124?= mpf_ops_write() function writes bitstream data to the FPGA by a smaller frames. Introduce mpf_spi_frame_write() function which is for writing a single data frame and use it in mpf_ops_write(). No functional changes intended. Signed-off-by: Ivan Bornyakov Acked-by: Conor Dooley Acked-by: Xu Yilun --- drivers/fpga/microchip-spi.c | 36 +++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/drivers/fpga/microchip-spi.c b/drivers/fpga/microchip-spi.c index 995b1964e0fe..8a541986f6f2 100644 --- a/drivers/fpga/microchip-spi.c +++ b/drivers/fpga/microchip-spi.c @@ -280,9 +280,30 @@ static int mpf_ops_write_init(struct fpga_manager *mgr, return 0; } +static int mpf_spi_frame_write(struct mpf_priv *priv, const char *buf) +{ + struct spi_transfer xfers[2] = { + { + .tx_buf = &priv->tx, + .len = 1, + }, { + .tx_buf = buf, + .len = MPF_SPI_FRAME_SIZE, + }, + }; + int ret; + + ret = mpf_poll_status(priv, 0); + if (ret < 0) + return ret; + + priv->tx = MPF_SPI_FRAME; + + return spi_sync_transfer(priv->spi, xfers, ARRAY_SIZE(xfers)); +} + static int mpf_ops_write(struct fpga_manager *mgr, const char *buf, size_t count) { - struct spi_transfer xfers[2] = { 0 }; struct mpf_priv *priv = mgr->priv; struct device *dev = &mgr->dev; int ret, i; @@ -293,19 +314,8 @@ static int mpf_ops_write(struct fpga_manager *mgr, const char *buf, size_t count return -EINVAL; } - xfers[0].tx_buf = &priv->tx; - xfers[0].len = 1; - for (i = 0; i < count / MPF_SPI_FRAME_SIZE; i++) { - xfers[1].tx_buf = buf + i * MPF_SPI_FRAME_SIZE; - xfers[1].len = MPF_SPI_FRAME_SIZE; - - ret = mpf_poll_status(priv, 0); - if (ret >= 0) { - priv->tx = MPF_SPI_FRAME; - ret = spi_sync_transfer(priv->spi, xfers, ARRAY_SIZE(xfers)); - } - + ret = mpf_spi_frame_write(priv, buf + i * MPF_SPI_FRAME_SIZE); if (ret) { dev_err(dev, "Failed to write bitstream frame %d/%zu\n", i, count / MPF_SPI_FRAME_SIZE);