From patchwork Wed Dec 28 08:40:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37129 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783292wrt; Wed, 28 Dec 2022 00:42:08 -0800 (PST) X-Google-Smtp-Source: AMrXdXtzm8gM7ERJV6ltDneKqVO8vY7i3Rla1pvzTU1KELlTrSHD+MKhDFsXVpBb4El3FybC+gTY X-Received: by 2002:a05:6a00:450a:b0:56e:664f:a5f5 with SMTP id cw10-20020a056a00450a00b0056e664fa5f5mr29743363pfb.8.1672216928351; Wed, 28 Dec 2022 00:42:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672216928; cv=none; d=google.com; s=arc-20160816; b=tGf8YFO/I+CrjFSrL04gJnF+4wR5So+ABG3qqdsj0wUIRYDymCWDiK3ke1X7EOtPTo wxb5XVZpdrvPj9eqXU/hC0JY9q/UVHgsIMPtnsWVNg6p9Ez2vmVXhKQCmR5yGTVs2nmM qSZu6r7VJ7D0Pcrei+cjOJJVluVvQZwz0Rgen6hRWb6+MIiKcuaF2UyebEuWtO+g8dtl 2TwEdiSfh+kLn4qvz3anVvpuW3ASRzSHd9Yk3DKGGf2s+t8E/mavCneEu1UvVXeD2IDF P4yu+GYmgL9yi6nR+M0WQmjbPevL4fEsH4yWcCdtE06GTgTYeuro20FIPsxw3/oHqUtM 1SVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=neDlpAxOqPxKQsX09z7HIhUpqVcLiuVepxClOJ3AnCk=; b=p6YiDhJvjFWg7Bss7g2UROgJjuFSe3OmqqnIrpISG7dcPBHkLvCsgEVaAHzSDhsP6+ 1KMxmm5OTIPH8/YnjXH5egW8FjAsVSDXNY4HiUCG8S4WEochadBSNKzUG4fYk6DAPAIR vmPMvuLLGzZ/z4liXVRwImH+yC9BHqKJTgC8mGO5ExU+c0PLlQAhOc2W+F5le/m31M7s VuVR4X/aTiLMnPipR9PMu4imeEj/Zs4VSUbOesVlag+jwWpcPLgxR5hgthXR8EEnDYKz 0zn20PtUWfCNavCqSM930v9CAIja6ONEX/mVYnPpM+7o4n05SnRuG5c2QliCT77C2FZC UIBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TO9dKYGs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u1-20020a626001000000b0057a74250665si15472012pfb.310.2022.12.28.00.41.56; Wed, 28 Dec 2022 00:42:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TO9dKYGs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232674AbiL1IlU (ORCPT + 99 others); Wed, 28 Dec 2022 03:41:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232659AbiL1IlA (ORCPT ); Wed, 28 Dec 2022 03:41:00 -0500 Received: from mail-pg1-x52d.google.com (mail-pg1-x52d.google.com [IPv6:2607:f8b0:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 45DF8268 for ; Wed, 28 Dec 2022 00:40:50 -0800 (PST) Received: by mail-pg1-x52d.google.com with SMTP id 7so10203577pga.1 for ; Wed, 28 Dec 2022 00:40:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=neDlpAxOqPxKQsX09z7HIhUpqVcLiuVepxClOJ3AnCk=; b=TO9dKYGst245T1FMDa9SJ7Cxs4BbwS8yCPhWehj2oL1iNJWyO2XcJefzEiXWM6sR+z 1Fa3k6LqqS9mh5h5Iisk7cYKSGWAQsUAlL6CtNJou0B5lAhT9FP30D2aMfRfXixnha18 u3gSjZtQtaZWdpEzyasM0yOETDO8dugLpvvf9fLCZKeLO/kZnCTg8qvsuI1f/Ym7QKRj HV5VrmX/gP8FkhRCkIsLu3QZTwJoVBOpTzA5nBDPrt8tT2THbC2MVh15GpVEICGLEtWN enEq6qEW39ZV1z0Y3QUdwp02JupQ22ZktOsyg+AfteXCuQP0QaNBDjHeDBz0w5ZD9cT0 EIvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=neDlpAxOqPxKQsX09z7HIhUpqVcLiuVepxClOJ3AnCk=; b=Fq3i6lATOurOKK9Emq1X5ks5KOXAR9Nm481O83C8Sd2+opcn4ah43zhXB5W1aC1Fa2 VRYfY+1fLD2S4ia8kVOe1HFFZ9i5HjJ5+1gYSJa6oV2bovy1IoLl3mJ2hgbiSIOQuVWG 9e8TP0qABss3QCLQAjna1yaLtKPrMX+VXlkUtAo3JTVI3P5c0SboksIXC7U+HPE8USvO 2jK4qOXCOveYjWYCieObI8/3GIpCAfq6tIILJa7Y8gvRTGPscaKWaGG5Dy9zbQy01bvt f0QvXU60STgBZTe2PgqGIx/KJceKGQL7XjmDF3Z+I14F4TNJIXUINEs1aByV7E9V0Obj /UeQ== X-Gm-Message-State: AFqh2kpNv6pIuBsMkW4l038jGIQq0NIPYxtn/hgvrUuUovo9pN5d9EwQ u7f8wUyL2zC7/DLSPrXtBS1B X-Received: by 2002:a05:6a00:1da2:b0:57d:8b30:db0a with SMTP id z34-20020a056a001da200b0057d8b30db0amr27459818pfw.9.1672216850324; Wed, 28 Dec 2022 00:40:50 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.40.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:40:49 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH v5 01/17] EDAC/device: Make use of poll_msec value in edac_device_ctl_info struct Date: Wed, 28 Dec 2022 14:10:12 +0530 Message-Id: <20221228084028.46528-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753446537981409275?= X-GMAIL-MSGID: =?utf-8?q?1753446537981409275?= The EDAC drivers may optionally pass the poll_msec value. Use that value if available, else fall back to 1000ms. Cc: # 4.9 Fixes: e27e3dac6517 ("drivers/edac: add edac_device class") Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Reported-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam Reported-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam Signed-off-by: Borislav Petkov (AMD) Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride --- drivers/edac/edac_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/edac/edac_device.c b/drivers/edac/edac_device.c index 19522c568aa5..19c3ab2a434e 100644 --- a/drivers/edac/edac_device.c +++ b/drivers/edac/edac_device.c @@ -447,7 +447,7 @@ int edac_device_add_device(struct edac_device_ctl_info *edac_dev) * enable workq processing on this instance, * default = 1000 msec */ - edac_device_workq_setup(edac_dev, 1000); + edac_device_workq_setup(edac_dev, edac_dev->poll_msec ? edac_dev->poll_msec : 1000); } else { edac_dev->op_state = OP_RUNNING_INTERRUPT; } From patchwork Wed Dec 28 08:40:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37131 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783451wrt; Wed, 28 Dec 2022 00:42:36 -0800 (PST) X-Google-Smtp-Source: AMrXdXvt2EIvhmyGy/K+8j4e5gyDtPzEllKtNFIAfABbrN84AUaqQhp4j/Dkv/sQAq57v8gK4M2L X-Received: by 2002:a05:6a20:1586:b0:9d:efd3:66c1 with SMTP id h6-20020a056a20158600b0009defd366c1mr35605246pzj.8.1672216956011; Wed, 28 Dec 2022 00:42:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672216955; cv=none; d=google.com; s=arc-20160816; b=LpHBdRjdOuteU4nBT85e7CygAzyxjks91I7Gf2fO9q8BgAKPCxSZ3W9RLbNx4SF6vS 7S5lebp9AXKgjvJyopYg0/KkSGU7kT0f5SHP2HtjnF68SBmJvlp4yv0qaNIMLBsR5ycT IqM4+2s+Wf6xJswSaJPhVdDvZ0Xv6VdsnPIrcMN37/FJL4/EttVq6UCNfJpqtDsbN8Dq FL0ltLbmJuaHg918M8pPxSFzEa2IbXBA66EymwRzsmz+B5xadti8VAwi/ANhPgkpzRLh SURCEySKbKfRVt7cLPjgH2qi9KL1zAyHLOEyzFCyads0zIvZfP+EEpKSWDe+eezMNTNr 1+zQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vCj+eIEQcGnCqPz5ZSYr2aqyU+fsKL7bkSmfajhhbqw=; b=PfeLNv4KmNRarWQvCyOnOJ/EXgmG8JVQfJ8vQeQqnIaD1hiYH4kKO3s+vxfxHTdSkR M65hhX29FoLvgtp8FLt8Me1oLp23h4s3nUy9aJ169Z/KiVQlNgPJMuV1q5adMj0nkABu GlAviBRFHvjlTsaYuEqv2+p2jK5POWessWzwsQwEpPWQhhahOmqc2ByGjFURn5TxYnz1 92cwmECZq5W2TNAh0Q+2ZWhihFkw+8zzhis1n3zetHcpK2P7AV5ud53+n0QK2VcRKl4R kiIbRLFQ03gsg2yzPWBYa6ofLZmhfnj37SsDmqZzW9pAd9osHGlOI9isOz8ZUyWfGQQh 80Fg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nh2vLpwy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Reported-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 97a27e42dd61..9e77fa84e84f 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -397,12 +397,19 @@ static int qcom_llcc_edac_remove(struct platform_device *pdev) return 0; } +static const struct platform_device_id qcom_llcc_edac_id_table[] = { + { .name = "qcom_llcc_edac" }, + {} +}; +MODULE_DEVICE_TABLE(platform, qcom_llcc_edac_id_table); + static struct platform_driver qcom_llcc_edac_driver = { .probe = qcom_llcc_edac_probe, .remove = qcom_llcc_edac_remove, .driver = { .name = "qcom_llcc_edac", }, + .id_table = qcom_llcc_edac_id_table, }; module_platform_driver(qcom_llcc_edac_driver); From patchwork Wed Dec 28 08:40:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37130 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783437wrt; Wed, 28 Dec 2022 00:42:34 -0800 (PST) X-Google-Smtp-Source: AMrXdXtRMr1QQdmkgl2bYHv4kQ2vY5KIu4J3PkIHjjI/xOCRh8Deg8eR4bozN0b/f96T/y4d/FVo X-Received: by 2002:a05:6a21:78a0:b0:a3:960e:7d0a with SMTP id bf32-20020a056a2178a000b000a3960e7d0amr38477521pzc.58.1672216953915; Wed, 28 Dec 2022 00:42:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672216953; cv=none; d=google.com; s=arc-20160816; b=POzpw6ni0zSUxBk6f1UITpy4KRYjkR077cZveh5AFk4tS4MU5Jhs+ohxWmqL2/gqiw my4p0ENYbbkZobieunEFBwN3Q2kiIZ+XWoMRUC0bUi0TB+Mz2xGdDWohMz1rXdVmamQm Kc5DVbYfkL08C1BkehOVRCeJGbyfg0hlqVMFX9KKMUFNMsKPcUwyAsRUaLgBAE7Dxlye fkR9pKfAlMQMRmdmX1MvFQB9RX2a5vevaWPH1/ba+s8PWLNTTdduL6x61C2EjX60jcoS PV3ZfY2Tue+U+8fmxo9rMvWiFqAZN/anivbt5GpCxr+W3dAOpP4ffEpDEGdJP4fqRje6 e4+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=q1NrdFunM3umkB8l0ZcJbFNj2UhbwdZo1HlNf5THZjI=; b=POhCqzpbRNds46W1Qi4pKuBeIvaJnpDCekozhOkPuXafIjbIX8xWBaDK2tsMZI+O3j pkYiRJfZSNkLzateim5vpyH+sE+LZb75tph4LlhvAY0BD8px4z77cEy+OGvqXIOl0pOH v7XuNXyF2ucE5pokwG41drgrYkKvVJRAzPzPbip8OquwIJnGz/uwjbvTo8qrhgc9cDna twedoZ594RaL6jGGmPHCb6Vhgmx6NdWEA2ij2RrC7kcrAZfVY8KtbkVI2oTUiSbvNqQ3 7dltRDkKJS8UvcPduK2ZqiRcwkYrWUTje0AWuruya+xZqrucmzkfgijoomSjYrA3eOQ6 tyBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YWqrz5eG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But when it is passed as "pvt_info" to the EDAC core, it will get freed during the qcom_edac driver release. So when the qcom_edac driver gets probed again, it will try to use the freed data leading to the use-after-free bug. Fix this by not passing "llcc_driv_data" as pvt_info but rather reference it using the "platform_data" in the qcom_edac driver. Cc: # 4.20 Fixes: 27450653f1db ("drivers: edac: Add EDAC driver support for QCOM SoCs") Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Reported-by: Steev Klimaszewski Signed-off-by: Manivannan Sadhasivam Reviewed-by: Borislav Petkov (AMD) --- drivers/edac/qcom_edac.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 9e77fa84e84f..3256254c3722 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -252,7 +252,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) static int dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank) { - struct llcc_drv_data *drv = edev_ctl->pvt_info; + struct llcc_drv_data *drv = edev_ctl->dev->platform_data; int ret; ret = dump_syn_reg_values(drv, bank, err_type); @@ -289,7 +289,7 @@ static irqreturn_t llcc_ecc_irq_handler(int irq, void *edev_ctl) { struct edac_device_ctl_info *edac_dev_ctl = edev_ctl; - struct llcc_drv_data *drv = edac_dev_ctl->pvt_info; + struct llcc_drv_data *drv = edac_dev_ctl->dev->platform_data; irqreturn_t irq_rc = IRQ_NONE; u32 drp_error, trp_error, i; int ret; @@ -358,7 +358,6 @@ static int qcom_llcc_edac_probe(struct platform_device *pdev) edev_ctl->dev_name = dev_name(dev); edev_ctl->ctl_name = "llcc"; edev_ctl->panic_on_ue = LLCC_ERP_PANIC_ON_UE; - edev_ctl->pvt_info = llcc_driv_data; rc = edac_device_add_device(edev_ctl); if (rc) From patchwork Wed Dec 28 08:40:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37134 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783703wrt; Wed, 28 Dec 2022 00:43:24 -0800 (PST) X-Google-Smtp-Source: AMrXdXuVcayrHTe+1Sn0jwiRApsoS604NSS4F9j+hofaV04JFc6rVNIoFGUtV/MuPdD1qQNh80X5 X-Received: by 2002:a05:6a20:7d9e:b0:af:6d41:dd8c with SMTP id v30-20020a056a207d9e00b000af6d41dd8cmr40489081pzj.38.1672217004299; Wed, 28 Dec 2022 00:43:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217004; cv=none; d=google.com; s=arc-20160816; b=FbljqOViCB4tfqTcP31bNqVN9wtzHI3FH9se5Lu/9c3DBUhlass7w6ha936uyAV8ub /5Bjq+v/r4xQAsvUjBc8Wc8A+xGFOWoGwVUZc138cISiySCr47W1x45o4FMTSMLd1Of5 5nbIQ/ME9tjCIPuFrnpCKcUm68+ymqouQxSYYoIEz74kKUm6Z0xf5rWf9EnO8g79lhrp yAaWEe/hvNcLUNo7bNlWp0+IugPx/sd5GRsayFCDb9jqKriY3A4wE5BOtWbhvsV4Spo7 8gaS5PFLjQP+lVgGcSX9sV4LNqTsOb863AxdW0I+oAv8mvcbFxXmLcIsjQBj047/ej8r rQeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=USFa3vv6r3M6at72+GYbrAEuQqTIcmw3cLL2W4/Vhuk=; b=KxjV/NYPNK+5gCTqHP71apeP+PW8UfEPtYAGd2jt+OG9Kxkh3ySN/vnBMEx0V/oYrm zo88o+ld8ebiIR+MQORkCbvtvIxf+EZeWeTBC+G92j0HsnFVOtfw2GVUtmm4E1EAgKVW ws/fqybWNuR0D3D8o9T62SKuG2UB+pK8VIIfz3S7BYpCUInktWaYbz1HBtEaj0/bC2TV Tk4NKCjN3UaIuMc0uAcBRZqfj9vdZ93BdCgJc5XFbgtM06eb7Jj8dtlJp3hsZLMpxvsy RuaJw/UA9Psx3twXHs7Jdfr3Gk6Dy7zMv9JF6mzPPafXeeCMKcetrjuABhk/eYs0boDG soHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kpqldBi4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So his entry needs to be removed. Also, Sai Prakash Ranjan's email address should be updated to use quicinc domain. Cc: Sai Prakash Ranjan Acked-by: Sai Prakash Ranjan Acked-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index 38efcad56dbd..d1df49ffcc1b 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Last Level Cache Controller maintainers: - - Rishabh Bhatnagar - - Sai Prakash Ranjan + - Sai Prakash Ranjan description: | LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, From patchwork Wed Dec 28 08:40:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37132 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783517wrt; Wed, 28 Dec 2022 00:42:47 -0800 (PST) X-Google-Smtp-Source: AMrXdXu74gCggebQ+zNq3wAsz4OiZ7o7sbTBMZbvPvZhVfM4uoVyyWEy/ljjVckxPxqCE9hhXBip X-Received: by 2002:a05:6a20:e68a:b0:af:c491:d4ba with SMTP id mz10-20020a056a20e68a00b000afc491d4bamr25849015pzb.53.1672216966804; Wed, 28 Dec 2022 00:42:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672216966; cv=none; d=google.com; s=arc-20160816; b=Cgn5386JxmkgRpIXJVPesQx947lXfxpXEJ/fRcK0uQzYdmyPgligwYcfTW2z4NRNbC FxNdmMR+q4RjJ9X9TJ0qaqZBiea3jxq5W2ZSCWmQF3XkuA18F04PnQjxZRQrPiytuJ+F 3FzLlwrtCaxCrlOpPjuxn1Vv7YPSaQ9sO0HXA8CmfkMuOxwjqJJKCzokGtqupLln2gHx M6LU9x2raTAgQ0NSeGsSWQqNtB9dSzX/NZGR1fBBu2gJMu4ySE7Rl+xUJwqls3GSVH1C oSxjRYuxFcgFQgSBNFOwEPxI0dfUzpe9Tl+rv52cCzGMH59H9yO27YQiu4a/Ui1O6Z1a 13gQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jXuVNaTN8VlggSdcrqnxpaEGm5VyBVkNPNZuLm2UVUQ=; b=aZU31sPDELkEPaj4GNDHd1iaNwIJ4Y9kg6eLWsUZH3qR8W6L+BR9REIUapuytSiGJv i6vqGXKlu+fP8JOQbcNwhX+W10aAfvZGl4iFq+njzn1ppj8K5mDq2/CTlm1gA55d6lrD zXBr+iJkc8s2WmTQISf5shkcAOqaRXoXX1HisWeW5RAv8ttItCgqgBGqawTteprZRryv TtTkAmcBbcIMm+l2XtEIRksohcEia8FdFOgGzDGQyM3rOfC/WMT+J5U+dPguNMtUqAKC OQ6ocSiTyLj+cQ6fqkIbsHkrCx1qvSkak3/cQ1BOZE+xSDI4Vo5/nWnarfezgsVUQOD9 aeXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=G2otba28; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Currently, the binding just lists the LLCC0 base address and tries to cover all the banks using a single size. This is entirely wrong as there are other register regions that happen to lie inside the size covered by the binding such as the memory controller and holes. So this needs to be fixed by specifying the base address of individual LLCC banks. This approach will break the existing users of this binding as the register regions are split and the drivers now cannot use LLCC0 register region for accessing rest of the banks (which is wrong anyway). But considering the fact that the binding was wrong from the day one and also the device drivers going wrong by the binding, this breakage is acceptable. Reported-by: Parikshit Pareek Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- .../bindings/arm/msm/qcom,llcc.yaml | 125 ++++++++++++++++-- 1 file changed, 114 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index d1df49ffcc1b..050e21d4a03e 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -33,14 +33,12 @@ properties: - qcom,sm8550-llcc reg: - items: - - description: LLCC base register region - - description: LLCC broadcast base register region + minItems: 2 + maxItems: 9 reg-names: - items: - - const: llcc_base - - const: llcc_broadcast_base + minItems: 2 + maxItems: 9 interrupts: maxItems: 1 @@ -50,15 +48,120 @@ required: - reg - reg-names +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7180-llcc + - qcom,sm6350-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7280-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-llcc + - qcom,sc8280xp-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC4 base register region + - description: LLCC5 base register region + - description: LLCC6 base register region + - description: LLCC7 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc4_base + - const: llcc5_base + - const: llcc6_base + - const: llcc7_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm845-llcc + - qcom,sm8150-llcc + - qcom,sm8250-llcc + - qcom,sm8350-llcc + - qcom,sm8450-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc_broadcast_base + additionalProperties: false examples: - | #include - system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; - reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; + soc { + #address-cells = <2>; + #size-cells = <2>; + + system-cache-controller@1100000 { + compatible = "qcom,sdm845-llcc"; + reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; + interrupts = ; + }; }; From patchwork Wed Dec 28 08:40:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37135 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783741wrt; Wed, 28 Dec 2022 00:43:28 -0800 (PST) X-Google-Smtp-Source: AMrXdXu9gnZ6SFlAfyuI/LHxf2F6jvLNetcX1RTWwETqqxzgSaJM+tlgf75/IwhA8GGfP5dgYze8 X-Received: by 2002:a17:903:228a:b0:191:271f:4789 with SMTP id b10-20020a170903228a00b00191271f4789mr35200220plh.27.1672217008181; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id iz17-20020a170902ef9100b00178380f525bsi14692517plb.547.2022.12.28.00.43.15; Wed, 28 Dec 2022 00:43:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IvF0oXD9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232769AbiL1ImV (ORCPT + 99 others); Wed, 28 Dec 2022 03:42:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229707AbiL1Ilp (ORCPT ); Wed, 28 Dec 2022 03:41:45 -0500 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0F66FD13 for ; Wed, 28 Dec 2022 00:41:28 -0800 (PST) Received: by mail-pf1-x42b.google.com with SMTP id k19so2606762pfg.11 for ; Wed, 28 Dec 2022 00:41:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e9QXXi64w5AkU0+SlZ8zyP2UpGIuUHr0Btt1KBRAP8A=; b=IvF0oXD98yyBIqJq+91laACS5kfVQK2q412wkuezxYCvLA0lRlwFwYxUfpurelPzpr xcHz5E9MOKe5LT4ggXttZ6W+FX0gMgXwGfz4TDWCHwDy7BGGlhn67taNPTvntvbk38t1 I8k2KnjjDamTOPL8uNTa2Jbxkrqv0Gti3JuhM+YvJTjm/U4kCZgfzZiz0eUSytiPx4uo PE0jeUZg0G25Dg8dQRgGQX7fT0+v69nM7x35iibVLlfaxLQtedX8JDseRMh7kN4Si/WZ Em3B54menA+Q92ONQkA9iJiloH/RbU5kjuj1ewOxyP5Lr+xFGibrFacCQUc5MYjn8iI8 eTKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e9QXXi64w5AkU0+SlZ8zyP2UpGIuUHr0Btt1KBRAP8A=; b=Crr3tn40XUscv9/D8KnpXtQLO6n6gLhbqzKjRS75/flLpfc7U+pONAvd5+olzZnRdo c+V3F81tsLWb/quLcjRaC1vvBkX/0I6oLWxglrDTYjoutcldE1kz1t3zzjUdHhF+cxSo m2rwVnJYLllW4UDx2lt0HKS1m+7gh0sSBBARJBWKIaqSOXTHdY5b6TjwmN2+QHZwbXjx VsR6PAvmW8XhlJNLw2GVid3S3J3/R141EXvStO6dnp+bG4RW9FPWDTYTte/ecdsLKkic lQRW0A3ijHIqgvyTmUT47qNTv3qcDVinCeL/Zj9a5uzPiRv2PeXM2xwfZ3qCvoxg6VGp drtw== X-Gm-Message-State: AFqh2kqxPsl4lLXxiAnToPrTVR5XlLfMg+yd8BAzeJln2V+CY04+ZS/e y5WEGChQxRY3U00CBKoSjqe1 X-Received: by 2002:a62:f20f:0:b0:56b:b890:6ccd with SMTP id m15-20020a62f20f000000b0056bb8906ccdmr24974575pfh.4.1672216888505; Wed, 28 Dec 2022 00:41:28 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.41.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:41:27 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 06/17] arm64: dts: qcom: sdm845: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:17 +0530 Message-Id: <20221228084028.46528-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753446621673771944?= X-GMAIL-MSGID: =?utf-8?q?1753446621673771944?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SDM845, the size of the LLCC bank 0 needs to be reduced to 0x4500 as there are LLCC BWMON registers located after this range. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 65032b94b46d..4db68d4d78df 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2132,8 +2132,11 @@ uart15: serial@a9c000 { llcc: system-cache-controller@1100000 { compatible = "qcom,sdm845-llcc"; - reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x01100000 0 0x45000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 28 08:40:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37133 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783655wrt; Wed, 28 Dec 2022 00:43:16 -0800 (PST) X-Google-Smtp-Source: AMrXdXsxsMT21rS4dWXqcTHPTsV17QIKrTr/cLhNlNLqsbmmZAGYqEnAsWmKZA5ciMIIZ6a5EEMM X-Received: by 2002:a05:6a20:1604:b0:ad:97cc:e957 with SMTP id l4-20020a056a20160400b000ad97cce957mr61596799pzj.39.1672216996468; Wed, 28 Dec 2022 00:43:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672216996; cv=none; d=google.com; s=arc-20160816; b=hBnm19kyGfYoV9z5sRx0XxqdHtmXgAdBCXQ1Is3CXhCo5qOy1KnSNuNio1NqN3e49r v9hZTZT8eu1s0d1azCVdX9nVqq2cyM5aQGnZ19kBQBKVr3nudTRqfYubfkvpgON2QlYM LbkgXakBefyL1AfwjGvc3jGNWBMGLPqOke7ALR9S40TvOnvG9e+LGCHTaiegQzdBylJd GOHBl7Fl1aYCNOEAQPKh1FylyeraafJYKY1Cs0lgHCLBtRIA4IF91iAljkXPD4d1mJ4q JvQX+XZU00RXxmpdaMxTnl+YPHv0NFi2ZAH0R1SDntildsogK2716YbUwIt+/xVVyM8s Vnmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4GFA6I79C1YmmOYQX1BIX7MOGuUjMMgmSjlJ7uhFCjc=; b=uVA43o4bunpwfP4rqxBWcS+K4B+1omanLynLVyYEtLydhbQrA8xtlJ8NtwE+/tcENl ZrjUbbgOUvUlZf6D70gqVl/p32CgbjoM5X8tbhPQScl0PjAmX8f5W9cbkHq1IQVzFrJA l33HXQR85xIBPWMvgJYEEPWNbbqzsKmobuQZeJuEQBwF/osfcBFgN/D3JqzFTz0NFlM1 hc55AML5rdPOOzq7YglXGUmWW2MFJTRJtaJc5s4TrZMXTk7JIf387acN766BaPVsfyaH +1+84XtFatkXNQO6osv5Y8qsvgMYF2H+fk4Wp2YXBKXNPqfE9+cgPpxr6THJnpd9DR1L cbrg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="kW/WrjOW"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SC7180, there is only one LLCC bank available. So let's just pass that as "llcc0_base". Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f71cf21a8dd8..f861f692c9b1 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2759,7 +2759,7 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sc7180-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 28 08:40:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37136 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783771wrt; Wed, 28 Dec 2022 00:43:34 -0800 (PST) X-Google-Smtp-Source: AMrXdXuoph7RbTDzh8LSHBpcdC0WP2WbcCp0BT0zP+Gj4WH4jFkcpJyoXXa8OEQqEbAaKu3sfUGx X-Received: by 2002:a05:6a20:4f02:b0:ad:ccea:73b4 with SMTP id gi2-20020a056a204f0200b000adccea73b4mr25353374pzb.42.1672217014005; Wed, 28 Dec 2022 00:43:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217013; cv=none; d=google.com; s=arc-20160816; b=KYO6DjQZaA08NZUVFws1AuEB3R395pFYrscG22rlpg7BTUG9+f/qESMfQhJ0BffBf7 sh60ssHzm+8y9EsoEnbk9BUeyYC0kbkEJBCv7tWWFr0vl5ZASBi9IID8ef1BXNowKF3+ YAv5N8whz3bk7H86rKduN/w4OzmdrCzBYa9dpbqD8bZ6Z4A9CkbypKFnOfqRbryMR1gi L3YYXLXzHdQi2fHJyy13XJvVL5nqOi+AID/j3jimT8nQTX6nFXgrJZaOdEM9vX0m/8Ti rA5vp5BH36PZGPl9lp/m/wWKHYV//CCRnBYMK6dFekR2hzag+UjQuo91g/bdkVGofzOk dwUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=u3b0H9FlwI0cHeu/QvvhJdFruV0iaHa3piiWtATy1Lw=; b=Fdgrq97vLWPj5gzlWQ82Ydw2sz2uWYIWyPkxtGuaYpekwAOzPKC7CkZfI5A4gj2vNB qn4jQi95KXhOXdzLLIhmcSKqk2EA2I6+UtL3Kwh2YfMuan+So6MWKtdtPj4CgS+uNV8p SsPTdlKBXhaKODmS7d/t/QKnGu6FsGupSBACBaXCxJYXSBzzkc2kBqtF43ZXV+XtKvlr iP19pukKl0yMzXUcXxh+SiH+rLXcK8FypP9KU319tFepDDBNKa0VZJ+slrrmtTRrmjnr 2/uO0k9tDj1bSNOGJmWBgawDuNuHM3xZFjYvF61uRdIQlTvEpaffnMuInQeD11PzUs7H 0U3g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kBSZ1t+G; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. While at it, let's also fix the size of the llcc_broadcast_base to cover the whole region. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 0adf13399e64..6c6eb6f4f650 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3579,8 +3579,9 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sc7280-llcc"; - reg = <0 0x09200000 0 0xd0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 28 08:40:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37137 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783800wrt; Wed, 28 Dec 2022 00:43:42 -0800 (PST) X-Google-Smtp-Source: AMrXdXtwJ9FC+zWUs1qZ5GDSwYxPNxG2SRrOKYwWKRgUljZtlwhONNAht8EQwdP63s6F4sf50zpT X-Received: by 2002:a05:6a20:4290:b0:ad:4642:c671 with SMTP id o16-20020a056a20429000b000ad4642c671mr38838223pzj.12.1672217021755; Wed, 28 Dec 2022 00:43:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217021; cv=none; d=google.com; s=arc-20160816; b=UrcEmGhVG01FEiPiplAmPkCdELxo1W3i3zu3HmS8QiWQXhjXxKiqRynu+Dt+7A/PQ0 QU9BMxqYmyHCOXbDk4XZZTJOcjzjKrw5gLTt9GgfXE7cjOx4+SvsT8zLZtVo8OMBLIJ2 C9IhMBYM45nVsiiImm1YE1et+uwDq8QUuB00/0RBvefM07SZmKfln753Wu6JoppYJbmz 4OHBi09Ik1RajvIz2qEk9kI9e9246WsLXQRvDHWfustbwlJYZ2AehNkwMEaQy8JLLvHY YiqOjOO74LYP6rrjVoOVYrzSrjNcHuak2iDu5Gcg6sFBQ8HAcFNIh9iGgvUdbM8jwJA8 RQ2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=cEcc2ZZg4+/rCWO8lF+EBDL5HIag6zFEZ6LhCeBUUxo=; b=DwoHW16ijAxdI5zTROJ9XjPK/prPyf3Anq0dxgJ51VIAB/qZ7i2T+EGHANv7rUL92x B8zQWSqHzcOzlLZHqZgCq3WjznPGfnBEwhni/DYXWPgUPurXa+gmFvKggi4C1PlYGEix 45YljlpibwyqJ0YAegGm58Z7IExjMJbDK+eqP/vGiWTZ7Mzs+bZScHPXkZ1UwzhpBjdJ hj2Qp0ofMsdMdEoW+3ayL5tyOFUZ9fBSkMlioW5WQK6mvP4mIlRhuv4ObikjXxd22luV GCmWvBFdtt2VYMvfkOJpiI9INGXsVJ2YmhHFvdY1CrssCludahVO5i9nEn2vnJHlIWZ8 NCQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mM6JYQb0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v1-20020a170902b7c100b0017336c464ecsi15323744plz.407.2022.12.28.00.43.30; Wed, 28 Dec 2022 00:43:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mM6JYQb0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232699AbiL1InP (ORCPT + 99 others); Wed, 28 Dec 2022 03:43:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232816AbiL1Imj (ORCPT ); Wed, 28 Dec 2022 03:42:39 -0500 Received: from mail-pg1-x534.google.com (mail-pg1-x534.google.com [IPv6:2607:f8b0:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6533101EB for ; Wed, 28 Dec 2022 00:41:51 -0800 (PST) Received: by mail-pg1-x534.google.com with SMTP id q68so2692754pgq.9 for ; Wed, 28 Dec 2022 00:41:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cEcc2ZZg4+/rCWO8lF+EBDL5HIag6zFEZ6LhCeBUUxo=; b=mM6JYQb0jk21og7RBPj3Pp04t+jep2+4Zn+V+h8iqDvgSqUJi+xO4sCiKl2AseYPGT 4ECPjuk5wGtGhAFBWt77nLJKn8jbWFjka0hpnyNoQLv10Oh2HWmfydarS7uN0Xs+wEXN 73YnCny+mzGFwoqfdhKR23yjYvkwx9otssh26xK5XKNsn/LhdbKpOJS/WvJ6SYx3SecF K8/E+1lzQXmeNHAcJu16O+BuyW0LiEzv8qrI0iDnFonMswmi2dmV9irgA7MceQRUTxEG F1UsM+ZNkoMn0NFfdaN5GLoeHoqhAQYUCcq8IlPflSKOlhArg8QkfIatJYVGWhgv0VH3 pjUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cEcc2ZZg4+/rCWO8lF+EBDL5HIag6zFEZ6LhCeBUUxo=; b=Djcls7lh+41YaV6ax9rVkHYnujvB+44QCKBiaGVCd1OhNYqjg985JGvv1i8QfjUljt WHwIcrk6ZvwWCPqcPKct0cDM5tb24fkVkbtDe+7UBEhTztLIxtuntOlg+CoU94hjUTax OozNxkjtX2qzzlb7jJkvrfcDWaSvlO6tnvHBhrklP0VxUgiI9MZcXbNLKxr6WYv+nwXa 0aGOQxcjJUlUH8cqx+RE6uQHh3X4Je4jCYYKGrDKho7k/RqLQYata5TxJbWeR+UgElRx 5RD1Dl2BKzVwDGTj3A1DKL1aC0lyWnuR0CmbPW09fUN1gh8htFOkTRnmeRy87KfhhLhR 7ovw== X-Gm-Message-State: AFqh2kqSS76SMnq6QGp6yHf7MuirIQCrH7tf4ps5vRbSaV3Bf8T6KJK2 16MMiEjL97K8iZ0SG4q2gzRs X-Received: by 2002:a62:6347:0:b0:56b:d328:5441 with SMTP id x68-20020a626347000000b0056bd3285441mr22743715pfb.11.1672216911280; Wed, 28 Dec 2022 00:41:51 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.41.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:41:50 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 09/17] arm64: dts: qcom: sc8280xp: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:20 +0530 Message-Id: <20221228084028.46528-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753446635795143793?= X-GMAIL-MSGID: =?utf-8?q?1753446635795143793?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 109c9d2b684d..0510a5d510e7 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1856,8 +1856,14 @@ opp-6 { system-cache-controller@9200000 { compatible = "qcom,sc8280xp-llcc"; - reg = <0 0x09200000 0 0x58000>, <0 0x09600000 0 0x58000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>, + <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc4_base", "llcc5_base", + "llcc6_base", "llcc7_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 28 08:40:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37138 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783859wrt; Wed, 28 Dec 2022 00:43:57 -0800 (PST) X-Google-Smtp-Source: AMrXdXvpPJhkuyzipZAmTsYySjTy+C6lcRo+7qyss19X8EqIUzuLepjyEWDkAIUorMcFgd/25twd X-Received: by 2002:a17:902:cecf:b0:191:191f:e7a7 with SMTP id d15-20020a170902cecf00b00191191fe7a7mr35463344plg.69.1672217037484; Wed, 28 Dec 2022 00:43:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217037; cv=none; d=google.com; s=arc-20160816; b=tmvRYBF9Ivmj3+owSXuaW4HW0IvfcFrK470NtD7bfHyFxGvS/jh62XvWQVRjtRqlvH WA3hQW8ntMSQVr7iT9vO8sLslPkZAjq++VyCkdRCF+7+h0XDve9ITQrHdwqSo0y3hxZT bMYTyn7BD8U1pXUdQl5RL5FMm6YmRofR/terFkTKl44GfjPHyUbf8f8YvEQ96c31uI4M 2A4NwHi9ZbS/LyW678FXPQb/4r/rF5M8L26VOdi7aZI6q5R9jTlDSlLqqdPncm0C4H5W S2pjq7itGDvbiaLUd7D1JUiUXCLR1VCbFjDVYwoI3uaam1nm3WDqh08juykU0gQrNuCJ 25Ng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7WUljA05hxjrMgWInu+aANTEuP2TXhzChwqlFzG2wks=; b=PnTOhRglXLzU3RTdtTHcQWUrwjuO/FydnvZ8rcGudmtRylseqfx7Bk6zyO7SGZ/mBq 3vPprkyf7xo+8XqsvsKddJbf9UDgub3skHyky0fanyHfXmVMzdTY4oTsXg/e0ihiI19x qtJJEnvLS1Q2Lh5H2CabN/Xx+aSMR6tKWAVm5Jkwmy1qUB2DEF/Y8yJRcPENBQXgkgMc 7LY/AkyOxKxkwPTv1lKLf2lj7rSGYbiKiCYbgcI7eSjabyDzK3CdAajgjJ/2yP+vDtDe ioiICJ1FMgASRaZHsjOHNd6YhczVZhBZERtpGWBFiiui8/O3Z7bJ+t1vhPZlZelervMr QL5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YbRaJdKT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a0c57fb798d3..7fd2291b2638 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1762,8 +1762,11 @@ mmss_noc: interconnect@1740000 { system-cache-controller@9200000 { compatible = "qcom,sm8150-llcc"; - reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 28 08:40:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37140 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783932wrt; Wed, 28 Dec 2022 00:44:12 -0800 (PST) X-Google-Smtp-Source: AMrXdXsNsoGt5Fb8XMd+hOv6CmqJO8t85d4/iioWpKh64jsGf5lorsqgysoUdPhKMocsmSDtS+vg X-Received: by 2002:a17:902:7488:b0:189:fbe0:fe8a with SMTP id h8-20020a170902748800b00189fbe0fe8amr27086773pll.26.1672217051838; Wed, 28 Dec 2022 00:44:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217051; cv=none; d=google.com; s=arc-20160816; b=0S8LkSVS/RwZ/6yeBj+Z9IS84dYKqwSAr+r58KawjclzbGSW6CTBFfTwvnvGuG5QW+ a4VncAwiunc10QejGpS4CEojH2eFqOgqoFLzyryytn2LZaSUZ5jCtbSD0lPehRIIvlVJ d9hv2DHU3e9gupZVHcLAeeSx98p0oOdY0gJALO7FMT0pTB495Is0ETIASh6JafJBZemS S5NLBT+9KnSDv0hpXE3vvEbggaphCX5kYB19YYFPponOCHTcqO8p2SptY3RrfVadgBQ1 g6Iv9aFKkuc+uoB5Yb0TRUqNdeKCOBB+hmszny0jTrsMNRonVrA6NwW9vT4oHNs/tFgc xZnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WYoJy3okzdnngL6TcLmeGykcAQcBXE1fb+mKXu1bB1c=; b=IYXovK2aOy/tRFcKu+VoQqf0GROtVdI9tpYNkJX6tDq1Y07LdhHVxVD8Q/M8HRLb04 5g51EpC1c8kZYBMp8wRgj7hiyYy5nUpP+wcftwQrxAQ02/4d0o2QE7evccFHvBrMwNQi BuwNtme9Rg9AdgZJDzjzYqyIWFZBRQJ+FT8P8mq06cfI45N6unleF+ZDNxSBMNA3Yk/s AeRQVKjZ9osYDXrDPD9vRaAyYUTyuySpF2zml87jtiG5QU3RPfp3acMi4424v5fpMTQd eJXQdUMnylm5D6RLwbJfsani7bZ2RzjMwGV/7dn4m2NYBR054PM2yGHUZGfkjObRYtoa ELmg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="uLb/ZHO9"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s15-20020a170902ea0f00b0018965226454si17855244plg.501.2022.12.28.00.44.00; Wed, 28 Dec 2022 00:44:11 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="uLb/ZHO9"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232887AbiL1InZ (ORCPT + 99 others); Wed, 28 Dec 2022 03:43:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232824AbiL1Imz (ORCPT ); Wed, 28 Dec 2022 03:42:55 -0500 Received: from mail-pf1-x430.google.com (mail-pf1-x430.google.com [IPv6:2607:f8b0:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71239FCFA for ; Wed, 28 Dec 2022 00:42:06 -0800 (PST) Received: by mail-pf1-x430.google.com with SMTP id g20so2067098pfb.3 for ; Wed, 28 Dec 2022 00:42:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WYoJy3okzdnngL6TcLmeGykcAQcBXE1fb+mKXu1bB1c=; b=uLb/ZHO9acuGXZNYQw0lUOz91UCx2LOPc+k611i5+YRtO95j5kzMbttDQBFv4WsN0W 5COSlFAnhI/rFjK5rDSyMiedi+CJEIbfkD4ZT9RHzzNT5/NR/1lzYqMjpcwlT7EHaU+w SKhTfYGKgDDUV/8fsFm47WJBnV7GHvfU6bMJDpMJfghSd0cjU7bpHyJMzEipZxlTL7B+ YNQROHCqIBlxEv0lIATl6vG09xNE2RBGap5dEbTV5Fm1Bv5E9ZklknzxFYjw89GU9Vy7 WaTqqM1tS3GgpKQRLSbvKx0lO6daAXvo3naMY8avJXPdbDU/cXL6ZCGzRV4s9tK3bRQT vnEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WYoJy3okzdnngL6TcLmeGykcAQcBXE1fb+mKXu1bB1c=; b=haHhYxpqqBqBhCCWp6NcdC95Ar1rTz4JWgUGL+ndNohlbdk2sRxJKdBqT+f2k4QfBI c962ud4OZlfdBjXy44iU+S9O0+njS7p4s5mNS95cS1hHIEtM2S58iI9N5zooxRrNBsxT obKl1NXLK39nbhXwv4jKIJ+0hHI/xBIGnCLio41B0PpBj9YDen3qc5YtNU2oTH+XvLvC UgKml9GsJh3mJm86bf8HBgkInSSmaRf0hjJbbUU5JMFSMQaDsaom2Vk+u1jLC5c+KM9h 5Pq9MpEa4aasW+cHJaJ1tSZlczWrP2XuR/FycP78RuPkPzf0k4BxLvsaEI02C6O8EwJC 7Hzw== X-Gm-Message-State: AFqh2kpKtHff+QBKBO2uKUDl1nX5FZueV8KqVkgi+WE0Nf/nyDMpTvYm k4KH7TclLZBEsEJryZUNpaPz X-Received: by 2002:a62:60c6:0:b0:581:6b38:25bc with SMTP id u189-20020a6260c6000000b005816b3825bcmr5248457pfb.29.1672216926093; Wed, 28 Dec 2022 00:42:06 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:42:05 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 11/17] arm64: dts: qcom: sm8250: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:22 +0530 Message-Id: <20221228084028.46528-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753446667449090872?= X-GMAIL-MSGID: =?utf-8?q?1753446667449090872?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index dab5579946f3..d1b65fb3f3f3 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3545,8 +3545,11 @@ usb_1_dwc3: usb@a600000 { system-cache-controller@9200000 { compatible = "qcom,sm8250-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; }; usb_2: usb@a8f8800 { From patchwork Wed Dec 28 08:40:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37139 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1783906wrt; Wed, 28 Dec 2022 00:44:06 -0800 (PST) X-Google-Smtp-Source: AMrXdXs43xAjl0vaQFfeR7sPIr+CFsVrbFro7s3pVxukD6Dwbr+4RnsT0oTvSnVYRhU90RPhGcDY X-Received: by 2002:a05:6a20:2d06:b0:ad:e5e8:cfe8 with SMTP id g6-20020a056a202d0600b000ade5e8cfe8mr31461521pzl.48.1672217046700; Wed, 28 Dec 2022 00:44:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217046; cv=none; d=google.com; s=arc-20160816; b=UmZrWQr1ludmge4FezEr5YIpcMZNut54QMcjtLhWTCphxky947KLql/vRUrdLqqvc/ rPIFPC7AoTh2WZIwOxTjuG3K/Ivo4aKwbxRrke6PpyRjzMY4KMCZAjoc5q/8nntZpMbz sodR5lInQTiilzySzwAl4xiFTQRcWn7dNOv+F7ZMDqt0B4pkDzDSM+ORVUohEjVGjN+9 ly/PFQ7m4P9x3nuEGLu16PWxMFiGBZn7z3AW1mglyvJGxdnBCZ9HKD3gELCsM7nzw+2L 5xgjwVxjkLf3qChW8R7veCsKw+lsBc5qDdRLjFlNv9A5oPoNxqK6LlJtFYtjOc/+hxMZ FSDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sMev9I+ZdryrTBjzJ8tiTgJp1UwzDLK7UbgCFoQvzyA=; b=TFChXSTdv1KilZU79bP5Fr7QmyPGYan5Ttj4pQaZwkeNaArGhY9YdWz2WAmMrzJTG4 AtvzkvOfllf68aQ6i0qLjqaEBh3pZt4eQSwSQdrHShf1V7JqSbCfQxnbOu/Xb70etQRJ CZ8iGs4qNgumyiLo4sUHn12f+SzcNiaZz5ERQcgh0EBmkT7dU/zLHN0FDRAvozFz7iJk 5QOluThNJJw68Qcsh83zA7Pmtsfq99xdxHI/Z01JwuVk/D50FRi8QNZvPp+snaOSFsNd GrdkCwT+pG+0h/LRio8vfEsocZ1DBr137zOw31dXqqVyUGpMqInFIHDBwV16DFHO16Pf HuFw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hy4nC4E4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q21-20020a635055000000b0045a2b6e1192si15653457pgl.233.2022.12.28.00.43.54; Wed, 28 Dec 2022 00:44:06 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hy4nC4E4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229526AbiL1Ino (ORCPT + 99 others); Wed, 28 Dec 2022 03:43:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232635AbiL1InH (ORCPT ); Wed, 28 Dec 2022 03:43:07 -0500 Received: from mail-pf1-x429.google.com (mail-pf1-x429.google.com [IPv6:2607:f8b0:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11F2E101FD for ; Wed, 28 Dec 2022 00:42:14 -0800 (PST) Received: by mail-pf1-x429.google.com with SMTP id 65so10299392pfx.9 for ; Wed, 28 Dec 2022 00:42:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sMev9I+ZdryrTBjzJ8tiTgJp1UwzDLK7UbgCFoQvzyA=; b=hy4nC4E4al+dabRomp+OPrVVRBkiPqSdQSNvbzvr0h9pg+JqKsvvABpx/N94VxyQKO 4Fc9F9yhAarvh4qVPjwL49Va/Ac8LACS+2UrPgzNKEoRKEyei1Ug5YubxpWyOCNIadU0 uNwihQdr3mimAIBAXbUNUpnJAQ3Y7Y3DNCDiyAGV3QW14AYYG8Uk4fFWlFj05fBMMT2j apC3V24LXwNTLaQgHg3JUOn0541oMPFbmXp44QRI3TXZ6t7oANDyGRU/cIhzgWytqQ6V qRBmMAyP9p4ZxshXyE9BgRIAbMua0AaTzPpsNoNvYI2J1hHHpkpHBbXfo/9019QWhk3C A90g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sMev9I+ZdryrTBjzJ8tiTgJp1UwzDLK7UbgCFoQvzyA=; b=pw1Qzzo4rNXWpPy5XT73qcwv1sgiA1N8EKztOplU2q3nVG8H9IE90hHCAQL3b6+rO7 oVUt5B1DqQzE4d76GDZOsDIKvgz/+652F9AS659NeDpjtRwGAokdnZZZPkWKwgGURsd8 SDraSeMIaApo7DeGZFU1gXyNtQUeMdJoouBpecnONfWad6CiCtuKinFn9yso7VkD/bRw x07CZ3S7oSLGy7s10G8fvWZuzGzr171PmyvN6n3/tzWQkYnJ716WmCD6NqaNUQboE3S0 7DtP5ghonI0tTyaN+2P6OwdeRZ2oSTqRxYkQUAd6n5LO1t9savxC9RmuwVZ1h3CmX6Px jvYQ== X-Gm-Message-State: AFqh2kozW50mY8nwdlpamcYAxOItyasfbvZ8Ag1u0YgWb/427ldZH0l2 3zhBeyKOv4JCcoFaoCyWelle X-Received: by 2002:a62:1c84:0:b0:576:e4c7:97bf with SMTP id c126-20020a621c84000000b00576e4c797bfmr24944004pfc.15.1672216933591; Wed, 28 Dec 2022 00:42:13 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.42.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:42:12 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 12/17] arm64: dts: qcom: sm8350: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:23 +0530 Message-Id: <20221228084028.46528-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753446662030575161?= X-GMAIL-MSGID: =?utf-8?q?1753446662030575161?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 245dce24ec59..836732d16635 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2513,8 +2513,11 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sm8350-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; }; usb_1: usb@a6f8800 { From patchwork Wed Dec 28 08:40:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37141 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1784071wrt; Wed, 28 Dec 2022 00:44:42 -0800 (PST) X-Google-Smtp-Source: AMrXdXvbXn44/HskE+m7r56jEvfdaLir82woGSwDjTZQclgttLrNxfbXAPo1tj70j+FYprYOrn25 X-Received: by 2002:a05:6402:1cce:b0:472:1b3b:35f1 with SMTP id ds14-20020a0564021cce00b004721b3b35f1mr28128683edb.21.1672217082496; Wed, 28 Dec 2022 00:44:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217082; cv=none; d=google.com; s=arc-20160816; b=l1z8Y5ThN8TiAl4UgeonLZ3RUH4aXwfC5eJL4UDA9GKPA+529qgG+FX5mZ7p/LwQjl U2KlhinShB7g++ikGl3tK98TAQyrzNY7fIZpmQM5IEaIaCTDRcdZk1XBlnRvex9EGBg9 lnVyaSSY5wYHFrwzsvXz08MysY4Bz2E/GZRkBzb40CFD3pAs4WoaC1ZegUJzkVq3IVFV SEyl7NqBzWhFEh5DHK9bdkAF8phLH+WkKGjptlkm7nOVTzNp3zJV4tSV2dzFQN9IzJ2U mDl0Jd1UDDKL5+dfd10546ZMT79lkM3HXEpJ1oTlfJ1dpCGQc6uFAYH2sFtYOkNphNGK d4kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=u6zR8ugZMMSbsUYzZxGLGG2mvpL7z7iHt3BZjr/IYFc=; b=w3Jk1V6ldqg500xKvXSX1OTrwU5bc05lomU+pZy3urXPHmEw2aAiZXO1/XVQy/atHB YI/aDBWWgiQvy+GGdB7ev0S2DtqQhgbrF5gRsW+FojcLrdeueD++EqwKWWu6ttDR+n1Y CbwA73+5lnn96qh7JGOSF43XAl4TNwRdDiny45/Y12qBEzaAgqcMHGGuOIfPa0pT9DYA Zk0OHNSdfG6m84L6rJJuuB1hqWCLrLoJ8D4O+IDLehM659e6wlvcCJBZIwV16s70SJqx DkqC/pGvOd3leCSxV3x1J7uOccNn0f7xRNVN6DPzr7UWw7Bf/od69h9aPN4EJ1AL7ihU YnIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="SEHAxbm/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q14-20020a056402518e00b00469e701200dsi14023868edd.287.2022.12.28.00.44.18; Wed, 28 Dec 2022 00:44:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="SEHAxbm/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232720AbiL1Int (ORCPT + 99 others); Wed, 28 Dec 2022 03:43:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232081AbiL1InJ (ORCPT ); Wed, 28 Dec 2022 03:43:09 -0500 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97FD3CD for ; Wed, 28 Dec 2022 00:42:21 -0800 (PST) Received: by mail-pg1-x52c.google.com with SMTP id 79so10171341pgf.11 for ; Wed, 28 Dec 2022 00:42:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=u6zR8ugZMMSbsUYzZxGLGG2mvpL7z7iHt3BZjr/IYFc=; b=SEHAxbm/tlwxbMSvXx6Kn83W/mjgAGY97O8DA9p40Utz3/TdUra97SQthAuFldzs4c MopJ9AxP316k24yxgi+N9YA61a6iL7//vk5MoaxSfpwkCvcWEuvMTb+c/tMtjSg2pXYD 6USwLwSPIuEOOmHQCSzUrCEC+Haz96l+Tk0WbxNLQt6Zn8dUIB43JJNKurRIXbPAczVQ vdR2snNFBpHyPbi8QDntU4OtHp2WrBJ1TKzjCY7xZcGylYTCSW1e8sqa9PqQuHe9uHyH fCbE3iCtQfSK3nnH4yOxugPpxc7iwHObl50gmgkVKW3CRn5McuEuTLXte0h0TAZpFDHl kFpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=u6zR8ugZMMSbsUYzZxGLGG2mvpL7z7iHt3BZjr/IYFc=; b=IbVQLcLQWDq817bYNpRiQa4WHi3zLgU7Bpi2XgrPZs/08ER5xR+wZ5pPjBEodZgCjS eQyWcDHYqebYwbYZozpl6outOlawUHTqrT8rLE4CV17GqlBXk9UfP9quCmC29P9EI9E5 3ueez2crH7bRHiIjdJKT9buCfzd9diGQB+GNnsZVdsSUxcsAVjR5NsjZ4ZRlxnuRbXiE jBxSYB0XTz4hyTlEMjsYZN2snZMF9KU3JCCNFxDjPy4RLD7nh+WSjVMKjsgjuHr2eSPV QE1JjKPX6qJ5mTTmEDTxsyuZmxkMg/DOlMtUHY0wVTCDmKLMWaQ6JktF+44xP2G56Yy1 m4rA== X-Gm-Message-State: AFqh2kqBpXnFhDMGB4nzYXFBIV6LRnhTXpfoBLFiBH5nV3Ig+Of1/nlq Xyv8saQ/nsymRAev/H3c8JSD X-Received: by 2002:a62:f20f:0:b0:56b:b890:6ccd with SMTP id m15-20020a62f20f000000b0056bb8906ccdmr24976154pfh.4.1672216941105; Wed, 28 Dec 2022 00:42:21 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.42.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:42:20 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 13/17] arm64: dts: qcom: sm8450: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:24 +0530 Message-Id: <20221228084028.46528-14-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753446699455831487?= X-GMAIL-MSGID: =?utf-8?q?1753446699455831487?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 570475040d95..12549a2912c6 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3640,8 +3640,11 @@ gem_noc: interconnect@19100000 { system-cache-controller@19200000 { compatible = "qcom,sm8450-llcc"; - reg = <0 0x19200000 0 0x580000>, <0 0x19a00000 0 0x80000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x19200000 0 0x80000>, <0 0x19600000 0 0x80000>, + <0 0x19300000 0 0x80000>, <0 0x19700000 0 0x80000>, + <0 0x19a00000 0 0x80000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 28 08:40:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37142 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1784109wrt; Wed, 28 Dec 2022 00:44:52 -0800 (PST) X-Google-Smtp-Source: AMrXdXuoMbgh+Jlrco0dmu6xvw8AlTpTtd7hb7jtKluQ6QfD8OrWa/HB11BJvFoSn4ObVtsLXvE5 X-Received: by 2002:a05:6402:5296:b0:461:dd11:c688 with SMTP id en22-20020a056402529600b00461dd11c688mr22063809edb.9.1672217092008; Wed, 28 Dec 2022 00:44:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217091; cv=none; d=google.com; s=arc-20160816; b=nSpra/Dms9BlPJ0owl+uChtiEVyfAPvvNa64NUi7llM20/f1qCtOHe7vMpw+trWaUi M6qvQ6A+6n+wDTFSmXcJakUKqgbnySV7MBOJuFHC8lSx7j0ePLd6r6Sz5UtxYwD6Hy4v OEUk/8jzizxUAgYYwoCsqW4jNQSm1DgRsCt/0Wm5ApF9+op1kNV2bmSTDfpFfl0SmJRt T/CC0xAU3gm7PlQgthQG0joOtuy3/sRNsfsYwqNj5rP0F61PXkMpmASO9xHyEZbSyBe0 a6fFBzxCwy6VmDAhTk2cMHp8K90+eGwTrRTFJGHVxoq0Ot3GM8dGBgCKGT1Day9OzSSw 11sQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=znASgBClq0rwhBOl4/Fw1c5T/s1foKbyxf4XPqRiKDI=; b=eR2608XGSViOg4QZ4ssH0u5iz6yWT9ux1XbRLVzJSPqK76v+pZJG7nY5urVLVhIhN/ tKoGkYpGIrgDSVvdtc1DLt7Bw9gjCO8ST9MZo8O4VffC9N3UbeHUVVT1XIPD78H2banP xz8zAas+muYOK5+R7kZE0XIv57N4/EeT0wghaitQtf+j5Fe15xcYj6gxWYF4cB0x35Tl m3KqH0NUcHjSN51qZcF2BIaae/TczYB3JoQ7u5xVu7gnQZzjV9RcqPk197DIxyngpr39 JFGC3hrCYOp0aGbQRXvPuyMNGLAKd/FIr/fOjYDwrSgLfAvCeq5EoyVKVprds44q1YLV Cewg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iIHueAUz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z10-20020a50cd0a000000b0046bdaa564bdsi12384557edi.419.2022.12.28.00.44.27; Wed, 28 Dec 2022 00:44:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iIHueAUz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232824AbiL1Inx (ORCPT + 99 others); Wed, 28 Dec 2022 03:43:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232804AbiL1InN (ORCPT ); Wed, 28 Dec 2022 03:43:13 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53160FD13 for ; Wed, 28 Dec 2022 00:42:29 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id fy4so15636387pjb.0 for ; Wed, 28 Dec 2022 00:42:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=znASgBClq0rwhBOl4/Fw1c5T/s1foKbyxf4XPqRiKDI=; b=iIHueAUz0G9Q5Qor23ltImQgj8YpTUuI/PbDrcEdsTQqLprCC3c+/GhTb7Wa8hwNUx PTj4TdPafPSASxxhHacbBAnqwos9HjyGHVsNYQqclReq/BLKrfQgtBRzSghtWrSTmJgr 44WjAWGVmA4fA5y4iGXiTIQ/qPE/dS5M/cAD8O/dQBXvu3PjOlLNfa/vzJDGvw8dag/2 7UK57ETnT0B5AgeooJ4F67sjWayL28Auq/DQSzGPr6xsXLTDdL+urgDlAB0KI1IIOu4P YK0vbGYdX/80fFPCl9BWo543P/lHDM9gc5daGv3xZbhWbFMf8b/77TbkQTQ+08H5ZQDE o3nA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=znASgBClq0rwhBOl4/Fw1c5T/s1foKbyxf4XPqRiKDI=; b=12iG6LE+VWVtgV0CN1wY8C3kqsAwDVJvmVJHRsVSZooe6ow21+gPXmXTEZi5i7OhTk p0bAF2o0Xgenjcf4UeM2rsJ/lMNVsgMvmYisdhqpZeaMJwLPw/uZ8uh4Fv+GdhnZbP9p OdT196CrMgSsLVEzOtFSSjGeiaVPppSCfDtnQ6ufxiwQBjFvZIumB3wDppoX04X3GlDa 4ZgcH8lURZ6VKgkClyYxY+GcljcR5jSHLblEfR5fN1Bil4871QidGiVPzwQoRMm5XN1d 6U7oTqas+A+fFYl8if2PWZAaKNRojSoBuBGohgC/6CUNtXaCerqk8Bpz0VuLJw2aHAmX ra3Q== X-Gm-Message-State: AFqh2kotJVKSafrM8LaS5FdkyU/2zVLG11QFD7ey2WbLNf+hkUR5/o8F skogCBswGMBg1XkuhubGMVw/ X-Received: by 2002:a05:6a21:9218:b0:9d:efbf:787d with SMTP id tl24-20020a056a21921800b0009defbf787dmr29695708pzb.50.1672216948793; Wed, 28 Dec 2022 00:42:28 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.42.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:42:27 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 14/17] arm64: dts: qcom: sm6350: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:25 +0530 Message-Id: <20221228084028.46528-15-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753446709030132593?= X-GMAIL-MSGID: =?utf-8?q?1753446709030132593?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SM6350, there is only one LLCC bank available. So let's just pass that as "llcc0_base". Reported-by: Parikshit Pareek Tested-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 43324bf291c3..c7701f5e4af6 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1174,7 +1174,7 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sm6350-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", "llcc_broadcast_base"; }; gem_noc: interconnect@9680000 { From patchwork Wed Dec 28 08:40:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37143 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1784122wrt; Wed, 28 Dec 2022 00:44:55 -0800 (PST) X-Google-Smtp-Source: AMrXdXuNXHt9+kJER0AN2xAJM7bIfboRc9S9qyTTL1Ztkd9zzXviDmoULEccEf02fb05NSp3pi+0 X-Received: by 2002:a17:907:8c81:b0:7c0:d0ba:e81f with SMTP id td1-20020a1709078c8100b007c0d0bae81fmr20159736ejc.1.1672217095026; Wed, 28 Dec 2022 00:44:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217095; cv=none; d=google.com; s=arc-20160816; b=PXvUPKHIyVLdlhSEfFeABRGuprOFnlvZacVg7nuLKuW0VDgCZUw0s1+w9yznxhbsAM KlKFSxeOq49rVYGP1V7YmbHPKs//8/fZFrQgYsKOVDsprkAjA++roiS2MEKsppq+b+uP ZNq+Cw1n85fWEM2KodLmGV2OmnLKPPAWWFS71J/7pFrkrqRc2A3Zq+2vsdzvngt9UnZS yP3VAg7SzRQQV4n4L9pTTEhKQYHCCoR+cSeIQMiWPs4IUg7B7iRt6HVvBaM0o8h5hMte cVa9v3Ead48LK88ZfkpDXAv/48ip8mhYOhaaPeUyd4o2tzT34SSAD9Zqyf9NF8sDhQrc hoLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=65hsAFSVLExCXYMDq8UQxFyuNWWlmEvo8D8bnHIehrE=; b=dzJZXR9TG6AvwyGLb1FAKY6Ab9+W9KOLFZ1iyRReQIDr8eGWJRxnqFxRl5DslbCkcb /17TSh5eO9NMa5BlDPUfCci18TGUTsJMKl4UB1AaTaCspZHY8K0tFzNKKhUjYBX2l16z 07UyrBG1Ef/0gMn1wcCv1nO7a3+OsX+ZyUdIt804egNYYRX64I9FHeMMEwEG60zmrPFE dvm5r5c15ySPVVTTaueKqI1E0Gyo/8/LIRbRDWFKL959oDvjPx90sLX8B5nSc4C7kitl IyX4+v1Rbt8OExqxjd6om2p26jixt5UCHw9M6Gg+annziz8de8wFtAnbhXGasLfsZ6N9 fuSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SsGfrkqi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j4-20020a1709062a0400b0084c6c0a528bsi2864461eje.306.2022.12.28.00.44.31; Wed, 28 Dec 2022 00:44:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SsGfrkqi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232554AbiL1In7 (ORCPT + 99 others); Wed, 28 Dec 2022 03:43:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45688 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232697AbiL1InO (ORCPT ); Wed, 28 Dec 2022 03:43:14 -0500 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71E8FFCEC for ; Wed, 28 Dec 2022 00:42:36 -0800 (PST) Received: by mail-pl1-x633.google.com with SMTP id g16so5810437plq.12 for ; Wed, 28 Dec 2022 00:42:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=65hsAFSVLExCXYMDq8UQxFyuNWWlmEvo8D8bnHIehrE=; b=SsGfrkqinhbP8boq94X/MdsdinZz5T1nd1Zk62Ks/s97gNdsRa7p/R3tbYrDNIIHln gGgTvXij3GB+Xw0f2/ELmpPR7SiJ9M1MDvEYE87tm8n29J03+MSWMVZ6cf6wP3MDL+/s uAUkCbK1289tWlPYxpVAioLLPaHf/wwbY92ueeAjDyl4v2qo9RUkMqmSmPQM7sBSGf/5 XAN9HcTN7ZI+JaYilCILDRtqVFG7kfmIocdPo6ZG7c/kCcESqrsLLK1kHNOW7rcdoVF6 3BySnukO5b+th2813ItZgFMv9zuRRMn7svbVmbtukx3wd/vQd0BHcRFNbbvR8oJGu8xM Rs1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=65hsAFSVLExCXYMDq8UQxFyuNWWlmEvo8D8bnHIehrE=; b=F+n/OPS6Tf1a7e7rvDtmhFMYc6iMDy/5UGv/17cw0x9hOTxs4SVwcb/HEZSVjdBShr 5F62DqigAB7iG2391fA9k3GmJLUFdzNyIvfyUjHKnRRWFpYXa4lwF+Q4xLhVSD0CcdTy myn9oiVdmlYWBEpdK6WJimbmeaug4kRgto/IF/YfFpCJtqIvjPiJa+hNDtEriwA07rba 4Etpe/YQxjZyKpFe9dfErZtgu4A1SMmiGQJ4oVUG0zuBHrWuDLesL7ZhG711ff3/g+OL pMpHmPHr7BhaOMIAWkdWxrgI90FwBH0LZRls8Lsv1wd+Ksr2TaTtq3JM9y07O4+4nj3k yBiw== X-Gm-Message-State: AFqh2kqae+S6U8ZLzm3dbonK89fOiEKW3f8sPGxjPzUDgQY/XNcZsNYz Rp1J8ez39QpXkNm5HriL0tFA X-Received: by 2002:a05:6a20:4904:b0:9d:efbf:8156 with SMTP id ft4-20020a056a20490400b0009defbf8156mr40889302pzb.31.1672216955852; Wed, 28 Dec 2022 00:42:35 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.42.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:42:34 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 15/17] qcom: llcc/edac: Fix the base address used for accessing LLCC banks Date: Wed, 28 Dec 2022 14:10:26 +0530 Message-Id: <20221228084028.46528-16-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753446712248200014?= X-GMAIL-MSGID: =?utf-8?q?1753446712248200014?= The Qualcomm LLCC/EDAC drivers were using a fixed register stride for accessing the (Control and Status Registers) CSRs of each LLCC bank. This stride only works for some SoCs like SDM845 for which driver support was initially added. But the later SoCs use different register stride that vary between the banks with holes in-between. So it is not possible to use a single register stride for accessing the CSRs of each bank. By doing so could result in a crash. For fixing this issue, let's obtain the base address of each LLCC bank from devicetree and get rid of the fixed stride. This also means, we no longer need to rely on reg-names property and get the base addresses using index. First index is LLCC bank 0 and last index is LLCC broadcast. If the SoC supports more than one bank, then those needs to be defined in devicetree for index from 1..N-1. Reported-by: Parikshit Pareek Tested-by: Luca Weiss Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Signed-off-by: Manivannan Sadhasivam Reviewed-by: Borislav Petkov (AMD) --- drivers/edac/qcom_edac.c | 14 +++--- drivers/soc/qcom/llcc-qcom.c | 72 +++++++++++++++++------------- include/linux/soc/qcom/llcc-qcom.h | 6 +-- 3 files changed, 48 insertions(+), 44 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 3256254c3722..1d3cc1930a74 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -213,7 +213,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) for (i = 0; i < reg_data.reg_cnt; i++) { synd_reg = reg_data.synd_reg + (i * 4); - ret = regmap_read(drv->regmap, drv->offsets[bank] + synd_reg, + ret = regmap_read(drv->regmaps[bank], synd_reg, &synd_val); if (ret) goto clear; @@ -222,8 +222,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) reg_data.name, i, synd_val); } - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.count_status_reg, + ret = regmap_read(drv->regmaps[bank], reg_data.count_status_reg, &err_cnt); if (ret) goto clear; @@ -233,8 +232,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) edac_printk(KERN_CRIT, EDAC_LLCC, "%s: Error count: 0x%4x\n", reg_data.name, err_cnt); - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.ways_status_reg, + ret = regmap_read(drv->regmaps[bank], reg_data.ways_status_reg, &err_ways); if (ret) goto clear; @@ -296,8 +294,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) /* Iterate over the banks and look for Tag RAM or Data RAM errors */ for (i = 0; i < drv->num_banks; i++) { - ret = regmap_read(drv->regmap, - drv->offsets[i] + DRP_INTERRUPT_STATUS, + ret = regmap_read(drv->regmaps[i], DRP_INTERRUPT_STATUS, &drp_error); if (!ret && (drp_error & SB_ECC_ERROR)) { @@ -312,8 +309,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) if (!ret) irq_rc = IRQ_HANDLED; - ret = regmap_read(drv->regmap, - drv->offsets[i] + TRP_INTERRUPT_0_STATUS, + ret = regmap_read(drv->regmaps[i], TRP_INTERRUPT_0_STATUS, &trp_error); if (!ret && (trp_error & SB_ECC_ERROR)) { diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 23ce2f78c4ed..72f3f2a9aaa0 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -62,8 +62,6 @@ #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c #define LLCC_TRP_ALGO_CFG8 0x21f30 -#define BANK_OFFSET_STRIDE 0x80000 - #define LLCC_VERSION_2_0_0_0 0x02000000 #define LLCC_VERSION_2_1_0_0 0x02010000 #define LLCC_VERSION_4_1_0_0 0x04010000 @@ -898,8 +896,8 @@ static int qcom_llcc_remove(struct platform_device *pdev) return 0; } -static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, - const char *name) +static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index, + const char *name) { void __iomem *base; struct regmap_config llcc_regmap_config = { @@ -909,7 +907,7 @@ static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, .fast_io = true, }; - base = devm_platform_ioremap_resource_byname(pdev, name); + base = devm_platform_ioremap_resource(pdev, index); if (IS_ERR(base)) return ERR_CAST(base); @@ -927,6 +925,7 @@ static int qcom_llcc_probe(struct platform_device *pdev) const struct llcc_slice_config *llcc_cfg; u32 sz; u32 version; + struct regmap *regmap; drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL); if (!drv_data) { @@ -934,21 +933,51 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; } - drv_data->regmap = qcom_llcc_init_mmio(pdev, "llcc_base"); - if (IS_ERR(drv_data->regmap)) { - ret = PTR_ERR(drv_data->regmap); + /* Initialize the first LLCC bank regmap */ + regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base"); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); goto err; } - drv_data->bcast_regmap = - qcom_llcc_init_mmio(pdev, "llcc_broadcast_base"); + cfg = of_device_get_match_data(&pdev->dev); + + ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); + if (ret) + goto err; + + num_banks &= LLCC_LB_CNT_MASK; + num_banks >>= LLCC_LB_CNT_SHIFT; + drv_data->num_banks = num_banks; + + drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); + if (!drv_data->regmaps) { + ret = -ENOMEM; + goto err; + } + + drv_data->regmaps[0] = regmap; + + /* Initialize rest of LLCC bank regmaps */ + for (i = 1; i < num_banks; i++) { + char *base = kasprintf(GFP_KERNEL, "llcc%d_base", i); + + drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); + if (IS_ERR(drv_data->regmaps[i])) { + ret = PTR_ERR(drv_data->regmaps[i]); + kfree(base); + goto err; + } + + kfree(base); + } + + drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); if (IS_ERR(drv_data->bcast_regmap)) { ret = PTR_ERR(drv_data->bcast_regmap); goto err; } - cfg = of_device_get_match_data(&pdev->dev); - /* Extract version of the IP */ ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], &version); @@ -957,15 +986,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) drv_data->version = version; - ret = regmap_read(drv_data->regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], - &num_banks); - if (ret) - goto err; - - num_banks &= LLCC_LB_CNT_MASK; - num_banks >>= LLCC_LB_CNT_SHIFT; - drv_data->num_banks = num_banks; - llcc_cfg = cfg->sct_data; sz = cfg->size; @@ -973,16 +993,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) if (llcc_cfg[i].slice_id > drv_data->max_slices) drv_data->max_slices = llcc_cfg[i].slice_id; - drv_data->offsets = devm_kcalloc(dev, num_banks, sizeof(u32), - GFP_KERNEL); - if (!drv_data->offsets) { - ret = -ENOMEM; - goto err; - } - - for (i = 0; i < num_banks; i++) - drv_data->offsets[i] = i * BANK_OFFSET_STRIDE; - drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, GFP_KERNEL); if (!drv_data->bitmap) { diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index ad1fd718169d..423220e66026 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -120,7 +120,7 @@ struct llcc_edac_reg_offset { /** * struct llcc_drv_data - Data associated with the llcc driver - * @regmap: regmap associated with the llcc device + * @regmaps: regmaps associated with the llcc device * @bcast_regmap: regmap associated with llcc broadcast offset * @cfg: pointer to the data structure for slice configuration * @edac_reg_offset: Offset of the LLCC EDAC registers @@ -129,12 +129,11 @@ struct llcc_edac_reg_offset { * @max_slices: max slices as read from device tree * @num_banks: Number of llcc banks * @bitmap: Bit map to track the active slice ids - * @offsets: Pointer to the bank offsets array * @ecc_irq: interrupt for llcc cache error detection and reporting * @version: Indicates the LLCC version */ struct llcc_drv_data { - struct regmap *regmap; + struct regmap **regmaps; struct regmap *bcast_regmap; const struct llcc_slice_config *cfg; const struct llcc_edac_reg_offset *edac_reg_offset; @@ -143,7 +142,6 @@ struct llcc_drv_data { u32 max_slices; u32 num_banks; unsigned long *bitmap; - u32 *offsets; int ecc_irq; u32 version; }; From patchwork Wed Dec 28 08:40:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 37144 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1784244wrt; Wed, 28 Dec 2022 00:45:17 -0800 (PST) X-Google-Smtp-Source: AMrXdXsIsYQXyaEgEKuweB3BV2vNnRtqaPrSdCVWZTo/rAdf/TRJrkZC1hAdvNHSzSC6D3LJt2Th X-Received: by 2002:a17:907:a809:b0:7c1:5467:39af with SMTP id vo9-20020a170907a80900b007c1546739afmr21926382ejc.37.1672217117063; Wed, 28 Dec 2022 00:45:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672217117; cv=none; d=google.com; s=arc-20160816; b=McqkJTQb0L6gmtThUSdC1Ee0uBet6Sk4HucC6fB0IL2sIRHG0SBQ1Dq2j09PRkLmgF LjFuLx2QYl2Zup5Ig4NXRoSDXkEPlAVTUHaRtFpuaK78msASTAa7HQjoGkzJrJJ/upay P7hr8MNgK6zayrOW2uiCigM7WIVCSacPL0ORVh+js7XrQvEpuOb/7WKiV+vQG7SXcDJM xEAvPiusuzo7pXxo8YtcZQxYIe1sSyRR6w5+TtkH/UqhR3IgxpmSNVHrqb61gjGDmkVC bXnwC42nO021ntfD1h2cekNAPBkxmmoMbB0+BjuXLv8dB66Lh894d9ZqGCVd/TssbF1s gVcQ== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ne13-20020a1709077b8d00b0078356aaeb63si13933891ejc.288.2022.12.28.00.44.53; Wed, 28 Dec 2022 00:45:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pVHwuZ2c; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232922AbiL1Io2 (ORCPT + 99 others); Wed, 28 Dec 2022 03:44:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232806AbiL1In1 (ORCPT ); Wed, 28 Dec 2022 03:43:27 -0500 Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C59BA1004E for ; Wed, 28 Dec 2022 00:42:43 -0800 (PST) Received: by mail-pg1-x52b.google.com with SMTP id 82so10221168pgc.0 for ; Wed, 28 Dec 2022 00:42:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Dmgmy1WkNpy5rN0a0WaCg+UaF5eldkFegxv86WikVN4=; b=pVHwuZ2c7VrUE5Wd2ya4PpcVuLE6eNZ6ATLAbSIPuSaAUeIDwYtrZggSCCm2gmA8qH JTWC5T1yfXtnVTlvKQethFlb0qfZF8bYG6sKsZLFnxRFA5SUKm/En1vFVuX2j65a/OY3 IL/4uGH5m+ZfdPLzyDy9Z7ovx80C/GorxXYlXkXep0wCXiIeAxrOd/X+XbIPoFekW736 ydBVY0pcv1Wi9WmO8SmlHhLpa7ddE4XPFkR5dJ2GXFf8gGG2N7uI7cpsPGuMWnEhE3yU A1P2pdkm0woo+8+YjRKLZJJk+8U7Q1LmwE+DLx8d8VgHS/gZPlUrc3gHhs+iZEeymP6s gytw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Dmgmy1WkNpy5rN0a0WaCg+UaF5eldkFegxv86WikVN4=; b=1AhDskL946esRUU/AwI4RhTTJhNx25ft2Fj1f8MsEOWGWZNcTwug5aOsPhMwgy6nOs GXSqed2L/RBUyyj76CqcyFvBdQcc5llNpsJ/lsT0oD+/DJ9ETU27SoBHuyNyq3m2TVpQ LDK6a7rXs6okx+M8FbWDVPHJXzSTQGJFrTPME7WMUEwoDeJtou4Rcx55ul2Q1SKdC0Co +1jX1pCxXMH/oXqIOf3tOXY8+2fqSLzK+Xt8NF0/j7YUL1adAcGTtQ262bo//ErCeiFl lSnqfn+shd+xONMUvC0ovb/l7OQGIQqqnNxcQHtFZE/ps2I1Ap1cESTNvdegYo2O2+1O NCxQ== X-Gm-Message-State: AFqh2koZQOks5MaIPM/wRMWin2Qty3sYCB6rHrDUZsNWdnP9TJCmZ4Vq EythIwFuhR2hDA+jSaGoYP4Q X-Received: by 2002:a05:6a00:414c:b0:581:7c46:debd with SMTP id bv12-20020a056a00414c00b005817c46debdmr3704718pfb.24.1672216963254; Wed, 28 Dec 2022 00:42:43 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.42.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:42:42 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 16/17] qcom: llcc/edac: Support polling mode for ECC handling Date: Wed, 28 Dec 2022 14:10:27 +0530 Message-Id: <20221228084028.46528-17-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753446735748480753?= X-GMAIL-MSGID: =?utf-8?q?1753446735748480753?= Not all Qcom platforms support IRQ mode for ECC handling. For those platforms, the current EDAC driver will not be probed due to missing ECC IRQ in devicetree. So add support for polling mode so that the EDAC driver can be used on all Qcom platforms supporting LLCC. The polling delay of 5000ms is chosen based on Qcom downstream/vendor driver. Reported-by: Luca Weiss Tested-by: Luca Weiss Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 37 +++++++++++++++++++++++++----------- drivers/soc/qcom/llcc-qcom.c | 13 ++++++------- 2 files changed, 32 insertions(+), 18 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 1d3cc1930a74..cfcdc35b0373 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -76,6 +76,8 @@ #define DRP0_INTERRUPT_ENABLE BIT(6) #define SB_DB_DRP_INTERRUPT_ENABLE 0x3 +#define ECC_POLL_MSEC 5000 + enum { LLCC_DRAM_CE = 0, LLCC_DRAM_UE, @@ -283,8 +285,7 @@ dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank) return ret; } -static irqreturn_t -llcc_ecc_irq_handler(int irq, void *edev_ctl) +static irqreturn_t llcc_ecc_irq_handler(int irq, void *edev_ctl) { struct edac_device_ctl_info *edac_dev_ctl = edev_ctl; struct llcc_drv_data *drv = edac_dev_ctl->dev->platform_data; @@ -328,6 +329,11 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) return irq_rc; } +static void llcc_ecc_check(struct edac_device_ctl_info *edev_ctl) +{ + llcc_ecc_irq_handler(0, edev_ctl); +} + static int qcom_llcc_edac_probe(struct platform_device *pdev) { struct llcc_drv_data *llcc_driv_data = pdev->dev.platform_data; @@ -355,22 +361,31 @@ static int qcom_llcc_edac_probe(struct platform_device *pdev) edev_ctl->ctl_name = "llcc"; edev_ctl->panic_on_ue = LLCC_ERP_PANIC_ON_UE; + /* Check if LLCC driver has passed ECC IRQ */ + ecc_irq = llcc_driv_data->ecc_irq; + if (ecc_irq > 0) { + /* Use interrupt mode if IRQ is available */ + edac_op_state = EDAC_OPSTATE_INT; + } else { + /* Fall back to polling mode otherwise */ + edac_op_state = EDAC_OPSTATE_POLL; + edev_ctl->poll_msec = ECC_POLL_MSEC; + edev_ctl->edac_check = llcc_ecc_check; + } + rc = edac_device_add_device(edev_ctl); if (rc) goto out_mem; platform_set_drvdata(pdev, edev_ctl); - /* Request for ecc irq */ - ecc_irq = llcc_driv_data->ecc_irq; - if (ecc_irq < 0) { - rc = -ENODEV; - goto out_dev; - } - rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, + /* Request ECC IRQ if available */ + if (ecc_irq > 0) { + rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, IRQF_TRIGGER_HIGH, "llcc_ecc", edev_ctl); - if (rc) - goto out_dev; + if (rc) + goto out_dev; + } return rc; diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 72f3f2a9aaa0..7b7c5a38bac6 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -1011,13 +1011,12 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); - if (drv_data->ecc_irq >= 0) { - llcc_edac = platform_device_register_data(&pdev->dev, - "qcom_llcc_edac", -1, drv_data, - sizeof(*drv_data)); - if (IS_ERR(llcc_edac)) - dev_err(dev, "Failed to register llcc edac driver\n"); - } + + llcc_edac = platform_device_register_data(&pdev->dev, + "qcom_llcc_edac", -1, drv_data, + sizeof(*drv_data)); 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So probing the EDAC driver will result in a crash. Hence, disable the creation of EDAC platform device on all SDM845 devices. The issue has been observed on Lenovo Yoga C630 and DB845c. Cc: # 5.10 Reported-by: Steev Klimaszewski Signed-off-by: Manivannan Sadhasivam --- drivers/soc/qcom/llcc-qcom.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 7b7c5a38bac6..8d840702df50 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -1012,11 +1012,18 @@ static int qcom_llcc_probe(struct platform_device *pdev) drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); - llcc_edac = platform_device_register_data(&pdev->dev, - "qcom_llcc_edac", -1, drv_data, - sizeof(*drv_data)); - if (IS_ERR(llcc_edac)) - dev_err(dev, "Failed to register llcc edac driver\n"); + /* + * The platforms based on SDM845 SoC locks the access to EDAC registers + * in bootloader. So probing the EDAC driver will result in a crash. + * Hence, disable the creation of EDAC platform device on SDM845. + */ + if (!of_device_is_compatible(dev->of_node, "qcom,sdm845-llcc")) { + llcc_edac = platform_device_register_data(&pdev->dev, + "qcom_llcc_edac", -1, drv_data, + sizeof(*drv_data)); + if (IS_ERR(llcc_edac)) + dev_err(dev, "Failed to register llcc edac driver\n"); + } return 0; err: