From patchwork Wed Oct 5 19:08:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Segher Boessenkool X-Patchwork-Id: 1744 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp746746wrs; Wed, 5 Oct 2022 12:11:35 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7RtddnxEnc3VNlQsiSzROFi7S5zXBXlptaF78ZYiEWGHxfFAVBGwOqJnYVNPDaE0Rj85iR X-Received: by 2002:a17:906:8473:b0:77b:efa8:50e4 with SMTP id hx19-20020a170906847300b0077befa850e4mr895242ejc.250.1664997094934; Wed, 05 Oct 2022 12:11:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664997094; cv=none; d=google.com; s=arc-20160816; b=DDTRVNTpauyC3/h3ME8mXXUerHP4l2dN0GpbOmcVtJqf5HOqSQs9d2t20CpMbK2TB7 66ZdElEOxDJegHLY/CJUD17nDOhEuRv0w7CSmDyfQJKheZ5vvrfPMOfZyCKMqtekH8T6 7smEw/8cKQG7t7Pw8c7QT91MxM09/NS7zixxyooEeBQ1wZfwbcHe+2U2fU8SOmBSaVwD 8+k29lP7PFWWQ5kq40Iydj8/BsbWD12y6/UBd5Zt22k9PUJTYboZMysVreSki5EmcBol 7abp+BkNps0C9ktFvw70uDvOlf3sBwfMP9kn4uZqwuL9JsW3pngSzO8B+rSEPRq8odxh +sog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :references:in-reply-to:message-id:date:subject:to:from:dmarc-filter :delivered-to; bh=CIRVeLlnSNNm1CXhGUKLtlqxyG/rJgWdB/lczKrbQSg=; b=Me+LDILkMq3c2M009KQwZJTb6i/ad2kgZMeELNVl0xcILr64f0Pdr2pGZk6I0GVfpm /Zn2NM3cM+2CARizRtPdros4+13RgVr0ouMYYn/Ir0S1Mop3RLcFOrL+tiTloxNAxJAN Il5JLRJCtk5T1l5jpUJyQ3Emup3VYskCIVAFpeWQsbXnIlrBl6ShcbSVx6+hIoaia7S7 QcwYylmmBMPBWjp/bk76I1x6GXaeYW8OSYYbJ1CX0pIQL+50JgARSd8MEhw3rcltdA85 0LcAoGRBxQ8KVBbveLgk0KXPxmxXkWOodvieveYO58bNDhjRjE/X7XV5mTJyX+TTDnjw /mUA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id w13-20020a056402268d00b00459b04a18e5si2330694edd.435.2022.10.05.12.11.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Oct 2022 12:11:34 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BDA033857815 for ; Wed, 5 Oct 2022 19:11:03 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from gcc1-power7.osuosl.org (gcc1-power7.osuosl.org [140.211.15.137]) by sourceware.org (Postfix) with ESMTP id 2B4093858437 for ; Wed, 5 Oct 2022 19:08:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2B4093858437 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: sourceware.org; spf=none smtp.mailfrom=gcc1-power7.osuosl.org Received: by gcc1-power7.osuosl.org (Postfix, from userid 10019) id CBD0B12406CF; Wed, 5 Oct 2022 19:08:57 +0000 (UTC) From: Segher Boessenkool To: gcc-patches@gcc.gnu.org Subject: [PATCH 1/3] rs6000: Remove "wD" from *vsx_extract__store Date: Wed, 5 Oct 2022 19:08:39 +0000 Message-Id: <19d1d25b1a819a74e01314e6f14b91a847656d4e.1664994970.git.segher@kernel.crashing.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: In-Reply-To: References: X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Segher Boessenkool , dje.gcc@gmail.com, "Kewen.Lin" Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1745875994061766653?= X-GMAIL-MSGID: =?utf-8?q?1745875994061766653?= We can use "n" instead of "wD" if we simply test the value of the integer constant directly. 2022-10-05 Segher Boessenkool * config/rs6000/vsx.md (*vsx_extract__store): Use "n" instead of "wD" constraint. --- gcc/config/rs6000/vsx.md | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index e226a93bbe55..79a759b1ccf3 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -3466,8 +3466,9 @@ (define_insn "*vsx_extract__store" [(set (match_operand: 0 "memory_operand" "=m,Z,wY") (vec_select: (match_operand:VSX_D 1 "register_operand" "d,v,v") - (parallel [(match_operand:QI 2 "vsx_scalar_64bit" "wD,wD,wD")])))] - "VECTOR_MEM_VSX_P (mode)" + (parallel [(match_operand:QI 2 "vsx_scalar_64bit" "n,n,n")])))] + "VECTOR_MEM_VSX_P (mode) + && INTVAL (operands[2]) == (BYTES_BIG_ENDIAN ? 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[8.43.85.97]) by mx.google.com with ESMTPS id o18-20020a509b12000000b004519cd16132si14800854edi.61.2022.10.05.12.11.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Oct 2022 12:11:24 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D8E213857362 for ; Wed, 5 Oct 2022 19:10:58 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from gcc1-power7.osuosl.org (gcc1-power7.osuosl.org [140.211.15.137]) by sourceware.org (Postfix) with ESMTP id 472EB3858023 for ; Wed, 5 Oct 2022 19:09:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 472EB3858023 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: sourceware.org; spf=none smtp.mailfrom=gcc1-power7.osuosl.org Received: by gcc1-power7.osuosl.org (Postfix, from userid 10019) id DD46512406DD; Wed, 5 Oct 2022 19:09:00 +0000 (UTC) From: Segher Boessenkool To: gcc-patches@gcc.gnu.org Subject: [PATCH 2/3] rs6000: Rework vsx_extract_ Date: Wed, 5 Oct 2022 19:08:40 +0000 Message-Id: X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: In-Reply-To: References: X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Segher Boessenkool , dje.gcc@gmail.com, "Kewen.Lin" Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1745875983425545210?= X-GMAIL-MSGID: =?utf-8?q?1745875983425545210?= Extracting the left and right halfs of a vector are entirely different operations. Things are simpler if they are separate define_insns, and it is easy to get rid of the "wD" constraint use then. This also give the variant that is a no-op copy its own alternative, of length 0 (and this, cost 0, making it more likely RA will choose it. 2022-10-05 Segher Boessenkool * config/rs6000/vsx.md (vsx_extract_): Replace define_insn by a define_expand. Split the contents to... (*vsx_extract__0): ... this. Rewrite. (*vsx_extract__01: ... and this. Rewrite. --- gcc/config/rs6000/vsx.md | 80 ++++++++++++++++++++++-------------------------- 1 file changed, 37 insertions(+), 43 deletions(-) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 79a759b1ccf3..e0e34a78bca1 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -3388,59 +3388,53 @@ (define_expand "vsx_set_" ;; Optimize cases were we can do a simple or direct move. ;; Or see if we can avoid doing the move at all -(define_insn "vsx_extract_" - [(set (match_operand: 0 "gpc_reg_operand" "=wa, wa, wr, wr") +(define_expand "vsx_extract_" + [(set (match_operand: 0 "gpc_reg_operand") (vec_select: - (match_operand:VSX_D 1 "gpc_reg_operand" "wa, wa, wa, wa") + (match_operand:VSX_D 1 "gpc_reg_operand") (parallel - [(match_operand:QI 2 "const_0_to_1_operand" "wD, n, wD, n")])))] + [(match_operand:QI 2 "const_0_to_1_operand")])))] "VECTOR_MEM_VSX_P (mode)" + "") + +(define_insn "*vsx_extract__0" + [(set (match_operand: 0 "gpc_reg_operand" "=wa,wa,wr") + (vec_select: + (match_operand:VSX_D 1 "gpc_reg_operand" "0,wa,wa") + (parallel + [(match_operand:QI 2 "const_0_to_1_operand" "n,n,n")])))] + "VECTOR_MEM_VSX_P (mode) + && INTVAL (operands[2]) == (BYTES_BIG_ENDIAN ? 0 : 1)" { - int element = INTVAL (operands[2]); - int op0_regno = REGNO (operands[0]); - int op1_regno = REGNO (operands[1]); - int fldDM; + if (which_alternative == 0) + return ASM_COMMENT_START " vec_extract to same register"; - gcc_assert (IN_RANGE (element, 0, 1)); - gcc_assert (VSX_REGNO_P (op1_regno)); + if (which_alternative == 2) + return "mfvsrd %0,%x1"; - if (element == VECTOR_ELEMENT_SCALAR_64BIT) - { - if (op0_regno == op1_regno) - return ASM_COMMENT_START " vec_extract to same register"; + return "xxlor %x0,%x1,%x1"; +} + [(set_attr "type" "*,veclogical,mfvsr") + (set_attr "isa" "*,*,p8v") + (set_attr "length" "0,*,*")]) - else if (INT_REGNO_P (op0_regno) && TARGET_DIRECT_MOVE - && TARGET_POWERPC64) - return "mfvsrd %0,%x1"; - - else if (FP_REGNO_P (op0_regno) && FP_REGNO_P (op1_regno)) - return "fmr %0,%1"; - - else if (VSX_REGNO_P (op0_regno)) - return "xxlor %x0,%x1,%x1"; - - else - gcc_unreachable (); - } - - else if (element == VECTOR_ELEMENT_MFVSRLD_64BIT && INT_REGNO_P (op0_regno) - && TARGET_P9_VECTOR && TARGET_POWERPC64 && TARGET_DIRECT_MOVE) +(define_insn "*vsx_extract__1" + [(set (match_operand: 0 "gpc_reg_operand" "=wa,wr") + (vec_select: + (match_operand:VSX_D 1 "gpc_reg_operand" "wa,wa") + (parallel + [(match_operand:QI 2 "const_0_to_1_operand" "n,n")])))] + "VECTOR_MEM_VSX_P (mode) + && INTVAL (operands[2]) == (BYTES_BIG_ENDIAN ? 1 : 0)" +{ + if (which_alternative == 1) return "mfvsrld %0,%x1"; - else if (VSX_REGNO_P (op0_regno)) - { - fldDM = element << 1; - if (!BYTES_BIG_ENDIAN) - fldDM = 3 - fldDM; - operands[3] = GEN_INT (fldDM); - return "xxpermdi %x0,%x1,%x1,%3"; - } - - else - gcc_unreachable (); + operands[3] = GEN_INT (BYTES_BIG_ENDIAN ? 2 : 3); + return "xxpermdi %x0,%x1,%x1,%3"; } - [(set_attr "type" "veclogical,mfvsr,mfvsr,vecperm") - (set_attr "isa" "*,*,p8v,p9v")]) + [(set_attr "type" "mfvsr,vecperm") + (set_attr "isa" "*,p9v")]) ;; Optimize extracting a single scalar element from memory. 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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id 12-20020a170906318c00b0078183bdcafbsi13846801ejy.164.2022.10.05.12.12.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Oct 2022 12:12:10 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 06368385BC13 for ; Wed, 5 Oct 2022 19:11:35 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from gcc1-power7.osuosl.org (gcc1-power7.osuosl.org [140.211.15.137]) by sourceware.org (Postfix) with ESMTP id 745CC385828F for ; Wed, 5 Oct 2022 19:09:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 745CC385828F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: sourceware.org; spf=none smtp.mailfrom=gcc1-power7.osuosl.org Received: by gcc1-power7.osuosl.org (Postfix, from userid 10019) id 1A7BB12406DF; Wed, 5 Oct 2022 19:09:09 +0000 (UTC) From: Segher Boessenkool To: gcc-patches@gcc.gnu.org Subject: [PATCH 3/3] rs6000: Remove the wD constraint Date: Wed, 5 Oct 2022 19:08:41 +0000 Message-Id: <0056cee42da2cbda7fcc29d333c5240ac323ca4a.1664994970.git.segher@kernel.crashing.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: In-Reply-To: References: X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Segher Boessenkool , dje.gcc@gmail.com, "Kewen.Lin" Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1745876031292651763?= X-GMAIL-MSGID: =?utf-8?q?1745876031292651763?= 2022-10-05 Segher Boessenkool * config/rs6000/constraints.md (wD): Delete. * doc/md.texi (Machine Constraints): Adjust. --- gcc/config/rs6000/constraints.md | 6 ------ gcc/doc/md.texi | 3 --- 2 files changed, 9 deletions(-) diff --git a/gcc/config/rs6000/constraints.md b/gcc/config/rs6000/constraints.md index 5a44a92142e5..54fef8d9996e 100644 --- a/gcc/config/rs6000/constraints.md +++ b/gcc/config/rs6000/constraints.md @@ -107,12 +107,6 @@ (define_constraint "wB" (match_test "TARGET_P8_VECTOR") (match_operand 0 "s5bit_cint_operand"))) -(define_constraint "wD" - "@internal Int constant that is the element number of the 64-bit scalar - in a vector." - (and (match_code "const_int") - (match_test "TARGET_VSX && (ival == VECTOR_ELEMENT_SCALAR_64BIT)"))) - (define_constraint "wE" "@internal Vector constant that can be loaded with the XXSPLTIB instruction." (match_test "xxspltib_constant_nosplit (op, mode)")) diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index bb42ee1da36c..d0a71ecbb806 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3267,9 +3267,6 @@ Like @code{b}, if @option{-mpowerpc64} is used; otherwise, @code{NO_REGS}. @item wB Signed 5-bit constant integer that can be loaded into an Altivec register. -@item wD -Int constant that is the element number of the 64-bit scalar in a vector. - @item wE Vector constant that can be loaded with the XXSPLTIB instruction.