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Thu, 22 Dec 2022 17:31:35 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 01/13] x86/resctrl: Replace smp_call_function_many() with on_each_cpu_mask() Date: Thu, 22 Dec 2022 17:31:15 -0600 Message-ID: <20221222233127.910538-2-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C977:EE_|BN9PR12MB5163:EE_ X-MS-Office365-Filtering-Correlation-Id: 2dd387b1-5f80-4476-7634-08dae474abb9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: nJsTki0WADw85wBQmFeGJ4CRWS5l169OSAialcA1FfQebjDw9U66jYmQ2FnYJEA9ZWiq0a4q8pVhKWyJ5D6ZgK1hp2t9MCE337unBH8lRddVFCftfYOSj5feChUTK9UFjZT4w+pDDy+IUjVonSv7Dj36gLPWw4mBE1Y3/JykZWhU+85IH0n8Y6DkIon3FPem+jPmF/xoPcRo916t1jz7qt1EllAj/ogHk+THgx0w5jiUlLJHUWMEacDE+h8PWqOq3xrXGa2EgGjsc6bQDj6+ZeWngI7mEarEIsqUuoEkKoU9iLHT27p6VE5p8DKkCwYAAMoh9Dk8WTA8v3+H3BsYn/gq223sCrKPJFoiUvCRzebMK+fQ0fk4CQzllNp3mPVgigkSLbRLfZtu+iOktkqjvftJOg78vCRiBUxNRKYKh/bonOSiayey3T0w13fBU/ntYutl/VXFpyh5+5opZMCxHpfOZHNsXpNfmufP5niDL/p38OASencZVBIWS4LW8lqs8Ig5I/H1m6AOkGHJ+mOTm/ZPSG8XW+mFIRBDfpGKj5vm4nD28aAGoU3zrQxVz+0P3n8rDWxkit2CxY4IrgJEhAzN2cbDo8/cZXvCHeVSkFmlMCQqWNimVy0Sta1ykNNM1O7/fbn3tR8SsEdbRV0f68KXU3kpNxNdBuu3PBaV7qx9tOGl7DoSWuxa2lHv0Dk3xbhLZc3uT1fHaBPbr35cWQfDsWtFQfCwFxFFSVpG2LU= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(346002)(396003)(136003)(376002)(451199015)(40470700004)(36840700001)(46966006)(2906002)(44832011)(7406005)(7416002)(5660300002)(110136005)(36860700001)(8676002)(8936002)(70206006)(70586007)(6666004)(4326008)(316002)(41300700001)(1076003)(36756003)(47076005)(40460700003)(26005)(16526019)(54906003)(82310400005)(7696005)(186003)(2616005)(86362001)(356005)(336012)(83380400001)(40480700001)(478600001)(426003)(81166007)(82740400003)(36900700001);DIR:OUT;SFP:1101; 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Replace smp_call_function_many() with on_each_cpu_mask() to simplify the code. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 11 +++------ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 29 +++++++---------------- 2 files changed, 11 insertions(+), 29 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c index 1df0e3262bca..7eece3d2d0c3 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -310,7 +310,6 @@ int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid) enum resctrl_conf_type t; cpumask_var_t cpu_mask; struct rdt_domain *d; - int cpu; u32 idx; if (!zalloc_cpumask_var(&cpu_mask, GFP_KERNEL)) @@ -341,13 +340,9 @@ int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid) if (cpumask_empty(cpu_mask)) goto done; - cpu = get_cpu(); - /* Update resource control msr on this CPU if it's in cpu_mask. */ - if (cpumask_test_cpu(cpu, cpu_mask)) - rdt_ctrl_update(&msr_param); - /* Update resource control msr on other CPUs. */ - smp_call_function_many(cpu_mask, rdt_ctrl_update, &msr_param, 1); - put_cpu(); + + /* Update resource control msr on all the CPUs. */ + on_each_cpu_mask(cpu_mask, rdt_ctrl_update, &msr_param, 1); done: free_cpumask_var(cpu_mask); diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index e5a48f05e787..e4e6cdc1ee62 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -325,12 +325,7 @@ static void update_cpu_closid_rmid(void *info) static void update_closid_rmid(const struct cpumask *cpu_mask, struct rdtgroup *r) { - int cpu = get_cpu(); - - if (cpumask_test_cpu(cpu, cpu_mask)) - update_cpu_closid_rmid(r); - smp_call_function_many(cpu_mask, update_cpu_closid_rmid, r, 1); - put_cpu(); + on_each_cpu_mask(cpu_mask, update_cpu_closid_rmid, r, 1); } static int cpus_mon_write(struct rdtgroup *rdtgrp, cpumask_var_t newmask, @@ -1864,13 +1859,9 @@ static int set_cache_qos_cfg(int level, bool enable) /* Pick one CPU from each domain instance to update MSR */ cpumask_set_cpu(cpumask_any(&d->cpu_mask), cpu_mask); } - cpu = get_cpu(); - /* Update QOS_CFG MSR on this cpu if it's in cpu_mask. */ - if (cpumask_test_cpu(cpu, cpu_mask)) - update(&enable); - /* Update QOS_CFG MSR on all other cpus in cpu_mask. */ - smp_call_function_many(cpu_mask, update, &enable, 1); - put_cpu(); + + /* Update QOS_CFG MSR on all the CPUs in cpu_mask */ + on_each_cpu_mask(cpu_mask, update, &enable, 1); free_cpumask_var(cpu_mask); @@ -2347,7 +2338,7 @@ static int reset_all_ctrls(struct rdt_resource *r) struct msr_param msr_param; cpumask_var_t cpu_mask; struct rdt_domain *d; - int i, cpu; + int i; if (!zalloc_cpumask_var(&cpu_mask, GFP_KERNEL)) return -ENOMEM; @@ -2368,13 +2359,9 @@ static int reset_all_ctrls(struct rdt_resource *r) for (i = 0; i < hw_res->num_closid; i++) hw_dom->ctrl_val[i] = r->default_ctrl; } - cpu = get_cpu(); - /* Update CBM on this cpu if it's in cpu_mask. */ - if (cpumask_test_cpu(cpu, cpu_mask)) - rdt_ctrl_update(&msr_param); - /* Update CBM on all other cpus in cpu_mask. */ - smp_call_function_many(cpu_mask, rdt_ctrl_update, &msr_param, 1); - put_cpu(); + + /* Update CBM on all the CPUs in cpu_mask */ + on_each_cpu_mask(cpu_mask, rdt_ctrl_update, &msr_param, 1); free_cpumask_var(cpu_mask); From patchwork Thu Dec 22 23:31:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 35994 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp41382wrn; Thu, 22 Dec 2022 15:33:44 -0800 (PST) X-Google-Smtp-Source: AMrXdXupx5++HSNNYJ/OWqSOGdvdm+s9xVzc2QzWfA4z8fuo8bcR1UmQ63j4OJlYAYUMnzUoPZz6 X-Received: by 2002:a17:906:264c:b0:7cf:bae0:9cd5 with SMTP id i12-20020a170906264c00b007cfbae09cd5mr5980691ejc.40.1671752024653; Thu, 22 Dec 2022 15:33:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752024; cv=pass; d=google.com; s=arc-20160816; b=XuyBW/MOQydt8X0YiIat4oBglNmz22DSUtvk8FVFtN5IsWUFeigDuck5kSPeVAMZfG /jA7fhUsry38RlL+vkRlJA/kioX4ezHOfTH+hIl4XSNllHgiE4xVUsBT95kUNS1XTfWM W7cPsF+2IeKT7U8r0P5Qp6k7GVeZpSeFKTNQ4xoUCWQKqdhEBO3rqv9UyDuBcX5ZehPR GbiAklfIyrZw7p7wrnkexGCTjvDm3dTK1KpTtVg4Bx2pZSMNVnmT24WzvVQV7aO2WZEu vQlmZptsnSbTLRa1bGsP0+7wK/Vj8VDjyf80B9fRIC2eabh6WvY2vaAFGZtf+pnT7oDQ uGXg== ARC-Message-Signature: i=2; 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Thu, 22 Dec 2022 17:31:36 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 02/13] x86/cpufeatures: Add Slow Memory Bandwidth Allocation feature flag Date: Thu, 22 Dec 2022 17:31:16 -0600 Message-ID: <20221222233127.910538-3-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97C:EE_|BN9PR12MB5242:EE_ X-MS-Office365-Filtering-Correlation-Id: accd1366-1f84-4c45-eab5-08dae474ae3a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: t6Bdqo/Yg3E1XwTr7KS7hkjXYCfSOlkDhzmcsDucwCiFBnaI0nFrIzykMO6slhvhE9CZQ/tfo7Ju38TdsJN+viNbeK2rTV91eBdWqUaoFyqtuKUGOcg5RTlPWKqiXcpeq5m18iEc5gA6b+lLHFMnD0G54/GRgDOJW3T8CSUXsBNSB19+iyMSSt32vRG0ospM/02OmQplY8HldLiKHegptS6cYkf0xDdER0AD70txZAZYR/L9UvM6yjlE3p/UuWXnken5gxTO2hm7gKj2S9J4Ghy9hr1q0swCV2uwF1/BNPW9lsY3GSwNzb1jbHUZJyfotuMus+EZUfSqETbZJ1ea5XytY7V9mN1B3lc3vPOmp3WwECX+8sgSkc01VG+UjcdE0yDwNistGOIfRxoAxkqqAhVqp6gwoXrUwBUmLHNYnTEibkPAD/6PsJGDumVbF441rjdXZu2buegRCcOEl0G1sB4aqdBsV2h9tGaSAbumT8xQZ69rwB3jQva34U7SbuY23oL3Vrs+Vve+kxiKNmMjvMtAcCPyCGG6HqsxYj5uGjQByxo2I9HbPbSSgUUSTpSmBL/YUNyEipbxM/TCHndsNcK2RVpXxrphFJAKlbFv8XE7Z2/wqE/IGVqyfnMFZ5I5BhPBo+Gn8ww4d3B2a5Cjo5ybjgW2Njer0DcH8TuZguDQnfPzk3k4Ny5yWIjBinXDxz+Obxgmi08Iec6WzHxkkg39yXcKPXTJaAp3vv3r6h8ql5NKyf3q1ruVy6bIlNPhN8jJReLFTG1+4sL+fMl3IB8L698Fq6++RjP70thlJn4UibjIIG0blcYMUV3YIsT/ X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(136003)(346002)(39860400002)(396003)(451199015)(40470700004)(46966006)(36840700001)(36756003)(356005)(82740400003)(2906002)(81166007)(5660300002)(8936002)(7406005)(41300700001)(7416002)(44832011)(47076005)(426003)(1076003)(36860700001)(336012)(83380400001)(86362001)(40460700003)(110136005)(4326008)(8676002)(316002)(54906003)(82310400005)(6666004)(478600001)(40480700001)(966005)(7696005)(70586007)(16526019)(70206006)(186003)(26005)(2616005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2022 23:31:41.5532 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: accd1366-1f84-4c45-eab5-08dae474ae3a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5242 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752959051223421054?= X-GMAIL-MSGID: =?utf-8?q?1752959051223421054?= Add the new AMD feature X86_FEATURE_SMBA. With this feature, the QOS enforcement policies can be applied to external slow memory connected to the host. QOS enforcement is accomplished by assigning a Class Of Service (COS) to a processor and specifying allocations or limits for that COS for each resource to be allocated. This feature is identified by the CPUID Function 8000_0020_EBX_x0. CPUID Fn8000_0020_EBX_x0 AMD Bandwidth Enforcement Feature Identifiers (ECX=0) Bits Field Name Description 2 L3SBE L3 external slow memory bandwidth enforcement CXL.memory is the only supported "slow" memory device. With the support of SMBA feature, the hardware enables bandwidth allocation on the slow memory devices. If there are multiple slow memory devices in the system, then the throttling logic groups all the slow sources together and applies the limit on them as a whole. The presence of the SMBA feature(with CXL.memory) is independent of whether slow memory device is actually present in the system. If there is no slow memory in the system, then setting a SMBA limit will have no impact on the performance of the system. Presence of CXL memory can be identified by numactl command. $numactl -H available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 node 0 size: 63678 MB node 0 free: 59542 MB node 1 cpus: node 1 size: 16122 MB node 1 free: 15627 MB node distances: node 0 1 0: 10 50 1: 50 10 CPU list for CXL memory will be empty. The cpu-cxl node distance is greater than cpu-to-cpu distances. Node 1 has the CXL memory in this case. CXL memory can also be identified using ACPI SRAT table and memory maps. Feature description is available in the specification, "AMD64 Technology Platform Quality of Service Extensions, Revision: 1.03 Publication # 56375 Revision: 1.03 Issue Date: February 2022". Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Link: https://www.amd.com/en/support/tech-docs/amd64-technology-platform-quality-service-extensions --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 61012476d66e..00045123f418 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -307,6 +307,7 @@ #define X86_FEATURE_SGX_EDECCSSA (11*32+18) /* "" SGX EDECCSSA user leaf function */ #define X86_FEATURE_CALL_DEPTH (11*32+19) /* "" Call depth tracking for RSB stuffing */ #define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */ +#define X86_FEATURE_SMBA (11*32+21) /* Slow Memory Bandwidth Allocation */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index f53944fb8f7f..d925753084fb 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -45,6 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, + { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { 0, 0, 0, 0, 0 } From patchwork Thu Dec 22 23:31:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 35993 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp41321wrn; Thu, 22 Dec 2022 15:33:33 -0800 (PST) X-Google-Smtp-Source: AMrXdXtjQVFNCRyaavpK+246ksOyRFQR786cOKvvysiqDG5BlHlS9WtyFKXiSjwZOoPwHB73UMn2 X-Received: by 2002:a17:906:eca6:b0:7c1:524d:2bec with SMTP id qh6-20020a170906eca600b007c1524d2becmr5939996ejb.39.1671752013310; Thu, 22 Dec 2022 15:33:33 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752013; cv=pass; d=google.com; s=arc-20160816; b=a0AERyAVRezEE5toVfB0NlWJ0RIeIK19HaiDQ88OxQ1PYWOJ9CeEkJNYDBNpp+JTC+ mWraMBloPH3zZpNNp2XPs0q7FJA6xjzfX+NqzB3/eSWrDeDG2i6lkvlpID6YzuQOED+D C1MI8oD0q7sNHRrFGUBDPD8xfOKSjc+MDWqOHROK3USfefpm/mf+iRY3Y0nKEfmKXfSJ OLpTZpu7LAcrUJI4eQ9O+m5lGGWml89nyFJoeuVzk1R9wEVFR/JiIwcOzteWK194hL5h 23HbjUQ91DqdpeT6gnI4KZ0S4KWM5IzZ2OO5BEFwsg8PcOzbsClm86KGWR6Ys6w4FXDM 8W2w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1F1GLlMLfSr5l7CElB+d0nCVkbg0nKh2QbK6amZ2zIc=; b=P51n2PJKrgiQp5MQXXmZXbM5SAccaDtQeIpqRjmwwuQhLj39KXdwD8FCzGKRrdNMF0 IX6VMCijh3wO0mx7vHjDaXenyBuedItTz53A7/OQ5tNNduIjDkWIMz0z7hFPlk0xXxE7 z1CVwRSRbivmdLh/Lh8N74QlPvkfH+Lkc5wyqVj4+ubGmdmStzpXsWdyZ2lhvtrbA767 Hx01ekV4pXB7msrWAaoxZMQwreZaVK7nYm567pP0GTMDtJrNIemqLQiNjvHFApLFSTUA 8/uvIFrh5/AHLuefXez9P7R0L3dlFCDnEB6jjXO7/OkxM9SRy1ECXoVVSp0B3n3znNaO n/1w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=MsddbRbO; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 22 Dec 2022 17:31:38 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 03/13] x86/resctrl: Add a new resource type RDT_RESOURCE_SMBA Date: Thu, 22 Dec 2022 17:31:17 -0600 Message-ID: <20221222233127.910538-4-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97C:EE_|SN7PR12MB7130:EE_ X-MS-Office365-Filtering-Correlation-Id: 6a9d0f3a-9727-4a3c-1f72-08dae474aed1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ngIBcTJdrl2ZRV6KdixoSZD2klkqQ6qIcNd7nPKpaXYtJrOaJAvdEe61yBs2onMJxSphUVFbpJLhOYzCKkN8inOzvbJFxA6mttgW0ZEaNHEGzM1jDZ4rU/lJMZVpakzi7km/WVp0GmsKzDa5UhEdbiIV7UfDJjIDuUaCTdF6UhFnJLiCbeCh91vBKVreP5gTbBG8evUwVHzv9DmLcTwNYtCHO6dtVxsvJKAVyj39muwgMg4MWQN0vFQaPyyb9Sen1TexebEMszXHJ/SHCcsCdu1zULy6wfcENsBgT/fRQ/QWEwMTyZSfE8Cfd91PjMyJPnpEuC/ISf7pG9UxJ9hdQPqbG7d6fFxW6y/YnOJk7KGkgU0zxKLp8uW3K/ztKPVeU/Hgp3fdTn/C77PAhsplGjnsXsZDXbbYQ09pGe+CpjvYyQEXLZCmD0Z6+WYIvYTIgCNe8bB3b1RlvSVnDaIk3Aa1Hz0PXUHJ5RGp7CmmwIj6fc1t2PF17SsF6M3WAxmP4PAMN+2LQ7R1IjxJus18vrWirWq4GHooMk5/O/a/utC9p3voMsaUcHgYbcMWbOwh0lE13aH7AWlTFrQr60aSp3lRZA+Kf174TuSdxYuAR1fILnMOCByT157Zuy9ww/W56uUATrjXBqgFM7Su+R/FhcvVrktWG2WIaux14vK004QUTbu4uF5lBKJxrgr9YB4pPkdY2cSnUa4UWMBHMnCZA18M9TrtSeU08DY4sXtI1Uk= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(346002)(376002)(136003)(396003)(451199015)(40470700004)(36840700001)(46966006)(8676002)(426003)(41300700001)(7696005)(82740400003)(1076003)(82310400005)(81166007)(5660300002)(36860700001)(40460700003)(7416002)(7406005)(47076005)(8936002)(2906002)(4326008)(44832011)(36756003)(336012)(356005)(478600001)(6666004)(86362001)(54906003)(110136005)(316002)(186003)(70206006)(70586007)(16526019)(26005)(40480700001)(2616005)(36900700001);DIR:OUT;SFP:1101; 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Mostly initialization of the essentials. Setting fflags to RFTYPE_RES_MB configures the SMBA resource to have the same resctrl files as the existing MBA resource. The SMBA resource has identical properties to the existing MBA resource. These properties will be enumerated in an upcoming change and exposed via resctrl because of this flag. Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/core.c | 12 ++++++++++++ arch/x86/kernel/cpu/resctrl/internal.h | 1 + 2 files changed, 13 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index c98e52ff5f20..f6af3ac1ef20 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -100,6 +100,18 @@ struct rdt_hw_resource rdt_resources_all[] = { .fflags = RFTYPE_RES_MB, }, }, + [RDT_RESOURCE_SMBA] = + { + .r_resctrl = { + .rid = RDT_RESOURCE_SMBA, + .name = "SMBA", + .cache_level = 3, + .domains = domain_init(RDT_RESOURCE_SMBA), + .parse_ctrlval = parse_bw, + .format_str = "%d=%*u", + .fflags = RFTYPE_RES_MB, + }, + }, }; /* diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 5ebd28e6aa0c..fdbbf66312ec 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -409,6 +409,7 @@ enum resctrl_res_level { RDT_RESOURCE_L3, RDT_RESOURCE_L2, RDT_RESOURCE_MBA, + RDT_RESOURCE_SMBA, /* Must be the last */ RDT_NUM_RESOURCES, From patchwork Thu Dec 22 23:31:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 35998 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp41987wrn; Thu, 22 Dec 2022 15:35:44 -0800 (PST) X-Google-Smtp-Source: AMrXdXu8vrHvYvM/aTnvJZmKntBSLGM5AcS4yQ6xVHi/2oMcNhAfE4XO24K3yNDl4tRNhFLXmMPw X-Received: by 2002:aa7:c1c9:0:b0:468:fd17:aeb9 with SMTP id d9-20020aa7c1c9000000b00468fd17aeb9mr7058265edp.0.1671752143895; Thu, 22 Dec 2022 15:35:43 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752143; cv=pass; d=google.com; s=arc-20160816; b=mFg+bywanFQySqE5Ml9jSttgJeIjnGXoOGGwjbMxR/gyDUWB+40SIeNw1Pl6G0wLI9 CkuyrQw10r0Iib2V2u+HOkbP/EsFUzsBOLOdidhmgoz/tUuoqRxbmnhJ+P4iccW3I6Te Kn9tGkMoPlX5FCk6EDkEZbubEBauZJ6mwERCT5GPu8EdNaXMvb9GEhnTkikpdMYxPRA8 smMRPdPF0X4aJ12lZ3JDNmqM2loKWaMkoIKCq8fjmSIcKWe4qDnODEBOZOyAKytCxxsK ot20inX9t4dn7pyH652xfgdZhn815x+7M9nOFcNj49H2G6HCRgVbMg0m7mEYu8QXr/Ps cMDg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9Twd7ddBJxwhZGfyhY4WBCZBaAd4nlAK3kbxKuE11Hk=; b=jLp2EWgp9pwD6YLAV0kO6GVKBoqefXWst2PmpH7Of36J3kPOXeGqv2Z4CXhaB4TcgT tVnHtc/Lw1CaELlFB4nILm540DqKZ6xv/NcyfBPaQVxK/EjLfw4i4HeFQfJieSpKusmq Wdqcgefc7h5iDz09WFziqjeqfVER/2tBem7HBheY2XWBiCiCPPeeGlTMkwfscaSamuC3 HPmiBkkh7IJiiDdYoOVtXr9ESLj8ZHwGRunh1xq8bWbiJIze5rFgdA+SwpLKy3mkTgZ+ 0zTn2CA+5OVocQmz+hVGadqcFZEQaxd0D7t+Ontyj/d4212GvmIHIHDhzsE283Z9q5m0 kg8Q== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=UMucEiSn; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 22 Dec 2022 17:31:40 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 04/13] x86/cpufeatures: Add Bandwidth Monitoring Event Configuration feature flag Date: Thu, 22 Dec 2022 17:31:18 -0600 Message-ID: <20221222233127.910538-5-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97C:EE_|DM4PR12MB6591:EE_ X-MS-Office365-Filtering-Correlation-Id: f8d00981-559e-43e9-044f-08dae474af3a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RPafVrSZg9ZaZi3EugXwRiP0hJbtPbUZK2DK9DBiUhFo2Ugx3fX4UdRw6mxFN9sORmHe5a8JcO60/N7m2KZQjd7IJYi3rZbSmoGMi3bw46KMM0XL/YW/+5IT4IWztXTbGG36CE9/OLQYADmWQj8GXhWPsbLNSHN1CAix3qmMwdTkieCowrqB3BBrJYEOjZO/y6UTfHaZCi+DE7rmuJw+Ru0hUYCH2uctdeFv1cJ71h9F1olJlNJ2o51UmdBrAplAUB7gnTan4VL0UcV/BzKHs9sL2OSDhwvAk6jEbDkBFFeLoc/2opdPA7RS0FASBAYlcui/iX3eCTi4f941yPiMNWF7S1+6jUhNbrlJp5fl/LlWppZKylc86gZx8dklDOaG1PdpS4Y8V/yCNnic2+1OT/YuVEAU47EExujIS9KE4lU5c4OIrfGQAKtiOzZ7j8/P8jDLSNvQV/i7PUu5vUh+TWkDyGaUMXrzXiASREUspJ2nghO6xCz9KF+6Uip7Fmex5pbfv2UDYUsX5oUcAT+1U8VvSISCl43J+B+LxsFSwSLklDj/79sF2Ucjf9pXBThjevte/tjwD7S0uh8LwVe7I6/ESgjhJZ7FJUNPrUYJmRl289HB5QlbOXS9UWjdppOHdjHNUH+43g+SekXsqj0E30le6H2LEEya40z7HVR7HZZQ6PxP7rMQAO59TJVVoU4WaZ92+ZwomqCKOgJtAabdTBcaNkXQ5t3h68baJoGLEmVT4k/jLftqP+CkyfIBrD7oSJWk/9i/JxuEEAuOdFMMpcXK20lnjUVcfmhpfOhrkHVmXIQ3xIXIzG3EALa+LOcj X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(376002)(396003)(346002)(136003)(451199015)(40470700004)(36840700001)(46966006)(70206006)(2906002)(40480700001)(8676002)(86362001)(2616005)(336012)(4326008)(41300700001)(478600001)(83380400001)(1076003)(186003)(16526019)(6666004)(316002)(36860700001)(54906003)(110136005)(7696005)(356005)(81166007)(7416002)(82740400003)(40460700003)(7406005)(44832011)(426003)(8936002)(5660300002)(966005)(47076005)(26005)(82310400005)(36756003)(70586007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2022 23:31:43.1782 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f8d00981-559e-43e9-044f-08dae474af3a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6591 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752959176527812394?= X-GMAIL-MSGID: =?utf-8?q?1752959176527812394?= Newer AMD processors support the new feature Bandwidth Monitoring Event Configuration (BMEC). The feature support is identified via CPUID Fn8000_0020_EBX_x0 (ECX=0). Bits Field Name Description 3 EVT_CFG Bandwidth Monitoring Event Configuration (BMEC) The bandwidth monitoring events mbm_total_bytes and mbm_local_bytes are set to count all the total and local reads/writes respectively. With the introduction of slow memory, the two counters are not enough to count all the different types of memory events. With the feature BMEC, the users have the option to configure mbm_total_bytes and mbm_local_bytes to count the specific type of events. Each BMEC event has a configuration MSR, which contains one field for each bandwidth type that can be used to configure the bandwidth event to track any combination of supported bandwidth types. The event will count requests from every bandwidth type bit that is set in the corresponding configuration register. Following are the types of events supported: ==== ======================================================== Bits Description ==== ======================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== ======================================================== By default, the mbm_total_bytes configuration is set to 0x7F to count all the event types and the mbm_local_bytes configuration is set to 0x15 to count all the local memory events. Feature description is available in the specification, "AMD64 Technology Platform Quality of Service Extensions, Revision: 1.03 Publication". Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Link: https://www.amd.com/en/support/tech-docs/amd64-technology-platform-quality-service-extensions --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/cpuid-deps.c | 2 ++ arch/x86/kernel/cpu/scattered.c | 1 + 3 files changed, 4 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 00045123f418..db5287c06b65 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -308,6 +308,7 @@ #define X86_FEATURE_CALL_DEPTH (11*32+19) /* "" Call depth tracking for RSB stuffing */ #define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */ #define X86_FEATURE_SMBA (11*32+21) /* Slow Memory Bandwidth Allocation */ +#define X86_FEATURE_BMEC (11*32+22) /* Bandwidth Monitoring Event Configuration */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c index d95221117129..f6748c8bd647 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -68,6 +68,8 @@ static const struct cpuid_dep cpuid_deps[] = { { X86_FEATURE_CQM_OCCUP_LLC, X86_FEATURE_CQM_LLC }, { X86_FEATURE_CQM_MBM_TOTAL, X86_FEATURE_CQM_LLC }, { X86_FEATURE_CQM_MBM_LOCAL, X86_FEATURE_CQM_LLC }, + { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_TOTAL }, + { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_LOCAL }, { X86_FEATURE_AVX512_BF16, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_FP16, X86_FEATURE_AVX512BW }, { X86_FEATURE_ENQCMD, X86_FEATURE_XSAVES }, diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index d925753084fb..0dad49a09b7a 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -46,6 +46,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, + { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { 0, 0, 0, 0, 0 } From patchwork Thu Dec 22 23:31:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 35995 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp41423wrn; Thu, 22 Dec 2022 15:33:52 -0800 (PST) X-Google-Smtp-Source: AMrXdXvchqJ2FIqhu9yYQtW519PEav/ACHHB18K1tAv1vY2AQLM32QNMAWFLXpFxh+Dld0+H3vBi X-Received: by 2002:a17:907:8b09:b0:7c1:6e82:35fc with SMTP id sz9-20020a1709078b0900b007c16e8235fcmr7819570ejc.40.1671752032465; Thu, 22 Dec 2022 15:33:52 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752032; cv=pass; d=google.com; s=arc-20160816; b=TdR4OHxtY7l73m/EgpLiqvk6QtO6cuFyzXNIgNTS9LV+dTA/5K4sa7sg5lHgoqhewo EYe1GIkPPUHQ/5cwK6muHoA2/9deDC5Mv7lIGVQO5A3wSCvDYWsojFAxf16YHVGjr/1x UZA5t0YQqhpgyKLT1ppJMAgYyeaGOWooMadgCgQg3yOTF/u+kjcj4GAVcvtXGFEn0kJZ sYggMRf70Qw5b5WsEVzcPnlBThf7QDJkrEHnr81tezqO6DUhXV5YIEyucptri/q2Du/h HBMcfhO/vBm2sexedr6xoYEI9HkRnLXvSzdY8NdLOn9QJ+clccbs5LOZJgN2fMjzC09H Hh2A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zwBjuBq7BuaZUOsOADDxSqBS8Jl31x1cmObIm2eD3M8=; b=Msrh8qKG6e8+VoJGTODMA+wl+enYGkG9qTzzVqBUVzqBgr6wWH3Eu1VM2XS5HUwrsD oibKUMunupwjBGSTeJ3+vULf4cEG2QFB9mGZnNbZlnCNM/+aHd3ayJjcIVrs6+2DN9wI +Wd/6TFdzMtoK03oa8RNJkgyV/ezU0udzeMzh7Ng2LT2vRcP8dwjWp1i3VbsCnPTOsoV /mjIxNFygDzL+O0OOrgCf/aXJILW5Juj9+a1Hz+oLLeVfnC+pc41p8LJFsvbCPhBpGyC PVTfCK5dJEHIQahqQVVAer92CydD9M417E/CN6Ut+RuBb5EuL5xeNFtZ/IIm1c3YT9Rk 6K+Q== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=um3ANvfU; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- Documentation/admin-guide/kernel-parameters.txt | 2 +- arch/x86/kernel/cpu/resctrl/core.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 5a0eff3231c6..1935b0d9bd9a 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -5199,7 +5199,7 @@ rdt= [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, - mba. + mba, smba, bmec. E.g. to turn on cmt and turn off mba use: rdt=cmt,!mba diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index f6af3ac1ef20..10a8c9d96f32 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -659,6 +659,8 @@ enum { RDT_FLAG_L2_CAT, RDT_FLAG_L2_CDP, RDT_FLAG_MBA, + RDT_FLAG_SMBA, + RDT_FLAG_BMEC, }; #define RDT_OPT(idx, n, f) \ @@ -682,6 +684,8 @@ static struct rdt_options rdt_options[] __initdata = { RDT_OPT(RDT_FLAG_L2_CAT, "l2cat", X86_FEATURE_CAT_L2), RDT_OPT(RDT_FLAG_L2_CDP, "l2cdp", X86_FEATURE_CDP_L2), RDT_OPT(RDT_FLAG_MBA, "mba", X86_FEATURE_MBA), + RDT_OPT(RDT_FLAG_SMBA, "smba", X86_FEATURE_SMBA), + RDT_OPT(RDT_FLAG_BMEC, "bmec", X86_FEATURE_BMEC), }; #define NUM_RDT_OPTIONS ARRAY_SIZE(rdt_options) From patchwork Thu Dec 22 23:31:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 35996 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp41430wrn; Thu, 22 Dec 2022 15:33:54 -0800 (PST) X-Google-Smtp-Source: AMrXdXtHMI/fUaKkdEHYgfP51AbuqpAIIpgJVHup0TeP55hKNBnZsrLOIG6385cOP/GhqUQFOpLl X-Received: by 2002:a05:6402:4518:b0:46c:b2a7:1e03 with SMTP id ez24-20020a056402451800b0046cb2a71e03mr5958211edb.36.1671752033968; Thu, 22 Dec 2022 15:33:53 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752033; cv=pass; d=google.com; s=arc-20160816; b=trvqvn0qlj+Np0hHwoFM1D1kTMqbn6yparWyauHZlmAHQQJxfFiWrtAsVtZMz1usZR 7J7yDT4TGZW4z/19uKjS14gLPFn6ONixIZUmCzS/6uMzAAZZe1i7N3RnkJJ0+QqLktsz JAT8E+5OYocbJgPnAYydT5MboaZ+KLtziSKGBXuSk/x7OLQ0FJW0DwRlk7sgb4tUuR/k dfygPcDT7VKUsf+YVYGh9FKugwoD4m1guhLtoutLkkeRL5bjYNUTisdNGWcjdZ801JJu dtWrdtmvoAnzaARPsgnb431O8Jeo/qXzu4PgVQBwLycR0nr4iovH6+KLzCDCtezNX6Ep loHg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mEeciAaZNIcX84dQ2+o7NGFqkLIscB9krD01am5HSJ4=; b=aVFVowRaBOTYWZpzg5iCRN62sSp1hH4jBB7AqfRqCAcNJgdYAanCCtXR1SW1Yo5cnc V4cbuYEGcwS8xUy7SFjKBEwRpFAkWjy8LhBvl4sD5Ps4/BSRWr0XK5eBEwXAgXSMhvtx 0Y5YXzITZ9GbOmw9oqRxlk8hMUaJUwK0rRViV5P4BAD1zKk1uaWb5IKuFQkCwu/GOxc7 kzy7ZDUenCSbfd/QkQSi/IQOEpm+5Du8jsZINXfw2h6VMIMAOWyG/t+hBId7WebIwgtt OiX6J3E16YDqdncB01SpzhNR2Giogtgw6tI783POiAjPFiiGykHpQm/CAq8fbtJLsYN+ Z4Nw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b="LEYWy/MZ"; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 22 Dec 2022 17:31:43 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 06/13] x86/resctrl: Detect and configure Slow Memory Bandwidth Allocation Date: Thu, 22 Dec 2022 17:31:20 -0600 Message-ID: <20221222233127.910538-7-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97C:EE_|SA1PR12MB6845:EE_ X-MS-Office365-Filtering-Correlation-Id: 69aae9d1-464a-4359-374a-08dae474b33b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: yHhT1cVlA55FKV5G3r1Yq+/VBx0lImRWwMFfIY3Wt0xWYQ1aNpZedDINcamuVO0GzsdVPOckkHa0mLH8HyycppDqvL58ZkAbpv3cVK1VoiGrMz40U5st/KF94uHiYIvSjnT+sKDxI8xfvgIDwu+G8x1yzHr/qmCBgWLtNjFFUXH9Rxot3FP2GmGVRIV1OCH3wbeczJi+GVHqExeiSRg/Hd4r/RMK3KANPko2UgPoDWf61y/1T8ECSdj3TAjW0cSRLnVIB0QxwgtNMdr5WVwdI7fxKSDgEsjtwafPsU+U/4pxAvDSoT/WC4M0XrAgTyT+OjeSMlVWySNe3mfBO0ojGHtci6BfnY4SRqimX29jHFBrH1BlseIfc8AX+FcmrTz64OuePmcBZiNcVQT5/aSOu3z6xnMTVi4Mhqn92t8lQrItFx0JmOB/zN3zxiGNh0daFvUdypcCo3yTaVoQb7neW3REI0Fh99zarH6Witv/rvM3L0Gj9cETSHqzy6FRoVAfAQ5tymVa0mWhJQWoLKjYjBVC69X8R2u99l5OwmlJ/INMDrcjZZrhAKIYbcHq2pWsRN9H51naHFr4/931PWhOrZg+IxSzlBfK5VCcFGirQ7e/lQ8vO79nLpYoTBUGIdUxrG1HXwqUue9p2C5xcEz1h49Vq506m1Mvnik2Xbnbl4JoqzxZKaFTrlCSX8PecOFMU65U2ZEu2FyMr2ocyNpH5MdY1b+jvRs4edfxGJlbNus= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(376002)(346002)(136003)(396003)(451199015)(40470700004)(46966006)(36840700001)(16526019)(70206006)(8676002)(4326008)(70586007)(6666004)(186003)(26005)(40460700003)(2616005)(1076003)(7696005)(36756003)(478600001)(426003)(336012)(47076005)(83380400001)(81166007)(356005)(316002)(86362001)(41300700001)(54906003)(110136005)(40480700001)(36860700001)(44832011)(7416002)(5660300002)(7406005)(8936002)(82310400005)(2906002)(82740400003)(36900700001);DIR:OUT;SFP:1101; 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Detect the available details and initialize the rest to defaults. Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/include/asm/msr-index.h | 1 + arch/x86/kernel/cpu/resctrl/core.c | 36 +++++++++++++++++++++-- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 2 +- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 8 +++-- 4 files changed, 41 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 37ff47552bcb..e0a40027aa62 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1061,6 +1061,7 @@ /* - AMD: */ #define MSR_IA32_MBA_BW_BASE 0xc0000200 +#define MSR_IA32_SMBA_BW_BASE 0xc0000280 /* MSR_IA32_VMX_MISC bits */ #define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 10a8c9d96f32..b4fc851f6489 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -162,6 +162,13 @@ bool is_mba_sc(struct rdt_resource *r) if (!r) return rdt_resources_all[RDT_RESOURCE_MBA].r_resctrl.membw.mba_sc; + /* + * The software controller support is only applicable to MBA resource. + * Make sure to check for resource type. + */ + if (r->rid != RDT_RESOURCE_MBA) + return false; + return r->membw.mba_sc; } @@ -225,9 +232,15 @@ static bool __rdt_get_mem_config_amd(struct rdt_resource *r) struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); union cpuid_0x10_3_eax eax; union cpuid_0x10_x_edx edx; - u32 ebx, ecx; + u32 ebx, ecx, subleaf; - cpuid_count(0x80000020, 1, &eax.full, &ebx, &ecx, &edx.full); + /* + * Query CPUID_Fn80000020_EDX_x01 for MBA and + * CPUID_Fn80000020_EDX_x02 for SMBA + */ + subleaf = (r->rid == RDT_RESOURCE_SMBA) ? 2 : 1; + + cpuid_count(0x80000020, subleaf, &eax.full, &ebx, &ecx, &edx.full); hw_res->num_closid = edx.split.cos_max + 1; r->default_ctrl = MAX_MBA_BW_AMD; @@ -750,6 +763,19 @@ static __init bool get_mem_config(void) return false; } +static __init bool get_slow_mem_config(void) +{ + struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_SMBA]; + + if (!rdt_cpu_has(X86_FEATURE_SMBA)) + return false; + + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) + return __rdt_get_mem_config_amd(&hw_res->r_resctrl); + + return false; +} + static __init bool get_rdt_alloc_resources(void) { struct rdt_resource *r; @@ -780,6 +806,9 @@ static __init bool get_rdt_alloc_resources(void) if (get_mem_config()) ret = true; + if (get_slow_mem_config()) + ret = true; + return ret; } @@ -869,6 +898,9 @@ static __init void rdt_init_res_defs_amd(void) } else if (r->rid == RDT_RESOURCE_MBA) { hw_res->msr_base = MSR_IA32_MBA_BW_BASE; hw_res->msr_update = mba_wrmsr_amd; + } else if (r->rid == RDT_RESOURCE_SMBA) { + hw_res->msr_base = MSR_IA32_SMBA_BW_BASE; + hw_res->msr_update = mba_wrmsr_amd; } } } diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c index 7eece3d2d0c3..eb07d4435391 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -209,7 +209,7 @@ static int parse_line(char *line, struct resctrl_schema *s, unsigned long dom_id; if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP && - r->rid == RDT_RESOURCE_MBA) { + (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA)) { rdt_last_cmd_puts("Cannot pseudo-lock MBA resource\n"); return -EINVAL; } diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index e4e6cdc1ee62..aa469d708991 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1208,7 +1208,7 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgroup *rdtgrp) list_for_each_entry(s, &resctrl_schema_all, list) { r = s->res; - if (r->rid == RDT_RESOURCE_MBA) + if (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA) continue; has_cache = true; list_for_each_entry(d, &r->domains, list) { @@ -1397,7 +1397,8 @@ static int rdtgroup_size_show(struct kernfs_open_file *of, ctrl = resctrl_arch_get_config(r, d, closid, type); - if (r->rid == RDT_RESOURCE_MBA) + if (r->rid == RDT_RESOURCE_MBA || + r->rid == RDT_RESOURCE_SMBA) size = ctrl; else size = rdtgroup_cbm_to_size(r, d, ctrl); @@ -2832,7 +2833,8 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp) list_for_each_entry(s, &resctrl_schema_all, list) { r = s->res; - if (r->rid == RDT_RESOURCE_MBA) { + if (r->rid == RDT_RESOURCE_MBA || + r->rid == RDT_RESOURCE_SMBA) { rdtgroup_init_mba(r, rdtgrp->closid); if (is_mba_sc(r)) continue; From patchwork Thu Dec 22 23:31:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 36000 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp42079wrn; Thu, 22 Dec 2022 15:35:58 -0800 (PST) X-Google-Smtp-Source: AMrXdXs1QlGGzkNwnLHqOgYXoKIpxua0CFOd1ar85pzbIoEWyfqqXvPXsRunZHSdXhmFQ3StNhSX X-Received: by 2002:a17:907:a64b:b0:7c1:13b7:a5a1 with SMTP id vu11-20020a170907a64b00b007c113b7a5a1mr6785845ejc.46.1671752158271; Thu, 22 Dec 2022 15:35:58 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752158; cv=pass; d=google.com; s=arc-20160816; b=XSuT1N+fn8bZLivu2gR6tQsT5ucmTvHk0r0B1tbLe/OBlLAaMFPOwlQYZQHbbDwt0A CD5Vry/93gPdbHqVyz8wlOrqdpPVJHfMPK9MnVvutag7SUPZIjBJns8QvfyO4dUDa4qb AmTK3rWRYa6xW4uNC35n+w1V6/pghxVM6l+NZ7dkvUGSGwCE+7Qc/P2MGvYQ9osJVTnF 8NW00EpGbokHQ9Y0jKOdn7g5mYIYgspAKHYqidt3spRmjbgHbjJccSf7dNsYyillKe1G G6B0eapxh1Yc/cfJtTsd8AwEibkjlcIL+Y/EARE7IXJ50zMlnu9vacUp0Hn3/bkrpZKq /W2w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xa6/5e8Q+ea0MtrnTFyKe1Iypqb/yKY9UhedJkMjOdQ=; b=LOJh0LkfAczAENTw1T+H4Smfe5Tpu0ISPlClfOSCWK+nhoIHcvVPmKWqf9sQ5DwByZ cOTusBs6A+ZEjsl0m3VHj0d7tfYzA/+1p1yJhAH4d+f2fbIwOwSgrtrfxQhAACluHKoL r8EmKHbFEVEzMKhaHlK1APNDXu8gl03MrPRzZaSE9gK3S6qMYW1DPBGc5qUVwtprwgFi kvqNrwCZLLXlq045gH4rykCCMB/XpUwzzEARl1IcqpNYnxEakk9Ivz2s60stNEY22LUG CWFiOIDXNwP3lg0qu3uUdQTH/ZNdZ7s6GZIUDGw7wkQ+8F/oMHXl/yswt7pghiTs3hJL 6EsA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=A9LTZ2hj; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 22 Dec 2022 17:31:45 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 07/13] x86/resctrl: Add __init attribute to rdt_get_mon_l3_config() Date: Thu, 22 Dec 2022 17:31:21 -0600 Message-ID: <20221222233127.910538-8-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97C:EE_|DM4PR12MB8522:EE_ X-MS-Office365-Filtering-Correlation-Id: 84898b30-47eb-413b-8034-08dae474b3a6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: fD05j/dHHUL5xns6Z5EVB9Wp+U/9laZa+WkNQguEVuanmNMmfEeH4TtSgNlq01d2CaTreCSE3eDyCksPeClZtmuXetPVMgr22BWDtSU+E73dBjisO43YXBcza803rFezfhPfBSZqEF4SqspNum6e3fNlM0I3ak+LkofVibLVRk0rvdNbOFjCo97S2lV5+Jf+hxb/Y/15qPTTPFyseBsjREok/71RMZFF0aJ7nRH73Bno0AVB19zlt7Y/iC7rb12lsvarFtz9deT/5ZDNMBmSqicYZ9Ty5H5hm6WJstTokLdatPF0wp7rHKFKFT3XKLzafpNqAUMGepjX/hosNtFSqpxxlLBO3ZpjFg1CYc3uqscqFTryb1YoPPdIoQ9QGQrzYBOs6NMl4AY2DSmaC2ZXLD3eM+sJJxGOueykg8D7hbo1umUoShhgY2NKK9+SneGFufOnOyD9UJiMzd/oe4Z5Y3LUtmcE9i56i4D2si7pz+6Rk7/qKbJqXYHkSwihKfkFqTNeBzIFPgn5moMFMSaG9SSgUkebFCp9nrosxiuwj+CsVf07ETx3J8CVSBGlgSs/tdzxcgwqZfVS8vOSrJGaLc0WWEUW+y8tr6J/yrKWBDDHyzsHB2jyofrhcpTxDvOzeEbI9cUWN4Bi2s/KdNmL5zkqSn1KuhcxMaXgOLx65dCUD+oktD7muzL3o4AYfXCs9oPtSiHXQaUJ9hXmh18K8/AnTpMyxIiSIqBKHiEsr0I= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(346002)(376002)(396003)(136003)(451199015)(40470700004)(46966006)(36840700001)(36860700001)(83380400001)(82310400005)(40460700003)(86362001)(81166007)(40480700001)(82740400003)(356005)(4326008)(8676002)(70206006)(70586007)(54906003)(41300700001)(316002)(44832011)(5660300002)(16526019)(8936002)(7406005)(2906002)(7416002)(26005)(426003)(47076005)(186003)(2616005)(1076003)(110136005)(336012)(7696005)(6666004)(478600001)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2022 23:31:50.6469 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 84898b30-47eb-413b-8034-08dae474b3a6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8522 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752959191476419976?= X-GMAIL-MSGID: =?utf-8?q?1752959191476419976?= In an upcoming change rdt_get_mon_l3_config() needs to call rdt_cpu_has() to query the monitor related features. It cannot be called right now because rdt_cpu_has() has the __init attribute but rdt_get_mon_l3_config() doesn't. Add the __init attribute to rdt_get_mon_l3_config() that is only called by get_rdt_mon_resources() that already has the __init attribute. Also make rdt_cpu_has() available to by rdt_get_mon_l3_config() via the internal header file. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- arch/x86/kernel/cpu/resctrl/core.c | 2 +- arch/x86/kernel/cpu/resctrl/internal.h | 1 + arch/x86/kernel/cpu/resctrl/monitor.c | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index b4fc851f6489..030d3b409768 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -728,7 +728,7 @@ static int __init set_rdt_options(char *str) } __setup("rdt", set_rdt_options); -static bool __init rdt_cpu_has(int flag) +bool __init rdt_cpu_has(int flag) { bool ret = boot_cpu_has(flag); struct rdt_options *o; diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index fdbbf66312ec..f16b8bc5448c 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -512,6 +512,7 @@ void closid_free(int closid); int alloc_rmid(void); void free_rmid(u32 rmid); int rdt_get_mon_l3_config(struct rdt_resource *r); +bool __init rdt_cpu_has(int flag); void mon_event_count(void *info); int rdtgroup_mondata_show(struct seq_file *m, void *arg); void mon_event_read(struct rmid_read *rr, struct rdt_resource *r, diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index efe0c30d3a12..e33e8d8bd796 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -746,7 +746,7 @@ static void l3_mon_evt_init(struct rdt_resource *r) list_add_tail(&mbm_local_event.list, &r->evt_list); } -int rdt_get_mon_l3_config(struct rdt_resource *r) +int __init rdt_get_mon_l3_config(struct rdt_resource *r) { unsigned int mbm_offset = boot_cpu_data.x86_cache_mbm_width_offset; struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); From patchwork Thu Dec 22 23:31:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 35997 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp41502wrn; Thu, 22 Dec 2022 15:34:07 -0800 (PST) X-Google-Smtp-Source: AMrXdXsUl2uGOLU1oI6GWPsrh7h4Ip7NUyw8AgceFmC5a0tIfgJjnc7HBHGusHJj6up9xS+8ipZH X-Received: by 2002:a17:906:281b:b0:7c1:5863:f8c4 with SMTP id r27-20020a170906281b00b007c15863f8c4mr6096813ejc.21.1671752047413; Thu, 22 Dec 2022 15:34:07 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752047; cv=pass; d=google.com; s=arc-20160816; b=g3AuIerv1qWOW6s+Y+1X9oiEX8qq9YysGv7ubvrvdQMt5K2/QCmNSpxuGNB4j3OhzU Bh1Ar7ghhN0Zd3VdtO4u2yJ1/RA6zVI8ad9QqbgV+MhzXP25iPsZgLT/6u2QGqJWI2FB kQhV9qWROiDmLVuE/gfvosQxQADWAm57xTbOXsHMsZQgpmeB8b0MUAfbXY1iYtmKUzP9 nB5l+B8zDjR5WyUlKX74lXlJyHkpTZXVODw65npJBdGmO2HqtvI1odKNRaajiByWdiCj QWLfnt1wxyVVDm0lbsA3/esTVbfSxn4af9gkBsZDL10qrfunjzYwXn1tCmm8HtM04leI tGQg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=h0bR2q0emfUDh7SYHWelwMKwpBqpUM7KkxYqPZ2X+e8=; b=wZ3ltFuSG9JKBm1K7uF/Ej2KGFz4kjycbHy+Q6lPhl1xDGnzGy1WCCBCEc7n/xL0St G9prwy/DnxcGwJ3wkWIGfLuaGJR0XVWFQ+FiQVPW4BwrfjuV4mMS1XU4KOG1fipxvDgp GAn8kuiKodLZUttSM9w446iOj9lmk/qHbD/PHzFrVzy7nTl1PUP0t/TYz7ENkNuJ3Vbu Gly6v78Mz7IYpQihdX9rd5LHnkWIT3lhrmnf8PPGGrsAaMyEfZQv/mcYtkwV/HOm30JR di38xVBTFjCVSJ0sNEdfyATTxD1h56n1fY27UCGPOS+Qkq+7x6nFArjod10lrsrbBOg6 wFag== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=bWbDAwd1; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 22 Dec 2022 17:31:47 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 08/13] x86/resctrl: Support monitor configuration Date: Thu, 22 Dec 2022 17:31:22 -0600 Message-ID: <20221222233127.910538-9-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97C:EE_|MN0PR12MB5978:EE_ X-MS-Office365-Filtering-Correlation-Id: 281d5a03-3ad8-4269-af75-08dae474b47a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tfpQdnO7zOzFkXEOQY9C/rmuCNmCrBrSbEKU70KxaqeEhk/19pwdyuUKOeclc/Hiw1lRtOlNC1rtnC99EynlBwxT6LuaW3dVSzXn0zVQxhMq8Uo8eTFn9ABDlAWzDKj0vYEFqhuPFJmtOg6BOO0vbAg5kkny58cBDDX9TP/1jptg1DWR4vKtUx7gwSeVrNlT+Lm7X3EN+TBQUVe2zlNoCv6mgQAUcf4GBbcz6qEQ9iaYJwMxv2wMhlfFnuEfuL5Bu+wzrC0o32s1qeOeeTzQAQpe6U+fw3UBB0hnZkYWRbLBTcS/4EbWHK+aFyq4rvTSC7NOHEC196qn0sAvCvUiG1+3+2aErVIspVmP/VSMVrM1Btm3oukvZ6C90VxhD2vSlPjHG4T6Gnx4ogDdQyw61salJUv7KLakhlIqYJq+ZtmuBzplUAOK41gGPuQd5+upp065W17NqhFEnTNxRIv5hScFlYw0bpOe6jDovbjuvlSvMkVC4TMFz3q/CjQDwwRRIsnqfD0l2GGRPK8yJAUrYFVf8qhQ4zDeRHiXtoflL41c1Glp9IBqmU/IXLR4YQ+nHuYIYBPQpbXLIf0eT7PbrfNsOpgtJjptjQGRqrVwaqxNVK/bzmQvhpRVqRGYfBE+h8176G5KwbB6i7SImFYvvwPRNu/Ov2eCePlBXrH6XPZ0fESPpiYPff0SI68BDfSm0W73U/0LTNMeDwAJlad6bwWIRkA6htpb0ucRMFKdc84= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(376002)(346002)(39860400002)(136003)(451199015)(40470700004)(36840700001)(46966006)(54906003)(316002)(6666004)(36860700001)(110136005)(70586007)(40480700001)(2906002)(426003)(2616005)(40460700003)(70206006)(47076005)(86362001)(186003)(16526019)(26005)(8676002)(4326008)(36756003)(8936002)(44832011)(81166007)(82740400003)(478600001)(7696005)(1076003)(41300700001)(83380400001)(82310400005)(5660300002)(356005)(7416002)(7406005)(336012)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2022 23:31:52.0062 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 281d5a03-3ad8-4269-af75-08dae474b47a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5978 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752959075018877043?= X-GMAIL-MSGID: =?utf-8?q?1752959075018877043?= Add a new field in struct mon_evt to support Bandwidth Monitoring Event Configuration(BMEC) and also update the "mon_features" display. The resctrl file "mon_features" will display the supported events and files that can be used to configure those events if monitor configuration is supported. Before the change. $cat /sys/fs/resctrl/info/L3_MON/mon_features llc_occupancy mbm_total_bytes mbm_local_bytes After the change when BMEC is supported. $cat /sys/fs/resctrl/info/L3_MON/mon_features llc_occupancy mbm_total_bytes mbm_total_bytes_config mbm_local_bytes mbm_local_bytes_config Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/internal.h | 2 ++ arch/x86/kernel/cpu/resctrl/monitor.c | 7 +++++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 5 ++++- 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index f16b8bc5448c..0605b04f1b7a 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -52,11 +52,13 @@ DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key); * struct mon_evt - Entry in the event list of a resource * @evtid: event id * @name: name of the event + * @configurable: true if the event is configurable * @list: entry in &rdt_resource->evt_list */ struct mon_evt { enum resctrl_event_id evtid; char *name; + bool configurable; struct list_head list; }; diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index e33e8d8bd796..b39e0eca1879 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -783,6 +783,13 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r) if (ret) return ret; + if (rdt_cpu_has(X86_FEATURE_BMEC)) { + if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) + mbm_total_event.configurable = true; + if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) + mbm_local_event.configurable = true; + } + l3_mon_evt_init(r); r->mon_capable = true; diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index aa469d708991..f34c70c7a791 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -996,8 +996,11 @@ static int rdt_mon_features_show(struct kernfs_open_file *of, struct rdt_resource *r = of->kn->parent->priv; struct mon_evt *mevt; - list_for_each_entry(mevt, &r->evt_list, list) + list_for_each_entry(mevt, &r->evt_list, list) { seq_printf(seq, "%s\n", mevt->name); + if (mevt->configurable) + seq_printf(seq, "%s_config\n", mevt->name); + } return 0; } From patchwork Thu Dec 22 23:31:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 36003 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp42213wrn; Thu, 22 Dec 2022 15:36:25 -0800 (PST) X-Google-Smtp-Source: AMrXdXtvIdncTIhUbARxXBHErboCbLEGi7jdVN/L9a8kZMrXJ6ARoNB489qNM09VDsPl+QOPa1nJ X-Received: by 2002:a05:6a20:939c:b0:ac:2424:e873 with SMTP id x28-20020a056a20939c00b000ac2424e873mr9324750pzh.17.1671752185360; Thu, 22 Dec 2022 15:36:25 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752185; cv=pass; d=google.com; s=arc-20160816; b=TUQeo2nCLXg4MQOOHwOrVTyr61zOExlUztB4NiOgenzNNbRCRWVuDgulW/oCuUS/uP YnPNt4jcX2gTS3xn+o4VfUnRcEDP0yr/lj4Vbf7fmXAPHkXOCDx5306l3Mpo+IXK2xzc H/UOoqi6A1bZiKHEUSDGAZ99sbF3SUZOlOg30zQeekR6bdq5dZF89+6p7PbGDTgVPcmV 89wPY/IPmg+S1vtGb2tNVuCDEykj63JALRRJAGfFJ7PRI5PCmpFXIbul/FVWn4txsbgw C4bH+XAcZLuhKaxxTCbfds2C/hfbAGvWwn/JxXYStIZY8YxXYKEXFGk5xY51aSZUAH8U ZkLQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WsCivQcGv4JLPLz7jgxt10bk+C/gCXTn2LGSP1mxvEQ=; b=ADZLOG+xbxlzHrGOSO88/VF6bdCD49jqCXJKQpjIhqkuHymTae911ClN80HnnMnZop FvqiMZPfXzv8dECuZGpw/eI1ZL0LFw5ycgCBQFB8XnPxpm++EwSvh0eiU6VaaPp11U2c 9qvPRvFh5w3/xn5h9DBEswGP6/Zi6yeRRSvxYe95LUpHPlAahknMbzMHB9VPcO/Hphli lnhJ/qIeWqNykFC6Nj2B8RkBbOikeR0Tj36IbtpHu0ljPVBtUB5hkMbyXIJj31d/1OS1 9mdUpUEr6poUR/4cIX1eHaOcpiazkKNlNqv+61saIUemnBEthsiewJ1VexOxesoYj0Ak 2xeg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=UDOIPtn6; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 22 Dec 2022 17:31:49 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 09/13] x86/resctrl: Add interface to read mbm_total_bytes_config Date: Thu, 22 Dec 2022 17:31:23 -0600 Message-ID: <20221222233127.910538-10-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97C:EE_|SJ0PR12MB5673:EE_ X-MS-Office365-Filtering-Correlation-Id: deb7707c-4d3a-40b6-5cc4-08dae474b507 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JqggHbmcVzM0F8BdzgWo26na5NyDVVsEyF/+V7hYhrwuXOoZLKN8FO5bkvXdNo4qPB1Z0xoMuyAGDVtkxzWgo/eKEx95CK1SAwes/hFhLa60fFBIFUzh6qlaRNvLres8cXC7ANcR0m4qsWIIDzpJ1md9kRl+BaYjkqs5/e+l+hfbxmQTdv+B27cMvFWacN6SO59/QyG9LQJzv21lSxeYC1hGx+fkLGwcUPmVy7FGTZNL2mZzhAInM4NHstXZRmPq0ZucwRl+L8l3GGQ3+N6xCJNwibyPTQSNqFXCGhqJi0EmdBjiXPpdj9xmU5+buX7WG/fQF40tf5Kps34Rj3YXgQCZujSSybqdBwpILNQL/cpkr4+xLKEzT6laCEvBuBsM7c4MsKilB6PE7mcau/ccqmA0qz/9A9zv7upy+IYjJ/nDc0r1ltrcOVj8RP9ipeph2kIR1euKBkOxj5eAnKMQhpenTsJ+6sfMeiqGErCqfTCHI5mD3FtzS6j27jAkArLRo/zfmq6XXsROrFn5XpCOFO0FFSXVzoJ801N4Q60RgSysz9SRF00NfVgKrMujLo7am4eWnZ2AqrsUjKgSE6yTH9Chma6EHOekk9p3pqnKh+5z0qHQ8jS3M4CD83FQtPr/YtZ1kxo0xcLNEsl42v+ZlTFQMEqsL4D6AlhUXhAbk2n7bJo+QToHGrtY7rBZdxU2ULfWnWh68/IPDR/Gjetnb9DItHNwwSeM/Att3T3Kcsg= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(136003)(346002)(376002)(39860400002)(451199015)(40470700004)(36840700001)(46966006)(478600001)(36860700001)(41300700001)(70586007)(8676002)(4326008)(82310400005)(336012)(54906003)(70206006)(40480700001)(6666004)(83380400001)(356005)(7696005)(81166007)(82740400003)(26005)(186003)(426003)(36756003)(40460700003)(86362001)(110136005)(16526019)(316002)(1076003)(2616005)(47076005)(44832011)(7406005)(5660300002)(7416002)(2906002)(8936002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2022 23:31:52.9281 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: deb7707c-4d3a-40b6-5cc4-08dae474b507 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB5673 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752959219437597200?= X-GMAIL-MSGID: =?utf-8?q?1752959219437597200?= The event configuration can be viewed by the user by reading the configuration file /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== By default, the mbm_total_bytes_config is set to 0x7f to count all the event types. For example: $cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config 0=0x7f;1=0x7f;2=0x7f;3=0x7f In this case, the event mbm_total_bytes is configured with 0x7f on domains 0 to 3. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- arch/x86/include/asm/msr-index.h | 1 + arch/x86/kernel/cpu/resctrl/internal.h | 24 ++++++ arch/x86/kernel/cpu/resctrl/monitor.c | 4 +- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 102 +++++++++++++++++++++++++ 4 files changed, 130 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index e0a40027aa62..2e5f57c93605 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1062,6 +1062,7 @@ /* - AMD: */ #define MSR_IA32_MBA_BW_BASE 0xc0000200 #define MSR_IA32_SMBA_BW_BASE 0xc0000280 +#define MSR_IA32_EVT_CFG_BASE 0xc0000400 /* MSR_IA32_VMX_MISC bits */ #define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 0605b04f1b7a..b2fb09d54f16 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -30,6 +30,29 @@ */ #define MBM_CNTR_WIDTH_OFFSET_MAX (62 - MBM_CNTR_WIDTH_BASE) +/* Reads to Local DRAM Memory */ +#define READS_TO_LOCAL_MEM BIT(0) + +/* Reads to Remote DRAM Memory */ +#define READS_TO_REMOTE_MEM BIT(1) + +/* Non-Temporal Writes to Local Memory */ +#define NON_TEMP_WRITE_TO_LOCAL_MEM BIT(2) + +/* Non-Temporal Writes to Remote Memory */ +#define NON_TEMP_WRITE_TO_REMOTE_MEM BIT(3) + +/* Reads to Local Memory the system identifies as "Slow Memory" */ +#define READS_TO_LOCAL_S_MEM BIT(4) + +/* Reads to Remote Memory the system identifies as "Slow Memory" */ +#define READS_TO_REMOTE_S_MEM BIT(5) + +/* Dirty Victims to All Types of Memory */ +#define DIRTY_VICTIMS_TO_ALL_MEM BIT(6) + +/* Max event bits supported */ +#define MAX_EVT_CONFIG_BITS GENMASK(6, 0) struct rdt_fs_context { struct kernfs_fs_context kfc; @@ -531,5 +554,6 @@ bool has_busy_rmid(struct rdt_resource *r, struct rdt_domain *d); void __check_limbo(struct rdt_domain *d, bool force_free); void rdt_domain_reconfigure_cdp(struct rdt_resource *r); void __init thread_throttle_mode_init(void); +void __init mbm_config_rftype_init(const char *config); #endif /* _ASM_X86_RESCTRL_INTERNAL_H */ diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index b39e0eca1879..2afddebc8636 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -784,8 +784,10 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r) return ret; if (rdt_cpu_has(X86_FEATURE_BMEC)) { - if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) + if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) { mbm_total_event.configurable = true; + mbm_config_rftype_init("mbm_total_bytes_config"); + } if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) mbm_local_event.configurable = true; } diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index f34c70c7a791..d47c675a856f 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1418,6 +1418,93 @@ static int rdtgroup_size_show(struct kernfs_open_file *of, return ret; } +struct mon_config_info { + u32 evtid; + u32 mon_config; +}; + +#define INVALID_CONFIG_INDEX UINT_MAX + +/** + * mon_event_config_index_get - get the hardware index for the + * configurable event + * @evtid: event id. + * + * Return: 0 for evtid == QOS_L3_MBM_TOTAL_EVENT_ID + * 1 for evtid == QOS_L3_MBM_LOCAL_EVENT_ID + * INVALID_CONFIG_INDEX for invalid evtid + */ +static inline unsigned int mon_event_config_index_get(u32 evtid) +{ + switch (evtid) { + case QOS_L3_MBM_TOTAL_EVENT_ID: + return 0; + case QOS_L3_MBM_LOCAL_EVENT_ID: + return 1; + default: + /* Should never reach here */ + return INVALID_CONFIG_INDEX; + } +} + +static void mon_event_config_read(void *info) +{ + struct mon_config_info *mon_info = info; + unsigned int index; + u32 h; + + index = mon_event_config_index_get(mon_info->evtid); + if (index == INVALID_CONFIG_INDEX) { + pr_warn_once("Invalid event id %d\n", mon_info->evtid); + return; + } + rdmsr(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config, h); + + /* Report only the valid event configuration bits */ + mon_info->mon_config &= MAX_EVT_CONFIG_BITS; +} + +static void mondata_config_read(struct rdt_domain *d, struct mon_config_info *mon_info) +{ + smp_call_function_any(&d->cpu_mask, mon_event_config_read, mon_info, 1); +} + +static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32 evtid) +{ + struct mon_config_info mon_info = {0}; + struct rdt_domain *dom; + bool sep = false; + + mutex_lock(&rdtgroup_mutex); + + list_for_each_entry(dom, &r->domains, list) { + if (sep) + seq_puts(s, ";"); + + memset(&mon_info, 0, sizeof(struct mon_config_info)); + mon_info.evtid = evtid; + mondata_config_read(dom, &mon_info); + + seq_printf(s, "%d=0x%02x", dom->id, mon_info.mon_config); + sep = true; + } + seq_puts(s, "\n"); + + mutex_unlock(&rdtgroup_mutex); + + return 0; +} + +static int mbm_total_bytes_config_show(struct kernfs_open_file *of, + struct seq_file *seq, void *v) +{ + struct rdt_resource *r = of->kn->parent->priv; + + mbm_config_show(seq, r, QOS_L3_MBM_TOTAL_EVENT_ID); + + return 0; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1516,6 +1603,12 @@ static struct rftype res_common_files[] = { .seq_show = max_threshold_occ_show, .fflags = RF_MON_INFO | RFTYPE_RES_CACHE, }, + { + .name = "mbm_total_bytes_config", + .mode = 0444, + .kf_ops = &rdtgroup_kf_single_ops, + .seq_show = mbm_total_bytes_config_show, + }, { .name = "cpus", .mode = 0644, @@ -1622,6 +1715,15 @@ void __init thread_throttle_mode_init(void) rft->fflags = RF_CTRL_INFO | RFTYPE_RES_MB; } +void __init mbm_config_rftype_init(const char *config) +{ + struct rftype *rft; + + rft = rdtgroup_get_rftype_by_name(config); + if (rft) + rft->fflags = RF_MON_INFO | RFTYPE_RES_CACHE; +} + /** * rdtgroup_kn_mode_restrict - Restrict user access to named resctrl file * @r: The resource group with which the file is associated. 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Thu, 22 Dec 2022 17:31:50 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 10/13] x86/resctrl: Add interface to read mbm_local_bytes_config Date: Thu, 22 Dec 2022 17:31:24 -0600 Message-ID: <20221222233127.910538-11-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97C:EE_|MN2PR12MB4080:EE_ X-MS-Office365-Filtering-Correlation-Id: 8084fcac-11fa-4e6b-e09a-08dae474b56d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: +RQrqby/xZRLIPA5GrGFRJAkEIai3bYBVOoTTumOaNdq8A5zUMC4S46FYSEK1WhmM+WhgXwU9+jPPD7XHSEVy5o/GxSViJVH/eZ2X8ylAhxnH2+/EAUxV8IZU03gMAcXms87KaXB+s9Fy35m8Zma4MoaK8+CV9FmnqTxSX3nEEX09YeFUePLmvqm9G7RN5chonV41l2nUmuF2NudtIiwHF2VgqIvVsQtF/C6MHUzvYEV0/PM390MBrC4uhf266RYLDcvYvDGfNn/QWEIMQ+JdsoWxxQZ9G6HmtSnIvDx+IN31GPs9H/Xawo3dBFiDGcbvTbFGiTs0ns8V5mDVjq7uI5lE+uzNOKPv0by1OdtVV0DBI6O/tDwUX1Qajpdb3GfR0odke4HoNxFOzrfULjEvdxR1OO9Hr5pfsP+2vxND5WMFHRV5BHZ6nIhjSfHaE2Y11k5GTMsz371lNs0byHAAIMnRI/Orn6G/Mek8p8AF7PIBUq9ljEduwcD1310fLs1XgnIZ1hJSwDLFb8zTo+nhQG1a1HHEabOpoIhBgCyKlD2qEVC23SbFZ264idtiiYQNSDjitK4jUMsBc1zNMW8iM+OI8tu4RYFf90oYIeILW3/AFivB75Opy1Scpd0kHXNjs+hy0o7ZNVZEzAuw8YsbUdDzdwALlY3Hj8QTaMgBn8SvlwlJbJzNm0xdpEaMTv7WL/o4V+8VIulyKby/m/hpaKeaK1CNhGtGeAQvocaBoE= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(396003)(136003)(39860400002)(346002)(451199015)(36840700001)(46966006)(40470700004)(316002)(110136005)(7696005)(478600001)(54906003)(6666004)(8676002)(16526019)(26005)(4326008)(70206006)(1076003)(186003)(2616005)(70586007)(47076005)(336012)(426003)(5660300002)(7406005)(83380400001)(2906002)(44832011)(7416002)(41300700001)(40460700003)(36756003)(356005)(82740400003)(81166007)(40480700001)(8936002)(36860700001)(82310400005)(86362001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2022 23:31:53.6000 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8084fcac-11fa-4e6b-e09a-08dae474b56d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4080 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752959196813044645?= X-GMAIL-MSGID: =?utf-8?q?1752959196813044645?= The event configuration can be viewed by the user by reading the configuration file /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== By default, the mbm_local_bytes_config is set to 0x15 to count all the local event types. For example: $cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config 0=0x15;1=0x15;2=0x15;3=0x15 In this case, the event mbm_local_bytes is configured with 0x15 on domains 0 to 3. Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/monitor.c | 4 +++- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 16 ++++++++++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index 2afddebc8636..7c8a3a745041 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -788,8 +788,10 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r) mbm_total_event.configurable = true; mbm_config_rftype_init("mbm_total_bytes_config"); } - if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) + if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) { mbm_local_event.configurable = true; + mbm_config_rftype_init("mbm_local_bytes_config"); + } } l3_mon_evt_init(r); diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index d47c675a856f..43e2a866e8e0 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1505,6 +1505,16 @@ static int mbm_total_bytes_config_show(struct kernfs_open_file *of, return 0; } +static int mbm_local_bytes_config_show(struct kernfs_open_file *of, + struct seq_file *seq, void *v) +{ + struct rdt_resource *r = of->kn->parent->priv; + + mbm_config_show(seq, r, QOS_L3_MBM_LOCAL_EVENT_ID); + + return 0; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1609,6 +1619,12 @@ static struct rftype res_common_files[] = { .kf_ops = &rdtgroup_kf_single_ops, .seq_show = mbm_total_bytes_config_show, }, + { + .name = "mbm_local_bytes_config", + .mode = 0444, + .kf_ops = &rdtgroup_kf_single_ops, + .seq_show = mbm_local_bytes_config_show, + }, { .name = "cpus", .mode = 0644, From patchwork Thu Dec 22 23:31:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 36002 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp42113wrn; Thu, 22 Dec 2022 15:36:05 -0800 (PST) X-Google-Smtp-Source: AMrXdXsfVaWJzU8vHzhA7NxHrV2IhJ+CIAWhJLVQ63nwwm5dCEk2NS9XNb+wvBWk0EO2sfzrjlpm X-Received: by 2002:a05:6a21:1708:b0:af:b770:bce5 with SMTP id nv8-20020a056a21170800b000afb770bce5mr9819985pzb.53.1671752164746; Thu, 22 Dec 2022 15:36:04 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752164; cv=pass; d=google.com; s=arc-20160816; b=A2c+UyJ/R29ron/MUbD6rJOuSqbpMB9rAEoTcl/aTpY6rMV48hMF2B4SyPvMwouAND Nrgw+piV/CbCGsKVa71Y0nOMqyT8BFES/4OTnk80gyliYnvt3iRJQ4HnwhMBrF6zjCDV E/z3AvX8cO1T/nLczaixxAecqZWTVr9eiDhEC49tpw+FTA6cra2+MUMCv0ImAAcDa9Fs b0SH4iB5uuy1CwaiK8GrHm6LSEK5GNKhmRszV7DXu07ynhwwUftw18AuSxthz44+24Pt Wg4uPZ4WbxYZ/k0tNDRjAMeq1FmYU7qWU/sBkxC0Zp7L/m1mo38CMfagFdHRblqLFDUY aTeA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sC6sD1fOiCpAa9nlTbL134B2teg2PGji/kCRbEoEM6E=; b=YDZjZtEbvckhz9tHhHVlx6ylspwp5hqqwJRGUKbPPLSb9omjZaIEy5zQW6d6E1ZB+s OJLHjEGGqBwcAqMpHSaxJdz2S0cryjP44Y194sMnePiMrfDadZkj2S+VgFfcjkZB5evw 9Zfjb/ZveFvyVhe6ywOsZqqaILXUuJnaTH9ObWmecSh1t0OwSmYH90kGMsFimno6bl99 6/uyuc6OzbtKU8wG5BSu2FsfYPadypWVoScvb6vB9E+mjOOPo0z9RjToYuvmzpAO1p7m MUGPjAgBlL+seTB7tHVHr2c7Ud1WxPVeDUlo2l5oEJ8dR3dsEQNICDpNy/G3kd8+JbKx VncQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=5WPsFI+P; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 22 Dec 2022 17:31:52 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 11/13] x86/resctrl: Add interface to write mbm_total_bytes_config Date: Thu, 22 Dec 2022 17:31:25 -0600 Message-ID: <20221222233127.910538-12-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97C:EE_|CH2PR12MB4200:EE_ X-MS-Office365-Filtering-Correlation-Id: 0c003c72-3896-4b17-c003-08dae474b671 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: SYX3ZshIZbCi3zZyx+5DZGWGqio8HYNnIr3ZfgeNXXpul7WO/zGAVeyBTcinuY0fLc7lvkNFLvcCKlahzZnufgmnMtRIaxwJ91PT6TsTX8CG08k/uqE+k/ZmmdHj4QBV3bo885M7YA/jag2pHZdZrJyk5UkHEfxor64N+lGhLVbUoV80LdJkxK0khkm/q7wOdHJSola1nHeeDFD+n1UgkaWBfgaph7FTBfQXK/Dev+sKFwVbMQOtsd1JZ0eMAeKL4Gfo8g0AvNGFs4KQ46MdAD7vAVZExM/CMTcSgyHNW7aFd+Arwaw6GI4CGcEOF52GyusI9pzgtdx0MnBDE6Vmbm3PJc/dJYQmTYuJdapopbRBPidhjIz4MX4nO0M/7tMnkv3EMc+WrkjpOFuw7LgEHa17LqX69tdvAF57W+9YNM7oDj9yll78ukNUAq+nvBf5ki8LoVCt64VglxU3c9H4lOgGsDg/9c/LGc5v+LuRn+FhWWYcfcvzMrpCcZq8/wM9mN+jZ7wop2YTJo7yT79hvyDEbdnUA+9piK0KLERPOSwz4cV5qe3kBiVA3XTb8VR9vJ8387NMAZaR74WGiACCIWRz8iynofk3YJfW+DEt+3ONLXDK8qiyYb8SlMh7I4RWkbiauyUjsSZaNWlUrIW2Pho4f1AoFQfkzj8GxFc7zfvTWw6C4UxClLin+tEa8LUXxlOErpCisN8gD5OXp8DTq1hA8HBvFd1rsZZ9XEgCaxg= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(346002)(376002)(136003)(396003)(451199015)(46966006)(36840700001)(40470700004)(2906002)(81166007)(356005)(36860700001)(336012)(47076005)(426003)(40480700001)(36756003)(16526019)(41300700001)(82740400003)(186003)(40460700003)(82310400005)(26005)(70206006)(7406005)(86362001)(5660300002)(110136005)(83380400001)(4326008)(44832011)(8676002)(316002)(7416002)(70586007)(2616005)(1076003)(8936002)(54906003)(478600001)(6666004)(7696005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2022 23:31:55.3031 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0c003c72-3896-4b17-c003-08dae474b671 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4200 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752959197514803730?= X-GMAIL-MSGID: =?utf-8?q?1752959197514803730?= The event configuration for mbm_total_bytes can be changed by the user by writing to the file /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config. The event configuration settings are domain specific and affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== For example: To change the mbm_total_bytes to count only reads on domain 0, the bits 0, 1, 4 and 5 needs to be set, which is 110011b (in hex 0x33). Run the command. $echo 0=0x33 > /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config To change the mbm_total_bytes to count all the slow memory reads on domain 1, the bits 4 and 5 needs to be set which is 110000b (in hex 0x30). Run the command. $echo 1=0x30 > /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/monitor.c | 17 ++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 126 ++++++++++++++++++++++++- include/linux/resctrl.h | 11 +++ 3 files changed, 153 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index 7c8a3a745041..c50c43656bdb 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -176,6 +176,23 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d, memset(am, 0, sizeof(*am)); } +/* + * Assumes that hardware counters are also reset and thus that there is + * no need to record initial non-zero counts. + */ +void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain *d) +{ + struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(d); + + if (is_mbm_total_enabled()) + memset(hw_dom->arch_mbm_total, 0, + sizeof(*hw_dom->arch_mbm_total) * r->num_rmid); + + if (is_mbm_local_enabled()) + memset(hw_dom->arch_mbm_local, 0, + sizeof(*hw_dom->arch_mbm_local) * r->num_rmid); +} + static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr, unsigned int width) { u64 shift = 64 - width, chunks; diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index 43e2a866e8e0..acaf19f5d65b 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1515,6 +1515,129 @@ static int mbm_local_bytes_config_show(struct kernfs_open_file *of, return 0; } +static void mon_event_config_write(void *info) +{ + struct mon_config_info *mon_info = info; + unsigned int index; + + index = mon_event_config_index_get(mon_info->evtid); + if (index == INVALID_CONFIG_INDEX) { + pr_warn_once("Invalid event id %d\n", mon_info->evtid); + return; + } + wrmsr(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config, 0); +} + +static int mbm_config_write_domain(struct rdt_resource *r, + struct rdt_domain *d, u32 evtid, u32 val) +{ + struct mon_config_info mon_info = {0}; + int ret = 0; + + /* mon_config cannot be more than the supported set of events */ + if (val > MAX_EVT_CONFIG_BITS) { + rdt_last_cmd_puts("Invalid event configuration\n"); + return -EINVAL; + } + + /* + * Read the current config value first. If both are the same then + * no need to write it again. + */ + mon_info.evtid = evtid; + mondata_config_read(d, &mon_info); + if (mon_info.mon_config == val) + goto out; + + mon_info.mon_config = val; + + /* + * Update MSR_IA32_EVT_CFG_BASE MSR on one of the CPUs in the + * domain. The MSRs offset from MSR MSR_IA32_EVT_CFG_BASE + * are scoped at the domain level. Writing any of these MSRs + * on one CPU is observed by all the CPUs in the domain. + */ + smp_call_function_any(&d->cpu_mask, mon_event_config_write, + &mon_info, 1); + + /* + * When an Event Configuration is changed, the bandwidth counters + * for all RMIDs and Events will be cleared by the hardware. The + * hardware also sets MSR_IA32_QM_CTR.Unavailable (bit 62) for + * every RMID on the next read to any event for every RMID. + * Subsequent reads will have MSR_IA32_QM_CTR.Unavailable (bit 62) + * cleared while it is tracked by the hardware. Clear the + * mbm_local and mbm_total counts for all the RMIDs. + */ + resctrl_arch_reset_rmid_all(r, d); + +out: + return ret; +} + +static int mon_config_write(struct rdt_resource *r, char *tok, u32 evtid) +{ + char *dom_str = NULL, *id_str; + unsigned long dom_id, val; + struct rdt_domain *d; + int ret = 0; + +next: + if (!tok || tok[0] == '\0') + return 0; + + /* Start processing the strings for each domain */ + dom_str = strim(strsep(&tok, ";")); + id_str = strsep(&dom_str, "="); + + if (!id_str || kstrtoul(id_str, 10, &dom_id)) { + rdt_last_cmd_puts("Missing '=' or non-numeric domain id\n"); + return -EINVAL; + } + + if (!dom_str || kstrtoul(dom_str, 16, &val)) { + rdt_last_cmd_puts("Non-numeric event configuration value\n"); + return -EINVAL; + } + + list_for_each_entry(d, &r->domains, list) { + if (d->id == dom_id) { + ret = mbm_config_write_domain(r, d, evtid, val); + if (ret) + return -EINVAL; + goto next; + } + } + + return -EINVAL; +} + +static ssize_t mbm_total_bytes_config_write(struct kernfs_open_file *of, + char *buf, size_t nbytes, + loff_t off) +{ + struct rdt_resource *r = of->kn->parent->priv; + int ret; + + /* Valid input requires a trailing newline */ + if (nbytes == 0 || buf[nbytes - 1] != '\n') + return -EINVAL; + + cpus_read_lock(); + mutex_lock(&rdtgroup_mutex); + + rdt_last_cmd_clear(); + + buf[nbytes - 1] = '\0'; + + ret = mon_config_write(r, buf, QOS_L3_MBM_TOTAL_EVENT_ID); + + mutex_unlock(&rdtgroup_mutex); + cpus_read_unlock(); + + return ret ?: nbytes; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1615,9 +1738,10 @@ static struct rftype res_common_files[] = { }, { .name = "mbm_total_bytes_config", - .mode = 0444, + .mode = 0644, .kf_ops = &rdtgroup_kf_single_ops, .seq_show = mbm_total_bytes_config_show, + .write = mbm_total_bytes_config_write, }, { .name = "mbm_local_bytes_config", diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 0cee154abc9f..8334eeacfec5 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -250,6 +250,17 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d, void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d, u32 rmid, enum resctrl_event_id eventid); +/** + * resctrl_arch_reset_rmid_all() - Reset all private state associated with + * all rmids and eventids. + * @r: The resctrl resource. + * @d: The domain for which all architectural counter state will + * be cleared. + * + * This can be called from any CPU. + */ +void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain *d); + extern unsigned int resctrl_rmid_realloc_threshold; extern unsigned int resctrl_rmid_realloc_limit; From patchwork Thu Dec 22 23:31:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 36004 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp42421wrn; Thu, 22 Dec 2022 15:37:12 -0800 (PST) X-Google-Smtp-Source: AMrXdXtiwPrMmslTuEXImu8Ce46GoHTSfe8Z4KGM7KYtqb547nh9lzcWu0W0y0hE6O+mBHz5B4I3 X-Received: by 2002:a05:6a00:3027:b0:577:8d87:d8f4 with SMTP id ay39-20020a056a00302700b005778d87d8f4mr8338345pfb.34.1671752232200; Thu, 22 Dec 2022 15:37:12 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752232; cv=pass; d=google.com; s=arc-20160816; b=S5eM44HrTUfW8ymHk0QC3YA7yET8qwaPibT+ArxdqIazXeY1KmqImt0URX9rY0Gg1i TKndLALjzWDqAF72BMsCP2SuftA0iHl2bG264ZPLwig0P4PPbr1lkMltBKRrA8F9oe7b ffpGEOODULkrOxn1sf9tYUlebm9ZrqYuH7Le6p5BFMnRFnuirPqjLjMYfTcvwB3WYjQP mQ8efKPgs9HfVfZdlEH+B6L4oTgZPxfx1ZjpjbL4AnvUTc4FGZj2v3rTBfwHD6zF9TwS ynWWq8/0a1lnCdOeHVMZM31qY8uKdijYwAhAizrXUm+mu/ZlGbRlIH0C6mSFk80fHSWO fvxw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GFAQwsg1S0v31va8+qhDloTy7uUSCKJdnxX6oD0yzTE=; b=LYz7BICbmYd/CbyIwe2mHhNBOJrGcBYKyikFRnZpKgXLFTL9SMCJNTI2qxeY0QeAQZ e68IDFlTtQSV1trO9K0uEGITLDaA11Ppq/yZHngaaW4ADfmpGjAIOQFTJVzFIgcGwn63 0ywG6fNjnB5hffV3EP4ErM+QwV4/zf3DZa4y2XLSQPk2TNm6/iZDqnk6j56v02z+TAgt 6D+46olFI8GzdyLl2vPL8OxCVH5XIeA2vvv7+kIpg1HLjGx8m12NRwnq+d2NqBHFDumq JRe4sGDJ5q3WYEuPNyBtbQfFRvVz9p514++mfLYo9wrO8vh3conto7ksk6L91/IDOJZX 4lBg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=CaPArotz; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 22 Dec 2022 17:31:54 -0600 From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 12/13] x86/resctrl: Add interface to write mbm_local_bytes_config Date: Thu, 22 Dec 2022 17:31:26 -0600 Message-ID: <20221222233127.910538-13-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com> References: <20221222233127.910538-1-babu.moger@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C977:EE_|DS7PR12MB8273:EE_ X-MS-Office365-Filtering-Correlation-Id: 70333f94-2314-4157-0fc3-08dae474b760 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ZtbtjwkUf3Y5g71/duRf3F0YhWTghQ/HMOsAVLQ4DbFfq6++KKcw6XmfhlQkmNP3Bs85frE2n6wQ9MyZXyix1NQQphXEd8CeI70RfCa7cz8Eqb77rC+XVtt1tLSksXlD+MOsvVfEkO6NYGg+VHmwAevirCHxCJkttOuJGybnAaEHK2OWavOBNfmIVdmQAUME3+a0bbYlxq+AQ70/mRUxdyDcQJ+o7bK+63W93d/1TQiylbcGiJZVHw/l5xV1VMtBcnadtyRBU2+SPbrI5tBiGQlSjZHWKrOmCt7MRtJKufdBb3AN2d75v23p6dWS6ykXerRZAMnyJCs6gotV2yPrLRtzmeLoIzUmRla+9tNawVQZXqIWEKfMbNtqDQNjxwOuc5+h3YU+/3DJeui+o4R2epQnP98zKnDp1oBWEhz9Xq/YEhp0+gaNlx/q6lKFqU7NaLKO/FnjAtXxuCS9Hr3pdK5a3G8o+C0YRQoU3fpBe/9fHSczXKN2wVCVIgFuR61qTdXw5OgdHjorZy28Y7rqTHSQSVRu8PYmMG+057tziUGi/+WKfk5FAkiDi2JvLwINz9SQL6wJajZklidvBsE4t0kGBRM00Bp5H1uGnZUogQKNzi6tA/ZWprPExLmOo8+Eoo/oSUwnneCn/6e4J+1eJCidDYo15IiiKp1ODtW8iaktG+bwIRtqerZmnEVKdwsNNpBc/y86XtJOCv04oFTPc4SoD5NNvpOyxpXakqF45Ww= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(376002)(346002)(136003)(39860400002)(451199015)(46966006)(36840700001)(40470700004)(70586007)(4326008)(70206006)(8676002)(40460700003)(86362001)(36756003)(5660300002)(336012)(316002)(8936002)(47076005)(82310400005)(41300700001)(1076003)(16526019)(6666004)(2616005)(186003)(7696005)(83380400001)(26005)(426003)(36860700001)(356005)(40480700001)(81166007)(54906003)(478600001)(82740400003)(44832011)(110136005)(2906002)(7416002)(7406005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2022 23:31:56.7243 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 70333f94-2314-4157-0fc3-08dae474b760 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C977.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8273 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752959268767926379?= X-GMAIL-MSGID: =?utf-8?q?1752959268767926379?= The event configuration for mbm_local_bytes can be changed by the user by writing to the configuration file /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== For example: To change the mbm_local_bytes_config to count all the non-temporal writes on domain 0, the bits 2 and 3 needs to be set which is 1100b (in hex 0xc). Run the command. $echo 0=0xc > /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config To change the mbm_local_bytes to count only reads to local NUMA domain 1, the bit 0 needs to be set which 1b (in hex 0x1). Run the command. $echo 1=0x1 > /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config Reviewed-by: Reinette Chatre Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 29 +++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index acaf19f5d65b..59debc997162 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1638,6 +1638,32 @@ static ssize_t mbm_total_bytes_config_write(struct kernfs_open_file *of, return ret ?: nbytes; } +static ssize_t mbm_local_bytes_config_write(struct kernfs_open_file *of, + char *buf, size_t nbytes, + loff_t off) +{ + struct rdt_resource *r = of->kn->parent->priv; + int ret; + + /* Valid input requires a trailing newline */ + if (nbytes == 0 || buf[nbytes - 1] != '\n') + return -EINVAL; + + cpus_read_lock(); + mutex_lock(&rdtgroup_mutex); + + rdt_last_cmd_clear(); + + buf[nbytes - 1] = '\0'; + + ret = mon_config_write(r, buf, QOS_L3_MBM_LOCAL_EVENT_ID); + + mutex_unlock(&rdtgroup_mutex); + cpus_read_unlock(); + + return ret ?: nbytes; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1745,9 +1771,10 @@ static struct rftype res_common_files[] = { }, { .name = "mbm_local_bytes_config", - .mode = 0444, + .mode = 0644, .kf_ops = &rdtgroup_kf_single_ops, .seq_show = mbm_local_bytes_config_show, + .write = mbm_local_bytes_config_write, }, { .name = "cpus", From patchwork Thu Dec 22 23:31:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 35999 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp42027wrn; Thu, 22 Dec 2022 15:35:49 -0800 (PST) X-Google-Smtp-Source: AMrXdXuWMsY2/1r9JEnLAnrqAorniaVm9lqkdpB2tfaABBbuOMalICswZhG5u3GMAlsc/0bOZSsF X-Received: by 2002:a17:906:711a:b0:801:d814:3c77 with SMTP id x26-20020a170906711a00b00801d8143c77mr6727587ejj.25.1671752148947; Thu, 22 Dec 2022 15:35:48 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1671752148; cv=pass; d=google.com; s=arc-20160816; b=p8o7pycrGnUKE/WkFeO6GPYONnzpCWBbOOwZ98oO9y9G1PuZs0/3bBGKomVnQNE670 kzIDX+30eXjh9X83D7JMHXDBRE5KtShpxUVrflJTYx9+CDiIumSBvjEQgPVGMogPjY4q rP9TSi6w49wDRWpun6UF7PniV10+BRvqwfkhJcBybfSfemEJPVqDENP97qXbZD80HgVx auqvM8ohNp3QeWw6bpcr1ON8aWjnyM3YEp/t85x7mG29/XDClkEPUUyKbTdUu/ADIwGM iKjk4iOwNJi/qmgZEAGDWadPWfaE0h/qJs8iJO8Mbv6KGL2Co7wPxjT7/WGJnPN6xaA6 MXJw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6hWTtXXSNLFNh8UrNSm0cr6JJMABy78HvmXcQT4GQDU=; b=ockBtP7dT2irv7V36GktcZrijZjKkms7DIpulp+2saxZoogZISbJwhcToia7TkcASO syiVwOU+eH2CThTR9Ya+U7M93fAuAu45NjopntQMJxh+OkGdU4NOx1QCil//xsyOcNCT ukAjYSDJwUjnswAjWHIQS+mpdBq1THZ4D5DFbkL93A9U6fqc9S9JtMLk14ExD3kTthQp HCDaMfSap+8KoqJ5Hkc4dqHjwMGQ62OrI/tvaHUgdlU+v9kSPmatTbECXVNd/FvyAvpL o1QSVKTnNg9P5MroCxhQfwpneoLv8jmXfQweeHM4Tl28qVBtdcbezNY2FfTb6e9QGGBS kkrQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b="qKcksv9/"; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Slow Memory Bandwidth allocation (SMBA). With this feature, the QOS enforcement policies can be applied to the external slow memory connected to the host. QOS enforcement is accomplished by assigning a Class Of Service (COS) to a processor and specifying allocations or limits for that COS for each resource to be allocated. 2. Bandwidth Monitoring Event Configuration (BMEC). The bandwidth monitoring events mbm_total_bytes and mbm_local_bytes are set to count all the total and local reads/writes respectively. With the introduction of slow memory, the two counters are not enough to count all the different types of memory events. With the feature BMEC, the users have the option to configure mbm_total_bytes and mbm_local_bytes to count the specific type of events. Also add configuration instructions with examples. Signed-off-by: Babu Moger --- Documentation/x86/resctrl.rst | 141 +++++++++++++++++++++++++++++++++- 1 file changed, 139 insertions(+), 2 deletions(-) diff --git a/Documentation/x86/resctrl.rst b/Documentation/x86/resctrl.rst index 71a531061e4e..bea6cab06873 100644 --- a/Documentation/x86/resctrl.rst +++ b/Documentation/x86/resctrl.rst @@ -17,14 +17,16 @@ AMD refers to this feature as AMD Platform Quality of Service(AMD QoS). This feature is enabled by the CONFIG_X86_CPU_RESCTRL and the x86 /proc/cpuinfo flag bits: -============================================= ================================ +=============================================== ================================ RDT (Resource Director Technology) Allocation "rdt_a" CAT (Cache Allocation Technology) "cat_l3", "cat_l2" CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc" MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" MBA (Memory Bandwidth Allocation) "mba" -============================================= ================================ +SMBA (Slow Memory Bandwidth Allocation) "smba" +BMEC (Bandwidth Monitoring Event Configuration) "bmec" +=============================================== ================================ To use the feature mount the file system:: @@ -161,6 +163,82 @@ with the following files: "mon_features": Lists the monitoring events if monitoring is enabled for the resource. + Example:: + + # cat /sys/fs/resctrl/info/L3_MON/mon_features + llc_occupancy + mbm_total_bytes + mbm_local_bytes + + If the system supports Bandwidth Monitoring Event + Configuration (BMEC), then the bandwidth events will + be configurable. The output will be:: + + # cat /sys/fs/resctrl/info/L3_MON/mon_features + llc_occupancy + mbm_total_bytes + mbm_total_bytes_config + mbm_local_bytes + mbm_local_bytes_config + +"mbm_total_bytes_config", "mbm_local_bytes_config": + Read/write files containing the configuration for the mbm_total_bytes + and mbm_local_bytes events, respectively, when the Bandwidth + Monitoring Event Configuration (BMEC) feature is supported. + The event configuration settings are domain specific and affect + all the CPUs in the domain. When an event configuration is changed, + the bandwidth counters for all the RMIDs and the events will be + cleared for that domain. The next read for every RMID will report + "Unavailable" and subsequent reads will report the valid value. + + Following are the types of events supported: + + ==== ======================================================== + Bits Description + ==== ======================================================== + 6 Dirty Victims from the QOS domain to all types of memory + 5 Reads to slow memory in the non-local NUMA domain + 4 Reads to slow memory in the local NUMA domain + 3 Non-temporal writes to non-local NUMA domain + 2 Non-temporal writes to local NUMA domain + 1 Reads to memory in the non-local NUMA domain + 0 Reads to memory in the local NUMA domain + ==== ======================================================== + + By default, the mbm_total_bytes configuration is set to 0x7f to count + all the event types and the mbm_local_bytes configuration is set to + 0x15 to count all the local memory events. + + Examples: + + * To view the current configuration:: + :: + + # cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config + 0=0x7f;1=0x7f;2=0x7f;3=0x7f + + # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config + 0=0x15;1=0x15;3=0x15;4=0x15 + + * To change the mbm_total_bytes to count only reads on domain 0, + the bits 0, 1, 4 and 5 needs to be set, which is 110011b in binary + (in hexadecimal 0x33): + :: + + # echo "0=0x33" > /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config + + # cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config + 0=0x33;1=0x7f;2=0x7f;3=0x7f + + * To change the mbm_local_bytes to count all the slow memory reads on + domain 0 and 1, the bits 4 and 5 needs to be set, which is 110000b + in binary (in hexadecimal 0x30): + :: + + # echo "0=0x30;1=0x30" > /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config + + # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config + 0=0x30;1=0x30;3=0x15;4=0x15 "max_threshold_occupancy": Read/write file provides the largest value (in @@ -464,6 +542,25 @@ Memory bandwidth domain is L3 cache. MB:=bw_MBps0;=bw_MBps1;... +Slow Memory Bandwidth Allocation (SMBA) +--------------------------------------- +AMD hardware supports Slow Memory Bandwidth Allocation (SMBA). +CXL.memory is the only supported "slow" memory device. With the +support of SMBA, the hardware enables bandwidth allocation on +the slow memory devices. If there are multiple such devices in +the system, the throttling logic groups all the slow sources +together and applies the limit on them as a whole. + +The presence of SMBA (with CXL.memory) is independent of slow memory +devices presence. If there are no such devices on the system, then +configuring SMBA will have no impact on the performance of the system. + +The bandwidth domain for slow memory is L3 cache. Its schemata file +is formatted as: +:: + + SMBA:=bandwidth0;=bandwidth1;... + Reading/writing the schemata file --------------------------------- Reading the schemata file will show the state of all resources @@ -479,6 +576,46 @@ which you wish to change. E.g. L3DATA:0=fffff;1=fffff;2=3c0;3=fffff L3CODE:0=fffff;1=fffff;2=fffff;3=fffff +Reading/writing the schemata file (on AMD systems) +-------------------------------------------------- +Reading the schemata file will show the current bandwidth limit on all +domains. The allocated resources are in multiples of one eighth GB/s. +When writing to the file, you need to specify what cache id you wish to +configure the bandwidth limit. + +For example, to allocate 2GB/s limit on the first cache id: + +:: + + # cat schemata + MB:0=2048;1=2048;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + + # echo "MB:1=16" > schemata + # cat schemata + MB:0=2048;1= 16;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + +Reading/writing the schemata file (on AMD systems) with SMBA feature +-------------------------------------------------------------------- +Reading and writing the schemata file is the same as without SMBA in +above section. + +For example, to allocate 8GB/s limit on the first cache id: + +:: + + # cat schemata + SMBA:0=2048;1=2048;2=2048;3=2048 + MB:0=2048;1=2048;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + + # echo "SMBA:1=64" > schemata + # cat schemata + SMBA:0=2048;1= 64;2=2048;3=2048 + MB:0=2048;1=2048;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + Cache Pseudo-Locking ==================== CAT enables a user to specify the amount of cache space that an