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[71.184.142.128]) by smtp.gmail.com with ESMTPSA id c25-20020a05620a269900b006fc447eebe5sm7614948qkp.27.2022.12.19.11.12.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 11:12:01 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v4 1/4] arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics Date: Mon, 19 Dec 2022 14:09:58 -0500 Message-Id: <20221219191000.2570545-2-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219191000.2570545-1-echanude@redhat.com> References: <20221219191000.2570545-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752671055071755905?= X-GMAIL-MSGID: =?utf-8?q?1752671055071755905?= pm8450a.dtsi was introduced for the descriptions of pmics used on sa8540p based boards. Rename the dtsi to make this relationship explicit. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} | 0 arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} (100%) diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi similarity index 100% rename from arch/arm64/boot/dts/qcom/pm8450a.dtsi rename to arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 6c547f1b13dc..77d499702ea8 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -10,7 +10,7 @@ #include #include "sa8540p.dtsi" -#include "pm8450a.dtsi" +#include "sa8540p-pmics.dtsi" / { model = "Qualcomm SA8540P Ride"; From patchwork Mon Dec 19 19:09:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 34713 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2570465wrn; Mon, 19 Dec 2022 11:15:52 -0800 (PST) X-Google-Smtp-Source: AA0mqf7gB2chzXuuFwmIj36xRIMlq9EsNKAQFx8PH0oqPEBNsRN8V72Lu7z4gbKhoCI/EWsyMsGP X-Received: by 2002:a05:6402:22fc:b0:470:18a8:3ca6 with SMTP id dn28-20020a05640222fc00b0047018a83ca6mr24925331edb.23.1671477352580; Mon, 19 Dec 2022 11:15:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671477352; cv=none; d=google.com; s=arc-20160816; b=usJ0J8MeeAv+37ozH+8nuEb64JfJ/i4/rbsF0jYMCCHp+EKEB8YVXOLwlfDwyLvexh 3vM5orrTKjpATKEyZKUXieT/uB3hu9iGlCrnPJ+eilFZFEV3k4xfnJ4m9WxXu33f5rI3 yHjkgM+q3VgPnXZbW4yof8PgXQ9ntwgagn8oAb8uLv3FnsHbdexX8+4nk9nVygoHsf5w Xi1NntNKRFOZZBliMrTUv49GPt8DMp3hx0ggQjggANvRwYsdUhXEQFlm2WlTiriWY4Ma LG9118DtDybSh5gK+23skdnt4U6b4VpPR5cHyBmccmQQZPNiqlAJq1rFCB0XP+tvZPui Hxiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OIdwR+qvjuKwdLoe3e5YFQ/t6daZrSiNt47lDk8vL4k=; b=gEn6tW8rEnc63XzRnY3aForJ0uhXuRDygEqt9VXGtzN/XJQTz6dyDh9C/5RdffCy4A dRA1l8Qisw3PEzadls2HXZlFtO88iCM1REEBb0hi8BFgDdp0MOf2mX/EsAhvmQ8+tCiY UlEGheEpE6k5lk8znXfJXA8uulSzF60SMP8bb5PDz/gVDfZUACdB/qTtTtGX2E5luX6N ps3NIK9S07solLQZXV2iXaR4XTs82+6yN/VsDknlASmfBalJ69t6e4WscIviS5ht6nh3 CeWiAUrnEFShqC0pJ0oL5GJxi+8TGz0+62CyL9xnyGaEU37Pmddfe0st7Y7yfsENmBcz 0mTw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=eeEKz0NE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from out1.vger.email (out1.vger.email. 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[71.184.142.128]) by smtp.gmail.com with ESMTPSA id w7-20020ac843c7000000b003a8163c1c96sm6344207qtn.14.2022.12.19.11.12.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 11:12:04 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v4 2/4] arm64: dts: qcom: sa8450p-pmics: add rtc node Date: Mon, 19 Dec 2022 14:09:59 -0500 Message-Id: <20221219191000.2570545-3-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219191000.2570545-1-echanude@redhat.com> References: <20221219191000.2570545-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752671036328311444?= X-GMAIL-MSGID: =?utf-8?q?1752671036328311444?= Add the rtc block on the first pmic to enable the rtc for sa8540p-ride. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi index 34fc72896761..c9b8da43b237 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi @@ -13,6 +13,14 @@ pm8450a: pmic@0 { #address-cells = <1>; #size-cells = <0>; + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + wakeup-source; + }; + pm8450a_gpios: gpio@c000 { compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; From patchwork Mon Dec 19 19:10:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 34712 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2570132wrn; Mon, 19 Dec 2022 11:15:08 -0800 (PST) X-Google-Smtp-Source: AMrXdXtUJbqfrJs+Ps+vn8zivT6zK97WN5EnFw+FzebFZsnnbyp7n1eNG6o1Kvb0mWIeWgduxgdn X-Received: by 2002:a17:906:7808:b0:818:3f54:8df7 with SMTP id u8-20020a170906780800b008183f548df7mr7238619ejm.2.1671477308011; Mon, 19 Dec 2022 11:15:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671477307; cv=none; d=google.com; s=arc-20160816; b=xgKJTHLNTKFPKX3hMO6H4BE6MIOeyjSVBF672QzUF/oaKrcX2/5oiPpLCtw/CCjYjX kSiW1GjxfcCrUCLo2qiZhY5HPGpxYi3F/uNnjXDRhRTVXpS+QigKJ9FXdTcbxODWgNeS S+qyh4K6SyrPhI5rchj1R2FHFblNRDxKZmivBX2UoZWvynen6lTL+50XJlBUhzF27fgG nobMgBuuQkRUE6eqhqQRgy8ykGHpaW6mn29lGwsmhWmPICYXJ+L9E1sKN18RDBIgEUJM 19T4ZWJhuTBaEzZDX8JEuDMdrLe3Gxk4Fx74MxkKpWp3aggjWqVf6houfJp/fCskxROv 73UQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DYlcVMZxZ7sfT1YBoo0lGgFw3p0ugJ1rt2fQWCu4fB0=; b=u6nqfY2vvzd17NQYxGoGEI/f9eMhRysc6IOGYlScPLS39mp3UlwsSTPJYBnsTKTZRy eMWLhvCtZ1Nbzxke7CG0LGFg9rTmWy5w05ISxdVn3LS9lRR6fsnIFAPIGsVd6Ao+cPqp xYHdSb2brzInDdd82idq/W3D8j7fzmf604oN/nGP+Z3gzRVy2RVGnSNVy54zLZXUjLER blaTMFOeyNFdDszpEK8Osu36SoptOVIBI316+5XakceT8vDx++xQ5TjRcUoHMHYfXfDK Dd/0WiidSAiMvY6lLFADmBex/l5SRdaUrtjuDe8M/PCjulIokvWZ63ZN+6I3FWWt/xul qB6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=ah8UnNL1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from out1.vger.email (out1.vger.email. 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[71.184.142.128]) by smtp.gmail.com with ESMTPSA id y6-20020a05620a44c600b006fcb4e01345sm7694158qkp.24.2022.12.19.11.12.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 11:12:06 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v4 3/4] arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics Date: Mon, 19 Dec 2022 14:10:00 -0500 Message-Id: <20221219191000.2570545-4-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219191000.2570545-1-echanude@redhat.com> References: <20221219191000.2570545-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752670989894945433?= X-GMAIL-MSGID: =?utf-8?q?1752670989894945433?= Include the dtsi to use a single pmic descriptions. Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +----------------------- 1 file changed, 1 insertion(+), 78 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index 84cb6f3eeb56..c8437efe8235 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -11,6 +11,7 @@ #include #include "sa8540p.dtsi" +#include "sa8540p-pmics.dtsi" / { model = "Qualcomm SA8295P ADP"; @@ -260,84 +261,6 @@ &remoteproc_nsp1 { status = "okay"; }; -&spmi_bus { - pm8450a: pmic@0 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@6000 { - compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; - reg-names = "rtc", "alarm"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; - wakeup-source; - }; - - pm8450a_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450a_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450c: pmic@4 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x4 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450c_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450c_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450e: pmic@8 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x8 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450e_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450e_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450g: pmic@c { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0xc SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450g_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450g_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; -}; - &ufs_mem_hc { reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; From patchwork Mon Dec 19 19:10:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 34711 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2570064wrn; Mon, 19 Dec 2022 11:15:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf64qdgMCkx67O6yAWfhKYLVq8QXsHrGB7wghESccimgvQeNixEG1L6FNQBn7FGeL9e+P12Q X-Received: by 2002:aa7:d912:0:b0:46b:2b37:ffa6 with SMTP id a18-20020aa7d912000000b0046b2b37ffa6mr37263601edr.13.1671477300344; Mon, 19 Dec 2022 11:15:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671477300; cv=none; d=google.com; s=arc-20160816; b=kJdmAOpOegADrrrWDgUuoDf9nT1anjaXtsWFCWMDdqKbPMwXLT7cm06AAWkN2jetPc xORN0pVMFJrmKCWAaUqet/7/t+aeGS4DoZnTNLImSxqJSyMMrXZA47mAF61iItQMV//h 9Euq3jJo9ZDtDfvof0HxCKKoM8RPyXC0w4x9LFJ9kBhODeoTq2P+0r9TcljaStNe7EOp yHHx+/KOfrv583FdIDJ6RR/ANzRt8v+X3k9Hb73x+XSl2w3zz57cC7KDQ9ffbKJJb/oJ xlabWef5fyWXnpj/8mzZYTQTJTZpim1DBmvPbzOPwU3eqkh0mw95kY+fadrlLinC6dEB +WSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Fr7p8fpHA5Trb/dyTG65t7CBlRLQovl5uUrytTknIzY=; b=wivgRvC1c8VatTq9fZBZNZN6SQjLKVjp4+BLdhKucHYPdtnJVPmYlYEzP0yH59UHkO r/JgirCNQ36ys5zPnuAkzg3uhTRnIO/OAHLNlFgWTZXuip0dEQsnAL0B+Iev4ZyWONzN NDSy7sjqw6Z7+y6T2Fo4V7JZZ/7YSbKlIp8nDxVOh6pVIyhWdoD6yt0CUYi3C6tkrEis nGsZ3ux8TheXAMbOXUgWJYaNVmZajao4oK0BarJ0eAfeSjzf5vfIU7El8yH6t7eutZX7 IrUfLE7P7EGYbdjraxahbBZ4Ehjj8T8nuLvccSpaDsvdLxTOUEJUtP5dWUehkeypuZ/j JUyA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=A3kgo62j; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from out1.vger.email (out1.vger.email. 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[71.184.142.128]) by smtp.gmail.com with ESMTPSA id h21-20020a05620a401500b006fc6529abaesm7634145qko.101.2022.12.19.11.12.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 11:12:08 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v4 4/4] arm64: dts: qcom: pm8941-rtc add alarm register Date: Mon, 19 Dec 2022 14:10:01 -0500 Message-Id: <20221219191000.2570545-5-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219191000.2570545-1-echanude@redhat.com> References: <20221219191000.2570545-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752670981602970189?= X-GMAIL-MSGID: =?utf-8?q?1752670981602970189?= A few descriptions including a qcom,pm8941-rtc describe two reg-names for the "rtc" and "alarm" register banks, but only one offset. For consistency with reg-names, add the "alarm" register offset. No functional change is expected from this. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm8150.dtsi | 2 +- arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 ++- arch/arm64/boot/dts/qcom/pm8950.dtsi | 2 +- arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 2 +- arch/arm64/boot/dts/qcom/pmp8074.dtsi | 2 +- arch/arm64/boot/dts/qcom/pms405.dtsi | 2 +- 6 files changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi index 574fa95a2871..db90c55fa2cf 100644 --- a/arch/arm64/boot/dts/qcom/pm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi @@ -121,7 +121,7 @@ pm8150_adc_tm: adc-tm@3500 { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi index 08f9ca006e72..e2a6b66d8847 100644 --- a/arch/arm64/boot/dts/qcom/pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi @@ -93,7 +93,8 @@ adc-chan@f { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; }; diff --git a/arch/arm64/boot/dts/qcom/pm8950.dtsi b/arch/arm64/boot/dts/qcom/pm8950.dtsi index 07c3896bd36f..d7df4ad60509 100644 --- a/arch/arm64/boot/dts/qcom/pm8950.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8950.dtsi @@ -126,7 +126,7 @@ xo-therm-buf@3c { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi index 20c5d60c8c2c..ee1e428d3a6e 100644 --- a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi +++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi @@ -108,7 +108,7 @@ pmm8155au_1_adc_tm: adc-tm@3500 { pmm8155au_1_rtc: rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; diff --git a/arch/arm64/boot/dts/qcom/pmp8074.dtsi b/arch/arm64/boot/dts/qcom/pmp8074.dtsi index ceb2e6358b3d..580684411d74 100644 --- a/arch/arm64/boot/dts/qcom/pmp8074.dtsi +++ b/arch/arm64/boot/dts/qcom/pmp8074.dtsi @@ -74,7 +74,7 @@ vph-pwr@131 { pmp8074_rtc: rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; allow-set-time; diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi index ffe9e33808d0..22edb47c6a84 100644 --- a/arch/arm64/boot/dts/qcom/pms405.dtsi +++ b/arch/arm64/boot/dts/qcom/pms405.dtsi @@ -125,7 +125,7 @@ xo_therm: xo_temp@76 { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; };