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[2620:137:e000::1:20]) by mx.google.com with ESMTP id v62-20020a638941000000b00476c94abbc5si11687490pgd.681.2022.12.19.10.32.15; Mon, 19 Dec 2022 10:32:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="mxs/QURM"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231862AbiLSSad (ORCPT + 99 others); Mon, 19 Dec 2022 13:30:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232334AbiLSSaY (ORCPT ); Mon, 19 Dec 2022 13:30:24 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60F6813E1B for ; Mon, 19 Dec 2022 10:30:22 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id o8-20020a17090a9f8800b00223de0364beso1188268pjp.4 for ; Mon, 19 Dec 2022 10:30:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=USFa3vv6r3M6at72+GYbrAEuQqTIcmw3cLL2W4/Vhuk=; b=mxs/QURMh4Fchj/EQo9a4AGEN62JMD4qI4PsAb5DECS/FWcz6SEegn5LTPabE2SnAZ aqr/d+Vl/CV7+kvD/6L9Qlxo7EEAx6k7r0k+HTS+WCSHrb6dea46bmVMgZtpfXDOgjRR rJqcMYrrmHivbMDQ38bYFhbgngB04BRMW8rStF0cx+U9BW2wSrkLFNENNdtdQ7fpQMvd nNcznUgwpLBV6h8sajGjHUKbf+hliLlOKuLcQMeBsCoWBJ9Lr1xFYW+fqT+z/lqSwAPp SSxwJuPPX/LzqswbbKl5Q2GLkosy/nb9FHL79u/8IEOTDSs9oIBkhHsxr099vmFW8/B6 +VHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=USFa3vv6r3M6at72+GYbrAEuQqTIcmw3cLL2W4/Vhuk=; b=yXBvWPWPSpnwSZHXc7kcm72r0zEwnO+bID6hKWMcIomBAOqvfMtSyU8n7TiYjX0bNU jcVcWrJ+TRT9bNkNT5LiAqKARUwpSo7Iw+nYedzbhG946vqQqBAKjvXR8Ex2ixmy6ao+ Mx00y32ZHQnZE6s8KFTpwm5sJ98vF6IWTtZiaYRV4hBeSFA8KSFrdVlm2fcE//inRUu7 palXlDccgQNYftEr49TgVu3P5YlGfz5rCSyAs6w2USuLmwZvmiyDoHuJbM92fVOuoWT3 NMsb+s9Y10/9wkAoxAcAMHWubkqFL6on3hfDuKygQiRANTfz4OpAp7sA+5CfygQEA2Mv WJ7A== X-Gm-Message-State: ANoB5pn6p6N3Od2JcQ58pdsehizZq0fA5vuqNjBygXP9FUvldG4tDboC 089gwzN8UTyaRn5zVu4BLpkp X-Received: by 2002:a17:902:6bcc:b0:188:5256:bf60 with SMTP id m12-20020a1709026bcc00b001885256bf60mr42148384plt.25.1671474621807; Mon, 19 Dec 2022 10:30:21 -0800 (PST) Received: from localhost.localdomain ([220.158.159.17]) by smtp.gmail.com with ESMTPSA id d2-20020a170903230200b00186e34524e3sm7480979plh.136.2022.12.19.10.30.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 10:30:20 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v3 01/15] dt-bindings: arm: msm: Update the maintainers for LLCC Date: Mon, 19 Dec 2022 23:59:44 +0530 Message-Id: <20221219182958.476231-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> References: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752668305598579577?= X-GMAIL-MSGID: =?utf-8?q?1752668305598579577?= Rishabh Bhatnagar has left Qualcomm, and there is no evidence of him maintaining with a new identity. So his entry needs to be removed. Also, Sai Prakash Ranjan's email address should be updated to use quicinc domain. Cc: Sai Prakash Ranjan Acked-by: Sai Prakash Ranjan Acked-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index 38efcad56dbd..d1df49ffcc1b 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Last Level Cache Controller maintainers: - - Rishabh Bhatnagar - - Sai Prakash Ranjan + - Sai Prakash Ranjan description: | LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, From patchwork Mon Dec 19 18:29:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34683 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2550652wrn; Mon, 19 Dec 2022 10:34:37 -0800 (PST) X-Google-Smtp-Source: AA0mqf6slNWsPwAfh7zv5tgvwklp4PQBsrMjvlXiGkIvnBXWjTxkUDxQlCHouS5WYglLB26NnHi5 X-Received: by 2002:a05:6a00:26c5:b0:576:fb7c:7aa3 with SMTP id p5-20020a056a0026c500b00576fb7c7aa3mr40350610pfw.14.1671474876804; Mon, 19 Dec 2022 10:34:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474876; cv=none; d=google.com; s=arc-20160816; b=Ag2ALbHNtypJhRI+8VK56hUUtOUxbpUgSZchDl74cf4mjyFWbUvIvJbzTWL31qtMjM NBD/756HogWvEbVoaKGmNOOWx4U1JvFKPtjpuDuK4cOPJg0s/gRwW9PLO+9tkYZ9OePk DOH4E0oEMpRH7NQWeRBQ06qBjScFWWQ0dF7bbgkdMumL3In+8YfW85VnoIVRS066kCDS 9XhbT1p3b/CNOBpyk5PZfyf2JHYe0IZ3et5T3fy64TVlD/bxSdKwfaokqu4fgldwQ6ns NtgolaMLjXmG4J/nfxwjpJyZZHBYkDrwuD3uqIG+r0CP9DBOHZpFYYXQK9Ze/lrQzyvq K49Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Bp5/r4pBB7Qfe42Kb/SOy1gZ4/1fvqqZd0eC3Bvgy/g=; b=kUIuYqdiGtFpZUpLtyxeEDs2wQ8HZJGPPzHMfhVw72eiOw5MAw0Vy/1vPIZHEp37mz NXUzCt2a4hDRTCPLF9T4nLxuJrfd4kAlqPw6RpWCCHy4CrawexXbZ3ejs+5FB14aLlXe Xvh3s3St5/jXzA/ASqmh9Yc6b54QzegrspW6qbTQvF0V++R/Fdgxfz7A6rtyujgZdNFj fDzVw/2MQN0S01ya5B4iwj1EqERmjTQdMGTZrNBagqBWmkK/uBkCTZ1XMZ5/jBr7EgDS FyW45VYfDiedfK1S/BUdqchbEVY8X/ZkMV+mL0k3Guv8I91lxU71VvUNuVPhwr8rTHqO 59mQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yZTc3yPI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Currently, the binding just lists the LLCC0 base address and tries to cover all the banks using a single size. This is entirely wrong as there are other register regions that happen to lie inside the size covered by the binding such as the memory controller and holes. So this needs to be fixed by specifying the base address of individual LLCC banks. This approach will break the existing users of this binding as the register regions are splitted and the drivers now cannot use LLCC0 register region for accessing rest of the banks (which is wrong anyway). But considering the fact that the binding was wrong from the day one and also the device drivers going wrong by the binding, this breakage is acceptable. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- .../bindings/arm/msm/qcom,llcc.yaml | 125 ++++++++++++++++-- 1 file changed, 114 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index d1df49ffcc1b..050e21d4a03e 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -33,14 +33,12 @@ properties: - qcom,sm8550-llcc reg: - items: - - description: LLCC base register region - - description: LLCC broadcast base register region + minItems: 2 + maxItems: 9 reg-names: - items: - - const: llcc_base - - const: llcc_broadcast_base + minItems: 2 + maxItems: 9 interrupts: maxItems: 1 @@ -50,15 +48,120 @@ required: - reg - reg-names +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7180-llcc + - qcom,sm6350-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7280-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-llcc + - qcom,sc8280xp-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC4 base register region + - description: LLCC5 base register region + - description: LLCC6 base register region + - description: LLCC7 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc4_base + - const: llcc5_base + - const: llcc6_base + - const: llcc7_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm845-llcc + - qcom,sm8150-llcc + - qcom,sm8250-llcc + - qcom,sm8350-llcc + - qcom,sm8450-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc_broadcast_base + additionalProperties: false examples: - | #include - system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; - reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; + soc { + #address-cells = <2>; + #size-cells = <2>; + + system-cache-controller@1100000 { + compatible = "qcom,sdm845-llcc"; + reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; + interrupts = ; + }; }; From patchwork Mon Dec 19 18:29:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34675 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2549747wrn; Mon, 19 Dec 2022 10:32:43 -0800 (PST) X-Google-Smtp-Source: AA0mqf7HZmKRRMAvWDIgWwvGmi00/cP7/9ZR0Ji8qAo7W/VanFqn7oE6HT0mHTESPB2Stpj7DTdL X-Received: by 2002:a17:902:c40f:b0:189:ea22:6d6a with SMTP id k15-20020a170902c40f00b00189ea226d6amr67268855plk.60.1671474763201; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id n9-20020a170902d0c900b0017f74b810c4si10720025pln.53.2022.12.19.10.32.30; Mon, 19 Dec 2022 10:32:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tB2+zNdi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232476AbiLSSbA (ORCPT + 99 others); Mon, 19 Dec 2022 13:31:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232158AbiLSSaj (ORCPT ); Mon, 19 Dec 2022 13:30:39 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 772E413F0C for ; Mon, 19 Dec 2022 10:30:36 -0800 (PST) Received: by mail-pj1-x1034.google.com with SMTP id o1-20020a17090a678100b00219cf69e5f0so13993372pjj.2 for ; Mon, 19 Dec 2022 10:30:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ny8LRDxtkCbzVPxZcMEK/2xCa3Cj3hxgheO6Po9c4/Y=; b=tB2+zNdifqJx43Zq7xsEiADY2KICBO6LNu2vOB17V8vgf3gGuVSsSUXmFOk+zIMYYj grPk6u94bQVO7MthbPVxPNnvFXSz/XPjoCHUYEpjJ6VrZ4RF4lhGSYVuaUypKhlxJ4Ae /S5+kihxH6g9u8iv0uqf1hJccEuw3i7P33U1/A6EZ5diXUsG+OmoSDm2hWuhoqPJcUD7 cLohC/xwLAfIUVoFQFnkvsjgI3W0Lt+B4Q1I/ljTnTo6SBE9mTilVPWsjVinbEnhOK9K xWMiKLZZsJquwOuwhNkW+LisL7n5pjzb/+Y4tuuJlQkQNN/VbX2UhBNczWGQJ3UV2jwt 4zRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ny8LRDxtkCbzVPxZcMEK/2xCa3Cj3hxgheO6Po9c4/Y=; b=H21+XLiv5bcCI8f3PMXTqAjz9OSTDQ5MHTt2meq9NcfGugkAX04OTLvqM+DEjptCdw QXjjdBVpoDin2LXJlgYYkpmpwR3QpUoJQ+90GfqFLvBCxlRAIxEcZxCsogDWM7k5ciVV v1vWTq1OGDsBGiQy+GQxMLZNrkHOnlmEFfVt+2b2dYsOZhQK5TYufEpyEhBZLa570ePW EZaH5rRZctYqBmqCYrPajndMlQhSH0fixbqsgy4LSPzvXIcMV9d/Jp9kinepYId2SoQc QRHZe0p5nUBDxj0P0xUZL4RNJ+K+Nb8MDEK4XiOCHmGx60I4hnHFD0AnRtjq538Vxp3B IqDg== X-Gm-Message-State: ANoB5pmj6ysxqgj6rwUFTWHLkiFun53fRJ6bto0mHOwPJ4RkH100vrWp qfr4fQOHtdII8fGR07nBof3F X-Received: by 2002:a17:902:f211:b0:189:8f0c:d314 with SMTP id m17-20020a170902f21100b001898f0cd314mr39360915plc.39.1671474635867; Mon, 19 Dec 2022 10:30:35 -0800 (PST) Received: from localhost.localdomain ([220.158.159.17]) by smtp.gmail.com with ESMTPSA id d2-20020a170903230200b00186e34524e3sm7480979plh.136.2022.12.19.10.30.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 10:30:35 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, Manivannan Sadhasivam Subject: [PATCH v3 03/15] arm64: dts: qcom: sdm845: Fix the base addresses of LLCC banks Date: Mon, 19 Dec 2022 23:59:46 +0530 Message-Id: <20221219182958.476231-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> References: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752668321078893245?= X-GMAIL-MSGID: =?utf-8?q?1752668321078893245?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 65032b94b46d..e1c0d9faf46e 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2132,8 +2132,11 @@ uart15: serial@a9c000 { llcc: system-cache-controller@1100000 { compatible = "qcom,sdm845-llcc"; - reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Mon Dec 19 18:29:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34677 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2549871wrn; Mon, 19 Dec 2022 10:33:01 -0800 (PST) X-Google-Smtp-Source: AA0mqf6kbSsEfRyQN8N8w4C2y1FcgrEPy4AfiibzVuXbUxxWhuWpYwKCtdMRW3wteBRcfHEKK/tC X-Received: by 2002:a17:902:a60c:b0:189:f990:24af with SMTP id u12-20020a170902a60c00b00189f99024afmr42577824plq.20.1671474781479; Mon, 19 Dec 2022 10:33:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474781; cv=none; d=google.com; s=arc-20160816; b=OrPNi0j2y19PcYtREXo37xVNnJU6JiIVcOKBbSqOnVZvjIvc50U6n2iUEZCT032Sqi 9z55SLRQZtuD7pwirIbzoTXzTLJBwkcTWfaxIRs2r7z/SxNgUXpHwruVl8BLZYoZ7gq8 cEJifEWyhfeBB1vMesXRSUtvq1RfshgEI1yy4x6YFAjr6LAwLpBnQHGnEjoIoWuEcLNL TMrepXcwmtbMLns6WK/fSPbcI5aTqNwagHcK7Gk0LwksvCI3i2rsq2wJ5fzN5lxGezNN WJAAfZg6T5uN2w6WmeWsuAWE3c91NOngxhattgF5pebewAIJddkln3uVqd0jyonaGdNQ 4OUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4GFA6I79C1YmmOYQX1BIX7MOGuUjMMgmSjlJ7uhFCjc=; b=djPeDB0KDiAwYIeXgyzx6L8qvrc2hde13cqknMHWqMXjAA1DQRe/D5SeD7ttn0RRYV RtbtQV9j344XyInRQOCF93k7qinzJWBLGSBspI0dP5Su1OdOwNqkAdujFdh6en/XR433 N3ikVM9BzqZ86GLqMu78DweeCsPvBFta9M4ajJljBGYy8Ur7+cTI33FmW3u4SIervFXn zN4DfZRQhxHwN9fHae8zk1qO1i2SxmpefvTS96d4P4VvdQWGMzT+DGspW4UbzZkF187G fJtB1OlFgVGbPFuBKDlaAjuXAf//Wni67iq0jQnueRxBhxBfRz6RGEbgYaagRwXbNX1s SbaA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Mc7784uK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x186-20020a6386c3000000b004793911ef21si11540322pgd.163.2022.12.19.10.32.48; Mon, 19 Dec 2022 10:33:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Mc7784uK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232499AbiLSSbL (ORCPT + 99 others); Mon, 19 Dec 2022 13:31:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232349AbiLSSaq (ORCPT ); Mon, 19 Dec 2022 13:30:46 -0500 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6710B3D for ; Mon, 19 Dec 2022 10:30:43 -0800 (PST) Received: by mail-pl1-x62d.google.com with SMTP id l10so9853927plb.8 for ; Mon, 19 Dec 2022 10:30:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4GFA6I79C1YmmOYQX1BIX7MOGuUjMMgmSjlJ7uhFCjc=; b=Mc7784uK/Dw0M484InJTvQvSUNDaFw8UiRgYeeDdWTnmReOBwnEaenVNCjR/vLX19t hL+mi+n/PMoOVTJH6HRLDr9WvZCR+YWQTJgwpI3DDrZe97EPKHGd3x6XUBSKpP3+hHdu oQPzCTYD7QO01+XhcMitf+V3QpkpCShljaO60sqQ6eJKc0FB/DeZMylhscXOoPz6hRV1 vj9BFl6uQzkRfVSyEI8DN/IyZKx6M1yUOxjYgRUgYiVfNE1CINmMMLweR9viI8KDnzAg o/qwPNuERzjj+AAWmTTS9ndhK1Ub7wIS9cW7NKIt5Il0Wq4qnOgD3cQDKhBvcCkf6as1 Pc0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4GFA6I79C1YmmOYQX1BIX7MOGuUjMMgmSjlJ7uhFCjc=; b=3xxDTYCaMxMxyPuBKyjwvBzQVQstJ2Umy9Sr3/tLv8cMdo23A0TDVfIBRgWlDyj6/f mGjJ8rI0W8ty5L/KHbOG83CVIRdSAhIpc5bqKFAIHaaJLgJDP4ThEu2EKdpw6hM6aI9+ MIxIBN47m9M39vUHWNSR/Hcegjg7nm1nq/tEDsRzkX4e3e4R1BjGkjLEwIICoupflGfo Zp4SpvaA1CzUj9mSbCREcE3+0OERw96SixFlWRrTjHclESrno5pGzncRpclbVovx2nnA DcIXKqUYaRWA8hmMkRNmMwOhxPLdjrk/YFl5r2WOrIX0d/4pBI0RADJZkk5uTEeiwPP6 LD9w== X-Gm-Message-State: ANoB5pnTnTKEH617hYaDbFr8EeekMal13hq6oqAq4zSDPQ4ItA7ThmRe 1wfEZlOp8kl5vu4rGAbZMEP8 X-Received: by 2002:a17:902:c1c5:b0:185:441f:709c with SMTP id c5-20020a170902c1c500b00185441f709cmr43485056plc.33.1671474643251; Mon, 19 Dec 2022 10:30:43 -0800 (PST) Received: from localhost.localdomain ([220.158.159.17]) by smtp.gmail.com with ESMTPSA id d2-20020a170903230200b00186e34524e3sm7480979plh.136.2022.12.19.10.30.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 10:30:42 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, Manivannan Sadhasivam Subject: [PATCH v3 04/15] arm64: dts: qcom: sc7180: Fix the base addresses of LLCC banks Date: Mon, 19 Dec 2022 23:59:47 +0530 Message-Id: <20221219182958.476231-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> References: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752668340576929076?= X-GMAIL-MSGID: =?utf-8?q?1752668340576929076?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SC7180, there is only one LLCC bank available. So let's just pass that as "llcc0_base". Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f71cf21a8dd8..f861f692c9b1 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2759,7 +2759,7 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sc7180-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Mon Dec 19 18:29:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34676 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2549877wrn; Mon, 19 Dec 2022 10:33:02 -0800 (PST) X-Google-Smtp-Source: AA0mqf7D1gc5e7zzMw84JfsFxMbjWMNB7tOYoN8b0J6mXwpGuYz3789rbrZz/0WBJbTnqRb31gce X-Received: by 2002:a17:906:2314:b0:7c0:d522:decb with SMTP id l20-20020a170906231400b007c0d522decbmr31029426eja.76.1671474781964; Mon, 19 Dec 2022 10:33:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474781; cv=none; d=google.com; s=arc-20160816; b=AMIzUKbU6JpnU6fNSRFzzkVo6VE3ibZae69ab+PW9CqwN6f8+b69HLa4AyZHGUXmoX iZmQgtko5dBmKvZ3QReTBFWd3qB9rE3klyDgPQwYk6/iYXO1XiQzGpoC3nNlwHE4LRnq DWJQFRZWqA/k8QEpi7rprjI/x4Yym9wKD4kmaG2MhuJna+9Ya5r40zUXIHAx+UwI2g8C Y8D2oSaeAOgMTNQjgQA0QYql2SSw+iVVBJt7d56XzpgzL/WRSrcDg57Q44xiz+MlNY+x 6XcAbZy6OnNT1IcEnja1OCdc9ayPgqucI9KGmnh1XdRNIzVoXob8twH1hImJjDBXhtwt pRdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=u3b0H9FlwI0cHeu/QvvhJdFruV0iaHa3piiWtATy1Lw=; b=JzEq1mkzC8CUKlnANqk/SmSCxDCNjoRnFHype/1jUQQokbxhVr6L1CmOa9uyKLM+Bp L2+XXptyJD21nwUc3+yqWIYgArF7bfpSXRS3PXlXZq1tlZwWp2kimvUTaocxjowVHb6u L772JoGi9f1a6oyfc2tGdY5SALumW5VlNoXxjBPYfvBT3ivYlhxldtVLJTt9maAI3Pt6 /man0SW9VAy1H+QPHvARITjBoLAv4LipiZI7DA3J7jxvyK0Wo1FbHkwPLttmlmjfkKHv RzM9QJEC8FZ0uB+5K2LbMoIe13LjLR0ziCfdXfYiokaqGmnWfp/yzLqaA458loPZcFw4 I4Nw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HmzpXW60; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hd16-20020a170907969000b007e28cba28d9si10244645ejc.175.2022.12.19.10.32.38; Mon, 19 Dec 2022 10:33:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HmzpXW60; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232445AbiLSSbP (ORCPT + 99 others); Mon, 19 Dec 2022 13:31:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232426AbiLSSay (ORCPT ); Mon, 19 Dec 2022 13:30:54 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B65725F5 for ; Mon, 19 Dec 2022 10:30:50 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id o8-20020a17090a9f8800b00223de0364beso1189636pjp.4 for ; Mon, 19 Dec 2022 10:30:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=u3b0H9FlwI0cHeu/QvvhJdFruV0iaHa3piiWtATy1Lw=; b=HmzpXW602W74dkB7Kw4cfxsccMJzLWsYo8Dh2GfPNeaWfTmFfA/VPlD9AJ2mbnOz9D B8ugOhfIIoVycjH3TP0GiwYh91lI9gdYIq+fVOA2OuTjBKAWpyEk2uk55/2DZflfLcI9 D5hMSF+sCUrTxoSpOeKD7GxYNCdir7BgGm93wc61Q0DXBBlH2e6cvN2HB8sdj4XuDTWj iBxIxZ7iTB6of8S+tdm4Ki5NlkBSmX+5JWEYumGQPDwv1kHKFpkP/S7jNLrxhyWFSIH8 rZKL028OZRxFW76HoCOtopOvt8KllnDxUqC1XlXDpkSJnuICamZ3epeV1kt3kgc9O0XQ 9+Dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=u3b0H9FlwI0cHeu/QvvhJdFruV0iaHa3piiWtATy1Lw=; b=vm3jaBY8erIb/kCdLq74J4MxNr6zW8g5/pDxfUnOMBnchtTI/s7+jlKmE9RCgf1Wj1 fSM3sr/VHiDvUB8h+B8qclHvLPz0rNN3SpVOsrjJyjwbdySAdhoqdQaaHsw72evN1wb7 +RMypBI2vjvbGEf5esy12q9gdSKNQz2twESAY3a8ZCltF2wYbNINybhArGmxL7y/L2B8 ToeMTXIxsxJwzFjk3BaHddkoJMkcOxuPAPk0YiKOVTfgsq/J+x9m9U2boXpdWikJttW1 VSGDaaAw9RJhsd/Kb16jAt8Wc3W6vuCbrlGF50yymMMprv0FWEw5u+W4ldYAdyBP+KZ3 8vKw== X-Gm-Message-State: AFqh2kpBQNBlHp4jod7r1CsUFzmJ+q6ORXqI0Rujeu2RIbsXe8Rq66uF 2DXAR1hAGdLhasRzjzanYxTGUAK//hpWGsc= X-Received: by 2002:a17:902:7786:b0:191:2181:d6e0 with SMTP id o6-20020a170902778600b001912181d6e0mr4853807pll.8.1671474649819; Mon, 19 Dec 2022 10:30:49 -0800 (PST) Received: from localhost.localdomain ([220.158.159.17]) by smtp.gmail.com with ESMTPSA id d2-20020a170903230200b00186e34524e3sm7480979plh.136.2022.12.19.10.30.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 10:30:49 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, Manivannan Sadhasivam Subject: [PATCH v3 05/15] arm64: dts: qcom: sc7280: Fix the base addresses of LLCC banks Date: Mon, 19 Dec 2022 23:59:48 +0530 Message-Id: <20221219182958.476231-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> References: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752668341128220581?= X-GMAIL-MSGID: =?utf-8?q?1752668341128220581?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. While at it, let's also fix the size of the llcc_broadcast_base to cover the whole region. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 0adf13399e64..6c6eb6f4f650 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3579,8 +3579,9 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sc7280-llcc"; - reg = <0 0x09200000 0 0xd0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Mon Dec 19 18:29:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34686 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2550796wrn; Mon, 19 Dec 2022 10:34:57 -0800 (PST) X-Google-Smtp-Source: AMrXdXsjwNDyew/4bHGUx/iUnjuUuJkbcCRDk/lypeQkIf666drMwI/r/jNC8j02Ke193DUNcxKB X-Received: by 2002:a05:6a20:b2a1:b0:9d:efbf:8175 with SMTP id ei33-20020a056a20b2a100b0009defbf8175mr9909748pzb.62.1671474896982; Mon, 19 Dec 2022 10:34:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474896; cv=none; d=google.com; s=arc-20160816; b=NKlWX0VPyK73KYiOCsocq4N7dev9ARXBDHnxMi7t1zCcQPz3V11blj2RgzlGSvv8iT LVXIlk+Mg8JECPZg0RZFd9idawVKaqApz2ZuXv9+WBdZlc8kNYQLaalc3DBD7iERODuI amyC0l2UX5apnNNBvlR8ofxmoiElHaZ1vt0XCULYURsvpcJR72nzICsRz4one/O45Aph sIuNsaYQbYlUzg6zk/sVufuT9WeWg2YRtepI55FmTLyxfUp2jrcEeAXCD374tVJgrX3U cBN9cp4PYYDzZYW7+QUF2EEJMFI+EdREIISKN6slZh+Phxia3f7yfsfp59P49ri7lwWf LFdw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=TVKI7LzAkCeTNtN2kaZFbBM4yejfzWbEhk9TFnMYwYw=; b=AFVJPuj9FEslBEk9sFLV5Gj4LzvBHWBUUp/P2hOMNTcTzMpjgU5l6gebVp/K5a+G1w WLNO+yt8a5rfmdi1Uz3Po3gKHAfO+UUwguKINobHAeq7ePrOLFJXFdQRorETDW4UkhNg quITjJAStxOkFi1qk0s4ziX7txQ6qRqXuyoOF+yo/o93T6eVbkUi/XiNqqrarx6xvdhC uX1/tpnssZyzRSOusnJE+USLcQQ2mLGQhEjSkoL5t4/AkEhw9224viU1DlLy7XDU8dbY NhqX+56EJmAUnjb52eGONwO33kvTh6FBG+UQjdr4hsluRluXPrupwZhXFZGNyRVdHbiY Gv8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UxB7+9w6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 109c9d2b684d..0510a5d510e7 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1856,8 +1856,14 @@ opp-6 { system-cache-controller@9200000 { compatible = "qcom,sc8280xp-llcc"; - reg = <0 0x09200000 0 0x58000>, <0 0x09600000 0 0x58000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>, + <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc4_base", "llcc5_base", + "llcc6_base", "llcc7_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Mon Dec 19 18:29:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34678 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2549940wrn; Mon, 19 Dec 2022 10:33:09 -0800 (PST) X-Google-Smtp-Source: AMrXdXvqvcActee4T6A/Hr1fBvGaGqV0g5o7rqaBCPDahjwdPtwDFe76Y9N8tJENBILnXcJrNiyI X-Received: by 2002:a17:90a:6544:b0:223:415c:2b82 with SMTP id f4-20020a17090a654400b00223415c2b82mr11169522pjs.27.1671474788980; Mon, 19 Dec 2022 10:33:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474788; cv=none; d=google.com; s=arc-20160816; b=szy97TGduKlTaQXCgzF5JKCJa9xu/g6VE0Y1xYVBqae+hZBri5oPgr6vpN5kPdIcMw 9A/ehLnVnDHLyH2aBAf7Mhj67kDkMCOD+W+16OImSM+qCZnQLQttj8tFCjHrbzKGWlNL yys9nCQxjCQ8G0XcPUa+WUDhLNlYL3sdXuvwVaY3t3f80/idLTT407lGNFEjswYBQnDZ ES7tAqdQ6FxDEkOa6e6y0bpbsPvqQ8LOxKntRorEo9eXjxIShTbXg3CwYLmOnaykwo7G tNbe6pp0EaThxSSMWR1O6FhOt/1yAPBUwjszcE7uHHQ8enIBd06jIulNwZ1K3dCKyIfv yVbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7WUljA05hxjrMgWInu+aANTEuP2TXhzChwqlFzG2wks=; b=H624QJvAx/oppBMSVAv8O2ySxIKAj/HJwNMgxdt1wRGReiFJ2WdJOymOXiT3icxtag Ky6SqMJwVboAj1ek2ZqFcAcclZ7cDans31RptM9ra/EKgMAKaS09xE82zjg1T+NghzM4 QnyFZzziNbwvo8ZGRNIWur6kqXJsYyUD8A2GvnJ7h2LgGtiedoh8Q/LPmRRAfU4G9wjl FZR0ZoemCvkDwlZvQrxbapfGcnfO6EQdEaBh1D6dF14a89AEK1V2aSO7ATarpjZJDcP/ wsRsOA/0ApVIIU57s/+oDlelqqv53LKcR067nNprDMwY4qgBeZozNJoGCDbngP38Sekb 9azg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=F82pN6mg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x23-20020a17090a8a9700b00219b3307f5fsi16191852pjn.45.2022.12.19.10.32.56; Mon, 19 Dec 2022 10:33:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=F82pN6mg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232381AbiLSSbp (ORCPT + 99 others); Mon, 19 Dec 2022 13:31:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232517AbiLSSbM (ORCPT ); Mon, 19 Dec 2022 13:31:12 -0500 Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3FE4F13F0C for ; Mon, 19 Dec 2022 10:31:04 -0800 (PST) Received: by mail-pl1-x62c.google.com with SMTP id w20so3275073ply.12 for ; Mon, 19 Dec 2022 10:31:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7WUljA05hxjrMgWInu+aANTEuP2TXhzChwqlFzG2wks=; b=F82pN6mgDTCdxMwJoTeS4XcJ04BEgKG1pr4R0yhvIl6Vk5epgcY/fWyp9h7TAQTS8M R4vbqnLI4VSXfYpzjMLvm5Rv5ijmloVyOUhS41gw2KoPvcxcUtxSV8atXzOOn6aBK+bP 6fM9f4dBMCa9Z3+/MpqxPg65yqXJ9SoqHSCV80/uUbhYxy+9E2myRaY6DJEyx5BsMOz2 Yau1CWC7WcIngvYw2lMbWbwYadRhqXXsd6OGDiY84P6OAxJ4sULU8wB/FJW7VT/MZNsG WfLdoKNJuEGXwHwc4MUi0Hui7IrFbzOylNY9zDA751x8+x8OnNwsw3zxHJIVRTvNNpad vHDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7WUljA05hxjrMgWInu+aANTEuP2TXhzChwqlFzG2wks=; b=8KCvpXgAn/+s9OES5hnnhl+Uo57mNrSWuLvC8Xr6fy4RzIMqy8fo+lF139Z7IGSBtf FIcorGVtyz8E6vdgljkGg2glvFYa2MyAU1OzzH6Rbh7KOR69ZVD8PDpqgEgSrpegGkMh aPFt+yWOxitdOE/nUCn4cNgO83ndv08fLn4ARrjawmwP5a8rjecifd54qYIt0PD5ijy+ tTACSvsCpBx51NlgOMc5RCsV+wGN7CznCGBNk+chLYGUtjrYdwiHKWydBpitaY2SAp/Z d4tksk8u5YJtN8xcvHKaxKGlIl3/Okaehvc/jw/e88rrCW7nQ0e4Uq/ISqF4rEtgYyhJ zKig== X-Gm-Message-State: AFqh2kor8v69DLutMtAiAtQHhOll1ZCG40uUuhFdg0SX9mRBQI5QC0zz gqFmRH2CTfG9mZGTrOawaqcS X-Received: by 2002:a17:902:a38d:b0:185:441e:6ef3 with SMTP id x13-20020a170902a38d00b00185441e6ef3mr11628908pla.61.1671474663607; Mon, 19 Dec 2022 10:31:03 -0800 (PST) Received: from localhost.localdomain ([220.158.159.17]) by smtp.gmail.com with ESMTPSA id d2-20020a170903230200b00186e34524e3sm7480979plh.136.2022.12.19.10.30.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 10:31:02 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, Manivannan Sadhasivam Subject: [PATCH v3 07/15] arm64: dts: qcom: sm8150: Fix the base addresses of LLCC banks Date: Mon, 19 Dec 2022 23:59:50 +0530 Message-Id: <20221219182958.476231-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> References: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752668348300222051?= X-GMAIL-MSGID: =?utf-8?q?1752668348300222051?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a0c57fb798d3..7fd2291b2638 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1762,8 +1762,11 @@ mmss_noc: interconnect@1740000 { system-cache-controller@9200000 { compatible = "qcom,sm8150-llcc"; - reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Mon Dec 19 18:29:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34679 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2550006wrn; Mon, 19 Dec 2022 10:33:17 -0800 (PST) X-Google-Smtp-Source: AMrXdXu0QpXEnWLzel1rwazhxP2aBRdDTYhtfCnXvPhQ7MAY90Xr8Hx8XpobO7oefi9cZNwcmyMn X-Received: by 2002:a17:90a:d147:b0:223:4308:1ab4 with SMTP id t7-20020a17090ad14700b0022343081ab4mr18991938pjw.46.1671474797568; Mon, 19 Dec 2022 10:33:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474797; cv=none; d=google.com; s=arc-20160816; b=og5u5aI8xTCNO52euC8CvSasvnev+Mi2ve/lJygD6TyTqPNwu8eDIL59gPABabhCHz Ry+S0/eu2JbB1dOsrI2vLP0vbY7Q0DS0/n73eILWwGhAf0UrYqJ+RE8XD2L0VbFwKv/d 8zAucSdhDS0kIVgMD188FHsNvTX3zq6uWwxZlVXqzwkdGHwk7yhDC46sFxDfJv/aBUOn SnL2pjZ34mW24TT0Fe1o5XlFb8PspjlmkdzsO7EZp4Mf6RIo/AqHyeC9bOxBL38a12rR SZrItYbXVe8S99QB6HiJE5Bk3j4KxtQmF2mTZUNcP8fRa0dIhOTo+3lL6C9QzQrVVGHw 90qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WYoJy3okzdnngL6TcLmeGykcAQcBXE1fb+mKXu1bB1c=; b=V0i1MkU+PWkAuBiBjJMTjSLA12FJjqVdHHy0XlEOpQYTzGCWydrWm5Firlir+wD3pS niyfGoYehh0ZE1X3ow5dWojFuzqLjW4agIdd3yLpB/PcuCK6pQDXLe8qdt9rKHrkU4fF H68rrER5ZbwGCO88vv/gi1i9p1sLnXzHszx0Aj/4+fs5Jd9TOZqsP9hnRmEFqHgbWZwN Wq94FKtUiFvYuexQIKAKqxg9jJ12ofFmbquheXgRLrG+JsP2fOLhUznpnwk4a3EJo5+r vj7KNN30ErL8Rg8rFu6rlgPzRAYQtVkLoL7RTTSCN3h+gzswl6RD9U43PfOSRpK51jL+ gUqQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ga502bOh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id p6-20020a17090ab90600b00219fb54c505si16372911pjr.171.2022.12.19.10.33.04; Mon, 19 Dec 2022 10:33:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ga502bOh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232414AbiLSScQ (ORCPT + 99 others); Mon, 19 Dec 2022 13:32:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232355AbiLSSb3 (ORCPT ); Mon, 19 Dec 2022 13:31:29 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE57513F92 for ; Mon, 19 Dec 2022 10:31:10 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id u5so9946950pjy.5 for ; Mon, 19 Dec 2022 10:31:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WYoJy3okzdnngL6TcLmeGykcAQcBXE1fb+mKXu1bB1c=; b=ga502bOhWRtauXqhYFIN4d5IGCYE3moONP/VI56NzvMKYIF1u13sEGcmQtV4EcnIWP vFMkPvBbRcYXSlVUj/dtbcDLd7cUD5MUUMb6qRJBR1wTsmXIGEZw+qLB2LzAx+TX/c3a VxjHJ0dHvClPk4UPqC5o1DG3hhiF9JVxSLJxHCd6l8OK2hG19cynwaw/75T25RgYkRsM Bi6lHWjVheVtUXSlv0bCM1/NZR4AOcgcJoiqz+sgmmuoP6GT9TRzYxCpnx9RQBjQrHuL DZVNk7+yKfg+JVr3gA0/yz3W+5PJDWigUGvAx3Nq5emGjIzGKSpE/rM147wYa/tk4BrN F32Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WYoJy3okzdnngL6TcLmeGykcAQcBXE1fb+mKXu1bB1c=; b=PW7wFyCk9ktKfqfGW1D1/bZ3EQbPMQdJvuigqFJhxBw+f7SwWcHwHf8iW7URhhmR1e 3h/5Y2c7XTSU40u08ahdXNGIG1k+EbWT7JDFgIJ2uHq3RuPzzE9z83kDWL/I+m1BLO7K BEJRmYB9gaLS7HiF6QvRKmQymJBqtMBKDYP3nlhiSi967QlCGbfLiHPTgkHfHZtBqJCO QMDITjupjrbmI2iXGhPv8f7C/fOpSNcE9c98yO2o6TW/yyAemO8yUGjAyJ+JPgb13LsU ymzEi0tICDlTujxu4qpixKTDHY9O7DXFn0EPy/R/s5/77hNv+wA9A/gyWlMDL9s5Neug sBVw== X-Gm-Message-State: ANoB5plLBLVq7QE/nC1oPuwwoG+YMlaVKzXF+efjj5VT+fudsZcOGxXy mQaNtxE5WNMQxdOEBdwAQFFh X-Received: by 2002:a17:902:bd44:b0:18f:9b12:35b5 with SMTP id b4-20020a170902bd4400b0018f9b1235b5mr32051121plx.13.1671474670268; Mon, 19 Dec 2022 10:31:10 -0800 (PST) Received: from localhost.localdomain ([220.158.159.17]) by smtp.gmail.com with ESMTPSA id d2-20020a170903230200b00186e34524e3sm7480979plh.136.2022.12.19.10.31.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 10:31:09 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, Manivannan Sadhasivam Subject: [PATCH v3 08/15] arm64: dts: qcom: sm8250: Fix the base addresses of LLCC banks Date: Mon, 19 Dec 2022 23:59:51 +0530 Message-Id: <20221219182958.476231-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> References: <20221219182958.476231-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752668357116086319?= X-GMAIL-MSGID: =?utf-8?q?1752668357116086319?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index dab5579946f3..d1b65fb3f3f3 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3545,8 +3545,11 @@ usb_1_dwc3: usb@a600000 { system-cache-controller@9200000 { compatible = "qcom,sm8250-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; }; usb_2: usb@a8f8800 { From patchwork Mon Dec 19 18:29:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34680 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2550134wrn; Mon, 19 Dec 2022 10:33:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf7OMYVIXlDeb6PMwc1z+YSjO2XLCrrV+d73pxFkjHmg3lmqnUQjTH4b76cbuQiMg7ShPefg X-Received: by 2002:a05:6a20:4414:b0:af:7b32:4deb with SMTP id ce20-20020a056a20441400b000af7b324debmr36040635pzb.4.1671474813669; Mon, 19 Dec 2022 10:33:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474813; cv=none; d=google.com; s=arc-20160816; b=rY2bl9HifNf5QyvRzkZzpr3TEPsNcBDhVrQ1pqFkWufOsMxYiawBdr9yoyByIDGlF1 SSCLNk5O3IXhBvHPpptWmrmCH5k29CR5Dv8rbV/Ep19QbgPKGus7KCQ2+4iIv+TKTmYn hA7Z6Ys4Sd0w1XoNXvjYcBSBBR0US1yZikOk9Ylv8EUjGp/R8hrrFdB4EmU/kEGz0b7b qpo+HmVzg6TB+QbWlvbRedYN0j72Aa6kGiCLen/tOy4892UWreV7Pys/caHTkTL4xH8M Smw+5V9dDCkNiwD9f4zUbm+3ST0UEdakyvVyo//T5H0DoqJIqklG1d+ESw4GnV9gww60 NuPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sMev9I+ZdryrTBjzJ8tiTgJp1UwzDLK7UbgCFoQvzyA=; b=qJk8Gh1sNPmwe4ia9Dql8Wa3v64DKBsqVnRg60Z2mv81EAumABHfosixA1PJBb15yd PDLm7nRjEdZljarg98blEpHy97h4O8rX0LaeDh5mA0T1egkCwfYnn/Z2suiGFHq2hFMu SxEcAHcO/e+eOqREQNWyxZUUdNByo4M06TSQVyjRm/05GZgNA7Yh2/KorAHe5Pncppod 9Y7ZQ1KmvhU5P/2SHhgfmL2E/XOZexOTneXVoZeWVuiSFIoiZVfnBa6nmeOHGbcvNG2a ODFSIP6xe7Nl95GRI8gS4rp+QZLuz6hBERMlYM1uTeNYWufNcWSNSpCHYdmIxvNKlM0X vypg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ISZcvgYc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 245dce24ec59..836732d16635 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2513,8 +2513,11 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sm8350-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; }; usb_1: usb@a6f8800 { From patchwork Mon Dec 19 18:29:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34681 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2550203wrn; Mon, 19 Dec 2022 10:33:41 -0800 (PST) X-Google-Smtp-Source: AA0mqf7Nedl+7OQJF1EKNSkI4gc6/dvPetZY1OFUten79jdZza/O4C75hXNeTpE2C4tCHfInb/N9 X-Received: by 2002:a17:90a:31c5:b0:221:11b4:d5b7 with SMTP id j5-20020a17090a31c500b0022111b4d5b7mr37145674pjf.21.1671474821589; Mon, 19 Dec 2022 10:33:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474821; cv=none; d=google.com; s=arc-20160816; b=f/BkJMs+d9VbkoTwCjBlSb2Xlv1YgjPVXCT9MX5E9Hgngk56YVelBI2kAxfIEPFTok 0/YqST+0NfTmBU9bXVIeTYwAd9JOcp1+OaMkk0Vft2jp8+DSxoRsn1cqCWo2uAzBU9bW 9/IvDMWoyAXBJY45BzB0F+KOcxZs0uEtkN0CoS+oy5g23JoCR48UwPtJp7VdBLAH+W7b j/tmYyt2pgQsHQRi+UJKz12qJAqJRomAb+J7qRwPVf+Mp8HiuVA/q3NEcBXXHj9fzVb3 GmzoDirgaS3f2Xdv7LrkMOT61bdzlahqIkKeenCxJJkwcbjBQvesu/Iza0tn2PHwhvj0 axqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=u6zR8ugZMMSbsUYzZxGLGG2mvpL7z7iHt3BZjr/IYFc=; b=AwjSe6MNdsHGDq2d22EwqwvgpbGrkC8SodhLJMbrZO7/RXedmwafU7+uQo8uPkjc71 dO/9Ii7387zZKK8754moOmovptMzvqJye6OByoEuv7PPGGwvSeMCIJnVBwlAatMCAMwn pNHqamECKM09F9hzW+daJwQPzJh2Mdk9vCiRZQawYTSSJHSh/t8bMksGCNvfalrJV8ku ywnjlJzzdM3BjPf1wMzZxwJi8T10W09UJeMr/xeBzzIA745BhjnQjRRsEJFcaPMjI0Ha CnCapXWfdVPNWGv2lzka5PBYqqa6P0c7tGCUwleB034QBr9tpfzDMWxsmKq1+LEYXgtq hkEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="LXYA/o0r"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 570475040d95..12549a2912c6 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3640,8 +3640,11 @@ gem_noc: interconnect@19100000 { system-cache-controller@19200000 { compatible = "qcom,sm8450-llcc"; - reg = <0 0x19200000 0 0x580000>, <0 0x19a00000 0 0x80000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x19200000 0 0x80000>, <0 0x19600000 0 0x80000>, + <0 0x19300000 0 0x80000>, <0 0x19700000 0 0x80000>, + <0 0x19a00000 0 0x80000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Mon Dec 19 18:29:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34682 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2550405wrn; Mon, 19 Dec 2022 10:34:04 -0800 (PST) X-Google-Smtp-Source: AMrXdXstZndYuNj5M6ApJtWLJqGKydxJu4r0/Fy6LkG6fJw2VyDsMTi3TDtmGEzaJzrWWV1ayT+E X-Received: by 2002:a05:6a20:9391:b0:ad:2f8b:ed7c with SMTP id x17-20020a056a20939100b000ad2f8bed7cmr11726811pzh.56.1671474844591; Mon, 19 Dec 2022 10:34:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474844; cv=none; d=google.com; s=arc-20160816; b=k/nvWun//kQ90rWxYfwPhjABWZw6eKDwU5wWrZ4Khg3s23fPMdeQKWANz26uTHgvUw ZwdKhFzvNxH9LDEPuk1/w2FmISmdYnc3VlkmUbfdxGpjoD7zYBCJ6n3GpfEKpumMepJf yqnBgcxJNNeUYxfgT1LWzha8jK8wxwd7SL1M+3vNIjI4xYSZLZeDws7x7YFK/ZeM8GUW wKrSU9pg9qs96Dq/wmCmHUaGShW0H4UifSzCaneeZ4uT+oHYj6BGvUUF9/b3hcZPdB/G 8X+x6P6cfZHyAahn1yzc9lWykAR+Y0FzEeSANj+T18fCRS4O+OUIadjtxv4m6EgHFqpp AcgQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=znASgBClq0rwhBOl4/Fw1c5T/s1foKbyxf4XPqRiKDI=; b=Y6d5fPBuYjetx0oEmRpNV7sZ+Ly6OwIzVlBi+mu5pLuPzObkAYsZajjzQ+gMk87EFY mKa6F0RWaeFDydVmISXhkcIv5F5ciiiZLHDEPRrzuDGQOhMTTetHx6dIGDDgf8U+m3Mv a6XwyVbPRrDMdZT8tqUMLnPU7+s/3+KLK95nxZT46+fmLHvekCwmV/Az3dXyp7VPbL6k 0oiNCiTTp8vZMju7T/GZnAU7soSi3pMLq4QD14WP6HZQ1J0ROenovGkKkfhefZ/dFlMM Z5OgFzFF8SaJC8GXPUPCHlYXYwCuyF5WoPck/1VeH4BzNV/f+EEju9B1L19pbB5aFurj /izg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZcH4+Fj7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SM6350, there is only one LLCC bank available. So let's just pass that as "llcc0_base". Reported-by: Parikshit Pareek Tested-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 43324bf291c3..c7701f5e4af6 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1174,7 +1174,7 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sm6350-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", "llcc_broadcast_base"; }; gem_noc: interconnect@9680000 { From patchwork Mon Dec 19 18:29:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34684 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2550677wrn; Mon, 19 Dec 2022 10:34:39 -0800 (PST) X-Google-Smtp-Source: AA0mqf52NleqkhoLSUe95Lhng5y3i4iFgdsTJ9aUZjOVXRDh8EaY6rx0/Hlucn27nsR82eNbKiJ5 X-Received: by 2002:a17:906:b1c6:b0:78d:f455:b5d4 with SMTP id bv6-20020a170906b1c600b0078df455b5d4mr37007722ejb.20.1671474879669; Mon, 19 Dec 2022 10:34:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474879; cv=none; d=google.com; s=arc-20160816; b=yohn9eQSkrK4NZMLDoVbpE9sKWvC+BLRmSsxlbGx5ArmHJmkazaUragsIv4n7lgrkE prDdQzT9erGS01bNMax5J6vWc5h7t2WgvBhsU03Zhcqc98imhH0DxwZ0kjO0uc/2+DDs on4Vxc4svLGuQxlpvRm5p1L9YBQ/SSFU7Ju9RFs2X0/TgqV29RbNy5MRam3IrkE2/TWe GzKgEdkVtw5IvRlE3dJf64y7EUjWEAgAMNBQsRvqcLHw8wRxq4r9ZUllC1EVw645Jo+5 5GwWYoY0xDuBdG7qEbcglT82BrO0b/5sRJl0Dr/ntsIcFk4k7Ax6IPMAt9QLZ49LG9Gw 0tJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=d0mC3YHxzlEQlwMPao/Y7ASve0hKwhscYa/RkKUoFYA=; b=i7QdP/4cP6ihabSZtHE2soo4Yb08pD2Ik5o7UHhb/sVbUDzBahXhy/XFKuKEOtg/T0 XDPto7/qYcd1/WiibIXn3eH3gjF3D09lpSYksRuybZ9AZffmYWrOXF+gcWLo9yW6qqCk sosQoazoYBkwnVLzwCJ7l1p4JN7xR7o6D+9W4lvV33hNmv9AaURSOjikXDew+IQ3ABAe Ldz8HtuWQdP235FZKIpfNt4dTH/I8goNYnwPrdftcnB9OGhHi5nC76rCU4PLsJ3INY8A hBy73DkvdUT0tJ6J0CU7tbyDJnbqxeW/+4nMnbaDT7Mx0KkTWPNNK+xxgBBglF4KgZkO sbqQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XP3AwAH3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Use that value if available, else fall back to 1000ms. Cc: # 4.9 Fixes: e27e3dac6517 ("drivers/edac: add edac_device class") Reported-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam --- drivers/edac/edac_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/edac/edac_device.c b/drivers/edac/edac_device.c index 19522c568aa5..19c3ab2a434e 100644 --- a/drivers/edac/edac_device.c +++ b/drivers/edac/edac_device.c @@ -447,7 +447,7 @@ int edac_device_add_device(struct edac_device_ctl_info *edac_dev) * enable workq processing on this instance, * default = 1000 msec */ - edac_device_workq_setup(edac_dev, 1000); + edac_device_workq_setup(edac_dev, edac_dev->poll_msec ? edac_dev->poll_msec : 1000); } else { edac_dev->op_state = OP_RUNNING_INTERRUPT; } From patchwork Mon Dec 19 18:29:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34685 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2550699wrn; Mon, 19 Dec 2022 10:34:43 -0800 (PST) X-Google-Smtp-Source: AA0mqf7noa58LvptutWHcVdzWOmqlWTeLzKeOu98fulBn3jSzisr3vZNwvo2s77X5F7qMjstIkcr X-Received: by 2002:a05:6a20:8c09:b0:ad:f68e:bc with SMTP id j9-20020a056a208c0900b000adf68e00bcmr23989345pzh.40.1671474883154; Mon, 19 Dec 2022 10:34:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474883; cv=none; d=google.com; s=arc-20160816; b=ehI1aGap30IT0sD4m7A7PQTHy6TEgBKWV7Os8I8UG8y6ma2ArillwYmyQWol80N6Ab xRFpF1JNHyacqhE4McYRu2NviVj8NY+hm5p+9ur2QhGzmO5HcuG6qNhIs3t68iGAtmjZ bn1tBFRTlYLJLltxAGZ/xO/svxUD9ncxh+1StyzeBruQAtwvgtPTeXk8fXwuSeroMua6 LQTwBWIUR/4bMTia+9Zdf8tVd4mHwf/UGWaMt5tabggqbtXhKu822+6wyIveLYCxe3SC x83/qoFhpioCvzOg3NqD6CFJ0Ejt2yCSicuup1BE5tRC8dd9kDh9UVavTfPiqwU2l0zx n8Wg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/mWLM+xjtkcHtTlHLK0FQlJaaC6ncfnZviWhmaPi0lM=; b=Z6P/E6h1ppx/cyJmAgBJOsWasY30bhQmP/gajtv3QMeD8a94NnBIUWfCgC3vyE+oyB wHcvWzreGPk+t772VAva8JxzhKjCzpls5lUItjz1UA2f9Hg5fghUOA4+yaKwLnNRTaae jdPTT/YElFO5HOCvpiiYuU/l6EeVLFgYlzy8Sh1ejantdpHpWHXucNtUNmcleW51bciJ WXXC242QVmGSad4M17bV+OWf5qqeUNJBiYF3b9Sniqo3ALONpT5QNk1lakE3t7ebQ6hl HK4AEzX7UGhojl6z4WXmH4t9d09lTlmxJKWFFE9Zs1xctSvSNAaHZUWxhaDQLRiP8E2e CIiw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qZ0DvYBL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Reported-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 97a27e42dd61..9e77fa84e84f 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -397,12 +397,19 @@ static int qcom_llcc_edac_remove(struct platform_device *pdev) return 0; } +static const struct platform_device_id qcom_llcc_edac_id_table[] = { + { .name = "qcom_llcc_edac" }, + {} +}; +MODULE_DEVICE_TABLE(platform, qcom_llcc_edac_id_table); + static struct platform_driver qcom_llcc_edac_driver = { .probe = qcom_llcc_edac_probe, .remove = qcom_llcc_edac_remove, .driver = { .name = "qcom_llcc_edac", }, + .id_table = qcom_llcc_edac_id_table, }; module_platform_driver(qcom_llcc_edac_driver); From patchwork Mon Dec 19 18:29:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34687 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2551042wrn; Mon, 19 Dec 2022 10:35:24 -0800 (PST) X-Google-Smtp-Source: AMrXdXutbnFQWoOpqfpBEu4InGEXqG+N0ckWQ0/86kI00OwiUhtoeU/9DXvdW9CElS7tGaNGOZn8 X-Received: by 2002:a17:90a:1b61:b0:21a:2273:b85f with SMTP id q88-20020a17090a1b6100b0021a2273b85fmr9659647pjq.18.1671474924681; Mon, 19 Dec 2022 10:35:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474924; cv=none; d=google.com; s=arc-20160816; b=m4g2dbAS/fK3J1DbvYmZmH+svJJG0+KOdzw41UTCCkpp6gJSKaUptn74t4OcOBMOtK 3KHUqxqSzyx0Dgf75Xi2iIZalWopU2EEelOeVeWra/ZjqyRzZ2+r8UCLsOwFQ2b1dJUw NpX9RQdgxa1rKBqigHsdL18ZaydC1MmQwXuPzgdXEayHASZiQveZ2Bq4dViEc/4Ri2GB REawgcfh8cWTRSPo1usO4P3x5/uz7w4kX5/YpwWv9fJXz3cDCmE4gZ4RgfpVHW5oZWSz T1Hdm1AAVNTqZFq7ePytvlr7npyKf1dvY3IIoZQ+tR09rxG7zDb1sZexQpOgksvuibof GZOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=U0UVprkCJUNnL3nMo7DxPvkgB/NZqmZRp7qZPXJUTiQ=; b=FCUzcSk48griTHFYGYP7YQ95VOePWbaM71KjjA8l8XbwVsP9R5TSDPSTn+JixOYpkb omV1G4A4Q27yOjNv972my/b+F3m5+XeXwAPq1lwnrfZ8FOc0fZEJPNbuEvDGrYUAcJld bIRZ9S0/WopGfNh+mFd2MUxuNfYtOtfYNdILY5RiQck1ghv1G1rEmG58GoIlUrlsFiIO 0cmkTspF+bKKSBhb3LeCM+9cp9GZmZF/M516gEEt2U+NZItxvddCgkWNlssjerUMr3NO VqZij5Ztns3+tvgrhsUprYfu0zEJSgtOK9L3IuqUo8bY/3ZaXnTHF4T1IXORr1YtAAyo XKNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="v5Q/tsiT"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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This stride only works for some SoCs like SDM845 for which driver support was initially added. But the later SoCs use different register stride that vary between the banks with holes in-between. So it is not possible to use a single register stride for accessing the CSRs of each bank. By doing so could result in a crash. For fixing this issue, let's obtain the base address of each LLCC bank from devicetree and get rid of the fixed stride. This also means, we no longer need to rely on reg-names property and get the base addresses using index. First index is LLCC bank 0 and last index is LLCC broadcast. If the SoC supports more than one bank, then those needs to be defined in devicetree for index from 1..N-1. Reported-by: Parikshit Pareek Tested-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 14 +++--- drivers/soc/qcom/llcc-qcom.c | 72 +++++++++++++++++------------- include/linux/soc/qcom/llcc-qcom.h | 6 +-- 3 files changed, 48 insertions(+), 44 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 9e77fa84e84f..f40bb49bccd4 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -213,7 +213,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) for (i = 0; i < reg_data.reg_cnt; i++) { synd_reg = reg_data.synd_reg + (i * 4); - ret = regmap_read(drv->regmap, drv->offsets[bank] + synd_reg, + ret = regmap_read(drv->regmaps[bank], synd_reg, &synd_val); if (ret) goto clear; @@ -222,8 +222,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) reg_data.name, i, synd_val); } - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.count_status_reg, + ret = regmap_read(drv->regmaps[bank], reg_data.count_status_reg, &err_cnt); if (ret) goto clear; @@ -233,8 +232,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) edac_printk(KERN_CRIT, EDAC_LLCC, "%s: Error count: 0x%4x\n", reg_data.name, err_cnt); - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.ways_status_reg, + ret = regmap_read(drv->regmaps[bank], reg_data.ways_status_reg, &err_ways); if (ret) goto clear; @@ -296,8 +294,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) /* Iterate over the banks and look for Tag RAM or Data RAM errors */ for (i = 0; i < drv->num_banks; i++) { - ret = regmap_read(drv->regmap, - drv->offsets[i] + DRP_INTERRUPT_STATUS, + ret = regmap_read(drv->regmaps[i], DRP_INTERRUPT_STATUS, &drp_error); if (!ret && (drp_error & SB_ECC_ERROR)) { @@ -312,8 +309,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) if (!ret) irq_rc = IRQ_HANDLED; - ret = regmap_read(drv->regmap, - drv->offsets[i] + TRP_INTERRUPT_0_STATUS, + ret = regmap_read(drv->regmaps[i], TRP_INTERRUPT_0_STATUS, &trp_error); if (!ret && (trp_error & SB_ECC_ERROR)) { diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 23ce2f78c4ed..72f3f2a9aaa0 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -62,8 +62,6 @@ #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c #define LLCC_TRP_ALGO_CFG8 0x21f30 -#define BANK_OFFSET_STRIDE 0x80000 - #define LLCC_VERSION_2_0_0_0 0x02000000 #define LLCC_VERSION_2_1_0_0 0x02010000 #define LLCC_VERSION_4_1_0_0 0x04010000 @@ -898,8 +896,8 @@ static int qcom_llcc_remove(struct platform_device *pdev) return 0; } -static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, - const char *name) +static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index, + const char *name) { void __iomem *base; struct regmap_config llcc_regmap_config = { @@ -909,7 +907,7 @@ static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, .fast_io = true, }; - base = devm_platform_ioremap_resource_byname(pdev, name); + base = devm_platform_ioremap_resource(pdev, index); if (IS_ERR(base)) return ERR_CAST(base); @@ -927,6 +925,7 @@ static int qcom_llcc_probe(struct platform_device *pdev) const struct llcc_slice_config *llcc_cfg; u32 sz; u32 version; + struct regmap *regmap; drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL); if (!drv_data) { @@ -934,21 +933,51 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; } - drv_data->regmap = qcom_llcc_init_mmio(pdev, "llcc_base"); - if (IS_ERR(drv_data->regmap)) { - ret = PTR_ERR(drv_data->regmap); + /* Initialize the first LLCC bank regmap */ + regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base"); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); goto err; } - drv_data->bcast_regmap = - qcom_llcc_init_mmio(pdev, "llcc_broadcast_base"); + cfg = of_device_get_match_data(&pdev->dev); + + ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); + if (ret) + goto err; + + num_banks &= LLCC_LB_CNT_MASK; + num_banks >>= LLCC_LB_CNT_SHIFT; + drv_data->num_banks = num_banks; + + drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); + if (!drv_data->regmaps) { + ret = -ENOMEM; + goto err; + } + + drv_data->regmaps[0] = regmap; + + /* Initialize rest of LLCC bank regmaps */ + for (i = 1; i < num_banks; i++) { + char *base = kasprintf(GFP_KERNEL, "llcc%d_base", i); + + drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); + if (IS_ERR(drv_data->regmaps[i])) { + ret = PTR_ERR(drv_data->regmaps[i]); + kfree(base); + goto err; + } + + kfree(base); + } + + drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); if (IS_ERR(drv_data->bcast_regmap)) { ret = PTR_ERR(drv_data->bcast_regmap); goto err; } - cfg = of_device_get_match_data(&pdev->dev); - /* Extract version of the IP */ ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], &version); @@ -957,15 +986,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) drv_data->version = version; - ret = regmap_read(drv_data->regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], - &num_banks); - if (ret) - goto err; - - num_banks &= LLCC_LB_CNT_MASK; - num_banks >>= LLCC_LB_CNT_SHIFT; - drv_data->num_banks = num_banks; - llcc_cfg = cfg->sct_data; sz = cfg->size; @@ -973,16 +993,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) if (llcc_cfg[i].slice_id > drv_data->max_slices) drv_data->max_slices = llcc_cfg[i].slice_id; - drv_data->offsets = devm_kcalloc(dev, num_banks, sizeof(u32), - GFP_KERNEL); - if (!drv_data->offsets) { - ret = -ENOMEM; - goto err; - } - - for (i = 0; i < num_banks; i++) - drv_data->offsets[i] = i * BANK_OFFSET_STRIDE; - drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, GFP_KERNEL); if (!drv_data->bitmap) { diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index ad1fd718169d..423220e66026 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -120,7 +120,7 @@ struct llcc_edac_reg_offset { /** * struct llcc_drv_data - Data associated with the llcc driver - * @regmap: regmap associated with the llcc device + * @regmaps: regmaps associated with the llcc device * @bcast_regmap: regmap associated with llcc broadcast offset * @cfg: pointer to the data structure for slice configuration * @edac_reg_offset: Offset of the LLCC EDAC registers @@ -129,12 +129,11 @@ struct llcc_edac_reg_offset { * @max_slices: max slices as read from device tree * @num_banks: Number of llcc banks * @bitmap: Bit map to track the active slice ids - * @offsets: Pointer to the bank offsets array * @ecc_irq: interrupt for llcc cache error detection and reporting * @version: Indicates the LLCC version */ struct llcc_drv_data { - struct regmap *regmap; + struct regmap **regmaps; struct regmap *bcast_regmap; const struct llcc_slice_config *cfg; const struct llcc_edac_reg_offset *edac_reg_offset; @@ -143,7 +142,6 @@ struct llcc_drv_data { u32 max_slices; u32 num_banks; unsigned long *bitmap; - u32 *offsets; int ecc_irq; u32 version; }; From patchwork Mon Dec 19 18:29:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 34688 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2551076wrn; Mon, 19 Dec 2022 10:35:30 -0800 (PST) X-Google-Smtp-Source: AMrXdXuxcVNBSqJklR0jvPetQlfCbAzujXU1HHGqvX1nhlMBvphHbVS3Kwnc+6fn93yOV89FLxl7 X-Received: by 2002:a17:90a:e648:b0:223:3642:f74d with SMTP id ep8-20020a17090ae64800b002233642f74dmr9926169pjb.37.1671474929789; Mon, 19 Dec 2022 10:35:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671474929; cv=none; d=google.com; s=arc-20160816; b=kAmF5MZ1TVZUv5hR3p9J86qH7ozFs0dyZzjzPRopbs4iU0I1whCV9cqfEK0Am6ETRD 2JAsvvhyP3LX5pVZg/UPimRLNyXLYSJAqdSpa5F7msoVWv5JbDhU4Ail2HlMIagO5GrT Xm0jCd+YGr9NdJUhHPHpMyEWwj6HpwVTscxFkz/3+tXjiSjWW7lFtWqvvkHKSvmNU+Cp /8rUpQfWffcfbEleMq73doh5KGnZQJrPt2z46ZjU15DJ7wq92cTXP6+8IIDIjErUfSs2 hjNG3nub4ku40dkFm6F6CBTSs/xtzJTdp2XQE30urjwmCA9Wg4dus3pJgL+3Mgnvhahs wLSQ== ARC-Message-Signature: i=1; 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For those platforms, the current EDAC driver will not be probed due to missing ECC IRQ in devicetree. So add support for polling mode so that the EDAC driver can be used on all Qcom platforms supporting LLCC. The polling delay of 5000ms is chosen based on Qcom downstream/vendor driver. Reported-by: Luca Weiss Tested-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 37 +++++++++++++++++++++++++----------- drivers/soc/qcom/llcc-qcom.c | 13 ++++++------- 2 files changed, 32 insertions(+), 18 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index f40bb49bccd4..672a09f3b4cb 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -76,6 +76,8 @@ #define DRP0_INTERRUPT_ENABLE BIT(6) #define SB_DB_DRP_INTERRUPT_ENABLE 0x3 +#define ECC_POLL_MSEC 5000 + enum { LLCC_DRAM_CE = 0, LLCC_DRAM_UE, @@ -283,8 +285,7 @@ dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank) return ret; } -static irqreturn_t -llcc_ecc_irq_handler(int irq, void *edev_ctl) +static irqreturn_t llcc_ecc_irq_handler(int irq, void *edev_ctl) { struct edac_device_ctl_info *edac_dev_ctl = edev_ctl; struct llcc_drv_data *drv = edac_dev_ctl->pvt_info; @@ -328,6 +329,11 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) return irq_rc; } +static void llcc_ecc_check(struct edac_device_ctl_info *edev_ctl) +{ + llcc_ecc_irq_handler(0, edev_ctl); +} + static int qcom_llcc_edac_probe(struct platform_device *pdev) { struct llcc_drv_data *llcc_driv_data = pdev->dev.platform_data; @@ -356,22 +362,31 @@ static int qcom_llcc_edac_probe(struct platform_device *pdev) edev_ctl->panic_on_ue = LLCC_ERP_PANIC_ON_UE; edev_ctl->pvt_info = llcc_driv_data; + /* Check if LLCC driver has passed ECC IRQ */ + ecc_irq = llcc_driv_data->ecc_irq; + if (ecc_irq > 0) { + /* Use interrupt mode if IRQ is available */ + edac_op_state = EDAC_OPSTATE_INT; + } else { + /* Fall back to polling mode otherwise */ + edac_op_state = EDAC_OPSTATE_POLL; + edev_ctl->poll_msec = ECC_POLL_MSEC; + edev_ctl->edac_check = llcc_ecc_check; + } + rc = edac_device_add_device(edev_ctl); if (rc) goto out_mem; platform_set_drvdata(pdev, edev_ctl); - /* Request for ecc irq */ - ecc_irq = llcc_driv_data->ecc_irq; - if (ecc_irq < 0) { - rc = -ENODEV; - goto out_dev; - } - rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, + /* Request ECC IRQ if available */ + if (ecc_irq > 0) { + rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, IRQF_TRIGGER_HIGH, "llcc_ecc", edev_ctl); - if (rc) - goto out_dev; + if (rc) + goto out_dev; + } return rc; diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 72f3f2a9aaa0..7b7c5a38bac6 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -1011,13 +1011,12 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); - if (drv_data->ecc_irq >= 0) { - llcc_edac = platform_device_register_data(&pdev->dev, - "qcom_llcc_edac", -1, drv_data, - sizeof(*drv_data)); - if (IS_ERR(llcc_edac)) - dev_err(dev, "Failed to register llcc edac driver\n"); - } + + llcc_edac = platform_device_register_data(&pdev->dev, + "qcom_llcc_edac", -1, drv_data, + sizeof(*drv_data)); + if (IS_ERR(llcc_edac)) + dev_err(dev, "Failed to register llcc edac driver\n"); return 0; err: