From patchwork Mon Dec 19 16:12:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 34640 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2479142wrn; Mon, 19 Dec 2022 08:14:40 -0800 (PST) X-Google-Smtp-Source: AA0mqf4x8tRQpR7k7U3x9t42SIgSB1Y0u4r0e+7M+VTkg8ZkRBifHUNInM72VI1Iz738IoM2fnqI X-Received: by 2002:a17:907:765a:b0:7c0:e305:a282 with SMTP id kj26-20020a170907765a00b007c0e305a282mr35677730ejc.59.1671466480165; Mon, 19 Dec 2022 08:14:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671466480; cv=none; d=google.com; s=arc-20160816; b=rMHvwiCx6wrRbzDc88NA6kSlkMtsrcmrJrtnAxwxFhl6am9M4E6vmdo19VOn2IY5lL sYQX6WClo2w8ogur5/FO5Q5jg5sT+CIdgYVeYsPwtdMIrDRud032TThgBfIKyIElDt0m LqOH3V0eBOjvwZUd4S6MTpf1Zb5tl6w2b6PhA/eXiwWS/2GdMiKyTTcm+5u9H8D74vMd HcS8p3H60+H0ejEbm0yRORzOapSSD3/cZOlr9yzFUPEmFWBDtPfl0Y70TPZ68c2OUE9C u5qRDwJtQQa98exmegYLxFAI6CBdYlwT8hrD5STZGwyAvbwfs2SIyTfabGAZZyM6m3CK RyTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=NzZ3/HpbxuUwwZfA+UifL/rR8MKO79+fObnuN3HgMww=; b=F0C3u0BrNsLaxTqT0+7r+lQErGHbJn3RNGnbjAIABvyHAHm+yQY6str6ln6a77GW80 INJRA+6z6LdUiy1C96A0tkDwuIVMM5Lh4QPEC3QO92/plME+SThk3GD7gYhY77kxvAJD pR+d904WnRpWkR/uw9ov0HMYD3OFT++4eJbn6bFqb1ENl7p9ymWHbj/VeUyBTOQWznJr n63nETELx8jcXiY53id/7AE6imyztTGF3DqrUWo2YbElX2BLTMnA4nfPhyhcQag/qwRq PmYmHwzNaZAMKyPEJ9udfsSseg0Nh6JQGgA+yMcQNhIsvykEIc7fFqEwF9eocXkwDELq CyEA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id qf39-20020a1709077f2700b00813b319af0esi3734244ejc.110.2022.12.19.08.14.17; Mon, 19 Dec 2022 08:14:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231702AbiLSQN6 (ORCPT + 99 others); Mon, 19 Dec 2022 11:13:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231344AbiLSQNz (ORCPT ); Mon, 19 Dec 2022 11:13:55 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 37A22DEA1; Mon, 19 Dec 2022 08:13:54 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BFCFBFEC; Mon, 19 Dec 2022 08:14:34 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8D78E3F703; Mon, 19 Dec 2022 08:13:51 -0800 (PST) From: James Clark To: linux-perf-users@vger.kernel.org Cc: robh@kernel.org, German Gomez , James Clark , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , John Garry , Will Deacon , Mike Leach , Leo Yan , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/4] perf event: Add simd_flags field to perf_sample Date: Mon, 19 Dec 2022 16:12:55 +0000 Message-Id: <20221219161259.3097213-2-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219161259.3097213-1-james.clark@arm.com> References: <20221219161259.3097213-1-james.clark@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752659635520668348?= X-GMAIL-MSGID: =?utf-8?q?1752659635520668348?= From: German Gomez Add new field to the struct perf_sample to store flags related to SIMD ops. It will be used to store SIMD information from SVE and NEON when profiling using ARM SPE. Signed-off-by: German Gomez Signed-off-by: James Clark --- tools/perf/util/sample.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tools/perf/util/sample.h b/tools/perf/util/sample.h index 60ec79d4eea4..bdf52faf165f 100644 --- a/tools/perf/util/sample.h +++ b/tools/perf/util/sample.h @@ -66,6 +66,18 @@ struct aux_sample { void *data; }; +struct simd_flags { + u64 arch:1, /* architecture (isa) */ + pred:2; /* predication */ +}; + +/* simd architecture flags */ +#define SIMD_OP_FLAGS_ARCH_SVE 0x01 /* ARM SVE */ + +/* simd predicate flags */ +#define SIMD_OP_FLAGS_PRED_PARTIAL 0x01 /* partial predicate */ +#define SIMD_OP_FLAGS_PRED_EMPTY 0x02 /* empty predicate */ + struct perf_sample { u64 ip; u32 pid, tid; @@ -103,6 +115,7 @@ struct perf_sample { struct stack_dump user_stack; struct sample_read read; struct aux_sample aux_sample; + struct simd_flags simd_flags; }; /* From patchwork Mon Dec 19 16:12:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 34641 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2479220wrn; Mon, 19 Dec 2022 08:14:48 -0800 (PST) X-Google-Smtp-Source: AMrXdXv3MNo055sOLyaDYkLQoEaz+JC7I7Vl1an7HkjDehIpsCeZmH+eimR0yD4hGPGwv5U4G11A X-Received: by 2002:a05:6402:1f06:b0:475:5591:b98f with SMTP id b6-20020a0564021f0600b004755591b98fmr12772921edb.35.1671466488578; Mon, 19 Dec 2022 08:14:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671466488; cv=none; d=google.com; s=arc-20160816; b=M4AL0udkFVJ73l9ZIFeZQ7PsPhekks0EB1UJ3t++ldqpaYXngkaJdNgyjEzMf+GjFK 3FbbT+f995RKTvyQUNUISTlA9PydrEs2hinB30vMVVcTPElwZBg5nVk6sXXIwKlTEomb YdsBcU/Cixspr67ZnqmRVCDh2vrA/8mHXScWs+gW5raTrrhiXSbb2ePVMVnrHmgz7CU+ Qu2YrYqEgQOd9eo8sn5EIELRgZ1xuIw6TeZy3JXcrKywzwfqiKTBkZtx+L6AKKRfpq3f WCitHrc2wQ30+ZAEBolSDN7vSH69iJPFKYIRiW9qePsZx6Jv0Vyjp6qyDLgzKLvI5Xfe 0N1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=kvtXYPazxZrZMMGdVgbiv1QHawWzqcUbu8M5VXNjczo=; b=w1RkHPG4FuBCTaY1yvj2HdmhllybqyLphdDtJrTyxIbpUM9Y5V4y1G4zUs1FNf2tR9 S0zzwB4hpnucC+Mx0+q7FRkoFAOO1pptg4BiIPXsbzvxPs7Py2dnxcmRGDrM0VxoO5cU AhrLa+Trxbm80LMJytl2qStheK+c8MRdIMaza1fvypnwQBOKurVrGhiq+8IhaCR6D4aT BwmyHTeYWvBpNEMWBE4rg3Am/NV85WPsb9+2w8XcOVQYVL3IfSk6pe92D1X23obtzMj8 UyLX9RWhn04k7vjT8ttp/Q9UfV35AdaLl1MI1gnUrQ47qJMUXsY98tfK/Q99cCGJUOn1 qKdg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q6-20020a056402518600b00461b661d906si10736091edd.256.2022.12.19.08.14.25; Mon, 19 Dec 2022 08:14:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231821AbiLSQOC (ORCPT + 99 others); Mon, 19 Dec 2022 11:14:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231693AbiLSQN6 (ORCPT ); Mon, 19 Dec 2022 11:13:58 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5761FE0B6; Mon, 19 Dec 2022 08:13:57 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0D04B1515; Mon, 19 Dec 2022 08:14:38 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D7BA33F703; Mon, 19 Dec 2022 08:13:54 -0800 (PST) From: James Clark To: linux-perf-users@vger.kernel.org Cc: robh@kernel.org, German Gomez , Leo Yan , James Clark , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , John Garry , Will Deacon , Mike Leach , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/4] perf arm-spe: Refactor arm-spe to support operation packet type Date: Mon, 19 Dec 2022 16:12:56 +0000 Message-Id: <20221219161259.3097213-3-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219161259.3097213-1-james.clark@arm.com> References: <20221219161259.3097213-1-james.clark@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752659644494674851?= X-GMAIL-MSGID: =?utf-8?q?1752659644494674851?= From: German Gomez Extend the decoder of Arm SPE records to support more fields from the operation packet type. Not all fields are being decoded by this commit. Only those needed to support the use-case SVE load/store/other operations. Suggested-by: Leo Yan Signed-off-by: German Gomez Signed-off-by: James Clark --- .../util/arm-spe-decoder/arm-spe-decoder.c | 30 ++++++++++-- .../util/arm-spe-decoder/arm-spe-decoder.h | 47 +++++++++++++++---- tools/perf/util/arm-spe.c | 8 ++-- 3 files changed, 67 insertions(+), 18 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c index 091987dd3966..709d3f6b58c6 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c @@ -186,11 +186,27 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder) decoder->record.context_id = payload; break; case ARM_SPE_OP_TYPE: - if (idx == SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC) { - if (payload & 0x1) - decoder->record.op = ARM_SPE_ST; + switch (idx) { + case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC: + decoder->record.op |= ARM_SPE_OP_LDST; + if (payload & SPE_OP_PKT_ST) + decoder->record.op |= ARM_SPE_OP_ST; else - decoder->record.op = ARM_SPE_LD; + decoder->record.op |= ARM_SPE_OP_LD; + if (SPE_OP_PKT_IS_LDST_SVE(payload)) + decoder->record.op |= ARM_SPE_OP_SVE_LDST; + break; + case SPE_OP_PKT_HDR_CLASS_OTHER: + decoder->record.op |= ARM_SPE_OP_OTHER; + if (SPE_OP_PKT_IS_OTHER_SVE_OP(payload)) + decoder->record.op |= ARM_SPE_OP_SVE_OTHER; + break; + case SPE_OP_PKT_HDR_CLASS_BR_ERET: + decoder->record.op |= ARM_SPE_OP_BRANCH_ERET; + break; + default: + pr_err("Get packet error!\n"); + return -1; } break; case ARM_SPE_EVENTS: @@ -218,6 +234,12 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder) if (payload & BIT(EV_MISPRED)) decoder->record.type |= ARM_SPE_BRANCH_MISS; + if (payload & BIT(EV_PARTIAL_PREDICATE)) + decoder->record.type |= ARM_SPE_SVE_PARTIAL_PRED; + + if (payload & BIT(EV_EMPTY_PREDICATE)) + decoder->record.type |= ARM_SPE_SVE_EMPTY_PRED; + break; case ARM_SPE_DATA_SOURCE: decoder->record.source = payload; diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h index 46a61df1145b..1443c28545a9 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h @@ -14,19 +14,46 @@ #include "arm-spe-pkt-decoder.h" enum arm_spe_sample_type { - ARM_SPE_L1D_ACCESS = 1 << 0, - ARM_SPE_L1D_MISS = 1 << 1, - ARM_SPE_LLC_ACCESS = 1 << 2, - ARM_SPE_LLC_MISS = 1 << 3, - ARM_SPE_TLB_ACCESS = 1 << 4, - ARM_SPE_TLB_MISS = 1 << 5, - ARM_SPE_BRANCH_MISS = 1 << 6, - ARM_SPE_REMOTE_ACCESS = 1 << 7, + ARM_SPE_L1D_ACCESS = 1 << 0, + ARM_SPE_L1D_MISS = 1 << 1, + ARM_SPE_LLC_ACCESS = 1 << 2, + ARM_SPE_LLC_MISS = 1 << 3, + ARM_SPE_TLB_ACCESS = 1 << 4, + ARM_SPE_TLB_MISS = 1 << 5, + ARM_SPE_BRANCH_MISS = 1 << 6, + ARM_SPE_REMOTE_ACCESS = 1 << 7, + ARM_SPE_SVE_PARTIAL_PRED = 1 << 8, + ARM_SPE_SVE_EMPTY_PRED = 1 << 9, }; enum arm_spe_op_type { - ARM_SPE_LD = 1 << 0, - ARM_SPE_ST = 1 << 1, + /* First level operation type */ + ARM_SPE_OP_OTHER = 1 << 0, + ARM_SPE_OP_LDST = 1 << 1, + ARM_SPE_OP_BRANCH_ERET = 1 << 2, + + /* Second level operation type for OTHER */ + ARM_SPE_OP_SVE_OTHER = 1 << 16, + ARM_SPE_OP_SVE_FP = 1 << 17, + ARM_SPE_OP_SVE_PRED_OTHER = 1 << 18, + + /* Second level operation type for LDST */ + ARM_SPE_OP_LD = 1 << 16, + ARM_SPE_OP_ST = 1 << 17, + ARM_SPE_OP_ATOMIC = 1 << 18, + ARM_SPE_OP_EXCL = 1 << 19, + ARM_SPE_OP_AR = 1 << 20, + ARM_SPE_OP_SIMD_FP = 1 << 21, + ARM_SPE_OP_GP_REG = 1 << 22, + ARM_SPE_OP_UNSPEC_REG = 1 << 23, + ARM_SPE_OP_NV_SYSREG = 1 << 24, + ARM_SPE_OP_SVE_LDST = 1 << 25, + ARM_SPE_OP_SVE_PRED_LDST = 1 << 26, + ARM_SPE_OP_SVE_SG = 1 << 27, + + /* Second level operation type for BRANCH_ERET */ + ARM_SPE_OP_BR_COND = 1 << 16, + ARM_SPE_OP_BR_INDIRECT = 1 << 17, }; enum arm_spe_neoverse_data_source { diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index 906476a839e1..bfae4731a47a 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -411,7 +411,7 @@ static void arm_spe__synth_data_source_neoverse(const struct arm_spe_record *rec * We have no data on the hit level or data source for stores in the * Neoverse SPE records. */ - if (record->op & ARM_SPE_ST) { + if (record->op & ARM_SPE_OP_ST) { data_src->mem_lvl = PERF_MEM_LVL_NA; data_src->mem_lvl_num = PERF_MEM_LVLNUM_NA; data_src->mem_snoop = PERF_MEM_SNOOP_NA; @@ -497,12 +497,12 @@ static void arm_spe__synth_data_source_generic(const struct arm_spe_record *reco static u64 arm_spe__synth_data_source(const struct arm_spe_record *record, u64 midr) { - union perf_mem_data_src data_src = { 0 }; + union perf_mem_data_src data_src = { .mem_op = PERF_MEM_OP_NA }; bool is_neoverse = is_midr_in_range_list(midr, neoverse_spe); - if (record->op == ARM_SPE_LD) + if (record->op & ARM_SPE_OP_LD) data_src.mem_op = PERF_MEM_OP_LOAD; - else if (record->op == ARM_SPE_ST) + else if (record->op & ARM_SPE_OP_ST) data_src.mem_op = PERF_MEM_OP_STORE; else return 0; From patchwork Mon Dec 19 16:12:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 34642 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2479936wrn; Mon, 19 Dec 2022 08:15:55 -0800 (PST) X-Google-Smtp-Source: AA0mqf4eGJpccyVWYMlnxXOvhdxAQhlYaFkAE/W+/Uv74a7/qC+r5FAeHfuLEhJ2ZPK9hK5l/WzS X-Received: by 2002:a17:906:8d08:b0:7c1:3a0:c0a9 with SMTP id rv8-20020a1709068d0800b007c103a0c0a9mr39108281ejc.12.1671466555083; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ww2-20020a170907084200b00780805b99ccsi9946009ejb.648.2022.12.19.08.15.31; Mon, 19 Dec 2022 08:15:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231856AbiLSQOO (ORCPT + 99 others); Mon, 19 Dec 2022 11:14:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231809AbiLSQOB (ORCPT ); Mon, 19 Dec 2022 11:14:01 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 90DE1F008; Mon, 19 Dec 2022 08:14:00 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 43D851688; Mon, 19 Dec 2022 08:14:41 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1A7873F703; Mon, 19 Dec 2022 08:13:57 -0800 (PST) From: James Clark To: linux-perf-users@vger.kernel.org Cc: robh@kernel.org, German Gomez , James Clark , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , John Garry , Will Deacon , Mike Leach , Leo Yan , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/4] perf arm-spe: Add SVE flags to the SPE samples Date: Mon, 19 Dec 2022 16:12:57 +0000 Message-Id: <20221219161259.3097213-4-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219161259.3097213-1-james.clark@arm.com> References: <20221219161259.3097213-1-james.clark@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752659714512084507?= X-GMAIL-MSGID: =?utf-8?q?1752659714512084507?= From: German Gomez Add flags from the Scalable Vector Extension (SVE) to the SPE samples which are available from Armv8.3 (FEAT_SPEv1p1). These will be displayed in a new SIMD sort field in a later commit. Signed-off-by: German Gomez Signed-off-by: James Clark --- tools/perf/util/arm-spe.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index bfae4731a47a..7b36ba6b4079 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -273,6 +273,25 @@ static int arm_spe_set_tid(struct arm_spe_queue *speq, pid_t tid) return 0; } +static struct simd_flags arm_spe__synth_simd_flags(const struct arm_spe_record *record) +{ + struct simd_flags simd_flags = {}; + + if ((record->op & ARM_SPE_OP_LDST) && (record->op & ARM_SPE_OP_SVE_LDST)) + simd_flags.arch |= SIMD_OP_FLAGS_ARCH_SVE; + + if ((record->op & ARM_SPE_OP_OTHER) && (record->op & ARM_SPE_OP_SVE_OTHER)) + simd_flags.arch |= SIMD_OP_FLAGS_ARCH_SVE; + + if (record->type & ARM_SPE_SVE_PARTIAL_PRED) + simd_flags.pred |= SIMD_OP_FLAGS_PRED_PARTIAL; + + if (record->type & ARM_SPE_SVE_EMPTY_PRED) + simd_flags.pred |= SIMD_OP_FLAGS_PRED_EMPTY; + + return simd_flags; +} + static void arm_spe_prep_sample(struct arm_spe *spe, struct arm_spe_queue *speq, union perf_event *event, @@ -289,6 +308,7 @@ static void arm_spe_prep_sample(struct arm_spe *spe, sample->tid = speq->tid; sample->period = 1; sample->cpu = speq->cpu; + sample->simd_flags = arm_spe__synth_simd_flags(record); event->sample.header.type = PERF_RECORD_SAMPLE; event->sample.header.misc = sample->cpumode; From patchwork Mon Dec 19 16:12:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 34643 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp2480162wrn; Mon, 19 Dec 2022 08:16:19 -0800 (PST) X-Google-Smtp-Source: AA0mqf64aoVDchIbatvsn4vFXRPJiUJNb32sLWUAXgMNdFdi0SKvY7lEeeP8+P//CySyt0wgeQC5 X-Received: by 2002:a17:90b:344f:b0:223:34bb:cb3 with SMTP id lj15-20020a17090b344f00b0022334bb0cb3mr21325554pjb.38.1671466579637; Mon, 19 Dec 2022 08:16:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671466579; cv=none; d=google.com; s=arc-20160816; b=rm/0T/mM+3681Qgq6RRQ5K2vraP8NfQnfMfAlPEPJPqtXSrkTcqtUEjyjlJz16pUbv FEDV/MStVGjtU1C7/AaHmUc50AjVm484CNahgkWaynH9T2ZTuiS5WOc6Wk/Ta03SfAUF rpIpyfKmhn12+755NZAuCXuFapKCcP65Hukc9MW2h0/K3QgUE2NiYy+fdJOp/uRTEkfq e4r5ZbQsiyN7di58JN50yuMaNkdYmK6frT10AzPV4eCeke0ALzuWTxq+rAzCjKcMRlJr lYRu9v//Qo0YM4ehFCx0nkSb1pwdpVa928XyRs5OjC9izuFpbDm9HI+ZxxNLDJ/h2nfM 5OAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=4swbeeSO6Qcc8tdof/UNx/DNRutkTBo4NqRQwUXQRK8=; b=lqXPIalVdwBoq6oX1az1nxBUpcWNmPRnxyXZ3TuSpmQtRM8j0NkyLw3mJ4vi53IVYp Hz0+DqT8CQgtXg2m8gZiL3DpEZCLawEgg4Fra+cMTyARdAgOHBwXnDUxvakmcdhn7VPB VbAFZUZr0Q7+vUXejqWWDwMwJuMiuGmeN8oMBrgbnaxWl00hKLXUJmVH/Z5QsCbkBEkL SF7RlXDs/6I8az5KIy5goTfTFAwRwqJudFf1/e6duZTW0TbsBMh58YtIALX9QdJlF/Pb XTFb7/5p8oADSMl7WYt2SkiDwFUSb6EJ09evuyUsx+T1ILC1wb6FF4YWAyQUR2rOCCva F/Dg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id rm6-20020a17090b3ec600b00209b6044d31si12095967pjb.51.2022.12.19.08.16.06; Mon, 19 Dec 2022 08:16:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232037AbiLSQOY (ORCPT + 99 others); Mon, 19 Dec 2022 11:14:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231840AbiLSQOK (ORCPT ); Mon, 19 Dec 2022 11:14:10 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id CF6E4A440; Mon, 19 Dec 2022 08:14:03 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 85D70FEC; Mon, 19 Dec 2022 08:14:44 -0800 (PST) Received: from e126815.warwick.arm.com (e126815.arm.com [10.32.32.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5C9433F703; Mon, 19 Dec 2022 08:14:01 -0800 (PST) From: James Clark To: linux-perf-users@vger.kernel.org Cc: robh@kernel.org, German Gomez , James Clark , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , John Garry , Will Deacon , Mike Leach , Leo Yan , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/4] perf report: Add 'simd' sort field Date: Mon, 19 Dec 2022 16:12:58 +0000 Message-Id: <20221219161259.3097213-5-james.clark@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221219161259.3097213-1-james.clark@arm.com> References: <20221219161259.3097213-1-james.clark@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752659740252511706?= X-GMAIL-MSGID: =?utf-8?q?1752659740252511706?= From: German Gomez Add 'simd' sort field to visualize SIMD ops in perf-report. Rows are labeled with the SIMD isa, and the type of predicate (if any): - [p] partial predicate - [e] empty predicate (no elements in the vector being used) Example with Arm SPE and SVE (Scalable Vector Extension): #include double src[1025], dst[1025]; int main(void) { svfloat64_t vc = svdup_f64(1); for(;;) for(int i = 0; i < 1025; i += svcntd()) { svbool_t pg = svwhilelt_b64(i, 1025); svfloat64_t vsrc = svld1(pg, &src[i]); svfloat64_t vdst = svadd_x(pg, vsrc, vc); svst1(pg, &dst[i], vdst); } return 0; } ... compiled using "gcc-11 -march=armv8-a+sve -O3" Profiling on a platform that implements FEAT_SVE and FEAT_SPEv1p1: $ perf record -e arm_spe_0// -- ./a.out $ perf report --itrace=i1i -s overhead,pid,simd,sym Overhead Pid:Command Simd Symbol ........ ................ ....... ...................... 53.76% 10758:program [.] main 46.14% 10758:program [.] SVE [.] main 0.09% 10758:program [p] SVE [.] main The report shows 0.09% of the sampled SVE operations use partial predicates due to src and dst arrays not being multiples of the vector register lengths. Signed-off-by: German Gomez Signed-off-by: James Clark --- tools/perf/Documentation/perf-report.txt | 1 + tools/perf/util/hist.c | 1 + tools/perf/util/hist.h | 1 + tools/perf/util/sort.c | 47 ++++++++++++++++++++++++ tools/perf/util/sort.h | 2 + 5 files changed, 52 insertions(+) diff --git a/tools/perf/Documentation/perf-report.txt b/tools/perf/Documentation/perf-report.txt index 4fa509b15948..ff524d83a4a7 100644 --- a/tools/perf/Documentation/perf-report.txt +++ b/tools/perf/Documentation/perf-report.txt @@ -115,6 +115,7 @@ OPTIONS - p_stage_cyc: On powerpc, this presents the number of cycles spent in a pipeline stage. And currently supported only on powerpc. - addr: (Full) virtual address of the sampled instruction + - simd: Flags describing a SIMD operation. "e" for empty Arm SVE predicate. "p" for partial Arm SVE predicate By default, comm, dso and symbol keys are used. (i.e. --sort comm,dso,symbol) diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c index 17a05e943b44..e2390114c495 100644 --- a/tools/perf/util/hist.c +++ b/tools/perf/util/hist.c @@ -742,6 +742,7 @@ __hists__add_entry(struct hists *hists, .weight = sample->weight, .ins_lat = sample->ins_lat, .p_stage_cyc = sample->p_stage_cyc, + .simd_flags = sample->simd_flags, }, *he = hists__findnew_entry(hists, &entry, al, sample_self); if (!hists->has_callchains && he && he->callchain_size != 0) diff --git a/tools/perf/util/hist.h b/tools/perf/util/hist.h index ebd8a8f783ee..e6ecb4453053 100644 --- a/tools/perf/util/hist.h +++ b/tools/perf/util/hist.h @@ -80,6 +80,7 @@ enum hist_column { HISTC_ADDR_FROM, HISTC_ADDR_TO, HISTC_ADDR, + HISTC_SIMD, HISTC_NR_COLS, /* Last entry */ }; diff --git a/tools/perf/util/sort.c b/tools/perf/util/sort.c index 0ecc2cb13792..5c8bfea2ce34 100644 --- a/tools/perf/util/sort.c +++ b/tools/perf/util/sort.c @@ -131,6 +131,52 @@ struct sort_entry sort_thread = { .se_width_idx = HISTC_THREAD, }; +/* --sort simd */ + +static int64_t +sort__simd_cmp(struct hist_entry *left, struct hist_entry *right) +{ + if (left->simd_flags.arch != right->simd_flags.arch) + return (int64_t) left->simd_flags.arch - right->simd_flags.arch; + + return (int64_t) left->simd_flags.pred - right->simd_flags.pred; +} + +static const char *hist_entry__get_simd_name(struct simd_flags *simd_flags) +{ + u64 arch = simd_flags->arch; + + if (arch & SIMD_OP_FLAGS_ARCH_SVE) + return "SVE"; + else + return "n/a"; +} + +static int hist_entry__simd_snprintf(struct hist_entry *he, char *bf, + size_t size, unsigned int width __maybe_unused) +{ + const char *name; + + if (!he->simd_flags.arch) + return repsep_snprintf(bf, size, ""); + + name = hist_entry__get_simd_name(&he->simd_flags); + + if (he->simd_flags.pred & SIMD_OP_FLAGS_PRED_EMPTY) + return repsep_snprintf(bf, size, "[e] %s", name); + else if (he->simd_flags.pred & SIMD_OP_FLAGS_PRED_PARTIAL) + return repsep_snprintf(bf, size, "[p] %s", name); + + return repsep_snprintf(bf, size, "[.] %s", name); +} + +struct sort_entry sort_simd = { + .se_header = "Simd ", + .se_cmp = sort__simd_cmp, + .se_snprintf = hist_entry__simd_snprintf, + .se_width_idx = HISTC_SIMD, +}; + /* --sort comm */ /* @@ -2042,6 +2088,7 @@ static struct sort_dimension common_sort_dimensions[] = { DIM(SORT_LOCAL_PIPELINE_STAGE_CYC, "local_p_stage_cyc", sort_local_p_stage_cyc), DIM(SORT_GLOBAL_PIPELINE_STAGE_CYC, "p_stage_cyc", sort_global_p_stage_cyc), DIM(SORT_ADDR, "addr", sort_addr), + DIM(SORT_SIMD, "simd", sort_simd) }; #undef DIM diff --git a/tools/perf/util/sort.h b/tools/perf/util/sort.h index 04ff8b61a2a7..8e69a2a53dc1 100644 --- a/tools/perf/util/sort.h +++ b/tools/perf/util/sort.h @@ -110,6 +110,7 @@ struct hist_entry { u64 p_stage_cyc; u8 cpumode; u8 depth; + struct simd_flags simd_flags; /* We are added by hists__add_dummy_entry. */ bool dummy; @@ -237,6 +238,7 @@ enum sort_type { SORT_LOCAL_PIPELINE_STAGE_CYC, SORT_GLOBAL_PIPELINE_STAGE_CYC, SORT_ADDR, + SORT_SIMD, /* branch stack specific sort keys */ __SORT_BRANCH_STACK,