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[66.187.233.206]) by smtp.gmail.com with ESMTPSA id b22-20020ac87fd6000000b003a6a4744432sm2391060qtk.87.2022.12.14.13.10.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Dec 2022 13:10:49 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node Date: Wed, 14 Dec 2022 16:09:06 -0500 Message-Id: <20221214210908.1788284-1-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Content-type: text/plain X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752225747642940165?= X-GMAIL-MSGID: =?utf-8?q?1752225747642940165?= Add the rtc block on pm8450a first pmic to enable the rtc for sa8540p-ride. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm8450a.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/pm8450a.dtsi index 34fc72896761..c9b8da43b237 100644 --- a/arch/arm64/boot/dts/qcom/pm8450a.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8450a.dtsi @@ -13,6 +13,14 @@ pm8450a: pmic@0 { #address-cells = <1>; #size-cells = <0>; + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + wakeup-source; + }; + pm8450a_gpios: gpio@c000 { compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; From patchwork Wed Dec 14 21:09:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 33375 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp469950wrn; Wed, 14 Dec 2022 13:13:13 -0800 (PST) X-Google-Smtp-Source: AA0mqf4+lOy8mr88l8VOAH0RdNlfPDfr5Iq47wc4QGgvCCDPPmtkdXf+h8o3tkmLhP4yx6DZwTsA X-Received: by 2002:a17:907:7dab:b0:7b5:ff35:6729 with SMTP id oz43-20020a1709077dab00b007b5ff356729mr8228779ejc.69.1671052392841; Wed, 14 Dec 2022 13:13:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671052392; cv=none; d=google.com; s=arc-20160816; b=IN7qYe+xgaMjpE33EuUQzAlYqtJrSdxDjG8ekbkefwWbY5uOKYkbpHC0ZPM+cvSQom N+LiK3aKuwSiC1U1jJ3UYU7kP1iS+kGUm+I9sb+lsCghPUGQnj+oeORetAWole8y/VqA 35GBfOQQHiRh4/fjkTPfSit4hbOGmQeYIqGFwo7rI9NzKU7h5yW9FnaOqkSRdH+v9rFH M2jPVLoAXFdWL8vcVuSUH6z3U88esbflsCdYWXV/8YaSV6+6SSC5TQdS6k+nRLJdSacc +L4Vd37dITmqPl2wGbKqvwusZvulyBYQSz2cZtwbMPudCY0JID1sMU1sKoTroi6woZEc sg5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LmjUSyg67D39D4GXwHdsjU8ybX4fVmhyxG/436wX9C0=; b=CpqlvPKf3nLUQdJSz/3TUwvYtELm4RDFFses/nXCYMloHN6GNlzeXIiW3PYKf1Y5A/ 7VwWtNHGkO/9Ba+T4iUQJkh4xMFmpi3LCaAI0KHxSrBq7rgfn3Eq3GjhtNNt/xWAMZ5n SkOcLBYEdschQVxHBAe2xiZiIwfHouQkMLUjcbrKrWCehHUtpm1QDBMEytT2Bd9nLPph ZM1/qfbIXuKqV5vUIDffTD2rxPk8KcJeQ2GVn6Av7FbS451hAGs5K+i2jhiUol/CFWum P9aYYRGg1qtLLsPoHqmXpJpS44dQA2zwY4N20gPwm4om9zl8wbJFImBgTXw1/3mXUKig 3tVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=ikRO7o2i; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from out1.vger.email (out1.vger.email. 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[66.187.233.206]) by smtp.gmail.com with ESMTPSA id i15-20020a05620a248f00b006fbae4a5f59sm4542505qkn.41.2022.12.14.13.10.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Dec 2022 13:10:52 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi Date: Wed, 14 Dec 2022 16:09:07 -0500 Message-Id: <20221214210908.1788284-2-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221214210908.1788284-1-echanude@redhat.com> References: <20221214210908.1788284-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752225433672501671?= X-GMAIL-MSGID: =?utf-8?q?1752225433672501671?= Include the dtsi to use a single pmic descriptions. Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently. Signed-off-by: Eric Chanudet --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +----------------------- 1 file changed, 1 insertion(+), 78 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index 84cb6f3eeb56..889259df3287 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -11,6 +11,7 @@ #include #include "sa8540p.dtsi" +#include "pm8450a.dtsi" / { model = "Qualcomm SA8295P ADP"; @@ -260,84 +261,6 @@ &remoteproc_nsp1 { status = "okay"; }; -&spmi_bus { - pm8450a: pmic@0 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@6000 { - compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; - reg-names = "rtc", "alarm"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; - wakeup-source; - }; - - pm8450a_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450a_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450c: pmic@4 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x4 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450c_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450c_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450e: pmic@8 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x8 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450e_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450e_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450g: pmic@c { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0xc SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450g_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450g_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; -}; - &ufs_mem_hc { reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; From patchwork Wed Dec 14 21:09:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 33377 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp472355wrn; Wed, 14 Dec 2022 13:18:12 -0800 (PST) X-Google-Smtp-Source: AA0mqf63k1DUM0UlJv/+H+8r3Qb6yBv8KnNSmAkbEKQMoxNvY8uGXkq3cUHKTAqUUqXBGH0MhDpy X-Received: by 2002:a17:902:8c8a:b0:188:f0c6:b1b9 with SMTP id t10-20020a1709028c8a00b00188f0c6b1b9mr25367222plo.40.1671052692256; Wed, 14 Dec 2022 13:18:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671052692; cv=none; d=google.com; s=arc-20160816; b=bEuZCOax4HfLH5MoAbvdT4J+JmZbf/Ifnt1j23XMNO8dKyDjKm3Z+E1hc+JDufo6Xl H/KqQTsu5KPTwc+GezyJhpZ8le+ho7QeYefggjCgYZd6oLfu+0seZ2yYhyi/84p7dqia vryHXQqUHjRdAq7r2zvFQqYHsNTE/IKcgWC6/clfuRxQcD5BZD3bsWgQQ7I8KRqAcCLf OcVrWqJLd8y6FXHNjVQAkRgF1VexWSHBMcKXdi5GsQhSjT2tKKhx1hAqi/fSl7xbCdE4 vjAUSok5GpgbRFETueLbt7I/ngkgmq+UChyyLRY7pQD+6sv/2hBcAT3A90gUfbSI69kl GCsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=82WGFX/rYKzALk9v7CgNyszozeS1XVTfYVeFFpIG25o=; b=tX6BtQDiK/VP8vwDttIxCVmxbG2QsCvNTwrOALsr0v3s4A7d/Xi9HOOfSP5vWBUj6o E5ENdepnJTLZz3l4rr1upN/dk9b4UavIYdP5S43lYatwC6L8ET2hVKlku38EV2Tnpmd1 LG35PYNawQxvAYxfUsNff/xAhpY1uBXOXpdpOTopBHjIKsT4BKqguJD33QN2zjZf52S6 ni/EoZg0muaFuk6w6msrnrfqZ0HsBUeuDF3H7GEctNYEPaK32iBUODi33CbXx9Tp8nva fan51wgtyOWrRPhOEPcaRCNV3ewhBZAa8c9pyiqMawBOZA75DpvDITYacIDhnKcLzTQL Y32w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=ixO4dSZ0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from out1.vger.email (out1.vger.email. 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[66.187.233.206]) by smtp.gmail.com with ESMTPSA id v5-20020a05620a440500b006f474e6a715sm10782833qkp.131.2022.12.14.13.10.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Dec 2022 13:10:54 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v2 3/3] arm64: dts: qcom: pm8941-rtc add alarm register Date: Wed, 14 Dec 2022 16:09:08 -0500 Message-Id: <20221214210908.1788284-3-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221214210908.1788284-1-echanude@redhat.com> References: <20221214210908.1788284-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752225748021548403?= X-GMAIL-MSGID: =?utf-8?q?1752225748021548403?= A few descriptions including a qcom,pm8941-rtc describe two reg-names for the "rtc" and "alarm" register banks, but only one offset. For consistency with reg-names, add the "alarm" register offset. No functional change is expected from this. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm8150.dtsi | 2 +- arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 ++- arch/arm64/boot/dts/qcom/pm8950.dtsi | 2 +- arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 2 +- arch/arm64/boot/dts/qcom/pmp8074.dtsi | 2 +- arch/arm64/boot/dts/qcom/pms405.dtsi | 2 +- 6 files changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi index 574fa95a2871..db90c55fa2cf 100644 --- a/arch/arm64/boot/dts/qcom/pm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi @@ -121,7 +121,7 @@ pm8150_adc_tm: adc-tm@3500 { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi index 08f9ca006e72..e2a6b66d8847 100644 --- a/arch/arm64/boot/dts/qcom/pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi @@ -93,7 +93,8 @@ adc-chan@f { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; }; diff --git a/arch/arm64/boot/dts/qcom/pm8950.dtsi b/arch/arm64/boot/dts/qcom/pm8950.dtsi index 07c3896bd36f..d7df4ad60509 100644 --- a/arch/arm64/boot/dts/qcom/pm8950.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8950.dtsi @@ -126,7 +126,7 @@ xo-therm-buf@3c { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi index 20c5d60c8c2c..ee1e428d3a6e 100644 --- a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi +++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi @@ -108,7 +108,7 @@ pmm8155au_1_adc_tm: adc-tm@3500 { pmm8155au_1_rtc: rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; diff --git a/arch/arm64/boot/dts/qcom/pmp8074.dtsi b/arch/arm64/boot/dts/qcom/pmp8074.dtsi index ceb2e6358b3d..580684411d74 100644 --- a/arch/arm64/boot/dts/qcom/pmp8074.dtsi +++ b/arch/arm64/boot/dts/qcom/pmp8074.dtsi @@ -74,7 +74,7 @@ vph-pwr@131 { pmp8074_rtc: rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; allow-set-time; diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi index ffe9e33808d0..22edb47c6a84 100644 --- a/arch/arm64/boot/dts/qcom/pms405.dtsi +++ b/arch/arm64/boot/dts/qcom/pms405.dtsi @@ -125,7 +125,7 @@ xo_therm: xo_temp@76 { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; };