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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a5-20020a17090a70c500b0021812e71e68si12123021pjm.84.2022.12.13.05.09.41; Tue, 13 Dec 2022 05:09:56 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@arinc9.com header.s=zmail header.b=WWYWRR+r; arc=pass (i=1 spf=pass spfdomain=arinc9.com dkim=pass dkdomain=arinc9.com dmarc=pass fromdomain=arinc9.com>); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235511AbiLMNFY (ORCPT + 99 others); Tue, 13 Dec 2022 08:05:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235436AbiLMNFL (ORCPT ); Tue, 13 Dec 2022 08:05:11 -0500 Received: from sender4-op-o14.zoho.com (sender4-op-o14.zoho.com [136.143.188.14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A42321D333; Tue, 13 Dec 2022 05:05:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670936696; cv=none; d=zohomail.com; s=zohoarc; b=FEiNBaJPBdps+DtlqPwF0XNplhSfEZwFV9yC/duaeIdkKqYAmBfQpud/nY5NJ51g7BYp1CpVZaXOAusEBfs06ARr1N2mhO/wM68AVHhzcdoxt4CST6/Cf0W2BTT0ZjrQRjCO8h2xYR9Hbte34IwoKa/p38Xu9mh7nciC8LvM4aY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670936696; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=lronyd5K/k4UGxR/pC4FxF/UARy4HFBUaYEINfPH6Q4=; b=b5NeSytcJRgGHNwJ7wQVpJJxbmDhNscPslcd+VQymGYhB7FvlPZHYdophc6APT/WxmaFMgJHWOUTfdNpeWOlfmqN2KtuI6IJkg3JIaqf6Cry9prUJxNoSKNDpGEAQrKRh83jhMRp9LA3l9iiLiQ7f2Sr3UsQiTMm8TP8VwsuOkk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=arinc9.com; spf=pass smtp.mailfrom=arinc.unal@arinc9.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1670936696; s=zmail; d=arinc9.com; i=arinc.unal@arinc9.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Reply-To; bh=lronyd5K/k4UGxR/pC4FxF/UARy4HFBUaYEINfPH6Q4=; b=WWYWRR+rdyHZQ6mZmh/99Il8lH9wgzTJQ6Up+9yEb50y/IRzgm2vjydIVpF0SYT/ b291Ni1TolOLxOM0SLQiWm4iQ7vhbWI+BCA7Vki23fj/Bul1Cg25Ud/6q1ILTiLfthk Ge5nlyVnTozgz/bfj/ls+R/nDU5dWXCCtZUCZE5w= Received: from arinc9-PC.lan (37.120.152.236 [37.120.152.236]) by mx.zohomail.com with SMTPS id 1670936692535489.98462161495627; Tue, 13 Dec 2022 05:04:52 -0800 (PST) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sergio Paracuellos , Luiz Angelo Daros de Luca Cc: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org Subject: [PATCH 1/6] pinctrl: ralink: rename variables which point out the pin group Date: Tue, 13 Dec 2022 16:04:25 +0300 Message-Id: <20221213130430.172876-2-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221213130430.172876-1-arinc.unal@arinc9.com> References: <20221213130430.172876-1-arinc.unal@arinc9.com> MIME-Version: 1.0 X-ZohoMailClient: External X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752104432862314966?= X-GMAIL-MSGID: =?utf-8?q?1752104432862314966?= These variables define a list of functions which can be muxed to the pin group which the name of the pin group was originally intended to be pointed out on the name of the said variables. Therefore, rename "func" to "grp" across all subdrivers where this applies. Fixes: 18653d4bd8ab ("pinctrl: ralink: rename variable names for functions on MT7620 and MT7621") Signed-off-by: Arınç ÜNAL --- drivers/pinctrl/ralink/pinctrl-mt7620.c | 164 ++++++++++++------------ drivers/pinctrl/ralink/pinctrl-mt7621.c | 48 +++---- drivers/pinctrl/ralink/pinctrl-rt2880.c | 28 ++-- drivers/pinctrl/ralink/pinctrl-rt305x.c | 82 ++++++------ drivers/pinctrl/ralink/pinctrl-rt3883.c | 44 +++---- 5 files changed, 183 insertions(+), 183 deletions(-) diff --git a/drivers/pinctrl/ralink/pinctrl-mt7620.c b/drivers/pinctrl/ralink/pinctrl-mt7620.c index 22ff16eff02f..4e8d26bb3430 100644 --- a/drivers/pinctrl/ralink/pinctrl-mt7620.c +++ b/drivers/pinctrl/ralink/pinctrl-mt7620.c @@ -54,20 +54,20 @@ #define MT7620_GPIO_MODE_EPHY 15 #define MT7620_GPIO_MODE_PA 20 -static struct ralink_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) }; -static struct ralink_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) }; -static struct ralink_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) }; -static struct ralink_pmx_func mdio_func[] = { +static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) }; +static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) }; +static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) }; +static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", MT7620_GPIO_MODE_MDIO, 22, 2), FUNC("refclk", MT7620_GPIO_MODE_MDIO_REFCLK, 22, 2), }; -static struct ralink_pmx_func rgmii1_func[] = { FUNC("rgmii1", 0, 24, 12) }; -static struct ralink_pmx_func refclk_func[] = { FUNC("spi refclk", 0, 37, 3) }; -static struct ralink_pmx_func ephy_func[] = { FUNC("ephy", 0, 40, 5) }; -static struct ralink_pmx_func rgmii2_func[] = { FUNC("rgmii2", 0, 60, 12) }; -static struct ralink_pmx_func wled_func[] = { FUNC("wled", 0, 72, 1) }; -static struct ralink_pmx_func pa_func[] = { FUNC("pa", 0, 18, 4) }; -static struct ralink_pmx_func uartf_func[] = { +static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 24, 12) }; +static struct ralink_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) }; +static struct ralink_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) }; +static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 60, 12) }; +static struct ralink_pmx_func wled_grp[] = { FUNC("wled", 0, 72, 1) }; +static struct ralink_pmx_func pa_grp[] = { FUNC("pa", 0, 18, 4) }; +static struct ralink_pmx_func uartf_grp[] = { FUNC("uartf", MT7620_GPIO_MODE_UARTF, 7, 8), FUNC("pcm uartf", MT7620_GPIO_MODE_PCM_UARTF, 7, 8), FUNC("pcm i2s", MT7620_GPIO_MODE_PCM_I2S, 7, 8), @@ -76,202 +76,202 @@ static struct ralink_pmx_func uartf_func[] = { FUNC("gpio uartf", MT7620_GPIO_MODE_GPIO_UARTF, 7, 4), FUNC("gpio i2s", MT7620_GPIO_MODE_GPIO_I2S, 7, 4), }; -static struct ralink_pmx_func wdt_func[] = { +static struct ralink_pmx_func wdt_grp[] = { FUNC("wdt rst", 0, 17, 1), FUNC("wdt refclk", 0, 17, 1), }; -static struct ralink_pmx_func pcie_rst_func[] = { +static struct ralink_pmx_func pcie_rst_grp[] = { FUNC("pcie rst", MT7620_GPIO_MODE_PCIE_RST, 36, 1), FUNC("pcie refclk", MT7620_GPIO_MODE_PCIE_REF, 36, 1) }; -static struct ralink_pmx_func nd_sd_func[] = { +static struct ralink_pmx_func nd_sd_grp[] = { FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15), FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13) }; static struct ralink_pmx_group mt7620a_pinmux_data[] = { - GRP("i2c", i2c_func, 1, MT7620_GPIO_MODE_I2C), - GRP("uartf", uartf_func, MT7620_GPIO_MODE_UART0_MASK, + GRP("i2c", i2c_grp, 1, MT7620_GPIO_MODE_I2C), + GRP("uartf", uartf_grp, MT7620_GPIO_MODE_UART0_MASK, MT7620_GPIO_MODE_UART0_SHIFT), - GRP("spi", spi_func, 1, MT7620_GPIO_MODE_SPI), - GRP("uartlite", uartlite_func, 1, MT7620_GPIO_MODE_UART1), - GRP_G("wdt", wdt_func, MT7620_GPIO_MODE_WDT_MASK, + GRP("spi", spi_grp, 1, MT7620_GPIO_MODE_SPI), + GRP("uartlite", uartlite_grp, 1, MT7620_GPIO_MODE_UART1), + GRP_G("wdt", wdt_grp, MT7620_GPIO_MODE_WDT_MASK, MT7620_GPIO_MODE_WDT_GPIO, MT7620_GPIO_MODE_WDT_SHIFT), - GRP_G("mdio", mdio_func, MT7620_GPIO_MODE_MDIO_MASK, + GRP_G("mdio", mdio_grp, MT7620_GPIO_MODE_MDIO_MASK, MT7620_GPIO_MODE_MDIO_GPIO, MT7620_GPIO_MODE_MDIO_SHIFT), - GRP("rgmii1", rgmii1_func, 1, MT7620_GPIO_MODE_RGMII1), - GRP("spi refclk", refclk_func, 1, MT7620_GPIO_MODE_SPI_REF_CLK), - GRP_G("pcie", pcie_rst_func, MT7620_GPIO_MODE_PCIE_MASK, + GRP("rgmii1", rgmii1_grp, 1, MT7620_GPIO_MODE_RGMII1), + GRP("spi refclk", refclk_grp, 1, MT7620_GPIO_MODE_SPI_REF_CLK), + GRP_G("pcie", pcie_rst_grp, MT7620_GPIO_MODE_PCIE_MASK, MT7620_GPIO_MODE_PCIE_GPIO, MT7620_GPIO_MODE_PCIE_SHIFT), - GRP_G("nd_sd", nd_sd_func, MT7620_GPIO_MODE_ND_SD_MASK, + GRP_G("nd_sd", nd_sd_grp, MT7620_GPIO_MODE_ND_SD_MASK, MT7620_GPIO_MODE_ND_SD_GPIO, MT7620_GPIO_MODE_ND_SD_SHIFT), - GRP("rgmii2", rgmii2_func, 1, MT7620_GPIO_MODE_RGMII2), - GRP("wled", wled_func, 1, MT7620_GPIO_MODE_WLED), - GRP("ephy", ephy_func, 1, MT7620_GPIO_MODE_EPHY), - GRP("pa", pa_func, 1, MT7620_GPIO_MODE_PA), + GRP("rgmii2", rgmii2_grp, 1, MT7620_GPIO_MODE_RGMII2), + GRP("wled", wled_grp, 1, MT7620_GPIO_MODE_WLED), + GRP("ephy", ephy_grp, 1, MT7620_GPIO_MODE_EPHY), + GRP("pa", pa_grp, 1, MT7620_GPIO_MODE_PA), { 0 } }; -static struct ralink_pmx_func pwm1_func_mt76x8[] = { +static struct ralink_pmx_func pwm1_grp_mt76x8[] = { FUNC("sdxc d6", 3, 19, 1), FUNC("utif", 2, 19, 1), FUNC("gpio", 1, 19, 1), FUNC("pwm1", 0, 19, 1), }; -static struct ralink_pmx_func pwm0_func_mt76x8[] = { +static struct ralink_pmx_func pwm0_grp_mt76x8[] = { FUNC("sdxc d7", 3, 18, 1), FUNC("utif", 2, 18, 1), FUNC("gpio", 1, 18, 1), FUNC("pwm0", 0, 18, 1), }; -static struct ralink_pmx_func uart2_func_mt76x8[] = { +static struct ralink_pmx_func uart2_grp_mt76x8[] = { FUNC("sdxc d5 d4", 3, 20, 2), FUNC("pwm", 2, 20, 2), FUNC("gpio", 1, 20, 2), FUNC("uart2", 0, 20, 2), }; -static struct ralink_pmx_func uart1_func_mt76x8[] = { +static struct ralink_pmx_func uart1_grp_mt76x8[] = { FUNC("sw_r", 3, 45, 2), FUNC("pwm", 2, 45, 2), FUNC("gpio", 1, 45, 2), FUNC("uart1", 0, 45, 2), }; -static struct ralink_pmx_func i2c_func_mt76x8[] = { +static struct ralink_pmx_func i2c_grp_mt76x8[] = { FUNC("-", 3, 4, 2), FUNC("debug", 2, 4, 2), FUNC("gpio", 1, 4, 2), FUNC("i2c", 0, 4, 2), }; -static struct ralink_pmx_func refclk_func_mt76x8[] = { FUNC("refclk", 0, 37, 1) }; -static struct ralink_pmx_func perst_func_mt76x8[] = { FUNC("perst", 0, 36, 1) }; -static struct ralink_pmx_func wdt_func_mt76x8[] = { FUNC("wdt", 0, 38, 1) }; -static struct ralink_pmx_func spi_func_mt76x8[] = { FUNC("spi", 0, 7, 4) }; +static struct ralink_pmx_func refclk_grp_mt76x8[] = { FUNC("refclk", 0, 37, 1) }; +static struct ralink_pmx_func perst_grp_mt76x8[] = { FUNC("perst", 0, 36, 1) }; +static struct ralink_pmx_func wdt_grp_mt76x8[] = { FUNC("wdt", 0, 38, 1) }; +static struct ralink_pmx_func spi_grp_mt76x8[] = { FUNC("spi", 0, 7, 4) }; -static struct ralink_pmx_func sd_mode_func_mt76x8[] = { +static struct ralink_pmx_func sd_mode_grp_mt76x8[] = { FUNC("jtag", 3, 22, 8), FUNC("utif", 2, 22, 8), FUNC("gpio", 1, 22, 8), FUNC("sdxc", 0, 22, 8), }; -static struct ralink_pmx_func uart0_func_mt76x8[] = { +static struct ralink_pmx_func uart0_grp_mt76x8[] = { FUNC("-", 3, 12, 2), FUNC("-", 2, 12, 2), FUNC("gpio", 1, 12, 2), FUNC("uart0", 0, 12, 2), }; -static struct ralink_pmx_func i2s_func_mt76x8[] = { +static struct ralink_pmx_func i2s_grp_mt76x8[] = { FUNC("antenna", 3, 0, 4), FUNC("pcm", 2, 0, 4), FUNC("gpio", 1, 0, 4), FUNC("i2s", 0, 0, 4), }; -static struct ralink_pmx_func spi_cs1_func_mt76x8[] = { +static struct ralink_pmx_func spi_cs1_grp_mt76x8[] = { FUNC("-", 3, 6, 1), FUNC("refclk", 2, 6, 1), FUNC("gpio", 1, 6, 1), FUNC("spi cs1", 0, 6, 1), }; -static struct ralink_pmx_func spis_func_mt76x8[] = { +static struct ralink_pmx_func spis_grp_mt76x8[] = { FUNC("pwm_uart2", 3, 14, 4), FUNC("utif", 2, 14, 4), FUNC("gpio", 1, 14, 4), FUNC("spis", 0, 14, 4), }; -static struct ralink_pmx_func gpio_func_mt76x8[] = { +static struct ralink_pmx_func gpio_grp_mt76x8[] = { FUNC("pcie", 3, 11, 1), FUNC("refclk", 2, 11, 1), FUNC("gpio", 1, 11, 1), FUNC("gpio", 0, 11, 1), }; -static struct ralink_pmx_func p4led_kn_func_mt76x8[] = { +static struct ralink_pmx_func p4led_kn_grp_mt76x8[] = { FUNC("jtag", 3, 30, 1), FUNC("utif", 2, 30, 1), FUNC("gpio", 1, 30, 1), FUNC("p4led_kn", 0, 30, 1), }; -static struct ralink_pmx_func p3led_kn_func_mt76x8[] = { +static struct ralink_pmx_func p3led_kn_grp_mt76x8[] = { FUNC("jtag", 3, 31, 1), FUNC("utif", 2, 31, 1), FUNC("gpio", 1, 31, 1), FUNC("p3led_kn", 0, 31, 1), }; -static struct ralink_pmx_func p2led_kn_func_mt76x8[] = { +static struct ralink_pmx_func p2led_kn_grp_mt76x8[] = { FUNC("jtag", 3, 32, 1), FUNC("utif", 2, 32, 1), FUNC("gpio", 1, 32, 1), FUNC("p2led_kn", 0, 32, 1), }; -static struct ralink_pmx_func p1led_kn_func_mt76x8[] = { +static struct ralink_pmx_func p1led_kn_grp_mt76x8[] = { FUNC("jtag", 3, 33, 1), FUNC("utif", 2, 33, 1), FUNC("gpio", 1, 33, 1), FUNC("p1led_kn", 0, 33, 1), }; -static struct ralink_pmx_func p0led_kn_func_mt76x8[] = { +static struct ralink_pmx_func p0led_kn_grp_mt76x8[] = { FUNC("jtag", 3, 34, 1), FUNC("rsvd", 2, 34, 1), FUNC("gpio", 1, 34, 1), FUNC("p0led_kn", 0, 34, 1), }; -static struct ralink_pmx_func wled_kn_func_mt76x8[] = { +static struct ralink_pmx_func wled_kn_grp_mt76x8[] = { FUNC("rsvd", 3, 35, 1), FUNC("rsvd", 2, 35, 1), FUNC("gpio", 1, 35, 1), FUNC("wled_kn", 0, 35, 1), }; -static struct ralink_pmx_func p4led_an_func_mt76x8[] = { +static struct ralink_pmx_func p4led_an_grp_mt76x8[] = { FUNC("jtag", 3, 39, 1), FUNC("utif", 2, 39, 1), FUNC("gpio", 1, 39, 1), FUNC("p4led_an", 0, 39, 1), }; -static struct ralink_pmx_func p3led_an_func_mt76x8[] = { +static struct ralink_pmx_func p3led_an_grp_mt76x8[] = { FUNC("jtag", 3, 40, 1), FUNC("utif", 2, 40, 1), FUNC("gpio", 1, 40, 1), FUNC("p3led_an", 0, 40, 1), }; -static struct ralink_pmx_func p2led_an_func_mt76x8[] = { +static struct ralink_pmx_func p2led_an_grp_mt76x8[] = { FUNC("jtag", 3, 41, 1), FUNC("utif", 2, 41, 1), FUNC("gpio", 1, 41, 1), FUNC("p2led_an", 0, 41, 1), }; -static struct ralink_pmx_func p1led_an_func_mt76x8[] = { +static struct ralink_pmx_func p1led_an_grp_mt76x8[] = { FUNC("jtag", 3, 42, 1), FUNC("utif", 2, 42, 1), FUNC("gpio", 1, 42, 1), FUNC("p1led_an", 0, 42, 1), }; -static struct ralink_pmx_func p0led_an_func_mt76x8[] = { +static struct ralink_pmx_func p0led_an_grp_mt76x8[] = { FUNC("jtag", 3, 43, 1), FUNC("rsvd", 2, 43, 1), FUNC("gpio", 1, 43, 1), FUNC("p0led_an", 0, 43, 1), }; -static struct ralink_pmx_func wled_an_func_mt76x8[] = { +static struct ralink_pmx_func wled_an_grp_mt76x8[] = { FUNC("rsvd", 3, 44, 1), FUNC("rsvd", 2, 44, 1), FUNC("gpio", 1, 44, 1), @@ -309,55 +309,55 @@ static struct ralink_pmx_func wled_an_func_mt76x8[] = { #define MT76X8_GPIO_MODE_GPIO 0 static struct ralink_pmx_group mt76x8_pinmux_data[] = { - GRP_G("pwm1", pwm1_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("pwm1", pwm1_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_PWM1), - GRP_G("pwm0", pwm0_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("pwm0", pwm0_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_PWM0), - GRP_G("uart2", uart2_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("uart2", uart2_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_UART2), - GRP_G("uart1", uart1_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("uart1", uart1_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_UART1), - GRP_G("i2c", i2c_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("i2c", i2c_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_I2C), - GRP("refclk", refclk_func_mt76x8, 1, MT76X8_GPIO_MODE_REFCLK), - GRP("perst", perst_func_mt76x8, 1, MT76X8_GPIO_MODE_PERST), - GRP("wdt", wdt_func_mt76x8, 1, MT76X8_GPIO_MODE_WDT), - GRP("spi", spi_func_mt76x8, 1, MT76X8_GPIO_MODE_SPI), - GRP_G("sdmode", sd_mode_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP("refclk", refclk_grp_mt76x8, 1, MT76X8_GPIO_MODE_REFCLK), + GRP("perst", perst_grp_mt76x8, 1, MT76X8_GPIO_MODE_PERST), + GRP("wdt", wdt_grp_mt76x8, 1, MT76X8_GPIO_MODE_WDT), + GRP("spi", spi_grp_mt76x8, 1, MT76X8_GPIO_MODE_SPI), + GRP_G("sdmode", sd_mode_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_SDMODE), - GRP_G("uart0", uart0_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("uart0", uart0_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_UART0), - GRP_G("i2s", i2s_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("i2s", i2s_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_I2S), - GRP_G("spi cs1", spi_cs1_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("spi cs1", spi_cs1_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_CS1), - GRP_G("spis", spis_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("spis", spis_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_SPIS), - GRP_G("gpio", gpio_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("gpio", gpio_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_GPIO), - GRP_G("wled_an", wled_an_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("wled_an", wled_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_WLED_AN), - GRP_G("p0led_an", p0led_an_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p0led_an", p0led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P0LED_AN), - GRP_G("p1led_an", p1led_an_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p1led_an", p1led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P1LED_AN), - GRP_G("p2led_an", p2led_an_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p2led_an", p2led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P2LED_AN), - GRP_G("p3led_an", p3led_an_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p3led_an", p3led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P3LED_AN), - GRP_G("p4led_an", p4led_an_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p4led_an", p4led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P4LED_AN), - GRP_G("wled_kn", wled_kn_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("wled_kn", wled_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_WLED_KN), - GRP_G("p0led_kn", p0led_kn_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p0led_kn", p0led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P0LED_KN), - GRP_G("p1led_kn", p1led_kn_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p1led_kn", p1led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P1LED_KN), - GRP_G("p2led_kn", p2led_kn_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p2led_kn", p2led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P2LED_KN), - GRP_G("p3led_kn", p3led_kn_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p3led_kn", p3led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P3LED_KN), - GRP_G("p4led_kn", p4led_kn_func_mt76x8, MT76X8_GPIO_MODE_MASK, + GRP_G("p4led_kn", p4led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK, 1, MT76X8_GPIO_MODE_P4LED_KN), { 0 } }; diff --git a/drivers/pinctrl/ralink/pinctrl-mt7621.c b/drivers/pinctrl/ralink/pinctrl-mt7621.c index b47968f40e0c..eddc0ba6d468 100644 --- a/drivers/pinctrl/ralink/pinctrl-mt7621.c +++ b/drivers/pinctrl/ralink/pinctrl-mt7621.c @@ -34,59 +34,59 @@ #define MT7621_GPIO_MODE_SDHCI_SHIFT 18 #define MT7621_GPIO_MODE_SDHCI_GPIO 1 -static struct ralink_pmx_func uart1_func[] = { FUNC("uart1", 0, 1, 2) }; -static struct ralink_pmx_func i2c_func[] = { FUNC("i2c", 0, 3, 2) }; -static struct ralink_pmx_func uart3_func[] = { +static struct ralink_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) }; +static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) }; +static struct ralink_pmx_func uart3_grp[] = { FUNC("uart3", 0, 5, 4), FUNC("i2s", 2, 5, 4), FUNC("spdif3", 3, 5, 4), }; -static struct ralink_pmx_func uart2_func[] = { +static struct ralink_pmx_func uart2_grp[] = { FUNC("uart2", 0, 9, 4), FUNC("pcm", 2, 9, 4), FUNC("spdif2", 3, 9, 4), }; -static struct ralink_pmx_func jtag_func[] = { FUNC("jtag", 0, 13, 5) }; -static struct ralink_pmx_func wdt_func[] = { +static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) }; +static struct ralink_pmx_func wdt_grp[] = { FUNC("wdt rst", 0, 18, 1), FUNC("wdt refclk", 2, 18, 1), }; -static struct ralink_pmx_func pcie_rst_func[] = { +static struct ralink_pmx_func pcie_rst_grp[] = { FUNC("pcie rst", MT7621_GPIO_MODE_PCIE_RST, 19, 1), FUNC("pcie refclk", MT7621_GPIO_MODE_PCIE_REF, 19, 1) }; -static struct ralink_pmx_func mdio_func[] = { FUNC("mdio", 0, 20, 2) }; -static struct ralink_pmx_func rgmii2_func[] = { FUNC("rgmii2", 0, 22, 12) }; -static struct ralink_pmx_func spi_func[] = { +static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) }; +static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) }; +static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 34, 7), FUNC("nand1", 2, 34, 7), }; -static struct ralink_pmx_func sdhci_func[] = { +static struct ralink_pmx_func sdhci_grp[] = { FUNC("sdhci", 0, 41, 8), FUNC("nand2", 2, 41, 8), }; -static struct ralink_pmx_func rgmii1_func[] = { FUNC("rgmii1", 0, 49, 12) }; +static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) }; static struct ralink_pmx_group mt7621_pinmux_data[] = { - GRP("uart1", uart1_func, 1, MT7621_GPIO_MODE_UART1), - GRP("i2c", i2c_func, 1, MT7621_GPIO_MODE_I2C), - GRP_G("uart3", uart3_func, MT7621_GPIO_MODE_UART3_MASK, + GRP("uart1", uart1_grp, 1, MT7621_GPIO_MODE_UART1), + GRP("i2c", i2c_grp, 1, MT7621_GPIO_MODE_I2C), + GRP_G("uart3", uart3_grp, MT7621_GPIO_MODE_UART3_MASK, MT7621_GPIO_MODE_UART3_GPIO, MT7621_GPIO_MODE_UART3_SHIFT), - GRP_G("uart2", uart2_func, MT7621_GPIO_MODE_UART2_MASK, + GRP_G("uart2", uart2_grp, MT7621_GPIO_MODE_UART2_MASK, MT7621_GPIO_MODE_UART2_GPIO, MT7621_GPIO_MODE_UART2_SHIFT), - GRP("jtag", jtag_func, 1, MT7621_GPIO_MODE_JTAG), - GRP_G("wdt", wdt_func, MT7621_GPIO_MODE_WDT_MASK, + GRP("jtag", jtag_grp, 1, MT7621_GPIO_MODE_JTAG), + GRP_G("wdt", wdt_grp, MT7621_GPIO_MODE_WDT_MASK, MT7621_GPIO_MODE_WDT_GPIO, MT7621_GPIO_MODE_WDT_SHIFT), - GRP_G("pcie", pcie_rst_func, MT7621_GPIO_MODE_PCIE_MASK, + GRP_G("pcie", pcie_rst_grp, MT7621_GPIO_MODE_PCIE_MASK, MT7621_GPIO_MODE_PCIE_GPIO, MT7621_GPIO_MODE_PCIE_SHIFT), - GRP_G("mdio", mdio_func, MT7621_GPIO_MODE_MDIO_MASK, + GRP_G("mdio", mdio_grp, MT7621_GPIO_MODE_MDIO_MASK, MT7621_GPIO_MODE_MDIO_GPIO, MT7621_GPIO_MODE_MDIO_SHIFT), - GRP("rgmii2", rgmii2_func, 1, MT7621_GPIO_MODE_RGMII2), - GRP_G("spi", spi_func, MT7621_GPIO_MODE_SPI_MASK, + GRP("rgmii2", rgmii2_grp, 1, MT7621_GPIO_MODE_RGMII2), + GRP_G("spi", spi_grp, MT7621_GPIO_MODE_SPI_MASK, MT7621_GPIO_MODE_SPI_GPIO, MT7621_GPIO_MODE_SPI_SHIFT), - GRP_G("sdhci", sdhci_func, MT7621_GPIO_MODE_SDHCI_MASK, + GRP_G("sdhci", sdhci_grp, MT7621_GPIO_MODE_SDHCI_MASK, MT7621_GPIO_MODE_SDHCI_GPIO, MT7621_GPIO_MODE_SDHCI_SHIFT), - GRP("rgmii1", rgmii1_func, 1, MT7621_GPIO_MODE_RGMII1), + GRP("rgmii1", rgmii1_grp, 1, MT7621_GPIO_MODE_RGMII1), { 0 } }; diff --git a/drivers/pinctrl/ralink/pinctrl-rt2880.c b/drivers/pinctrl/ralink/pinctrl-rt2880.c index 811e12df1133..3e2f1aaaf095 100644 --- a/drivers/pinctrl/ralink/pinctrl-rt2880.c +++ b/drivers/pinctrl/ralink/pinctrl-rt2880.c @@ -15,22 +15,22 @@ #define RT2880_GPIO_MODE_SDRAM BIT(6) #define RT2880_GPIO_MODE_PCI BIT(7) -static struct ralink_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) }; -static struct ralink_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) }; -static struct ralink_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 7, 8) }; -static struct ralink_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) }; -static struct ralink_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) }; -static struct ralink_pmx_func sdram_func[] = { FUNC("sdram", 0, 24, 16) }; -static struct ralink_pmx_func pci_func[] = { FUNC("pci", 0, 40, 32) }; +static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) }; +static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) }; +static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 7, 8) }; +static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) }; +static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) }; +static struct ralink_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) }; +static struct ralink_pmx_func pci_grp[] = { FUNC("pci", 0, 40, 32) }; static struct ralink_pmx_group rt2880_pinmux_data_act[] = { - GRP("i2c", i2c_func, 1, RT2880_GPIO_MODE_I2C), - GRP("spi", spi_func, 1, RT2880_GPIO_MODE_SPI), - GRP("uartlite", uartlite_func, 1, RT2880_GPIO_MODE_UART0), - GRP("jtag", jtag_func, 1, RT2880_GPIO_MODE_JTAG), - GRP("mdio", mdio_func, 1, RT2880_GPIO_MODE_MDIO), - GRP("sdram", sdram_func, 1, RT2880_GPIO_MODE_SDRAM), - GRP("pci", pci_func, 1, RT2880_GPIO_MODE_PCI), + GRP("i2c", i2c_grp, 1, RT2880_GPIO_MODE_I2C), + GRP("spi", spi_grp, 1, RT2880_GPIO_MODE_SPI), + GRP("uartlite", uartlite_grp, 1, RT2880_GPIO_MODE_UART0), + GRP("jtag", jtag_grp, 1, RT2880_GPIO_MODE_JTAG), + GRP("mdio", mdio_grp, 1, RT2880_GPIO_MODE_MDIO), + GRP("sdram", sdram_grp, 1, RT2880_GPIO_MODE_SDRAM), + GRP("pci", pci_grp, 1, RT2880_GPIO_MODE_PCI), { 0 } }; diff --git a/drivers/pinctrl/ralink/pinctrl-rt305x.c b/drivers/pinctrl/ralink/pinctrl-rt305x.c index 5b204b7ca1f3..bdaee5ce1ee0 100644 --- a/drivers/pinctrl/ralink/pinctrl-rt305x.c +++ b/drivers/pinctrl/ralink/pinctrl-rt305x.c @@ -31,9 +31,9 @@ #define RT3352_GPIO_MODE_LNA 18 #define RT3352_GPIO_MODE_PA 20 -static struct ralink_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) }; -static struct ralink_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) }; -static struct ralink_pmx_func uartf_func[] = { +static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) }; +static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) }; +static struct ralink_pmx_func uartf_grp[] = { FUNC("uartf", RT305X_GPIO_MODE_UARTF, 7, 8), FUNC("pcm uartf", RT305X_GPIO_MODE_PCM_UARTF, 7, 8), FUNC("pcm i2s", RT305X_GPIO_MODE_PCM_I2S, 7, 8), @@ -42,65 +42,65 @@ static struct ralink_pmx_func uartf_func[] = { FUNC("gpio uartf", RT305X_GPIO_MODE_GPIO_UARTF, 7, 4), FUNC("gpio i2s", RT305X_GPIO_MODE_GPIO_I2S, 7, 4), }; -static struct ralink_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) }; -static struct ralink_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) }; -static struct ralink_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) }; -static struct ralink_pmx_func rt5350_led_func[] = { FUNC("led", 0, 22, 5) }; -static struct ralink_pmx_func rt5350_cs1_func[] = { +static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) }; +static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) }; +static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) }; +static struct ralink_pmx_func rt5350_led_grp[] = { FUNC("led", 0, 22, 5) }; +static struct ralink_pmx_func rt5350_cs1_grp[] = { FUNC("spi_cs1", 0, 27, 1), FUNC("wdg_cs1", 1, 27, 1), }; -static struct ralink_pmx_func sdram_func[] = { FUNC("sdram", 0, 24, 16) }; -static struct ralink_pmx_func rt3352_rgmii_func[] = { +static struct ralink_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) }; +static struct ralink_pmx_func rt3352_rgmii_grp[] = { FUNC("rgmii", 0, 24, 12) }; -static struct ralink_pmx_func rgmii_func[] = { FUNC("rgmii", 0, 40, 12) }; -static struct ralink_pmx_func rt3352_lna_func[] = { FUNC("lna", 0, 36, 2) }; -static struct ralink_pmx_func rt3352_pa_func[] = { FUNC("pa", 0, 38, 2) }; -static struct ralink_pmx_func rt3352_led_func[] = { FUNC("led", 0, 40, 5) }; -static struct ralink_pmx_func rt3352_cs1_func[] = { +static struct ralink_pmx_func rgmii_grp[] = { FUNC("rgmii", 0, 40, 12) }; +static struct ralink_pmx_func rt3352_lna_grp[] = { FUNC("lna", 0, 36, 2) }; +static struct ralink_pmx_func rt3352_pa_grp[] = { FUNC("pa", 0, 38, 2) }; +static struct ralink_pmx_func rt3352_led_grp[] = { FUNC("led", 0, 40, 5) }; +static struct ralink_pmx_func rt3352_cs1_grp[] = { FUNC("spi_cs1", 0, 45, 1), FUNC("wdg_cs1", 1, 45, 1), }; static struct ralink_pmx_group rt3050_pinmux_data[] = { - GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C), - GRP("spi", spi_func, 1, RT305X_GPIO_MODE_SPI), - GRP("uartf", uartf_func, RT305X_GPIO_MODE_UART0_MASK, + GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C), + GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI), + GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK, RT305X_GPIO_MODE_UART0_SHIFT), - GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1), - GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG), - GRP("mdio", mdio_func, 1, RT305X_GPIO_MODE_MDIO), - GRP("rgmii", rgmii_func, 1, RT305X_GPIO_MODE_RGMII), - GRP("sdram", sdram_func, 1, RT305X_GPIO_MODE_SDRAM), + GRP("uartlite", uartlite_grp, 1, RT305X_GPIO_MODE_UART1), + GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG), + GRP("mdio", mdio_grp, 1, RT305X_GPIO_MODE_MDIO), + GRP("rgmii", rgmii_grp, 1, RT305X_GPIO_MODE_RGMII), + GRP("sdram", sdram_grp, 1, RT305X_GPIO_MODE_SDRAM), { 0 } }; static struct ralink_pmx_group rt3352_pinmux_data[] = { - GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C), - GRP("spi", spi_func, 1, RT305X_GPIO_MODE_SPI), - GRP("uartf", uartf_func, RT305X_GPIO_MODE_UART0_MASK, + GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C), + GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI), + GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK, RT305X_GPIO_MODE_UART0_SHIFT), - GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1), - GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG), - GRP("mdio", mdio_func, 1, RT305X_GPIO_MODE_MDIO), - GRP("rgmii", rt3352_rgmii_func, 1, RT305X_GPIO_MODE_RGMII), - GRP("lna", rt3352_lna_func, 1, RT3352_GPIO_MODE_LNA), - GRP("pa", rt3352_pa_func, 1, RT3352_GPIO_MODE_PA), - GRP("led", rt3352_led_func, 1, RT5350_GPIO_MODE_PHY_LED), - GRP("spi_cs1", rt3352_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1), + GRP("uartlite", uartlite_grp, 1, RT305X_GPIO_MODE_UART1), + GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG), + GRP("mdio", mdio_grp, 1, RT305X_GPIO_MODE_MDIO), + GRP("rgmii", rt3352_rgmii_grp, 1, RT305X_GPIO_MODE_RGMII), + GRP("lna", rt3352_lna_grp, 1, RT3352_GPIO_MODE_LNA), + GRP("pa", rt3352_pa_grp, 1, RT3352_GPIO_MODE_PA), + GRP("led", rt3352_led_grp, 1, RT5350_GPIO_MODE_PHY_LED), + GRP("spi_cs1", rt3352_cs1_grp, 2, RT5350_GPIO_MODE_SPI_CS1), { 0 } }; static struct ralink_pmx_group rt5350_pinmux_data[] = { - GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C), - GRP("spi", spi_func, 1, RT305X_GPIO_MODE_SPI), - GRP("uartf", uartf_func, RT305X_GPIO_MODE_UART0_MASK, + GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C), + GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI), + GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK, RT305X_GPIO_MODE_UART0_SHIFT), - GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1), - GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG), - GRP("led", rt5350_led_func, 1, RT5350_GPIO_MODE_PHY_LED), - GRP("spi_cs1", rt5350_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1), + GRP("uartlite", uartlite_grp, 1, RT305X_GPIO_MODE_UART1), + GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG), + GRP("led", rt5350_led_grp, 1, RT5350_GPIO_MODE_PHY_LED), + GRP("spi_cs1", rt5350_cs1_grp, 2, RT5350_GPIO_MODE_SPI_CS1), { 0 } }; diff --git a/drivers/pinctrl/ralink/pinctrl-rt3883.c b/drivers/pinctrl/ralink/pinctrl-rt3883.c index 44a66c3d2d2a..392208662355 100644 --- a/drivers/pinctrl/ralink/pinctrl-rt3883.c +++ b/drivers/pinctrl/ralink/pinctrl-rt3883.c @@ -39,9 +39,9 @@ #define RT3883_GPIO_MODE_LNA_G_GPIO 0x3 #define RT3883_GPIO_MODE_LNA_G _RT3883_GPIO_MODE_LNA_G(RT3883_GPIO_MODE_LNA_G_MASK) -static struct ralink_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) }; -static struct ralink_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) }; -static struct ralink_pmx_func uartf_func[] = { +static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) }; +static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) }; +static struct ralink_pmx_func uartf_grp[] = { FUNC("uartf", RT3883_GPIO_MODE_UARTF, 7, 8), FUNC("pcm uartf", RT3883_GPIO_MODE_PCM_UARTF, 7, 8), FUNC("pcm i2s", RT3883_GPIO_MODE_PCM_I2S, 7, 8), @@ -50,34 +50,34 @@ static struct ralink_pmx_func uartf_func[] = { FUNC("gpio uartf", RT3883_GPIO_MODE_GPIO_UARTF, 7, 4), FUNC("gpio i2s", RT3883_GPIO_MODE_GPIO_I2S, 7, 4), }; -static struct ralink_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) }; -static struct ralink_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) }; -static struct ralink_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) }; -static struct ralink_pmx_func lna_a_func[] = { FUNC("lna a", 0, 32, 3) }; -static struct ralink_pmx_func lna_g_func[] = { FUNC("lna g", 0, 35, 3) }; -static struct ralink_pmx_func pci_func[] = { +static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) }; +static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) }; +static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) }; +static struct ralink_pmx_func lna_a_grp[] = { FUNC("lna a", 0, 32, 3) }; +static struct ralink_pmx_func lna_g_grp[] = { FUNC("lna g", 0, 35, 3) }; +static struct ralink_pmx_func pci_grp[] = { FUNC("pci-dev", 0, 40, 32), FUNC("pci-host2", 1, 40, 32), FUNC("pci-host1", 2, 40, 32), FUNC("pci-fnc", 3, 40, 32) }; -static struct ralink_pmx_func ge1_func[] = { FUNC("ge1", 0, 72, 12) }; -static struct ralink_pmx_func ge2_func[] = { FUNC("ge2", 0, 84, 12) }; +static struct ralink_pmx_func ge1_grp[] = { FUNC("ge1", 0, 72, 12) }; +static struct ralink_pmx_func ge2_grp[] = { FUNC("ge2", 0, 84, 12) }; static struct ralink_pmx_group rt3883_pinmux_data[] = { - GRP("i2c", i2c_func, 1, RT3883_GPIO_MODE_I2C), - GRP("spi", spi_func, 1, RT3883_GPIO_MODE_SPI), - GRP("uartf", uartf_func, RT3883_GPIO_MODE_UART0_MASK, + GRP("i2c", i2c_grp, 1, RT3883_GPIO_MODE_I2C), + GRP("spi", spi_grp, 1, RT3883_GPIO_MODE_SPI), + GRP("uartf", uartf_grp, RT3883_GPIO_MODE_UART0_MASK, RT3883_GPIO_MODE_UART0_SHIFT), - GRP("uartlite", uartlite_func, 1, RT3883_GPIO_MODE_UART1), - GRP("jtag", jtag_func, 1, RT3883_GPIO_MODE_JTAG), - GRP("mdio", mdio_func, 1, RT3883_GPIO_MODE_MDIO), - GRP("lna a", lna_a_func, 1, RT3883_GPIO_MODE_LNA_A), - GRP("lna g", lna_g_func, 1, RT3883_GPIO_MODE_LNA_G), - GRP("pci", pci_func, RT3883_GPIO_MODE_PCI_MASK, + GRP("uartlite", uartlite_grp, 1, RT3883_GPIO_MODE_UART1), + GRP("jtag", jtag_grp, 1, RT3883_GPIO_MODE_JTAG), + GRP("mdio", mdio_grp, 1, RT3883_GPIO_MODE_MDIO), + GRP("lna a", lna_a_grp, 1, RT3883_GPIO_MODE_LNA_A), + GRP("lna g", lna_g_grp, 1, RT3883_GPIO_MODE_LNA_G), + GRP("pci", pci_grp, RT3883_GPIO_MODE_PCI_MASK, RT3883_GPIO_MODE_PCI_SHIFT), - GRP("ge1", ge1_func, 1, RT3883_GPIO_MODE_GE1), - GRP("ge2", ge2_func, 1, RT3883_GPIO_MODE_GE2), + GRP("ge1", ge1_grp, 1, RT3883_GPIO_MODE_GE1), + GRP("ge2", ge2_grp, 1, RT3883_GPIO_MODE_GE2), { 0 } }; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id n6-20020a5099c6000000b00458b42ff246si9308929edb.236.2022.12.13.05.07.46; Tue, 13 Dec 2022 05:08:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@arinc9.com header.s=zmail header.b=GKoXPU0n; arc=pass (i=1 spf=pass spfdomain=arinc9.com dkim=pass dkdomain=arinc9.com dmarc=pass fromdomain=arinc9.com>); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235485AbiLMNFQ (ORCPT + 99 others); Tue, 13 Dec 2022 08:05:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235403AbiLMNFJ (ORCPT ); Tue, 13 Dec 2022 08:05:09 -0500 Received: from sender4-op-o14.zoho.com (sender4-op-o14.zoho.com [136.143.188.14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E98921DF19; Tue, 13 Dec 2022 05:05:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670936699; cv=none; d=zohomail.com; s=zohoarc; b=Z6ZDWutsm05abJl/WI0ISJqCqIpODUCMPr+EjriadotFkq+LcWFsdBC6KVZi1l1i2XBwdLY57TdyT5h4TtMro9NhWw0ibvw8mN9SSOblFGFwzSvSwLanUjgPaBMc+ljR113Hg9EZWKLbj/rEyVaOWrAmav/keHCpxxgdM6TSHow= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670936699; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=dR6Q4QOPDzbeauoB+9/LiC7PLplhLZ75NkuuNY2Juzc=; b=JHB6UTgBzkXdDUuguVeXEx++AvLSdQ69LTkEUrARLQZQt1n7xykB4jTvfmXZ1B5MuuAwVm21Lf6MGk3wy71xB5qf/FCiibsBKGFEeZadr68pFTr7fYIE3R5Js0cdGRh1eUmApyUg4aB8m+eqYTW/oyH6kBpfVLSrCRexn1d9sIk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=arinc9.com; spf=pass smtp.mailfrom=arinc.unal@arinc9.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1670936699; s=zmail; d=arinc9.com; i=arinc.unal@arinc9.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Reply-To; bh=dR6Q4QOPDzbeauoB+9/LiC7PLplhLZ75NkuuNY2Juzc=; b=GKoXPU0nRtbmEOt1qGEkEGegqxARIYskiG056MP3wjbqRIuV7RaX8NtjpZX34Jcp dF4+H4Qn5nRtPxGdHySgzz6x0T/hlA5joZT8J2pQfTfuTIOis0FFbxUhwy4g3tiYFZo urphvZBweldecs/3p/35IPyfYPOCVUtz3M5J+How= Received: from arinc9-PC.lan (37.120.152.236 [37.120.152.236]) by mx.zohomail.com with SMTPS id 1670936696361349.29194398961965; Tue, 13 Dec 2022 05:04:56 -0800 (PST) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sergio Paracuellos , Luiz Angelo Daros de Luca Cc: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org Subject: [PATCH 2/6] dt-bindings: pinctrl: mt7620: add proper function muxing binding Date: Tue, 13 Dec 2022 16:04:26 +0300 Message-Id: <20221213130430.172876-3-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221213130430.172876-1-arinc.unal@arinc9.com> References: <20221213130430.172876-1-arinc.unal@arinc9.com> MIME-Version: 1.0 X-ZohoMailClient: External X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752104321083097130?= X-GMAIL-MSGID: =?utf-8?q?1752104321083097130?= Not every function can be muxed to a group. Add proper binding which documents which function can be muxed to a group or set of groups. Signed-off-by: Arınç ÜNAL Acked-by: Krzysztof Kozlowski --- .../pinctrl/ralink,mt7620-pinctrl.yaml | 632 +++++++++++++++++- 1 file changed, 596 insertions(+), 36 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml index 6f17f3991640..06880c80ba80 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml @@ -29,47 +29,608 @@ patternProperties: $ref: pinmux-node.yaml# properties: - groups: - description: The pin group to select. - enum: [ - # common - i2c, spi, wdt, - - # For MT7620 SoC - ephy, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi refclk, - uartf, uartlite, wled, - - # For MT7628 and MT7688 SoCs - gpio, i2s, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an, - p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn, perst, pwm0, - pwm1, refclk, sdmode, spi cs1, spis, uart0, uart1, uart2, - wled_an, wled_kn, - ] - function: - description: The mux function to select. - enum: [ - # common - gpio, i2c, refclk, spi, - - # For MT7620 SoC - ephy, gpio i2s, gpio uartf, i2s uartf, mdio, nand, pa, - pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf, - rgmii1, rgmii2, sd, spi refclk, uartf, uartlite, wdt refclk, - wdt rst, wled, - - # For MT7628 and MT7688 SoCs - antenna, debug, i2s, jtag, p0led_an, p0led_kn, - p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, p3led_kn, - p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1, pwm_uart2, - rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7, spi cs1, - spis, sw_r, uart0, uart1, uart2, utif, wdt, wled_an, wled_kn, -, - ] + description: + A string containing the name of the function to mux to the group. + anyOf: + - description: For MT7620 SoC + enum: [ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand, pa, + pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf, refclk, + rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite, wdt refclk, + wdt rst, wled] + + - description: For MT7628 and MT7688 SoCs + enum: [antenna, debug, gpio, i2c, i2s, jtag, p0led_an, p0led_kn, + p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, p3led_kn, + p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1, pwm_uart2, + refclk, rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7, spi, spi cs1, + spis, sw_r, uart0, uart1, uart2, utif, wdt, wled_an, wled_kn, -] + + groups: + description: + An array of strings. Each string contains the name of a group. required: - groups - function + allOf: + - if: + properties: + function: + const: antenna + then: + properties: + groups: + enum: [i2s] + + - if: + properties: + function: + const: debug + then: + properties: + groups: + enum: [i2c] + + - if: + properties: + function: + const: ephy + then: + properties: + groups: + enum: [ephy] + + - if: + properties: + function: + const: gpio + then: + properties: + groups: + oneOf: + - description: For MT7620 SoC + enum: [ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, + spi, spi refclk, uartf, uartlite, wdt, wled] + + - description: For MT7628 and MT7688 SoCs + enum: [gpio, i2c, i2s, p0led_an, p0led_kn, p1led_an, + p1led_kn, p2led_an, p2led_kn, p3led_an, p3led_kn, + p4led_an, p4led_kn, perst, pwm0, pwm1, refclk, + sdmode, spi, spi cs1, spis, uart0, uart1, uart2, + wdt, wled_an, wled_kn] + + - if: + properties: + function: + const: gpio i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: gpio uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: i2c + then: + properties: + groups: + enum: [i2c] + + - if: + properties: + function: + const: i2s + then: + properties: + groups: + enum: [i2s] + + - if: + properties: + function: + const: i2s uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: jtag + then: + properties: + groups: + enum: [p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an, + p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn, + sdmode] + + - if: + properties: + function: + const: mdio + then: + properties: + groups: + enum: [mdio] + + - if: + properties: + function: + const: nand + then: + properties: + groups: + enum: [nd_sd] + + - if: + properties: + function: + const: p0led_an + then: + properties: + groups: + enum: [p0led_an] + + - if: + properties: + function: + const: p0led_kn + then: + properties: + groups: + enum: [p0led_kn] + + - if: + properties: + function: + const: p1led_an + then: + properties: + groups: + enum: [p1led_an] + + - if: + properties: + function: + const: p1led_kn + then: + properties: + groups: + enum: [p1led_kn] + + - if: + properties: + function: + const: p2led_an + then: + properties: + groups: + enum: [p2led_an] + + - if: + properties: + function: + const: p2led_kn + then: + properties: + groups: + enum: [p2led_kn] + + - if: + properties: + function: + const: p3led_an + then: + properties: + groups: + enum: [p3led_an] + + - if: + properties: + function: + const: p3led_kn + then: + properties: + groups: + enum: [p3led_kn] + + - if: + properties: + function: + const: p4led_an + then: + properties: + groups: + enum: [p4led_an] + + - if: + properties: + function: + const: p4led_kn + then: + properties: + groups: + enum: [p4led_kn] + + - if: + properties: + function: + const: pa + then: + properties: + groups: + enum: [pa] + + - if: + properties: + function: + const: pcie + then: + properties: + groups: + enum: [gpio] + + - if: + properties: + function: + const: pcie refclk + then: + properties: + groups: + enum: [pcie] + + - if: + properties: + function: + const: pcie rst + then: + properties: + groups: + enum: [pcie] + + - if: + properties: + function: + const: pcm + then: + properties: + groups: + enum: [i2s] + + - if: + properties: + function: + const: pcm gpio + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: perst + then: + properties: + groups: + enum: [perst] + + - if: + properties: + function: + const: pwm + then: + properties: + groups: + enum: [uart1, uart2] + + - if: + properties: + function: + const: pwm0 + then: + properties: + groups: + enum: [pwm0] + + - if: + properties: + function: + const: pwm1 + then: + properties: + groups: + enum: [pwm1] + + - if: + properties: + function: + const: pwm_uart2 + then: + properties: + groups: + enum: [spis] + + - if: + properties: + function: + const: refclk + then: + properties: + groups: + oneOf: + - description: For MT7620 SoC + enum: [mdio] + + - description: For MT7628 and MT7688 SoCs + enum: [gpio, refclk, spi cs1] + + - if: + properties: + function: + const: rgmii1 + then: + properties: + groups: + enum: [rgmii1] + + - if: + properties: + function: + const: rgmii2 + then: + properties: + groups: + enum: [rgmii2] + + - if: + properties: + function: + const: rsvd + then: + properties: + groups: + enum: [p0led_an, p0led_kn, wled_an, wled_kn] + + - if: + properties: + function: + const: sd + then: + properties: + groups: + enum: [nd_sd] + + - if: + properties: + function: + const: sdxc + then: + properties: + groups: + enum: [sdmode] + + - if: + properties: + function: + const: sdxc d5 d4 + then: + properties: + groups: + enum: [uart2] + + - if: + properties: + function: + const: sdxc d6 + then: + properties: + groups: + enum: [pwm1] + + - if: + properties: + function: + const: sdxc d7 + then: + properties: + groups: + enum: [pwm0] + + - if: + properties: + function: + const: spi + then: + properties: + groups: + enum: [spi] + + - if: + properties: + function: + const: spi cs1 + then: + properties: + groups: + enum: [spi cs1] + + - if: + properties: + function: + const: spi refclk + then: + properties: + groups: + enum: [spi refclk] + + - if: + properties: + function: + const: spis + then: + properties: + groups: + enum: [spis] + + - if: + properties: + function: + const: sw_r + then: + properties: + groups: + enum: [uart1] + + - if: + properties: + function: + const: uart0 + then: + properties: + groups: + enum: [uart0] + + - if: + properties: + function: + const: uart1 + then: + properties: + groups: + enum: [uart1] + + - if: + properties: + function: + const: uart2 + then: + properties: + groups: + enum: [uart2] + + - if: + properties: + function: + const: uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: uartlite + then: + properties: + groups: + enum: [uartlite] + + - if: + properties: + function: + const: utif + then: + properties: + groups: + enum: [p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, + p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis] + + - if: + properties: + function: + const: wdt + then: + properties: + groups: + enum: [wdt] + + - if: + properties: + function: + const: wdt refclk + then: + properties: + groups: + enum: [wdt] + + - if: + properties: + function: + const: wdt rst + then: + properties: + groups: + enum: [wdt] + + - if: + properties: + function: + const: wled + then: + properties: + groups: + enum: [wled] + + - if: + properties: + function: + const: wled_an + then: + properties: + groups: + enum: [wled_an] + + - if: + properties: + function: + const: wled_kn + then: + properties: + groups: + enum: [wled_kn] + + - if: + properties: + function: + const: "-" + then: + properties: + groups: + enum: [i2c, spi cs1, uart0] + additionalProperties: false additionalProperties: false @@ -83,7 +644,6 @@ required: additionalProperties: false examples: - # Pinmux controller node - | pinctrl { compatible = "ralink,mt7620-pinctrl"; From patchwork Tue Dec 13 13:04:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 32809 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp107621wrn; Tue, 13 Dec 2022 05:08:40 -0800 (PST) X-Google-Smtp-Source: AA0mqf5DxKTcPctbx5vxEIc6ERiVpKuB7oFQHch9v9Cag07+NgUas694ElQQRJp/qUv+Q9RdCCkg X-Received: by 2002:a17:907:2e01:b0:7c1:4785:d650 with SMTP id ig1-20020a1709072e0100b007c14785d650mr12998317ejc.26.1670936920330; Tue, 13 Dec 2022 05:08:40 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1670936920; cv=pass; d=google.com; s=arc-20160816; b=FZYvCodDlVFei1k/fkzTnL0Gm+kV9qP+tbDeJvoTDCeBg2Ad0wazosi1D/pRMuJZ4b 9PDyDdhIpDf8PcY58ZlziF1LJ1eiR/dL/nfaRBsu14kNbwIYOwrYxePGqvftvcCG5T+h YfCkV59dbxErqQ3jYiKExicWH/1JydWRK+mFUeXFgk/e/T5aqSM5pDp1F05t39IlJYu8 Q+HVen3FqMMO1WiVxrJePuV+0vgskfVf0BZAI3a8UFXIXt6NX7qLLfdNfKtgQ2KrzHQ1 0lmiUd7k8tN1a5ZOsls2CghJdWPzoMnZhLyReK2GURBUb6SD1+DQW1VM83wpS8cGfnGd uwtg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4NWg4L4e7gMtf1qz2fIgp9UPi7DAAzsBAd4S1EFIjMA=; b=O2RNbo1JCeKGKbYEslzcUzIl0KKuduFHVeDChrk16X5uEuQKHwAOD+Q+00vnOnTwxt af82FNJkgDZy8H/CGzHkyrmX9yN/GAGi/oImTCCb7GPLfF/Sgyp8BP7qcGdwmTBHRcWz bF3GA4MhutBEcBjucn7Rx8bwfOpa1IrXYZ42QVyL0kec5fTJkMWLY+2t7QFqei2KmhM/ n9d+J02Wsc0dJW2knd5nOpEl4bn6jdeMckj3gJ79tr9fC+eJBQ71NbUhlgGTRsa+O2qD CNysBukO93R8SDKmy7VZ9iuy9+ekDzggo4UTisZE21UEulkWTHTYJ1ZlxnRw0+m9k9VR W5hA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@arinc9.com header.s=zmail header.b=fQPr+zzE; arc=pass (i=1 spf=pass spfdomain=arinc9.com dkim=pass dkdomain=arinc9.com dmarc=pass fromdomain=arinc9.com>); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Add proper binding which documents which function can be muxed to a group or set of groups. Signed-off-by: Arınç ÜNAL --- .../pinctrl/ralink,mt7621-pinctrl.yaml | 204 +++++++++++++++++- 1 file changed, 197 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml index 61e5c847e8c8..0efb03f1d88e 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml @@ -29,21 +29,212 @@ patternProperties: $ref: pinmux-node.yaml# properties: - groups: - description: The pin group to select. - enum: [i2c, jtag, mdio, pcie, rgmii1, rgmii2, sdhci, spi, uart1, - uart2, uart3, wdt] - function: - description: The mux function to select. + description: + A string containing the name of the function to mux to the group. enum: [gpio, i2c, i2s, jtag, mdio, nand1, nand2, pcie refclk, pcie rst, pcm, rgmii1, rgmii2, sdhci, spdif2, spdif3, spi, uart1, uart2, uart3, wdt refclk, wdt rst] + groups: + description: + An array of strings. Each string contains the name of a group. + required: - groups - function + allOf: + - if: + properties: + function: + const: gpio + then: + properties: + groups: + enum: [i2c, jtag, mdio, pcie, rgmii1, rgmii2, sdhci, spi, + uart1, uart2, uart3, wdt] + + - if: + properties: + function: + const: i2c + then: + properties: + groups: + enum: [i2c] + + - if: + properties: + function: + const: i2s + then: + properties: + groups: + enum: [uart3] + + - if: + properties: + function: + const: jtag + then: + properties: + groups: + enum: [jtag] + + - if: + properties: + function: + const: mdio + then: + properties: + groups: + enum: [mdio] + + - if: + properties: + function: + const: nand1 + then: + properties: + groups: + enum: [spi] + + - if: + properties: + function: + const: nand2 + then: + properties: + groups: + enum: [sdhci] + + - if: + properties: + function: + const: pcie refclk + then: + properties: + groups: + enum: [pcie] + + - if: + properties: + function: + const: pcie rst + then: + properties: + groups: + enum: [pcie] + + - if: + properties: + function: + const: pcm + then: + properties: + groups: + enum: [uart2] + + - if: + properties: + function: + const: rgmii1 + then: + properties: + groups: + enum: [rgmii1] + + - if: + properties: + function: + const: rgmii2 + then: + properties: + groups: + enum: [rgmii2] + + - if: + properties: + function: + const: sdhci + then: + properties: + groups: + enum: [sdhci] + + - if: + properties: + function: + const: spdif2 + then: + properties: + groups: + enum: [uart2] + + - if: + properties: + function: + const: spdif3 + then: + properties: + groups: + enum: [uart3] + + - if: + properties: + function: + const: spi + then: + properties: + groups: + enum: [spi] + + - if: + properties: + function: + const: uart1 + then: + properties: + groups: + enum: [uart1] + + - if: + properties: + function: + const: uart2 + then: + properties: + groups: + enum: [uart2] + + - if: + properties: + function: + const: uart3 + then: + properties: + groups: + enum: [uart3] + + - if: + properties: + function: + const: wdt refclk + then: + properties: + groups: + enum: [wdt] + + - if: + properties: + function: + const: wdt rst + then: + properties: + groups: + enum: [wdt] + additionalProperties: false additionalProperties: false @@ -57,7 +248,6 @@ required: additionalProperties: false examples: - # Pinmux controller node - | pinctrl { compatible = "ralink,mt7621-pinctrl"; From patchwork Tue Dec 13 13:04:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 32811 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp107675wrn; Tue, 13 Dec 2022 05:08:45 -0800 (PST) X-Google-Smtp-Source: AA0mqf45tQGBiqz8qr1E1+/mJ4Nw9V8XHhesxhmFy8KsreoofC1rTHzUlPBKHfm/KwlU5NqMFZ47 X-Received: by 2002:a17:902:e887:b0:189:e5c5:3a92 with SMTP id w7-20020a170902e88700b00189e5c53a92mr28672629plg.60.1670936924897; Tue, 13 Dec 2022 05:08:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1670936924; cv=pass; d=google.com; s=arc-20160816; b=bYhmVYBK74IgKHFy/MyOolaA/xgcPzKze/VBdH7Ov6V2yZFZN1kSkYu+90ndOulXi2 YXYaPLJhXZ7fEwqC0kL7IV8SId0OEMa14sZqZ667oFBB5z89a8OoSoD5ik9VEZ0znbGp N+dGan7aDk+S8yOA67wjs3iKQTBSsMYCCQWphRIV540VgvZCQMHu5yswqm8h1TgJjwwE 3wY85iLVI137g0v6OK6JJbXAWb6hq1IIX45UjMlmQaFnEm3J/Qj3eio3DJMWH11P037T 6HHmDqX2LJqkEHmZwPo5vW4JyR9mRBgfx+0PZOHTr6j2zw8pxqdSyc7mIiEdhZ7jRRcQ IxFw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LMCqtNkCDMAALe0laloGdZppysjerVyp2JF3K0Vafs8=; b=mpMYd/kI37q+XzaxpqRBMsFKJTZOZC+zlXT1wx6P0s/5bBEa+N8nezHw7z9QIHx+Ey VpeD0fjSHWfzchiNBXvJh3Ms87O4gLRr/vUb/3YfEMS3D9c4GcwIiYl2hKPRBzK0PYu+ uIWIqoxCApwvxUOO/vxli1+Y0nEO8SV6uOKB3fxft4YnSm4P/jgKwTKhRjnh7ZC/d7f8 lCkkUL2Ys5K2+4ak2CX90VytKVDOTgqRrdBpn/A7P9K+UMWcJL0GrpD/jX/Ipn3m7AIW OFsA0/z4YF1muzormGzfNgsWqqhcfQUPMn/hVfnYkWUzPflNyXtMWXh850GsDuD9fEif fVPQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@arinc9.com header.s=zmail header.b=MX6vTGho; arc=pass (i=1 spf=pass spfdomain=arinc9.com dkim=pass dkdomain=arinc9.com dmarc=pass fromdomain=arinc9.com>); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Add proper binding which documents which function can be muxed to a group or set of groups. Signed-off-by: Arınç ÜNAL --- .../pinctrl/ralink,rt2880-pinctrl.yaml | 85 +++++++++++++++++-- 1 file changed, 79 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml index 56e5becabcfd..f59ddd5e6c2b 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml @@ -29,18 +29,92 @@ patternProperties: $ref: pinmux-node.yaml# properties: - groups: - description: The pin group to select. - enum: [i2c, spi, uartlite, jtag, mdio, sdram, pci] - function: - description: The mux function to select. + description: + A string containing the name of the function to mux to the group. enum: [gpio, i2c, spi, uartlite, jtag, mdio, sdram, pci] + groups: + description: + An array of strings. Each string contains the name of a group. + required: - groups - function + allOf: + - if: + properties: + function: + const: gpio + then: + properties: + groups: + enum: [i2c, spi, uartlite, jtag, mdio, sdram, pci] + + - if: + properties: + function: + const: i2c + then: + properties: + groups: + enum: [i2c] + + - if: + properties: + function: + const: spi + then: + properties: + groups: + enum: [spi] + + - if: + properties: + function: + const: uartlite + then: + properties: + groups: + enum: [uartlite] + + - if: + properties: + function: + const: jtag + then: + properties: + groups: + enum: [jtag] + + - if: + properties: + function: + const: mdio + then: + properties: + groups: + enum: [mdio] + + - if: + properties: + function: + const: sdram + then: + properties: + groups: + enum: [sdram] + + - if: + properties: + function: + const: pci + then: + properties: + groups: + enum: [pci] + additionalProperties: false additionalProperties: false @@ -54,7 +128,6 @@ required: additionalProperties: false examples: - # Pinmux controller node - | pinctrl { compatible = "ralink,rt2880-pinctrl"; From patchwork Tue Dec 13 13:04:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 32810 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp107652wrn; Tue, 13 Dec 2022 05:08:42 -0800 (PST) X-Google-Smtp-Source: AA0mqf4FPVRcy4PvgAlsRnkPJnlBDgwgy7usDFBMzGnYQm1buGPpwLNsF4VqBpSXQGuA4GKS/XOU X-Received: by 2002:a17:906:4154:b0:7c1:639:6b42 with SMTP id l20-20020a170906415400b007c106396b42mr17323960ejk.62.1670936922686; Tue, 13 Dec 2022 05:08:42 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1670936922; cv=pass; d=google.com; s=arc-20160816; b=HHYnw9uEFwOQOTorJHzQeuyyu1Noh5xpqLnaYFeRAq5ry6pvyKcqXHNdPspB5w7beL QKXGwZ0ea8eEX2USLK5nhXajrDVuOZp03UTTc1A9rGHsMeVUtwclIwrwdPwDe9Kzofr2 ES6U7vEKCSK/lGhdAILqUZdMxTg00XQ+krD0U+z7VhWmTEYq/bLLncZ4I/iyRww1xhNb /rPVVR98E9bA0ER/i1vEZjjrBR7Sa+2Jo3LNhJtDxa1Pv7+moa/6JeRz+aBI3D41WB4y kMEA1+4xpaYD/bapOXqox3rjchSzVDImw6X7PfeIBUcLAQ5uTwmpFJQfoT4v1aydlzwj B99A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gu/6BNrbZp9njCa8iLIpe9m+ZmHNz+PxLqalouL2mRo=; b=cmiux5P3OLxTK+BvQvfjBLYXA2EUffv/No/le2vqYU+plDSm6okS30zp3CEN7zE3vd 4iA+dmaCPkuw+3g5FNdaBZkh6nr0Xc+hR3ymzkYv/7bbtzFg+7E2TBiAEgcjRqaIodKk JWVUlJ2j9NjbreU690v7uBLP7zqw2l/wcvjG+jVbXy02ur1cdCZ88Ryo+MuoEPf0G8/b +Jn3vtR74zh65DZbLJZy0Ekibl8dd19cF0G7tlh05Jh8ML5xFNqpAMTk17ClJaGocqF/ I/XAI5chAVKK7sC5B/EzFh7pigk+8ru1+eaX9sa/49+gIneqixbi6qWISdW3YupEVwi1 5n3Q== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@arinc9.com header.s=zmail header.b=U7DaW1cX; arc=pass (i=1 spf=pass spfdomain=arinc9.com dkim=pass dkdomain=arinc9.com dmarc=pass fromdomain=arinc9.com>); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Add proper binding which documents which function can be muxed to a group or set of groups. Signed-off-by: Arınç ÜNAL --- .../pinctrl/ralink,rt305x-pinctrl.yaml | 235 ++++++++++++++++-- 1 file changed, 210 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml index f602a5d6e13a..30779a1a90b0 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml @@ -30,38 +30,224 @@ patternProperties: $ref: pinmux-node.yaml# properties: - groups: - description: The pin group to select. - enum: [ - # common - i2c, jtag, led, mdio, rgmii, spi, spi_cs1, uartf, uartlite, - - # For RT3050, RT3052 and RT3350 SoCs - sdram, - - # For RT3352 SoC - lna, pa - ] - function: - description: The mux function to select. - enum: [ - # common - gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, mdio, - pcm gpio, pcm i2s, pcm uartf, rgmii, spi, spi_cs1, uartf, - uartlite, wdg_cs1, + description: + A string containing the name of the function to mux to the group. + anyOf: + - description: For RT3050, RT3052 and RT3350 SoCs + enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio, + pcm gpio, pcm i2s, pcm uartf, rgmii, sdram, spi, uartf, + uartlite] - # For RT3050, RT3052 and RT3350 SoCs - sdram, + - description: For RT3352 SoC + enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, + lna, mdio, pa, pcm gpio, pcm i2s, pcm uartf, rgmii, spi, + spi_cs1, uartf, uartlite, wdg_cs1] - # For RT3352 SoC - lna, pa - ] + - description: For RT5350 SoC + enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, + pcm gpio, pcm i2s, pcm uartf, spi, spi_cs1, uartf, + uartlite, wdg_cs1] + + groups: + description: + An array of strings. Each string contains the name of a group. required: - groups - function + allOf: + - if: + properties: + function: + const: gpio + then: + properties: + groups: + oneOf: + - description: For RT3050, RT3052 and RT3350 SoCs + enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, + uartlite] + + - description: For RT3352 SoC + enum: [i2c, jtag, led, lna, mdio, pa, rgmii, spi, spi_cs1, + uartf, uartlite] + + - description: For RT5350 SoC + enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite] + + - if: + properties: + function: + const: gpio i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: gpio uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: i2c + then: + properties: + groups: + enum: [i2c] + + - if: + properties: + function: + const: i2s uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: jtag + then: + properties: + groups: + enum: [jtag] + + - if: + properties: + function: + const: led + then: + properties: + groups: + enum: [led] + + - if: + properties: + function: + const: lna + then: + properties: + groups: + enum: [lna] + + - if: + properties: + function: + const: mdio + then: + properties: + groups: + enum: [mdio] + + - if: + properties: + function: + const: pa + then: + properties: + groups: + enum: [pa] + + - if: + properties: + function: + const: pcm gpio + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: rgmii + then: + properties: + groups: + enum: [rgmii] + + - if: + properties: + function: + const: sdram + then: + properties: + groups: + enum: [sdram] + + - if: + properties: + function: + const: spi + then: + properties: + groups: + enum: [spi] + + - if: + properties: + function: + const: spi_cs1 + then: + properties: + groups: + enum: [spi_cs1] + + - if: + properties: + function: + const: uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: uartlite + then: + properties: + groups: + enum: [uartlite] + + - if: + properties: + function: + const: wdg_cs1 + then: + properties: + groups: + enum: [spi_cs1] + additionalProperties: false additionalProperties: false @@ -75,7 +261,6 @@ required: additionalProperties: false examples: - # Pinmux controller node - | pinctrl { compatible = "ralink,rt305x-pinctrl"; From patchwork Tue Dec 13 13:04:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 32813 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp108863wrn; Tue, 13 Dec 2022 05:10:48 -0800 (PST) X-Google-Smtp-Source: AA0mqf5kb0ZupEzJxXe33faL/JjV2IvGks+eJ4lYBhH8CpM11QFmO4O8bcVR7SoSpmt86iHh49Ai X-Received: by 2002:a17:90a:af84:b0:218:c8fd:c213 with SMTP id w4-20020a17090aaf8400b00218c8fdc213mr21085361pjq.36.1670937048681; Tue, 13 Dec 2022 05:10:48 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1670937048; cv=pass; d=google.com; s=arc-20160816; b=Til/1AAwsfIBmAkflF68HxVr30NcKH3PIS5pYNFXNAEfsXLfSp9yEpoyKwsAJCeULY hYRAWKx9GAh7vos/f09dxZG2fF/G5E1YtnlQdfXEh9BxVhu5lPtAyDTPUdmrAcFsLcSX 6XD3AyjKw1wiTWTHKjcutFcB7I1nqV7Thsz/GRgEoUWoiD6RP5XeddHvyDAt257jMBsF G4ctZK3a05PrkGcopaKK87SoKMy+xrML82lDCmVOFXpXkIhHNg+6lZtB7vZFJ7wbcand ySxCP3go+kktMFrdzqyrH5blxLKM7jh5JktXX4JgXmXBnNzAH0m5dk2oJSbEuA1h88g5 qk5Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=v0s/3V39m6q+UFQsK9fKPxehRNP7xs6yKszeFIHOlpQ=; b=OzfFzuhi5soWAxSj1FlXfmPu4UviLjCLN76KYRghptjwGfX254AtiP3NV3bQ6pAnAO A4ajVx8q1xjJC5B0uI+edba17OQ/HJjN27qUe9svK8t610rFe4PimDkZEkX0etN/EXTU 7xZ+qxyixtijbnBQ4/53TUw2kjxHvLn82Ofsn1RLpwVAcabXyXMVtdWBQfo2hGmT3cAh sbc/MGjcZLLQuWU6p5/vtJTKrmYGWZtadOTKt3rvZ6xMp2StUJS934toTfBnUp7a7iGt 4zQ7ETXf9bIjMg8vhwmytVBe6cw5RuaLV4J32rt+zCHyH004+io7xFWd48HzF1gpMLpk /7BA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@arinc9.com header.s=zmail header.b=dHJPhXLK; arc=pass (i=1 spf=pass spfdomain=arinc9.com dkim=pass dkdomain=arinc9.com dmarc=pass fromdomain=arinc9.com>); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Add proper binding which documents which function can be muxed to a group or set of groups. Signed-off-by: Arınç ÜNAL --- .../pinctrl/ralink,rt3883-pinctrl.yaml | 204 +++++++++++++++++- 1 file changed, 197 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml index feb6e66dcb61..9fbd6de13c03 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml @@ -29,21 +29,212 @@ patternProperties: $ref: pinmux-node.yaml# properties: - groups: - description: The pin group to select. - enum: [ge1, ge2, i2c, jtag, lna a, lna g, mdio, pci, spi, uartf, - uartlite] - function: - description: The mux function to select. + description: + A string containing the name of the function to mux to the group. enum: [ge1, ge2, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, lna a, lna g, mdio, pci-dev, pci-fnc, pci-host1, pci-host2, pcm gpio, pcm i2s, pcm uartf, spi, uartf, uartlite] + groups: + description: + An array of strings. Each string contains the name of a group. + required: - groups - function + allOf: + - if: + properties: + function: + const: ge1 + then: + properties: + groups: + enum: [ge1] + + - if: + properties: + function: + const: ge2 + then: + properties: + groups: + enum: [ge2] + + - if: + properties: + function: + const: gpio + then: + properties: + groups: + enum: [ge1, ge2, i2c, jtag, lna a, lna g, mdio, pci, spi, + uartf, uartlite] + + - if: + properties: + function: + const: gpio i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: gpio uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: i2c + then: + properties: + groups: + enum: [i2c] + + - if: + properties: + function: + const: i2s uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: jtag + then: + properties: + groups: + enum: [jtag] + + - if: + properties: + function: + const: lna a + then: + properties: + groups: + enum: [lna a] + + - if: + properties: + function: + const: lna g + then: + properties: + groups: + enum: [lna g] + + - if: + properties: + function: + const: mdio + then: + properties: + groups: + enum: [mdio] + + - if: + properties: + function: + const: pci-dev + then: + properties: + groups: + enum: [pci] + + - if: + properties: + function: + const: pci-fnc + then: + properties: + groups: + enum: [pci] + + - if: + properties: + function: + const: pci-host1 + then: + properties: + groups: + enum: [pci] + + - if: + properties: + function: + const: pci-host2 + then: + properties: + groups: + enum: [pci] + + - if: + properties: + function: + const: pcm gpio + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: spi + then: + properties: + groups: + enum: [spi] + + - if: + properties: + function: + const: uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: uartlite + then: + properties: + groups: + enum: [uartlite] + additionalProperties: false additionalProperties: false @@ -57,7 +248,6 @@ required: additionalProperties: false examples: - # Pinmux controller node - | pinctrl { compatible = "ralink,rt3883-pinctrl";