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[83.9.1.44]) by smtp.gmail.com with ESMTPSA id y28-20020a19915c000000b00492dba3c85asm139371lfj.220.2022.12.12.16.26.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 16:26:29 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: arm-smmu: Add sm8150-smmu-500 to the list of Adreno smmus Date: Tue, 13 Dec 2022 01:26:25 +0100 Message-Id: <20221213002626.260267-1-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752056655073110947?= X-GMAIL-MSGID: =?utf-8?q?1752056655073110947?= From: Marijn Suijten sm8150 has an smmu-500 specifically for Adreno, where the GPU is allowed to switch pagetables. Document the allowed 3-compatibles for this, similar to sc7280 and sm8250. Signed-off-by: Marijn Suijten Signed-off-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 895ec8418465..b97181d4a399 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -84,6 +84,7 @@ properties: items: - enum: - qcom,sc7280-smmu-500 + - qcom,sm8150-smmu-500 - qcom,sm8250-smmu-500 - const: qcom,adreno-smmu - const: arm,mmu-500 From patchwork Tue Dec 13 00:26:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 32587 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2551478wrr; Mon, 12 Dec 2022 16:37:18 -0800 (PST) X-Google-Smtp-Source: AA0mqf5mwX66frSci92K9hiPxaSdLYOErndfqLJUl7v6ZiHtEbgC3CuUyIGt7likGNMCRqLZrkBV X-Received: by 2002:a05:6a00:421a:b0:566:900e:1030 with SMTP id cd26-20020a056a00421a00b00566900e1030mr18365468pfb.16.1670891837929; Mon, 12 Dec 2022 16:37:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670891837; cv=none; d=google.com; s=arc-20160816; b=0y2ycA7sauF9fKpnZo6d8v0RQTmuT3jZZ+dUaZr2/MAL+Z7i0CVvUI3R6GzPABTtU+ bv0AI1JSa58/VD1GR7iZaNva7EvZ+XDntdeRhjr4bwB5Z5N76xCWYs8A+Ofrs3cFHVWN qTsc0yoKeNsAbRH8jmWPpabXmF7fbSN2ex7aaiWn1EdJAmDAZUY9KOhRzCYlLRtxyQiv jTkSJfNw7MlHanWf6JFRgaqF9I+8lSDmIzdOUZNP3Ylv6i5xwoI+pj0utCJkNm0/gqPr 8mW28iUQPszaB9w8rzpruOKJ5vGMNgFj009WZP6dIS4KijqO7SNjudo0naY4EKRMMRXv OoWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=64a16xm03GDRzSrRzGbHGfzDIJpeFaTeX77Wh7ttti4=; b=PWL4ZhvjVQ6C+WccN4TvjV+h0gWiunTHPCIDmJAkK3jFuvYjzTu3nxE72vfJ18Hk5f oK0pW2XQ5q08nTmocj89i8Zw32uSNW0h964S6Ec+yJYL2tuE5dP8vbEHaYTtfA6giHps eWv5HYHPu1uhcRTkloyT7dMEhC+/XKXkSuqjhYqQ0a82ZWD1dZxYlsjB/9RMqjiwRhsD G26EYpa66jGic+EbIzC2zfRykJhqrP5p5qIQ0EpKZjjcRWxrCaWiHNxU9K/FJ7VaTYmq gWZ57Ly38UjQBw+ou3tV9YgNbiSGJbKvOksYndvOFDZ72hyLYZTd84QMXByDAootAE3I QVhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iuYfFxLf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.1.44]) by smtp.gmail.com with ESMTPSA id y28-20020a19915c000000b00492dba3c85asm139371lfj.220.2022.12.12.16.26.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 16:26:31 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] arm64: dts: qcom: sm8150: Enable split pagetables for Adreno SMMU Date: Tue, 13 Dec 2022 01:26:26 +0100 Message-Id: <20221213002626.260267-2-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221213002626.260267-1-konrad.dybcio@linaro.org> References: <20221213002626.260267-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752057079550139625?= X-GMAIL-MSGID: =?utf-8?q?1752057079550139625?= From: Marijn Suijten Allow the Adreno GPU to access split pagetables specifically on the dedicated Adreno SMMU via the qcom,adreno-smmu compatible. Signed-off-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 3f940cc3f32b..83b4450fb3eb 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -2253,7 +2253,7 @@ gpucc: clock-controller@2c90000 { }; adreno_smmu: iommu@2ca0000 { - compatible = "qcom,sm8150-smmu-500", "arm,mmu-500"; + compatible = "qcom,sm8150-smmu-500", "qcom,adreno-smmu", "arm,mmu-500"; reg = <0 0x02ca0000 0 0x10000>; #iommu-cells = <2>; #global-interrupts = <1>;