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[2620:137:e000::1:20]) by mx.google.com with ESMTP id gh16-20020a170906e09000b007c0bc7057ddsi4256187ejb.909.2022.12.12.04.35.22; Mon, 12 Dec 2022 04:35:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qQu0KWtT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232231AbiLLMdx (ORCPT + 99 others); Mon, 12 Dec 2022 07:33:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232214AbiLLMd1 (ORCPT ); Mon, 12 Dec 2022 07:33:27 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A401637B for ; Mon, 12 Dec 2022 04:33:26 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id u5so11855849pjy.5 for ; Mon, 12 Dec 2022 04:33:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=alhK3ndi55Pn+UAZvehWSr5HT0WJYLohN8j26G14+mg=; b=qQu0KWtTsFZWdV2sgVCoDF3kIQeVcPNBTz1gprS37Trlf5kvhITuKFb77t0cE2+p0X ZrHStY317cD6gGjT64Jv9Hs+NJC1Kt8FMbQrJLmJWO+fbzjSkIXQj4xIq9171qJfb54c /bgEAeuR1jxftiiHNG961TjiKDzHELKKP9LIiGhP0K5hOgSWbjV/J84RAqRsuVahWzpD cKlgfh4+JAHYm+nmzxDZBhw1ELNJ+kyoIdFNUzbRbaAmGuuWf0w6b/1M/Fr2faKOzeJQ nIaYxdQQ9WtePfcI2YFxuOIbpk2pzKi59X4wy53mqLHUnp4cx4WVHYitfVc697GcFkYP FJCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=alhK3ndi55Pn+UAZvehWSr5HT0WJYLohN8j26G14+mg=; b=eWL92uViXEevA/DKNLRSVtlSmaoqcJrgWaqfeo6RhnHbmFrK0QdKdI+jPSCioCbS/w /qsdmxAPWSAqwItpKF/3EqI2qy3TeX9GDThpefkoFrBKuIQT2jCjj0bf1yty1R0dHSFm B41nLVRNToMgA6z2q2oz94V+v74Lq9bVPubjtaer088PxNuXUHQexGU76Allx0OjXWiD P5qAlIyjurfw3OKUKWRieHEEtUpMkYUmrfg8Kx2Ooa30uMGxzJwfrOQ3puJsIu4H038i bRady9it58Kre/E+kEkRXzliGvaeaCB/WI5dfMGPncgexj274N1JIa7o6SB6553T5+Ip HDiA== X-Gm-Message-State: ANoB5pm4C0O+pVtWmklBAch45Pn2qbIo9LoHd+w8NchAwnus3W3t5r5s /Lk2dY7leCSw1+iW/vCMA+0dwBh8CwB1s3E= X-Received: by 2002:a17:902:9b97:b0:189:9e91:762e with SMTP id y23-20020a1709029b9700b001899e91762emr15738614plp.57.1670848406037; Mon, 12 Dec 2022 04:33:26 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.33.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:33:25 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam Subject: [PATCH v2 01/13] dt-bindings: arm: msm: Update the maintainers for LLCC Date: Mon, 12 Dec 2022 18:02:59 +0530 Message-Id: <20221212123311.146261-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752011685779851814?= X-GMAIL-MSGID: =?utf-8?q?1752011685779851814?= Rishabh Bhatnagar has left Qualcomm, and there is no evidence of him maintaining with a new identity. So his entry needs to be removed. Also, Sai Prakash Ranjan's email address should be updated to use quicinc domain. Cc: Sai Prakash Ranjan Acked-by: Sai Prakash Ranjan Signed-off-by: Manivannan Sadhasivam Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index 38efcad56dbd..d1df49ffcc1b 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Last Level Cache Controller maintainers: - - Rishabh Bhatnagar - - Sai Prakash Ranjan + - Sai Prakash Ranjan description: | LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, From patchwork Mon Dec 12 12:33:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32355 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2215969wrr; Mon, 12 Dec 2022 04:35:29 -0800 (PST) X-Google-Smtp-Source: AA0mqf7wU05kb9SgMPo/8bdLC9443xvRSNbFMrkKCbiUn549HyPCLZFv3EsRihTJSWZF4iwdWjtQ X-Received: by 2002:a17:906:26d6:b0:78d:f454:387a with SMTP id u22-20020a17090626d600b0078df454387amr13361843ejc.55.1670848529509; Mon, 12 Dec 2022 04:35:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670848529; cv=none; d=google.com; s=arc-20160816; b=geURJ5bOn1dSdLzEKmMx7/Qyxdq+JbnaPBfh6d7NV/ursJAnOMb7k50AGcdgSoL+pC NL1ZOKQN8+N3MnHrdmn48sZvUy7Pq4LWarJQyJjq7IORbBdWQj2femIPpfyj3bmZkRtJ VmQKXyxqhwb0Prs4aJi9nb+/UvWKECAO21Seauft5Fo6IBub/1F3B8mOvG8NaT1NPrc6 ibmPnw/TqAVCpLrt4LlskABXrGrEBd4d2R4Q78eR1cDFN4P+X9qVTM6D7ZgQCTZDRHsm OTp78LaooZZdyAvBV5a1Hb8GR4pKJe+GU8WIk4cKmNAtTH9pbJms2w5RkNc2p5d98RS9 gQbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=oXSmdk6KZcIB/MFPzIeXJxotTRaDgWgu6sR2dSlOVP0=; b=R+AW+fxcvF3lX40KeIYNehcQVw2uTcfIuxZ8AV0d9IJ2AHWE+5d8c+mPZkfPmmYZBG XFDfS8VX/V4LXiK8hta+NOPHRoLkgEtXcLVCS7iVyooyMfoXL+MUdHrp5VkKCFaah6gD j4AbRyE6ng7nFMZTIZY/9+u1ciuLli12OFHyH4ohMvMKmggAFGcph5qYBFWU42S35z6l Om9/gxW+JE8lqgx/94hUOiIu9EzzviBF/SPdXnJQIBs48vcau5SdmvK5T7W7qSYCpX38 bAasP0uKEz/XWOlrB2oB7hKtW5raKoI3n+jYHSSsFe7rUKu9FJMknv9mxVANr3PQ9qDt YJCw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hv669BzV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Currently, the binding just lists the LLCC0 base address and specifies the size to cover all banks. This is not the correct approach since, there are holes and other registers located in between. So let's specify the base address of each LLCC bank and get rid of reg-names property as it is not needed anymore. It should be noted that the bank count differs for each SoC, so that also needs to be taken into account in the binding. Cc: # 4.19 Fixes: 7e5700ae64f6 ("dt-bindings: Documentation for qcom, llcc") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- .../bindings/arm/msm/qcom,llcc.yaml | 97 ++++++++++++++++--- 1 file changed, 83 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index d1df49ffcc1b..260bc87629a7 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -33,14 +33,8 @@ properties: - qcom,sm8550-llcc reg: - items: - - description: LLCC base register region - - description: LLCC broadcast base register region - - reg-names: - items: - - const: llcc_base - - const: llcc_broadcast_base + minItems: 2 + maxItems: 9 interrupts: maxItems: 1 @@ -48,7 +42,76 @@ properties: required: - compatible - reg - - reg-names + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7180-llcc + - qcom,sm6350-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC broadcast base register region + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7280-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC broadcast base register region + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-llcc + - qcom,sc8280xp-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC4 base register region + - description: LLCC5 base register region + - description: LLCC6 base register region + - description: LLCC7 base register region + - description: LLCC broadcast base register region + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm845-llcc + - qcom,sm8150-llcc + - qcom,sm8250-llcc + - qcom,sm8350-llcc + - qcom,sm8450-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC broadcast base register region additionalProperties: false @@ -56,9 +119,15 @@ examples: - | #include - system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; - reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; + soc { + #address-cells = <2>; + #size-cells = <2>; + + system-cache-controller@1100000 { + compatible = "qcom,sdm845-llcc"; + reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; + interrupts = ; + }; }; From patchwork Mon Dec 12 12:33:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32357 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2216117wrr; Mon, 12 Dec 2022 04:35:48 -0800 (PST) X-Google-Smtp-Source: AA0mqf6jSq5l8fn7h1C4IoILFw9K+xZirGxGztFHkyaj/ZTmKKB0gblPFECwqg9I0h5Wo0sC7BZ4 X-Received: by 2002:a17:907:2c69:b0:78d:f456:1ee5 with SMTP id ib9-20020a1709072c6900b0078df4561ee5mr14299302ejc.54.1670848548353; Mon, 12 Dec 2022 04:35:48 -0800 (PST) ARC-Seal: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id l1-20020a50d6c1000000b00460faf7d2a3si7238230edj.277.2022.12.12.04.35.24; Mon, 12 Dec 2022 04:35:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gt0eqdCy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232303AbiLLMeX (ORCPT + 99 others); Mon, 12 Dec 2022 07:34:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232174AbiLLMds (ORCPT ); Mon, 12 Dec 2022 07:33:48 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27CAA12630 for ; Mon, 12 Dec 2022 04:33:39 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id fy4so11584345pjb.0 for ; Mon, 12 Dec 2022 04:33:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8DCGU+aMFvu/t7Kdt87B6ewuHaXNeU8yBLP9UTUdSuo=; b=gt0eqdCyD/xGUbqsYqfrngyYsrqK9QOlFwwq5V0wiyqyuVsJ0XYiJoVcs304lD79by nfoiBMRcqh8n8Q2vXkF2NRRRx+/FRIiKbCnmjmKTjXvJvmMiXTexA3yXUTOmWK+6RYcs YtiXkhb5S0aw4+vrDdbRetdp/KzmY+9B+LLSp+XRlHP/M9OWtmXmy81+mVulJvxEkzKb VXmc3Gk5oejNX9e+I1gLyvBNc6Ir50w6TiAFSW16DL+m0JVjFpdYt+hSchW8LM9yR1Qe j67tSLY38LWPfyNePkw9ilDV7uCAPNn84Qzy/PqMiNJV4YsLXYN7egHZibbWSHp3lQ9j yZKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8DCGU+aMFvu/t7Kdt87B6ewuHaXNeU8yBLP9UTUdSuo=; b=pc7S8itfuRIgO9g80ARwaAafh5Wf0zGoTIxxrfr7vQGXqSoEXPq70rCxhacn1EweZd Tkb74Ump4OK7fGaUuRIQqvNVf0Zx5micY1hBGNB0Pc+xfecWuOs3TMWtnVsprZBop6Gn 7wKBlZRXI+O11w0r0M+nDgf137Yz0Er6443CDpMlcjEcchcjx62NnEkajaHYkvM5hNWL Bi/L3CpmqxoVlzkZVxrmctT+eo06tn64CyTKfw+9tNeo3ccs7r1TUl2j8935/UcEA0FL PH7auSien35J78Hm7NiVkNmevV0MDB+qeVajMZFPac0sNL2SFDQ3ui1vnRAZ36qr0Pkm dPhQ== X-Gm-Message-State: ANoB5plZTtSXfK8gPtXN3RREwWBnsVNmkJrvWXurjzgWNV6uW1l7oeXK 9YsScGaJ13dLUC271YKH/zCF X-Received: by 2002:a17:903:2786:b0:189:f69d:d5cc with SMTP id jw6-20020a170903278600b00189f69dd5ccmr16939456plb.58.1670848418819; Mon, 12 Dec 2022 04:33:38 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.33.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:33:37 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH v2 03/13] arm64: dts: qcom: sdm845: Fix the base addresses of LLCC banks Date: Mon, 12 Dec 2022 18:03:01 +0530 Message-Id: <20221212123311.146261-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752011686939657727?= X-GMAIL-MSGID: =?utf-8?q?1752011686939657727?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Also, let's get rid of reg-names property as it is not needed anymore. The driver is expected to parse the reg field based on index to get the addresses of each LLCC banks. Cc: # 5.4 Fixes: ba0411ddd133 ("arm64: dts: sdm845: Add device node for Last level cache controller") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 65032b94b46d..683b861e060d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2132,8 +2132,9 @@ uart15: serial@a9c000 { llcc: system-cache-controller@1100000 { compatible = "qcom,sdm845-llcc"; - reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; interrupts = ; }; From patchwork Mon Dec 12 12:33:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32359 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2216367wrr; Mon, 12 Dec 2022 04:36:23 -0800 (PST) X-Google-Smtp-Source: AA0mqf50EfXg3H0zSSn8bTTXtlSfkNODBQyDCg6VbMsTfJUEYqiu+95mSun4l9j7YH8MqxMyZwBn X-Received: by 2002:a17:906:71c2:b0:7ba:9c18:1205 with SMTP id i2-20020a17090671c200b007ba9c181205mr10189877ejk.50.1670848583526; Mon, 12 Dec 2022 04:36:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670848583; cv=none; d=google.com; s=arc-20160816; b=JfZ6XB8pcfHNxNeem66iJQ//9A6M828z5YMATGY5eiMbwPXNY5Uc/pK0BM/IYBhzRz QumkjWvZsRVpzceGnuER1yIoLnEgDT3JAzf5Kpr7Hl8n2qKiC4AHgV0t99NmpGrsN/it 3YC50Mw8JUBFBdkkITLXQ2tdCuv191p/bHq0ngGqu3nit0u+NBOWaPCCxQ0NAxUh6uEf dvyUM4mKaJFbfthd+WWD+yy72ZY2GwL5poUrP6lkfFX/ThVhcZAmlJTtBTZedI0zVXyG +v+YtQ9EYjX7lhACRU127Cviuq1vzphwfxwc+uIq5Ivl0UIHSCrI4/DHJMmIgyB5W25B sswA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9tZFt9KOuRAc3YbaSpnuN3NeGcAiDnj5wQSKgrmzEBE=; b=fflLcCOwvxqhl3XGBpgxDTC7JURxeg0Xbl2gwl0Gv7f49vTgS8QELhXBXu3GoxrBVY R3yX6HfdQHOf5z9+X89923YZ0EkUzSiFoPDY2JlrlelHO8PNOOw2QPDMXl3hiPKIGJsN PEuRuui4CQNdR6LJ/43jLIs2fUG1eIl/TQ92eb7d7jakrcWihcOrEItfEwNA1CIW+Pu/ o21UEfyJ3wV3GN/4mUL3jsNUYN9uZidsGjDNBlx2jgcMPfP8WwtPJUJzhkMNQvKe/woI rosmQM3TKOUHNTj1MthZkxG3qHv9Q0bijvZuj82BRelph3FFLMT5hdJShommXpInx3W8 j0wg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NgJfy3y1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i13-20020a1709064fcd00b007baa6e2275asi7122537ejw.236.2022.12.12.04.35.59; Mon, 12 Dec 2022 04:36:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NgJfy3y1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232273AbiLLMep (ORCPT + 99 others); Mon, 12 Dec 2022 07:34:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232271AbiLLMeO (ORCPT ); Mon, 12 Dec 2022 07:34:14 -0500 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64ABA12778 for ; Mon, 12 Dec 2022 04:33:45 -0800 (PST) Received: by mail-pl1-x632.google.com with SMTP id g10so11907956plo.11 for ; Mon, 12 Dec 2022 04:33:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9tZFt9KOuRAc3YbaSpnuN3NeGcAiDnj5wQSKgrmzEBE=; b=NgJfy3y1hxcURsOqlHdWS+iXmzermi8gevcmy7kSd5IFztlubqTi1w8oncpQZ95Esd M979Lh+21IH1kwZWSOZH2yxTsSuykgsoM7SkJQZP6WmvBi752JU2YwGhmR6MlNb+GT9H cEeENCFO/fuf8eEyCaiO6G38GYWw/mGpNBBO03360wE815rAF8u4FX1Hg0nxehWliJeo 63PbPcqrRaun17whvOD8yYl7NgPzZeZTIn3aQSwzIjYjRsRjEdPQ+Ll+u4B3l7fcOMcE /lqjZrQYbUpTjEjLnGd6N+RC62W1v5V3ukN+m/KdL0u8MJaowC3cXv0ChtAP9xBdGmDx F7+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9tZFt9KOuRAc3YbaSpnuN3NeGcAiDnj5wQSKgrmzEBE=; b=I2QvD+Tu92NC79MuAcEIfeGiHqb1DoPAgInwSwlHU9qfZQ66Gl3pu89/5dPeydkQBb gpEkua8+HrK9CqmjjTxmwISjNtcBr7vXh1mqXBBn9gQqHzqMEA0EBUNn4JHbbKx/vdDF 9WjObaTtgkKekBxzpqlgu6E1eFeDEEW8Hc44Oa5MlB0GVlxwanCFocVLDStHllP1noH3 oMNwtx9tBjRuF0qvxKIbcP/5C4aaIE8sTQdV+FN5ijIPZXyAiyy4Vtcv27KfBufgRaHO UDFDU/PApxaZ1BhUL5SRnBFOF06N2t4exytGN0bAvirxlOwV9u2KGWX/ZhWTTufV1hB8 dOog== X-Gm-Message-State: ANoB5pkQ1EpKmVgZCNYNJaD5sZ0F/IH8+AqyMfQJleIDDND23sA26wXH L5dEDDPAe7xK+MF9dY3d4WUb X-Received: by 2002:a17:902:9b8d:b0:186:605b:7527 with SMTP id y13-20020a1709029b8d00b00186605b7527mr15249024plp.48.1670848424742; Mon, 12 Dec 2022 04:33:44 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.33.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:33:43 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH v2 04/13] arm64: dts: qcom: sc7180: Remove reg-names property from LLCC node Date: Mon, 12 Dec 2022 18:03:02 +0530 Message-Id: <20221212123311.146261-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752011724472623914?= X-GMAIL-MSGID: =?utf-8?q?1752011724472623914?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SC7180, there is only one LLCC bank available. So only change needed is to remove the reg-names property from LLCC node to conform to the binding. The driver is expected to parse the reg field based on index to get the addresses of each LLCC banks. Cc: # 5.6 Fixes: c831fa299996 ("arm64: dts: qcom: sc7180: Add Last level cache controller node") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f71cf21a8dd8..b0d524bbf051 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2759,7 +2759,6 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sc7180-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Mon Dec 12 12:33:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32358 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2216283wrr; Mon, 12 Dec 2022 04:36:12 -0800 (PST) X-Google-Smtp-Source: AA0mqf4sCmgPHz7GDzEhbfoUH5jYj8u67VQLX7ZNowBbkP3Y4ANN4gTXZW49ciyCSiM0Wvjn5SGV X-Received: by 2002:a17:906:d92:b0:7c0:fa2d:9af3 with SMTP id m18-20020a1709060d9200b007c0fa2d9af3mr12282784eji.45.1670848571762; Mon, 12 Dec 2022 04:36:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670848571; cv=none; d=google.com; s=arc-20160816; b=Yg98zEgbfGkofMLQCPordbwR24K0Pn67085O/5BVZYV+ipvysV5Zwcewuaj4m3S2IA kOErvjvkEiul8ohgAgzUJiuV5QIHvi/TydDIiqyulhFH5wKce5N1kS6wEEdywi0hsFuX 6y4UXa0j1TD76HrmFUGW7aVLlkkdOSfchL2Yw1UjmF/ZfY8xkQnZqKK1bG4Oa9IgRaCw ZPVsIP9MNoL18yObh3VnosHRFnghpCJxVITwuDHXX+JEp1UlKyDKOCuHw9K/e66HWWf/ pKOt3YC6tM/vEVM2o7zLNReOW7F3vZmEErdoPypjrUorOEgdmbBSN5EbGyZ9tNgGBsfh IxHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=26Q/WBAWFA3UhuhgRAc8FiDDi9U9JvKaLU8PlXNH5WA=; b=UcKgQw0D3huWDCCno2q1q/XfnD8kRd8cKSJgMYNj++HqSSjtJ3SOKAoF8w4hm97U4e 6yodY1bFWdF/UT3h/6s0qItGj61LZQOoPrH0R5Md0yctJx7yhonRGjc+eeEXATuUW4Tv Vb3NopQYSq4JK2Fn50OmVu5cX/730jxnWA8yF7PdGyPklLaa/AhHpOxi7gdsY3wkp2yT 59WyzKncxlZP/wzWiqNtL80b+R13sDaetmve02YBIf2WTRsRz8+pE2MJMNp8W/sVZeen KVm5Zj9yTubaBgsIOigRfqRKtOmegQCx2RUhYSb/kYcZILcBmQn1uKzIQq/SU/toQrfx eZRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cmoELRfD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ji7-20020a170907980700b0078df1c345dcsi7539936ejc.535.2022.12.12.04.35.48; Mon, 12 Dec 2022 04:36:11 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cmoELRfD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232237AbiLLMfA (ORCPT + 99 others); Mon, 12 Dec 2022 07:35:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43266 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232307AbiLLMeZ (ORCPT ); Mon, 12 Dec 2022 07:34:25 -0500 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8287D49 for ; Mon, 12 Dec 2022 04:33:53 -0800 (PST) Received: by mail-pj1-x102c.google.com with SMTP id t17so11872339pjo.3 for ; Mon, 12 Dec 2022 04:33:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=26Q/WBAWFA3UhuhgRAc8FiDDi9U9JvKaLU8PlXNH5WA=; b=cmoELRfDJVkrewKkchK8Em88WWVknErid1uisKdEezigW0Dxn9Ge+SBHmjwBtQ2+E6 YxtuMsyHyxJodHk+b2wox/kY7OCLlbQ4xGpkdViVW0wO/0iKNyLEyBNvUfiDjQtR7IMk HvbBVXEETnyxk2AF22e+0l2ydtor+Lqow9QD7Kg82ZStryQDb7I94QnZBNfp0Jwu5+OO Lw+mClb/FD8uDwx+jfrK7+VrkLzIPl3WZX6DkHEld470Qh7pvK3c5cfrTyKB1XpdSYdk QrymkULlx0ur9VoOLp10l7FJ1BaTvi180PS7epFyTkIz9mmdI7C2sng3kJY/+L+or9NI Isyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=26Q/WBAWFA3UhuhgRAc8FiDDi9U9JvKaLU8PlXNH5WA=; b=kTAe7gh4iJ2/BBcQhdAdW4Nhf9agqRX3HTKgHWhq3xewRT5ojBAZGmdaAU0DKwLwMQ XrzZEIKfZvfTtE6TRKnBuIryJ24/9QJhXCor8mG/ekwRVLVO/6rIJs2MVA/5Uz7vUSAv cCd7l+FQ03v2X90F/c0/clQUhvdvH+hQ4BHv4BPd9vRNDoXOzkqPdy1TdGv7ADcThlzW KXueS9ReM+s8Ssiuy6AzWTxvLpow7z5NNAFf7kV/q9+wHlJhZPktDi25+ZZkfKG5+6c3 vnF0u//sjBjaZG8CD9R07Gk9ZANSUdVD/DclEYF2b+ILZHRL11w/OQZMkaOuIsNUChEu FW+g== X-Gm-Message-State: ANoB5pmxuW5oPXgr90W9UKwGhcwzt8M+z960kYhldjmZE0Moml4gO+qU jLJMlXftscz6GmaUnboQW9ia X-Received: by 2002:a17:902:aa91:b0:189:b8a2:27ed with SMTP id d17-20020a170902aa9100b00189b8a227edmr14858454plr.57.1670848430595; Mon, 12 Dec 2022 04:33:50 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.33.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:33:49 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH v2 05/13] arm64: dts: qcom: sc7280: Fix the base addresses of LLCC banks Date: Mon, 12 Dec 2022 18:03:03 +0530 Message-Id: <20221212123311.146261-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752011711677262992?= X-GMAIL-MSGID: =?utf-8?q?1752011711677262992?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. While at it, let's also fix the size of the llcc_broadcast_base to cover the whole region. Also, let's get rid of reg-names property as it is not needed anymore. The driver is expected to parse the reg field based on index to get the addresses of each LLCC banks. Cc: # 5.13 Fixes: 0392968dbe09 ("arm64: dts: qcom: sc7280: Add device tree node for LLCC") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 0adf13399e64..90e11cbbaf88 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3579,8 +3579,8 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sc7280-llcc"; - reg = <0 0x09200000 0 0xd0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09600000 0 0x58000>; interrupts = ; }; From patchwork Mon Dec 12 12:33:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32361 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2216396wrr; Mon, 12 Dec 2022 04:36:28 -0800 (PST) X-Google-Smtp-Source: AA0mqf4X429XLWXnXzUO2uto1bUaaeyNVmmu/CdttdMpH++mBQTyWt5ZF16mv7YJN0GYevyQ3Lay X-Received: by 2002:a17:906:c249:b0:7ae:eac:fe22 with SMTP id bl9-20020a170906c24900b007ae0eacfe22mr12934477ejb.76.1670848588467; Mon, 12 Dec 2022 04:36:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670848588; cv=none; d=google.com; s=arc-20160816; b=G0RYdEv8SAZxMqVBNcRVUZIrDN4I+m/pQwcqg7Ynjq6YckAGXU/8BKpilePjzutT4D eMmHiOIznyMuaft1dxVMkTo8ufFJ4D6a5TRRbfKi/6d8E9B0i90yENW+purdPoRNyrwa 3RnwwP/ShHnzCmqXEx01vGoR9yBJ+lW7LIQir4ku7cPB03Rg8wEhWkCgU2kRj8V7pi/y e+ap2a+smvMFzcNa2H+NcngB4ICBdY3L/3mXiFGsAh15VAM7xysQSrllzPJU8/OMqdw2 X7XihGUI0hS6+g3u3ek2B3S3HTAeoLtp3gpanA66FFEZeP0xnlEOWCP9cWSG0Swn2nN+ 0Xuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=QfIwNI7T0psn5lDqNEX4WmRlkGqyl7ZmRdxDmkjkE3o=; b=fbcLI+efY2JlGDdvx+f3xPF1Xj59bXwWv93CuVPc/dxKeL2QQQv3GFIlw2R25Taw6R R23G7SgNMytNbsPND+u1mopsAfCxbh6YMrSOW2IkQDAVdZVakDcvqeo/7MqN7pfKFiaw Ju6gVKFyZ07jKGiTkAqs4fFADLVrJvd6oCJtG2mAylxykV5dhKEaqOP8JfwxL/0Ifg5I 0EGnKNql3mJLJSfqbFwki9v9UWjShKTJs0Zm+8xl+Uf07QZtHPRkHLwU83vD6teaU2uc T+ZStbtQFChxoC/Lhb7xoKgSRNiysYBNs/X6lpUTBXWbNgQ6i27K5Dp1ofv8HtgbR/cQ xRlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uUzlkjM9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a21-20020a1709066d5500b007b29ccd79c0si4532818ejt.590.2022.12.12.04.36.01; Mon, 12 Dec 2022 04:36:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uUzlkjM9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232214AbiLLMfZ (ORCPT + 99 others); Mon, 12 Dec 2022 07:35:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232238AbiLLMe7 (ORCPT ); Mon, 12 Dec 2022 07:34:59 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9EAF12ACE for ; Mon, 12 Dec 2022 04:34:20 -0800 (PST) Received: by mail-pj1-x1034.google.com with SMTP id z8-20020a17090abd8800b00219ed30ce47so15542799pjr.3 for ; Mon, 12 Dec 2022 04:34:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QfIwNI7T0psn5lDqNEX4WmRlkGqyl7ZmRdxDmkjkE3o=; b=uUzlkjM9xadP/wsfePCnqjzwimre9NyLsWAauCXIMA4K2H4sdT5xEbloK1SqvMpiI1 RbnWr8fQlEusmTFxO97E6HQ1SY+VLLpx6sUhuDJqsaXMoJP0o5up0rCoTYybXD16bjSA aShFXmtsF5KPZSAIn9B2I/d31rGvMztJVH6vtfl/b++okd4nu9Kk9FPoR8TXLQATuheJ r7UTt35dMuC18r94SFLCEwbfYUALLkwJ6XlpjFzImo2IStVCik4eblWALX0L9c+bkNeQ GGFJuMsb9mYhEuTkKtqKmMrm0wzFYLXUM8ja/vhaEuUngg7DDEcLEW3cLBDuCMUUESHN k2nQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QfIwNI7T0psn5lDqNEX4WmRlkGqyl7ZmRdxDmkjkE3o=; b=O4HVN9nKsBb7kYs5VR3MkexpeCbVnFEY5r7g1QZuoVpez/+bHbrn9981l7KoEW6Z0L 2FDabdggrdp30jMHjt8RL9G903PV15ceCHP+nb0NR9eY3KtTULaXaHPW3egI5vS018A6 n/cmdT4SNHBGC2eE77r2o33j4pR8RbTnkkCDC7Tx4wQ1qfTxjFKzhLb5IXBQ9J8UYHG7 9lQHKHySNnOGiWoH/ympZNh9hq1kNA5YW3J5jQTE9I6NY5xIXX3p1diGKg+KMTrQ2GdC gxdk1eJ0UYLI0uW/pU54SRMYLvzdVha1IbaKPjzYXLpHrWZ4vlBKAJBGKK/OSK80j/ow kDQw== X-Gm-Message-State: ANoB5plglkMp7A6EL+fk+7Gnv8Zer+ik0l2prIDWTfVurcc23SNLb5xl Mbyic+jhKpxBexdF+A+fB0ax X-Received: by 2002:a17:902:6bc8:b0:188:d2b3:26c1 with SMTP id m8-20020a1709026bc800b00188d2b326c1mr15270890plt.10.1670848437579; Mon, 12 Dec 2022 04:33:57 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.33.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:33:56 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH v2 06/13] arm64: dts: qcom: sc8280xp: Fix the base addresses of LLCC banks Date: Mon, 12 Dec 2022 18:03:04 +0530 Message-Id: <20221212123311.146261-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752011729351190143?= X-GMAIL-MSGID: =?utf-8?q?1752011729351190143?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Also, let's get rid of reg-names property as it is not needed anymore. The driver is expected to parse the reg field based on index to get the addresses of each LLCC banks. Cc: # 6.0 Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 109c9d2b684d..f8731cbccce9 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1856,8 +1856,11 @@ opp-6 { system-cache-controller@9200000 { compatible = "qcom,sc8280xp-llcc"; - reg = <0 0x09200000 0 0x58000>, <0 0x09600000 0 0x58000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>, + <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>, + <0 0x09600000 0 0x58000>; interrupts = ; }; From patchwork Mon Dec 12 12:33:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32362 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2216424wrr; Mon, 12 Dec 2022 04:36:31 -0800 (PST) X-Google-Smtp-Source: AA0mqf4CPfZB1w8gTxPRgCCizLUeyr6OUY1LiMmyq3gLDWDMeoyXZ1frSVY7ZiUKVoXaUcJwf5M3 X-Received: by 2002:a17:907:a782:b0:7c1:6e82:35fc with SMTP id vx2-20020a170907a78200b007c16e8235fcmr5378192ejc.40.1670848591417; Mon, 12 Dec 2022 04:36:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670848591; cv=none; d=google.com; s=arc-20160816; b=Fum9ANE/KkyYncsy+Vzkg0jB/DNdM4hw/rfTDqkAu2oOmZuNmq0pf5TYmcTnFFF7Gl CAGdaSCNOlMKAM5xXTx22P6bceyeaseo+pCzaHyUKu7XxwAayw4XYFAwwnGusAadHjAn aAwFLspmKXfhHqE/OBRh9C1Bi/QCxWnlhZZHm6LxIYrkUL688JjQTegtByZp+cT39aA4 82VijzpsMhntBSkbJPhLmZoWIGWdv5POjMsNAvj6fOuJ7ydn2uz9K8UvGzb7kOx+5Qop 44xeRw87dNAWZHuodUhfM5CmXqOGwnJoa8VXNmUfx9DF1H7xxelb48aG6BysRzcRYRRG jltg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eZ3me+mcNSacplSG7BmxN9uUD75qHevGLumn9ggiZjk=; b=NNXq5qMLU9qi+ucKsPNQ+3W4fzNAzZO1+kOm2Zqm5ULwBEAPQBXeKjMHKGQuAEqSnV DdlnNqHjMleDhfP/cOFTfEIcPiunJHFnA63yKKgJ3UKKQUFaRsvsQOpuxobJPVURngbS pgZOw9PRWDil+eulRWcHSCich/1AFs88DquzRswdMpEp/4cXX3Zf4q8NcNGD0IJiKPwg B+Bdzr2Q/Hwk0WhkcLkIhw1CdpIfU3jBpPvi0gv8HUeoQ+OycoIaIhjmR+tHAVmmmUzN 5gMw/EuDzSP+iMEPGET2ZUl7uh+OsIGGw7QrS4cFUTUrz+l0JUnEhjCvcX7/SvijBcJU nbqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Da9bwkme; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id nb35-20020a1709071ca300b007a7fc67c880si7069011ejc.71.2022.12.12.04.36.07; Mon, 12 Dec 2022 04:36:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Da9bwkme; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232144AbiLLMfo (ORCPT + 99 others); Mon, 12 Dec 2022 07:35:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232165AbiLLMfH (ORCPT ); Mon, 12 Dec 2022 07:35:07 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A45B812630 for ; Mon, 12 Dec 2022 04:34:31 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id b13-20020a17090a5a0d00b0021906102d05so12030915pjd.5 for ; Mon, 12 Dec 2022 04:34:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eZ3me+mcNSacplSG7BmxN9uUD75qHevGLumn9ggiZjk=; b=Da9bwkmekbWk4IMIUkh88ZGsnj0KJGtXfDc1AWs0hK2XuiZj7jIKdfGvqnFHOM05L1 xR6JxwyCeCelvoW9qSumYDNeBnxnJVaUQ2S68T1zhtqGUQjg/cJC+dOYYP5g9THGora5 SDGBIqU2dYDoe2zPD73pcDBSKsbc+dREy3JgCmBwvtC+q7jJjRMvczc/0073uvJejuwC ajKJaapp4r8hMGUnvmiHYJtCEmDgLdZZUwUBez/Svg6YHD5jLJnN67iaiK+F+8GdxAcD fOIVwnxt/IIv7hVxyv5RESNOEGJRRe4D2svwqcttfGbyePU33mqv1f49V5zCr4l1aqfT jTBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eZ3me+mcNSacplSG7BmxN9uUD75qHevGLumn9ggiZjk=; b=h5vDDWCKrrTLZouCRLgmjhIHSR8go9dt8Yvi8A9IiTirEroKeGdoNzwx3KHyWohurl zIRqotvjgyky6kyPByATs5aEqjpdYdjZQxHhuYMGS12+w95mnK39JwgQ3t0vtSW11L7a dmF3T9Xgf6W9tuGhcy3n6eSoVBf0Eh9O+zbQ0Jjaf2nO9k5ZeOo/00XZ2HuYByh7xrmG sOFnYel2x1qEGEySSCXIPDX2AIIOLeoTySQ71OuxJW3QrZUKWWWiWkjavi4kQ72cgCJ+ cllG6z/nYfgWopV3schuf+nShueV1eCPp+StgFsLHlvIu4Vvxmaajr0RsZ/nu7q9qs3x /rNw== X-Gm-Message-State: ANoB5plhb9GNF3PGQ9OCM41PkeDUKECoWA6nQnRmXBZfLBaIMhusVF8O fZylSw1Ms4ptpROsqnx4x1s1 X-Received: by 2002:a17:902:9b8d:b0:186:605b:7527 with SMTP id y13-20020a1709029b8d00b00186605b7527mr15250039plp.48.1670848443991; Mon, 12 Dec 2022 04:34:03 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.33.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:34:03 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH v2 07/13] arm64: dts: qcom: sm8150: Fix the base addresses of LLCC banks Date: Mon, 12 Dec 2022 18:03:05 +0530 Message-Id: <20221212123311.146261-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752011733005291564?= X-GMAIL-MSGID: =?utf-8?q?1752011733005291564?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Also, let's get rid of reg-names property as it is not needed anymore. The driver is expected to parse the reg field based on index to get the addresses of each LLCC banks. Cc: # 5.11 Fixes: bb1f7cf68a2d ("arm64: dts: qcom: sm8150: Add LLC support for sm8150") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a0c57fb798d3..958655bf5b1a 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1762,8 +1762,9 @@ mmss_noc: interconnect@1740000 { system-cache-controller@9200000 { compatible = "qcom,sm8150-llcc"; - reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; interrupts = ; }; From patchwork Mon Dec 12 12:33:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32363 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2216490wrr; Mon, 12 Dec 2022 04:36:38 -0800 (PST) X-Google-Smtp-Source: AA0mqf7+ZhGKk3cUr9GqIiTMFL4Sx4PaL+G4Ejc5sB7CMGYO0j3/eZX5ytv5hrcORLq9JQBlkpbM X-Received: by 2002:a17:906:713:b0:7c0:dcc2:e7b1 with SMTP id y19-20020a170906071300b007c0dcc2e7b1mr12992018ejb.43.1670848598682; Mon, 12 Dec 2022 04:36:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670848598; cv=none; d=google.com; s=arc-20160816; b=IUfX38/vYA2H6rb4aKTOHlMj/SCleAtuyEevFIiBuLzOZc8m27EjSX2mznhDA7WD0a eihPfZhcsekkPwH9eOL7T+oGdJExPxoTGuhJ6ZjuQF2zyCWR4p+CVxwmjK4PrsXOiyvC VeZSKv2BN4dNpfDrwmDh8UlF1ud0sNnC3BMzZgvp7eCc1fVAuw4djkt7MvqxoB2nvI08 jIV+sJ3EAH/ZCLd7+JfsLbbZF3jsoutoGuk3cA2tn2x+BQmFtLRLxzMA2lMImrF+l4Ao oTvgjTa2uwjF9vINKpSlXLJzqU5Cgck5lX8UYZO8p8IdKOpIZ1Up21IBlUVs5k4OLVPB SWCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=w1T81HxDJP60aMe8zkxEbatF3LDjVT92Yb8ZgaRaQ8U=; b=DoE6I+JI4datyDL/dHFXl8QI/5y7Np9FVMjr7N2TCXAROwfs9sjUxfZp21KAnVD4hY ESlsETPPKCR1M/Q8vBzWIJYq5iCRR9POUWxoa6sUBIiIxMe6PbRAEfRd6MGqQ5eXG54I jR8aq8uzBTt6uPxsk+q3wRZNRkzxe8TWdryoqihKZ2lTF4ZRJJOIyKOjJrQZM7cs9NdU pFfxX95ky2yCk0mkNw8mGTFM91ROHbZqkxe7c0G5WHyX8kai4JndGpu/IuT4yvy5uJgL IJX3bztdDhMalclGGV943ERcUT07J17uU2XSt+ajIk7A9bzcxboWkJlzzIz9ONNUw1Ou +RXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RbZaWt4J; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Also, let's get rid of reg-names property as it is not needed anymore. The driver is expected to parse the reg field based on index to get the addresses of each LLCC banks. Cc: # 5.12 Fixes: 0085a33a25cc ("arm64: dts: qcom: sm8250: Add support for LLCC block") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index dab5579946f3..439ca5f6000e 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3545,8 +3545,9 @@ usb_1_dwc3: usb@a600000 { system-cache-controller@9200000 { compatible = "qcom,sm8250-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; }; usb_2: usb@a8f8800 { From patchwork Mon Dec 12 12:33:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32364 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2216499wrr; Mon, 12 Dec 2022 04:36:41 -0800 (PST) X-Google-Smtp-Source: AA0mqf4mQb+ZnQZKbCXvwBBCXlrr8ocfjZbwt1conzNnYUGWctIv7pK485EDrwL8QuMifEne0KTH X-Received: by 2002:aa7:d694:0:b0:46d:543:b4c7 with SMTP id d20-20020aa7d694000000b0046d0543b4c7mr14027626edr.17.1670848600963; Mon, 12 Dec 2022 04:36:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670848600; cv=none; d=google.com; s=arc-20160816; b=HQ3a54x6U/qV1+LFOo8sCZ5EN8S+nDtaKfROYph5M78fBys2I+Vh5uXa9Bv68kpiea kqJ/g7jAvMn+6k15cBr8PmMBlnZvh5bYiHIhsnUaSQjizko7TDXiEBQHP9yWNBvFET8H h7+YUDxd32PRwmZib/I8VNw8ZEi6jfQK6dyf4xssrO8yuceqmOQZM/UTG3JD3Ptsokhx BhP7Sb7vMcNLFrK71L6Bkf/689FFEj6w9iOt3KU83k6F3cTNVQgQPuubGGX7ERTxZzXA k3IXDx9nOkf8VrS44oIn0/LnLjPhFGGe+p/BOTChlqI4lJOKiVpM6yyves4wTswjIMZp C5tw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=apPGFedAv3uAmQAp6xD4tNC7N1DZdKzki801rLgGfFs=; b=0cXWm1BYuNb780UHFJzeYiMjgqGApjFiPeqTpfj/66bmPt7m+g4bp5b5MPAdRIlKz4 KMJ9lluhvAkp2/m0pSBdUTAei2vi9dk+O0dXxRnKCldPLC/oTJzrJz42mAVFYhUhTQNZ rmWG/K57Ze3Jo+LfZRHjI7yfdCvPTa6cBTy/kgzI974xmPiNvMXFiEsgKC7aNlt3QUjY pjBwqlu+OvxjXea/grKsoePVfUcv/A4jWWPezKtO5r0ZjZy0RQmFhE0g1lH8dSQULMdj K1t77xzc2e8qav9ZUiGKHKEbpqmyfj0otrXZwt7/p8H2mW8kkrpOCaOh3ITVG7DrNJIq tszQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rvpNc8D4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g13-20020a056402090d00b00451e0d930dfsi7439701edz.497.2022.12.12.04.36.17; Mon, 12 Dec 2022 04:36:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rvpNc8D4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231795AbiLLMf5 (ORCPT + 99 others); Mon, 12 Dec 2022 07:35:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232283AbiLLMfQ (ORCPT ); Mon, 12 Dec 2022 07:35:16 -0500 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E8AC12609 for ; Mon, 12 Dec 2022 04:34:39 -0800 (PST) Received: by mail-pj1-x102b.google.com with SMTP id 3-20020a17090a098300b00219041dcbe9so12041925pjo.3 for ; Mon, 12 Dec 2022 04:34:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=apPGFedAv3uAmQAp6xD4tNC7N1DZdKzki801rLgGfFs=; b=rvpNc8D4tUlWJjtdcx6r2kqPUvDpcCZXEVp8rHRZOdG2ZylbdXSlA8X1WBvN3Dcze+ AqowEJ/9OFPO3NuyEVu89W2Orgo1iLJY3jmbYAXE6QvpdTh4I4ctkJMUq90CF/BX7lfL wad84Nmgs7J6W8BRaaSM5GcgN8dmrcwRN9QPNACcBPyZOqhO7pziTJPcx+ht4ft6YBwc i/BcTPWVq4YlLIw/zLf4Ilk/vQEByu5A9DwIWXQ8PkZpSs4Yqg7HOBoJl9OGUjgEvTPj Bcxhyv2FEGNfVvupN4jXpr/eQVVFIgLWmSC16XdVCZQXba6uXFWN1upJfaCW4yOhXL4Q v8WQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=apPGFedAv3uAmQAp6xD4tNC7N1DZdKzki801rLgGfFs=; b=aKbByw7sW9CgGK4NAkIVmz1Q+1noOxfnMk6JMKjfb1NVXOCYOrFCWk+k9v5JWHLY0i QWBRNdahRUAX1MyXk/4KNU8sUgzySIxnPdJrulWsVb2AEK1ZTespnTpa4/7lH7Fubgqk QnbG99q8aApJpq3J6pN3F8RngB49zEZhc74Y1f95lPs5AuFQs+cisMYEjbsfH9tbPJQJ cD8h/fpEwbQNNC4PeAIaVGYFcHuippZ47d2YL5EnclMqZly6TTgww5i+GvLRft1yJt0u 9y/HcRUVwjRvsS0RxhnhXHgR8Y+P1xE02sJuAponWlzCHLHV6mMkPgzd5C7Z8CO6Ibl2 +VJw== X-Gm-Message-State: ANoB5plGNnPvnvFCPLW8mziJ88NCSHTZE7BGgTLtFfIULuGpAEvJYOLA PkOXy+odxbJplBBBUmxb7ZyS X-Received: by 2002:a17:902:a70b:b0:187:ede:e014 with SMTP id w11-20020a170902a70b00b001870edee014mr15848859plq.44.1670848456668; Mon, 12 Dec 2022 04:34:16 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.34.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:34:15 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH v2 09/13] arm64: dts: qcom: sm8350: Fix the base addresses of LLCC banks Date: Mon, 12 Dec 2022 18:03:07 +0530 Message-Id: <20221212123311.146261-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752011742320947971?= X-GMAIL-MSGID: =?utf-8?q?1752011742320947971?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Also, let's get rid of reg-names property as it is not needed anymore. The driver is expected to parse the reg field based on index to get the addresses of each LLCC banks. Cc: # 5.17 Fixes: 9ac8999e8d6c ("arm64: dts: qcom: sm8350: Add LLCC node") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 245dce24ec59..7f76778e1bc8 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2513,8 +2513,9 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sm8350-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09600000 0 0x58000>; }; usb_1: usb@a6f8800 { From patchwork Mon Dec 12 12:33:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32365 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2216820wrr; Mon, 12 Dec 2022 04:37:27 -0800 (PST) X-Google-Smtp-Source: AA0mqf5hXuc4qytUUEjvWcted7VWD57sV6YN2LeDJiYiuCKzYUyLaKvY93ruIuCrdruXnHdCZ4K/ X-Received: by 2002:a17:907:d68e:b0:7c1:4f7c:947f with SMTP id wf14-20020a170907d68e00b007c14f7c947fmr930378ejc.72.1670848647192; Mon, 12 Dec 2022 04:37:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670848647; cv=none; d=google.com; s=arc-20160816; b=FSghDdEsZqzGlxtjm40VXYZ7BXkd0hU1mJV1XYi4RioLoZkq1c3B6mQaidliPtJimT eGWzvy3/PxUU5Pp+AMi5hk2EG4eDmg7X7xaABtbyGanM2qSl4hxPmWBT2i9QoWvEne10 lJ+os7Soyp98JpFt4BU9eg/DX435+SWnQlZwrKoxpE6N9GY/oCY8oPdeBWTjt0nZ1yBk AA29g4z3vZME1UJdlAH7sWHnRT9VqT3e3sV7s28q+EUPy3keq7fu5g+o2PaeVvtH1eFn qOceSVDtV8r6960pq8mEjbCk3eCkdfHB1DFZ6NWMLT0yQUMaLA2ZzTQdHrSfq4a8g25W 8faQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Zx2M7VMZ7B8c+kUNjbNWr72iqwdGfw5WQdhiPZvJmow=; b=Vgue2BzXEYwp2ti45teT6GMzaAu2+VJwptKfQv9KI6nVsukYSmAaDe4CyJAETuocVy iIRjMXMw7klIDcyS0SGWqpmHa494hWSBz3CHrTj0CtZYwYr5rNroXSzWYcpt+DTOewVr JjAyENHyeHihto0nx02h0K3KrqND0rlpnlhloKuAEksaq+syzrZDB0L3CxUvk5jLc9DS i12zFvpEyODUKUM8KpA7hyu6EBBAUH6I6VBXOwNvo8tIJ1A18jgid20lQtu6hnITgoEn qEKPUHh6JSUjbvqUD8EoiG60NN70XkWmTQp2osr9AkQcgKUp1/D3HNDX968knUJ0LiFw ZwYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ChLTkPtB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id oz20-20020a1709077d9400b007c16e4d5ea6si2752641ejc.957.2022.12.12.04.37.03; Mon, 12 Dec 2022 04:37:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ChLTkPtB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232432AbiLLMgH (ORCPT + 99 others); Mon, 12 Dec 2022 07:36:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232349AbiLLMfU (ORCPT ); Mon, 12 Dec 2022 07:35:20 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A4B4B12ACD for ; Mon, 12 Dec 2022 04:34:41 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id o12so11869122pjo.4 for ; Mon, 12 Dec 2022 04:34:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Zx2M7VMZ7B8c+kUNjbNWr72iqwdGfw5WQdhiPZvJmow=; b=ChLTkPtBcMiMzezMr5A2k/fcxzH6GZXKGhXafIdMmQy6P5xxxt3QqlY6ZOdjvKYdIN gTsDu0KsZIk9DgOW+KRsCxcvrubIk8wqM8DHr665seHOSOZXZeoRRtJ2S7ghAOKiTbt9 8DDOCLnvdaXmZvuOG4nah8pl273WS2HWpXWWXi819Jq+mXKfGuJP2MU+LHagr9WmzPvy wati+Do384INbDYhAqsCSrN/NCYwhw5llsfJMRWga1SQddsSwPx6ZKsnrNIeCoyG4CRW RPbcBlJETeiMZWwg13OAMGT9Mqu1Dl/U88ulbkvtceR1/CujVA9la+MTowRWGxFt1OXi fLRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Zx2M7VMZ7B8c+kUNjbNWr72iqwdGfw5WQdhiPZvJmow=; b=XZnZLbvFdGYeMMZan26uPzktPp6VdICkzq62Egwwqns+biBn/emt+eVOhJwf+M+Km8 F7qGeAsiLtY+wrqwr78LvzvimZ2U0MUwrSJII8uuod8at3qe8WPWR3pgVX7WVjDd1tFY Y4UUGiS0ujzx27rBFkdd11Z2qn2GdTe8paoN8JWCYT1NejmNwXbsW5bOJc844ACMKLL0 1AeB/Pxgk9dm591dNBlbFAnQqgd3r4LHGoMIuRWK1rFxBplETqk5SWwmtTDrNU6RJ36x bnsB9zWF2zeZqmfuj3DE0HsCoHe9daypqw25HeaPC91k1v8qqyHjHz5KHuAE2+RQM9TV 9Syg== X-Gm-Message-State: ANoB5pn2j4B0nH8hHgU/nrHGXd5RHt/gfVG/s/1wUVgyx5/8eiqq34I5 ucVpPPPYAA4gOge0DCp7ABh+T3xTkbyyo5o= X-Received: by 2002:a17:902:e952:b0:189:dc3:ee9c with SMTP id b18-20020a170902e95200b001890dc3ee9cmr18076957pll.65.1670848463236; Mon, 12 Dec 2022 04:34:23 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.34.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:34:22 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH v2 10/13] arm64: dts: qcom: sm8450: Fix the base addresses of LLCC banks Date: Mon, 12 Dec 2022 18:03:08 +0530 Message-Id: <20221212123311.146261-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752011791434864566?= X-GMAIL-MSGID: =?utf-8?q?1752011791434864566?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Also, let's get rid of reg-names property as it is not needed anymore. The driver is expected to parse the reg field based on index to get the addresses of each LLCC banks. Cc: # 5.18 Fixes: 1dc3e50eb680 ("arm64: dts: qcom: sm8450: Add LLCC/system-cache-controller node") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 570475040d95..30685857021a 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3640,8 +3640,9 @@ gem_noc: interconnect@19100000 { system-cache-controller@19200000 { compatible = "qcom,sm8450-llcc"; - reg = <0 0x19200000 0 0x580000>, <0 0x19a00000 0 0x80000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x19200000 0 0x80000>, <0 0x19600000 0 0x80000>, + <0 0x19300000 0 0x80000>, <0 0x19700000 0 0x80000>, + <0 0x19a00000 0 0x80000>; interrupts = ; }; From patchwork Mon Dec 12 12:33:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32367 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2221042wrr; Mon, 12 Dec 2022 04:47:47 -0800 (PST) X-Google-Smtp-Source: AA0mqf43hV8tEi0jv1SIM5985mcMvVZfO1UcSgp/pP0/5ditHcT+1FFRAJZlJSPKym4z4/5LNSkl X-Received: by 2002:a17:90b:3c08:b0:221:1232:b0ec with SMTP id pb8-20020a17090b3c0800b002211232b0ecmr8759804pjb.21.1670849266833; Mon, 12 Dec 2022 04:47:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670849266; cv=none; d=google.com; s=arc-20160816; b=EXYzkoFJgtoXsMZc4OIMCi9BzBtaPSFCEW9h3HwrZFMXev+npTyZsHuRr+QgoWKeMb wVSjNdvr1ZrK3oWU10qik5pO+F4U23UvPo4GvXoezYjSanEL5fQSJrX7+Y+h96TUe0KP EN4PrxIuM85tLL+68tCeAMs0vAcquUd9F7Byy7bjLaB7C07FfmtJ6nUhofyflgiNAPla 7ypo7S0SVzkA4sNiA5gqqQQgKtSUa8DuVjbt9mMi9gar0lt1/G7stwCoQ9RTs7OYPQlV dX52Ea/QdkmZWU3U1gOg8/NFA79hUTD0Hp1wPRi8Z7ZpYBN3+4DqsRkIY9BiWPKMW6g+ oxIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=cWyQujEvk1ZvvBEgjMYf46UtX0tdPlQNyeagksROeaI=; b=W5fo3hgh+rEvB6EZ2RHbn08pqWQK/zB/bjhZxEXpJh8/9d2xyd3alSchzKfvMN2KO2 UbGX8nWAHo2se5vaIjA2pQ7ECf4Zzv9/Rv8nJYYdpVpoKuzODtjyOrOJ26cFgr1olHn8 oOsysMYzjuQgzfqpXc9xSwx7aOcU4FSeng/IELRrwmJQ/IJqtS9vv/enMeIXrAebmhHi s2sFFvuEgSmfIe+UxhoEE6F/v7L8lUrXn7lbQQfBlcCYWNulxWXrNd9jK7i2RIPZicH5 PcwsxI6JMOFNyRMngXkLgCaK9gcvahOMkM+VllIk5oFHWKkrljheQ7FlqGyoOGNRvupT dYXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=M+NOjZk3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SM6350, there is only one LLCC bank available. So only change needed is to remove the reg-names property from LLCC node to conform to the binding. The driver is expected to parse the reg field based on index to get the addresses of each LLCC banks. Cc: # 5.16 Fixes: ced2f0d75e13 ("arm64: dts: qcom: sm6350: Add LLCC node") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 43324bf291c3..1f39627cd7c6 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1174,7 +1174,6 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sm6350-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; }; gem_noc: interconnect@9680000 { From patchwork Mon Dec 12 12:33:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 32368 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2221043wrr; Mon, 12 Dec 2022 04:47:47 -0800 (PST) X-Google-Smtp-Source: AA0mqf7MGXzRaoZwJV09pPFj0d/lqCwpgcYouq3vKxihZsqzSAqVdLaS7kYZLmRFkhN9liWP9mGf X-Received: by 2002:a17:903:189:b0:18c:1bc5:bd58 with SMTP id z9-20020a170903018900b0018c1bc5bd58mr25271714plg.9.1670849266861; Mon, 12 Dec 2022 04:47:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670849266; cv=none; d=google.com; s=arc-20160816; b=CUNAMm78NIxKLdR6KlLEtIjdx7m9drDi8vHEB6JzRPo/SeHbMy3fvgAFusx+WnpD+9 Z1JyziVKUnu9dRv+P3LMdwhaWo/FWnxo23UPwMUM8eJb48UpdZ/rqm3YIPuaGDwoY9ww g1GUM5NlebLaTzX0/QuoPAUA4mfc5KUJXLccO7+1+bCAYCo0Dfu7On8YkPrZuqKswfte qWZwh5irLIRpQMafQo8z7UVExhh0Sbk2ASENsgDuYrqZ52hX9z7Z+Zua1dE0T06taM/m J2fnVMZFT7HWrmaumlp/hSIBIXZ/YRto9PzHVNloNR6NyC7mVBobb0xBvrV5k687s9mz B2gA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wh6m1JcK6STNBXORkx35NkjOywagUzfiNFikKvcldrw=; b=GJnRTUtTgEgxlNeYzryY05TeVRHGdGiDVd7msTzM5RYu8YHtoZYOaeA7WwIi8xOzwf XjOz5Ql6zydQ4+wMaZ6dDhCUl5x2LOG/CaGviCAzjgz8rjwM8A/cpwahvsHJJ8y+WCh5 AcByGjqxwhfJnhnln9qdIkL/LP/Yc8yD7Vgs1mXteCYs5SyifCS//OxRku8QcQ5Sz9qR 65a5tKAHNxfx5+yoQM702LCk3G7+jeZ+Y8XSmMnmYGZbcZSO72U4wha79LyJTsBmS5Vg UZR1QhCFq1O33lHCrcbtHAaaiNH6+d4KBsbpS4JeQ5wpyg/FKtLjZ3ys0DcvvddSI0RJ ojkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tZ4QCiCi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v9-20020a1709029a0900b00189bdfb4710si8777673plp.280.2022.12.12.04.47.33; Mon, 12 Dec 2022 04:47:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tZ4QCiCi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232452AbiLLMgN (ORCPT + 99 others); Mon, 12 Dec 2022 07:36:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44278 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232355AbiLLMfY (ORCPT ); Mon, 12 Dec 2022 07:35:24 -0500 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26A9362CB for ; Mon, 12 Dec 2022 04:34:43 -0800 (PST) Received: by mail-pl1-x62d.google.com with SMTP id t2so8933343ply.2 for ; Mon, 12 Dec 2022 04:34:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wh6m1JcK6STNBXORkx35NkjOywagUzfiNFikKvcldrw=; b=tZ4QCiCi57c8AXrLrbQadVtl/gJetV5jfdp19zgCctxTIPtWX+IZUFLwMcQMtsf0QU yHsylcO5d6cpIAJO2tUg46uZ/SHRnlBIv9vaOSi1+V8nom1DY0+tlVE3FXvyMmtrpKPU lW7rUro7Q6LJxSMxP3XcYaCH0udFRMSMMRhHgIHQYQFU+9ILBDeSOXHtvKrmBnJjvr0r pQ95hoXf5efGxKJhnis5gINcO7es8xuDQqWTXrCZahMKCzNAS3+zBqSvb957dKlcNqNN VA57RPLouYDk1ntUhmunc9aRDxNuvNb+zL0KNqW6qaHRvKWqgTTvj99IeG1AaZcWjlRN ikRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wh6m1JcK6STNBXORkx35NkjOywagUzfiNFikKvcldrw=; b=QUlz/PGmqHxczLqpHLg8xCIj891/bR4A4CkJsAX2Bs7cf3IfMAdz6vXMjAe+bAn+7M MiWNky9C5LF6lh5uCWpZwCG0VnsxqZzjBFGvyr+0Vnoh4JSu5PwQ+0Xh9kAZqsn2Np98 DPBWt9nVVlDayrhjkyLXax6wkH7hzFGsbiCQXoGmkZjuOYRcaEHpg78FXXV/5ujWIAAT xvFHBLbDTgIjtchJ14DY+4OgizNc0BTpb7E67byz4hEnAY/oZKiLe9GaTsppBGuYz2zp YrvTt3Xl1bZQHp2GyHTgiDNHyf0k/+eHHHuMLUtbKQOfOqvp3UPaaI/M7i8KetFYHOcv rv7A== X-Gm-Message-State: ANoB5pkyZATBCtdA+ZhhUWNh0KfzZ2aK5tm+Yn4Oeqif17hjxTyTOBN+ 9199E4keXAO7heT8QmpTRFfL X-Received: by 2002:a17:902:f2ca:b0:189:ac49:fe9d with SMTP id h10-20020a170902f2ca00b00189ac49fe9dmr15186029plc.19.1670848475217; Mon, 12 Dec 2022 04:34:35 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.34.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:34:34 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH v2 12/13] qcom: llcc/edac: Fix the base address used for accessing LLCC banks Date: Mon, 12 Dec 2022 18:03:10 +0530 Message-Id: <20221212123311.146261-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752012441081096043?= X-GMAIL-MSGID: =?utf-8?q?1752012441081096043?= The Qualcomm LLCC/EDAC drivers were using a fixed register stride for accessing the (Control and Status Registers) CSRs of each LLCC bank. This stride only works for some SoCs like SDM845 for which driver support was initially added. But the later SoCs use different register stride that vary between the banks with holes in-between. So it is not possible to use a single register stride for accessing the CSRs of each bank. By doing so could result in a crash. For fixing this issue, let's obtain the base address of each LLCC bank from devicetree and get rid of the fixed stride. This also means, we no longer need to rely on reg-names property and get the base addresses using index. First index is LLCC bank 0 and last index is LLCC broadcast. If the SoC supports more than one bank, then those needs to be defined in devicetree for index from 1..N-1. Cc: # 4.20 Fixes: a3134fb09e0b ("drivers: soc: Add LLCC driver") Fixes: 27450653f1db ("drivers: edac: Add EDAC driver support for QCOM SoCs") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 14 +++--- drivers/soc/qcom/llcc-qcom.c | 72 +++++++++++++++++------------- include/linux/soc/qcom/llcc-qcom.h | 6 +-- 3 files changed, 48 insertions(+), 44 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 97a27e42dd61..5be93577fc03 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -213,7 +213,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) for (i = 0; i < reg_data.reg_cnt; i++) { synd_reg = reg_data.synd_reg + (i * 4); - ret = regmap_read(drv->regmap, drv->offsets[bank] + synd_reg, + ret = regmap_read(drv->regmaps[bank], synd_reg, &synd_val); if (ret) goto clear; @@ -222,8 +222,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) reg_data.name, i, synd_val); } - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.count_status_reg, + ret = regmap_read(drv->regmaps[bank], reg_data.count_status_reg, &err_cnt); if (ret) goto clear; @@ -233,8 +232,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) edac_printk(KERN_CRIT, EDAC_LLCC, "%s: Error count: 0x%4x\n", reg_data.name, err_cnt); - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.ways_status_reg, + ret = regmap_read(drv->regmaps[bank], reg_data.ways_status_reg, &err_ways); if (ret) goto clear; @@ -296,8 +294,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) /* Iterate over the banks and look for Tag RAM or Data RAM errors */ for (i = 0; i < drv->num_banks; i++) { - ret = regmap_read(drv->regmap, - drv->offsets[i] + DRP_INTERRUPT_STATUS, + ret = regmap_read(drv->regmaps[i], DRP_INTERRUPT_STATUS, &drp_error); if (!ret && (drp_error & SB_ECC_ERROR)) { @@ -312,8 +309,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) if (!ret) irq_rc = IRQ_HANDLED; - ret = regmap_read(drv->regmap, - drv->offsets[i] + TRP_INTERRUPT_0_STATUS, + ret = regmap_read(drv->regmaps[i], TRP_INTERRUPT_0_STATUS, &trp_error); if (!ret && (trp_error & SB_ECC_ERROR)) { diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 23ce2f78c4ed..a29f22dad7fa 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -62,8 +62,6 @@ #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c #define LLCC_TRP_ALGO_CFG8 0x21f30 -#define BANK_OFFSET_STRIDE 0x80000 - #define LLCC_VERSION_2_0_0_0 0x02000000 #define LLCC_VERSION_2_1_0_0 0x02010000 #define LLCC_VERSION_4_1_0_0 0x04010000 @@ -898,8 +896,8 @@ static int qcom_llcc_remove(struct platform_device *pdev) return 0; } -static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, - const char *name) +static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index, + const char *name) { void __iomem *base; struct regmap_config llcc_regmap_config = { @@ -909,7 +907,7 @@ static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, .fast_io = true, }; - base = devm_platform_ioremap_resource_byname(pdev, name); + base = devm_platform_ioremap_resource(pdev, index); if (IS_ERR(base)) return ERR_CAST(base); @@ -927,6 +925,7 @@ static int qcom_llcc_probe(struct platform_device *pdev) const struct llcc_slice_config *llcc_cfg; u32 sz; u32 version; + struct regmap *regmap; drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL); if (!drv_data) { @@ -934,21 +933,51 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; } - drv_data->regmap = qcom_llcc_init_mmio(pdev, "llcc_base"); - if (IS_ERR(drv_data->regmap)) { - ret = PTR_ERR(drv_data->regmap); + /* Initialize the first LLCC bank regmap */ + regmap = qcom_llcc_init_mmio(pdev, i, "llcc0_base"); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); goto err; } - drv_data->bcast_regmap = - qcom_llcc_init_mmio(pdev, "llcc_broadcast_base"); + cfg = of_device_get_match_data(&pdev->dev); + + ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); + if (ret) + goto err; + + num_banks &= LLCC_LB_CNT_MASK; + num_banks >>= LLCC_LB_CNT_SHIFT; + drv_data->num_banks = num_banks; + + drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); + if (!drv_data->regmaps) { + ret = -ENOMEM; + goto err; + } + + drv_data->regmaps[0] = regmap; + + /* Initialize rest of LLCC bank regmaps */ + for (i = 1; i < num_banks; i++) { + char *base = kasprintf(GFP_KERNEL, "llcc%d_base", i); + + drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); + if (IS_ERR(drv_data->regmaps[i])) { + ret = PTR_ERR(drv_data->regmaps[i]); + kfree(base); + goto err; + } + + kfree(base); + } + + drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); if (IS_ERR(drv_data->bcast_regmap)) { ret = PTR_ERR(drv_data->bcast_regmap); goto err; } - cfg = of_device_get_match_data(&pdev->dev); - /* Extract version of the IP */ ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], &version); @@ -957,15 +986,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) drv_data->version = version; - ret = regmap_read(drv_data->regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], - &num_banks); - if (ret) - goto err; - - num_banks &= LLCC_LB_CNT_MASK; - num_banks >>= LLCC_LB_CNT_SHIFT; - drv_data->num_banks = num_banks; - llcc_cfg = cfg->sct_data; sz = cfg->size; @@ -973,16 +993,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) if (llcc_cfg[i].slice_id > drv_data->max_slices) drv_data->max_slices = llcc_cfg[i].slice_id; - drv_data->offsets = devm_kcalloc(dev, num_banks, sizeof(u32), - GFP_KERNEL); - if (!drv_data->offsets) { - ret = -ENOMEM; - goto err; - } - - for (i = 0; i < num_banks; i++) - drv_data->offsets[i] = i * BANK_OFFSET_STRIDE; - drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, GFP_KERNEL); if (!drv_data->bitmap) { diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index ad1fd718169d..423220e66026 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -120,7 +120,7 @@ struct llcc_edac_reg_offset { /** * struct llcc_drv_data - Data associated with the llcc driver - * @regmap: regmap associated with the llcc device + * @regmaps: regmaps associated with the llcc device * @bcast_regmap: regmap associated with llcc broadcast offset * @cfg: pointer to the data structure for slice configuration * @edac_reg_offset: Offset of the LLCC EDAC registers @@ -129,12 +129,11 @@ struct llcc_edac_reg_offset { * @max_slices: max slices as read from device tree * @num_banks: Number of llcc banks * @bitmap: Bit map to track the active slice ids - * @offsets: Pointer to the bank offsets array * @ecc_irq: interrupt for llcc cache error detection and reporting * @version: Indicates the LLCC version */ struct llcc_drv_data { - struct regmap *regmap; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id gb8-20020a170907960800b007ae76a4e35fsi6214229ejc.5.2022.12.12.04.52.06; Mon, 12 Dec 2022 04:52:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eaCgJOSU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232464AbiLLMga (ORCPT + 99 others); Mon, 12 Dec 2022 07:36:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44350 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232140AbiLLMfm (ORCPT ); Mon, 12 Dec 2022 07:35:42 -0500 Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE6171276A for ; Mon, 12 Dec 2022 04:34:48 -0800 (PST) Received: by mail-pl1-x62c.google.com with SMTP id 4so5959461plj.3 for ; Mon, 12 Dec 2022 04:34:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Jie7lgdvEnIQyGE6zlhbT0B1hTmWl4xcVmRV6TIX7Ks=; b=eaCgJOSU0Eenl1pCm9rc7ZdHXRGdaf8ehej2UyKExNX14OP9y9q7t6bzQA9F6MFh8Y H5ULrBo5EayBNpm/RX2smnE8G548NKB+F/i7bd6N6gqpr21/w2Qd0P8N/nVI+2EMt6rF AAlK2EEuSaJIAuKutAfLU9L72haqT/M1tnZ2bOVub6MnlWS+qDQNFOZE/CyiureudYl6 9FcYjh41G5dtfMEYlWm98BRgL2o/VV5IpCu6tGc4VFD/0yOf4LyBy4Ybbompy1W5lgXb CGQ3l29KZo7FTLPLFOP7UcSTCXflCzB4YR7lqMTRmCQVsTMalLhAO8tzybd3nJVE4QwW yeWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Jie7lgdvEnIQyGE6zlhbT0B1hTmWl4xcVmRV6TIX7Ks=; b=LfjB3XmxLKOc592K31BvnFmwERfAit4odrndP3F5t+rPhVwo+cr2xWX0a8ZMHaMJeZ nFKfmAiowBFGFfhXU7W2lUUoFtuCqs9/IbYkIGoL7U8yo/Cqz+LLisk/mW9WTccv7HWS 5TvVBmm6fK8r0mN7a1C0Uji0bhei8dcJ1tvQmx9P66Vqgo1FZbNueGrdFc8ZF1K9XaH3 ZaLMVH3e0JdKTGYE7X/E1wXhlytdBRwT+Q7WF1DGfOc6ltrx42OC/oMyP4MtGaSh1GH8 uM/mbYWzxzs7Kt3lbaKb18iz0BtsD+To+5RXW1TxLQVHmzrQgE7w2fK01CZy/7Wy9Y+h TcvA== X-Gm-Message-State: ANoB5pkDFIxxJ49EeWTNIV/DTRwds9oYrcgLbAGSXIpJ6qbELUBu+AT/ Mh/tPiitdO1ij9ww6Se2u1I41JjKNK21Mhw= X-Received: by 2002:a17:902:9891:b0:189:2688:c97f with SMTP id s17-20020a170902989100b001892688c97fmr14982727plp.50.1670848481155; Mon, 12 Dec 2022 04:34:41 -0800 (PST) Received: from localhost.localdomain ([220.158.159.33]) by smtp.gmail.com with ESMTPSA id j14-20020a170902da8e00b00189c93ce5easm6252557plx.166.2022.12.12.04.34.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 04:34:40 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, Manivannan Sadhasivam Subject: [PATCH v2 13/13] qcom: llcc/edac: Support polling mode for ECC handling Date: Mon, 12 Dec 2022 18:03:11 +0530 Message-Id: <20221212123311.146261-14-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> References: <20221212123311.146261-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752012739766026733?= X-GMAIL-MSGID: =?utf-8?q?1752012739766026733?= Not all Qcom platforms support IRQ mode for ECC handling. For those platforms, the current EDAC driver will not be probed due to missing ECC IRQ in devicetree. So add support for polling mode so that the EDAC driver can be used on all Qcom platforms supporting LLCC. The polling delay of 5000ms is chosed based on Qcom downstream/vendor driver. Reported-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 37 +++++++++++++++++++++++++----------- drivers/soc/qcom/llcc-qcom.c | 13 ++++++------- 2 files changed, 32 insertions(+), 18 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 5be93577fc03..f7afb5375293 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -76,6 +76,8 @@ #define DRP0_INTERRUPT_ENABLE BIT(6) #define SB_DB_DRP_INTERRUPT_ENABLE 0x3 +#define ECC_POLL_MSEC 5000 + enum { LLCC_DRAM_CE = 0, LLCC_DRAM_UE, @@ -283,8 +285,7 @@ dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank) return ret; } -static irqreturn_t -llcc_ecc_irq_handler(int irq, void *edev_ctl) +static irqreturn_t llcc_ecc_irq_handler(int irq, void *edev_ctl) { struct edac_device_ctl_info *edac_dev_ctl = edev_ctl; struct llcc_drv_data *drv = edac_dev_ctl->pvt_info; @@ -328,6 +329,11 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) return irq_rc; } +static void llcc_ecc_check(struct edac_device_ctl_info *edev_ctl) +{ + llcc_ecc_irq_handler(0, edev_ctl); +} + static int qcom_llcc_edac_probe(struct platform_device *pdev) { struct llcc_drv_data *llcc_driv_data = pdev->dev.platform_data; @@ -356,22 +362,31 @@ static int qcom_llcc_edac_probe(struct platform_device *pdev) edev_ctl->panic_on_ue = LLCC_ERP_PANIC_ON_UE; edev_ctl->pvt_info = llcc_driv_data; + /* Check if LLCC driver has passed ECC IRQ */ + ecc_irq = llcc_driv_data->ecc_irq; + if (ecc_irq > 0) { + /* Use interrupt mode if IRQ is available */ + edac_op_state = EDAC_OPSTATE_INT; + } else { + /* Fall back to polling mode otherwise */ + edac_op_state = EDAC_OPSTATE_POLL; + edev_ctl->poll_msec = ECC_POLL_MSEC; + edev_ctl->edac_check = llcc_ecc_check; + } + rc = edac_device_add_device(edev_ctl); if (rc) goto out_mem; platform_set_drvdata(pdev, edev_ctl); - /* Request for ecc irq */ - ecc_irq = llcc_driv_data->ecc_irq; - if (ecc_irq < 0) { - rc = -ENODEV; - goto out_dev; - } - rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, + /* Request ECC IRQ if available */ + if (ecc_irq > 0) { + rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, IRQF_TRIGGER_HIGH, "llcc_ecc", edev_ctl); - if (rc) - goto out_dev; + if (rc) + goto out_dev; + } return rc; diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index a29f22dad7fa..e044e6756415 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -1011,13 +1011,12 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); - if (drv_data->ecc_irq >= 0) { - llcc_edac = platform_device_register_data(&pdev->dev, - "qcom_llcc_edac", -1, drv_data, - sizeof(*drv_data)); - if (IS_ERR(llcc_edac)) - dev_err(dev, "Failed to register llcc edac driver\n"); - } + + llcc_edac = platform_device_register_data(&pdev->dev, + "qcom_llcc_edac", -1, drv_data, + sizeof(*drv_data)); + if (IS_ERR(llcc_edac)) + dev_err(dev, "Failed to register llcc edac driver\n"); return 0; err: