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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b13-20020a056402278d00b0046b10da2e10si7034391ede.307.2022.12.08.03.46.26; Thu, 08 Dec 2022 03:46:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=CfRMkNzJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229840AbiLHLkI (ORCPT + 99 others); Thu, 8 Dec 2022 06:40:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34692 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229513AbiLHLkF (ORCPT ); Thu, 8 Dec 2022 06:40:05 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D63B169312; Thu, 8 Dec 2022 03:40:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670499603; x=1702035603; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Qgxkm+hslu5ANNtRAJnguOiLY8Ma4a1dwPWoNFooZGw=; b=CfRMkNzJLslfy7lsfyNHfHIq/kMOBoKnkfDh6MDO0Ng1OfeIY9UgKMMv MQJsEmE8FgeF2HBVSvbk7XiJl1mLC2LYFKUU7q8gStBUFUof2Z5D7+zBZ LfubPOjSjyLj+NG83caBkcE8ZOHs1VUjWmiMwvpde7t41lGwk8j1Iy5j4 CyOBklxXJxdYgJlZNoSE+pMfjZRJQuxsHmkZ6NtyUFSr1WnfRxLx4laIB lHLxh4TCg1Wo0Xx3CBRXiDNaX60zGyFeHE0r+FB89Ztzw0esdYKGjspnV 7NBYo9CkySK6TyqipVCorpaYl4m/kxcGuuAIdGw84XJtjSEVYo9q/E0RX g==; X-IronPort-AV: E=Sophos;i="5.96,227,1665471600"; d="scan'208";a="192220462" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Dec 2022 04:40:03 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 8 Dec 2022 04:40:02 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 8 Dec 2022 04:39:59 -0700 From: Claudiu Beznea To: , , , , CC: , , , Claudiu Beznea Subject: [PATCH 1/3] clk: at91: mark ddr clocks as critical Date: Thu, 8 Dec 2022 13:45:13 +0200 Message-ID: <20221208114515.35179-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20221208114515.35179-1-claudiu.beznea@microchip.com> References: <20221208114515.35179-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751646220086943297?= X-GMAIL-MSGID: =?utf-8?q?1751646220086943297?= Mark DDR clocks as critical for AT91 devices. These clocks are enabled by bootloader when initializing DDR and needs to stay enabled. Up to this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c which does only clock request and enable. There is no need to have a separate driver just for this, thus the atmel-sdramc.c will be deleted in a subsequent patch. Signed-off-by: Claudiu Beznea --- drivers/clk/at91/at91rm9200.c | 2 +- drivers/clk/at91/at91sam9260.c | 2 +- drivers/clk/at91/at91sam9g45.c | 10 ++++++++-- drivers/clk/at91/at91sam9n12.c | 12 +++++++++--- drivers/clk/at91/at91sam9rl.c | 2 +- drivers/clk/at91/at91sam9x5.c | 17 ++++++++++++----- drivers/clk/at91/clk-peripheral.c | 8 ++++---- drivers/clk/at91/clk-system.c | 4 ++-- drivers/clk/at91/dt-compat.c | 25 +++++++++++++++++++++++-- drivers/clk/at91/pmc.h | 4 ++-- drivers/clk/at91/sam9x60.c | 20 ++++++++++++++++---- drivers/clk/at91/sama5d2.c | 22 +++++++++++++++++----- drivers/clk/at91/sama5d3.c | 20 ++++++++++++++++---- drivers/clk/at91/sama5d4.c | 22 +++++++++++++++++----- drivers/clk/at91/sama7g5.c | 4 ++-- 15 files changed, 131 insertions(+), 43 deletions(-) diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c index 16870943a13e..0b860126d589 100644 --- a/drivers/clk/at91/at91rm9200.c +++ b/drivers/clk/at91/at91rm9200.c @@ -183,7 +183,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91rm9200_systemck); i++) { hw = at91_clk_register_system(regmap, at91rm9200_systemck[i].n, at91rm9200_systemck[i].p, - at91rm9200_systemck[i].id); + at91rm9200_systemck[i].id, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c index 11550e50cd9f..b521f470428f 100644 --- a/drivers/clk/at91/at91sam9260.c +++ b/drivers/clk/at91/at91sam9260.c @@ -460,7 +460,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np, for (i = 0; i < data->num_sck; i++) { hw = at91_clk_register_system(regmap, data->sck[i].n, data->sck[i].p, - data->sck[i].id); + data->sck[i].id, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c index 8c9344451f46..5099669ddcbd 100644 --- a/drivers/clk/at91/at91sam9g45.c +++ b/drivers/clk/at91/at91sam9g45.c @@ -40,9 +40,14 @@ static const struct clk_pll_characteristics plla_characteristics = { static const struct { char *n; char *p; + unsigned long flags; u8 id; } at91sam9g45_systemck[] = { - { .n = "ddrck", .p = "masterck_div", .id = 2 }, + /* + * ddrck feeds DDR controller and is enabled by bootloader thus we need + * to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL }, { .n = "uhpck", .p = "usbck", .id = 6 }, { .n = "pck0", .p = "prog0", .id = 8 }, { .n = "pck1", .p = "prog1", .id = 9 }, @@ -198,7 +203,8 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91sam9g45_systemck); i++) { hw = at91_clk_register_system(regmap, at91sam9g45_systemck[i].n, at91sam9g45_systemck[i].p, - at91sam9g45_systemck[i].id); + at91sam9g45_systemck[i].id, + at91sam9g45_systemck[i].flags); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c index 0bb19400d199..08a10e12d08d 100644 --- a/drivers/clk/at91/at91sam9n12.c +++ b/drivers/clk/at91/at91sam9n12.c @@ -54,9 +54,14 @@ static const struct clk_pll_characteristics pllb_characteristics = { static const struct { char *n; char *p; + unsigned long flags; u8 id; } at91sam9n12_systemck[] = { - { .n = "ddrck", .p = "masterck_div", .id = 2 }, + /* + * ddrck feeds DDR controller and is enabled by bootloader thus we need + * to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL }, { .n = "lcdck", .p = "masterck_div", .id = 3 }, { .n = "uhpck", .p = "usbck", .id = 6 }, { .n = "udpck", .p = "usbck", .id = 7 }, @@ -223,7 +228,8 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91sam9n12_systemck); i++) { hw = at91_clk_register_system(regmap, at91sam9n12_systemck[i].n, at91sam9n12_systemck[i].p, - at91sam9n12_systemck[i].id); + at91sam9n12_systemck[i].id, + at91sam9n12_systemck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -236,7 +242,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np) at91sam9n12_periphck[i].n, "masterck_div", at91sam9n12_periphck[i].id, - &range, INT_MIN); + &range, INT_MIN, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c index b992137bab02..1a1b6b2bb0e3 100644 --- a/drivers/clk/at91/at91sam9rl.c +++ b/drivers/clk/at91/at91sam9rl.c @@ -160,7 +160,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91sam9rl_systemck); i++) { hw = at91_clk_register_system(regmap, at91sam9rl_systemck[i].n, at91sam9rl_systemck[i].p, - at91sam9rl_systemck[i].id); + at91sam9rl_systemck[i].id, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c index 3857db2e144b..13e589c95907 100644 --- a/drivers/clk/at91/at91sam9x5.c +++ b/drivers/clk/at91/at91sam9x5.c @@ -41,9 +41,14 @@ static const struct clk_pll_characteristics plla_characteristics = { static const struct { char *n; char *p; + unsigned long flags; u8 id; } at91sam9x5_systemck[] = { - { .n = "ddrck", .p = "masterck_div", .id = 2 }, + /* + * ddrck feeds DDR controller and is enabled by bootloader thus we need + * to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL }, { .n = "smdck", .p = "smdclk", .id = 4 }, { .n = "uhpck", .p = "usbck", .id = 6 }, { .n = "udpck", .p = "usbck", .id = 7 }, @@ -248,7 +253,8 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, for (i = 0; i < ARRAY_SIZE(at91sam9x5_systemck); i++) { hw = at91_clk_register_system(regmap, at91sam9x5_systemck[i].n, at91sam9x5_systemck[i].p, - at91sam9x5_systemck[i].id); + at91sam9x5_systemck[i].id, + at91sam9x5_systemck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -256,7 +262,8 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, } if (has_lcdck) { - hw = at91_clk_register_system(regmap, "lcdck", "masterck_div", 3); + hw = at91_clk_register_system(regmap, "lcdck", "masterck_div", + 3, 0); if (IS_ERR(hw)) goto err_free; @@ -269,7 +276,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, at91sam9x5_periphck[i].n, "masterck_div", at91sam9x5_periphck[i].id, - &range, INT_MIN); + &range, INT_MIN, 0); if (IS_ERR(hw)) goto err_free; @@ -282,7 +289,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, extra_pcks[i].n, "masterck_div", extra_pcks[i].id, - &range, INT_MIN); + &range, INT_MIN, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c index 5104d4025484..93ea685e27f6 100644 --- a/drivers/clk/at91/clk-peripheral.c +++ b/drivers/clk/at91/clk-peripheral.c @@ -445,7 +445,7 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, const struct clk_pcr_layout *layout, const char *name, const char *parent_name, u32 id, const struct clk_range *range, - int chg_pid) + int chg_pid, unsigned long flags) { struct clk_sam9x5_peripheral *periph; struct clk_init_data init; @@ -462,12 +462,12 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, init.name = name; init.parent_names = &parent_name; init.num_parents = 1; + init.flags = flags; if (chg_pid < 0) { - init.flags = 0; init.ops = &sam9x5_peripheral_ops; } else { - init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | - CLK_SET_RATE_PARENT; + init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | + CLK_SET_RATE_PARENT; init.ops = &sam9x5_peripheral_chg_ops; } diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c index 80720fd1a9cf..10193650429e 100644 --- a/drivers/clk/at91/clk-system.c +++ b/drivers/clk/at91/clk-system.c @@ -105,7 +105,7 @@ static const struct clk_ops system_ops = { struct clk_hw * __init at91_clk_register_system(struct regmap *regmap, const char *name, - const char *parent_name, u8 id) + const char *parent_name, u8 id, unsigned long flags) { struct clk_system *sys; struct clk_hw *hw; @@ -123,7 +123,7 @@ at91_clk_register_system(struct regmap *regmap, const char *name, init.ops = &system_ops; init.parent_names = &parent_name; init.num_parents = 1; - init.flags = CLK_SET_RATE_PARENT; + init.flags = CLK_SET_RATE_PARENT | flags; sys->id = id; sys->hw.init = &init; diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index 85a964cb2d89..97f67e23ef80 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -493,18 +493,28 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type) parent_name, id); } else { struct clk_range range = CLK_RANGE(0, 0); + unsigned long flags = 0; of_at91_get_clk_range(periphclknp, "atmel,clk-output-range", &range); + /* + * mpddr_clk feed DDR controller and is enabled by + * bootloader thus we need to keep it enabled in case + * there is no Linux consumer for it. + */ + if (!strcmp(periphclknp->name, "mpddr_clk")) + flags = CLK_IS_CRITICAL; + hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &dt_pcr_layout, name, parent_name, id, &range, - INT_MIN); + INT_MIN, + flags); } if (IS_ERR(hw)) @@ -879,6 +889,8 @@ static void __init of_at91rm9200_clk_sys_setup(struct device_node *np) return; for_each_child_of_node(np, sysclknp) { + unsigned long flags = 0; + if (of_property_read_u32(sysclknp, "reg", &id)) continue; @@ -887,7 +899,16 @@ static void __init of_at91rm9200_clk_sys_setup(struct device_node *np) parent_name = of_clk_get_parent_name(sysclknp, 0); - hw = at91_clk_register_system(regmap, name, parent_name, id); + /* + * ddrck feeds DDR controller and is enabled by bootloader thus + * we need to keep it enabled in case there is no Linux consumer + * for it. + */ + if (!strcmp(sysclknp->name, "ddrck")) + flags = CLK_IS_CRITICAL; + + hw = at91_clk_register_system(regmap, name, parent_name, id, + flags); if (IS_ERR(hw)) continue; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index efe4975bddc3..1b3ca7dd9b57 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -199,7 +199,7 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, const struct clk_pcr_layout *layout, const char *name, const char *parent_name, u32 id, const struct clk_range *range, - int chg_pid); + int chg_pid, unsigned long flags); struct clk_hw * __init at91_clk_register_pll(struct regmap *regmap, const char *name, @@ -242,7 +242,7 @@ at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name, struct clk_hw * __init at91_clk_register_system(struct regmap *regmap, const char *name, - const char *parent_name, u8 id); + const char *parent_name, u8 id, unsigned long flags); struct clk_hw * __init at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name, diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index 9ea4ce501bad..ac070db58195 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -75,9 +75,14 @@ static const struct clk_pcr_layout sam9x60_pcr_layout = { static const struct { char *n; char *p; + unsigned long flags; u8 id; } sam9x60_systemck[] = { - { .n = "ddrck", .p = "masterck_div", .id = 2 }, + /* + * ddrck feeds DDR controller and is enabled by bootloader thus we need + * to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL }, { .n = "uhpck", .p = "usbck", .id = 6 }, { .n = "pck0", .p = "prog0", .id = 8 }, { .n = "pck1", .p = "prog1", .id = 9 }, @@ -86,6 +91,7 @@ static const struct { static const struct { char *n; + unsigned long flags; u8 id; } sam9x60_periphck[] = { { .n = "pioA_clk", .id = 2, }, @@ -132,7 +138,11 @@ static const struct { { .n = "pioD_clk", .id = 44, }, { .n = "tcb1_clk", .id = 45, }, { .n = "dbgu_clk", .id = 47, }, - { .n = "mpddr_clk", .id = 49, }, + /* + * mpddr_clk feeds DDR controller and is enabled by bootloader thus we + * need to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "mpddr_clk", .id = 49, .flags = CLK_IS_CRITICAL }, }; static const struct { @@ -315,7 +325,8 @@ static void __init sam9x60_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sam9x60_systemck); i++) { hw = at91_clk_register_system(regmap, sam9x60_systemck[i].n, sam9x60_systemck[i].p, - sam9x60_systemck[i].id); + sam9x60_systemck[i].id, + sam9x60_systemck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -328,7 +339,8 @@ static void __init sam9x60_pmc_setup(struct device_node *np) sam9x60_periphck[i].n, "masterck_div", sam9x60_periphck[i].id, - &range, INT_MIN); + &range, INT_MIN, + sam9x60_periphck[i].flags); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index 84156dc52bff..c0e3e1a4bbf3 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -40,9 +40,14 @@ static const struct clk_pcr_layout sama5d2_pcr_layout = { static const struct { char *n; char *p; + unsigned long flags; u8 id; } sama5d2_systemck[] = { - { .n = "ddrck", .p = "masterck_div", .id = 2 }, + /* + * ddrck feeds DDR controller and is enabled by bootloader thus we need + * to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL }, { .n = "lcdck", .p = "masterck_div", .id = 3 }, { .n = "uhpck", .p = "usbck", .id = 6 }, { .n = "udpck", .p = "usbck", .id = 7 }, @@ -97,6 +102,7 @@ static const struct { static const struct { char *n; + unsigned long flags; u8 id; } sama5d2_periphck[] = { { .n = "dma0_clk", .id = 6, }, @@ -104,7 +110,11 @@ static const struct { { .n = "aes_clk", .id = 9, }, { .n = "aesb_clk", .id = 10, }, { .n = "sha_clk", .id = 12, }, - { .n = "mpddr_clk", .id = 13, }, + /* + * mpddr_clk feeds DDR controller and is enabled by bootloader thus we + * need to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "mpddr_clk", .id = 13, .flags = CLK_IS_CRITICAL }, { .n = "matrix0_clk", .id = 15, }, { .n = "sdmmc0_hclk", .id = 31, }, { .n = "sdmmc1_hclk", .id = 32, }, @@ -302,7 +312,8 @@ static void __init sama5d2_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sama5d2_systemck); i++) { hw = at91_clk_register_system(regmap, sama5d2_systemck[i].n, sama5d2_systemck[i].p, - sama5d2_systemck[i].id); + sama5d2_systemck[i].id, + sama5d2_systemck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -315,7 +326,8 @@ static void __init sama5d2_pmc_setup(struct device_node *np) sama5d2_periphck[i].n, "masterck_div", sama5d2_periphck[i].id, - &range, INT_MIN); + &range, INT_MIN, + sama5d2_periphck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -329,7 +341,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np) "h32mxck", sama5d2_periph32ck[i].id, &sama5d2_periph32ck[i].r, - INT_MIN); + INT_MIN, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c index 7e93c6edf305..ad6068b884de 100644 --- a/drivers/clk/at91/sama5d3.c +++ b/drivers/clk/at91/sama5d3.c @@ -40,9 +40,14 @@ static const struct clk_pcr_layout sama5d3_pcr_layout = { static const struct { char *n; char *p; + unsigned long flags; u8 id; } sama5d3_systemck[] = { - { .n = "ddrck", .p = "masterck_div", .id = 2 }, + /* + * ddrck feeds DDR controller and is enabled by bootloader thus we need + * to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL }, { .n = "lcdck", .p = "masterck_div", .id = 3 }, { .n = "smdck", .p = "smdclk", .id = 4 }, { .n = "uhpck", .p = "usbck", .id = 6 }, @@ -56,6 +61,7 @@ static const struct { char *n; u8 id; struct clk_range r; + unsigned long flags; } sama5d3_periphck[] = { { .n = "dbgu_clk", .id = 2, }, { .n = "hsmc_clk", .id = 5, }, @@ -99,7 +105,11 @@ static const struct { { .n = "tdes_clk", .id = 44, }, { .n = "trng_clk", .id = 45, }, { .n = "fuse_clk", .id = 48, }, - { .n = "mpddr_clk", .id = 49, }, + /* + * mpddr_clk feeds DDR controller and is enabled by bootloader thus we + * need to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "mpddr_clk", .id = 49, .flags = CLK_IS_CRITICAL }, }; static void __init sama5d3_pmc_setup(struct device_node *np) @@ -222,7 +232,8 @@ static void __init sama5d3_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sama5d3_systemck); i++) { hw = at91_clk_register_system(regmap, sama5d3_systemck[i].n, sama5d3_systemck[i].p, - sama5d3_systemck[i].id); + sama5d3_systemck[i].id, + sama5d3_systemck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -236,7 +247,8 @@ static void __init sama5d3_pmc_setup(struct device_node *np) "masterck_div", sama5d3_periphck[i].id, &sama5d3_periphck[i].r, - INT_MIN); + INT_MIN, + sama5d3_periphck[i].flags); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c index 1a14a9bce308..e876ec971a39 100644 --- a/drivers/clk/at91/sama5d4.c +++ b/drivers/clk/at91/sama5d4.c @@ -39,9 +39,14 @@ static const struct clk_pcr_layout sama5d4_pcr_layout = { static const struct { char *n; char *p; + unsigned long flags; u8 id; } sama5d4_systemck[] = { - { .n = "ddrck", .p = "masterck_div", .id = 2 }, + /* + * ddrck feeds DDR controller and is enabled by bootloader thus we need + * to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL }, { .n = "lcdck", .p = "masterck_div", .id = 3 }, { .n = "smdck", .p = "smdclk", .id = 4 }, { .n = "uhpck", .p = "usbck", .id = 6 }, @@ -103,12 +108,17 @@ static const struct { static const struct { char *n; + unsigned long flags; u8 id; } sama5d4_periphck[] = { { .n = "dma0_clk", .id = 8 }, { .n = "cpkcc_clk", .id = 10 }, { .n = "aesb_clk", .id = 13 }, - { .n = "mpddr_clk", .id = 16 }, + /* + * mpddr_clk feeds DDR controller and is enabled by bootloader thus we + * need to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "mpddr_clk", .id = 16, .flags = CLK_IS_CRITICAL }, { .n = "matrix0_clk", .id = 18 }, { .n = "vdec_clk", .id = 19 }, { .n = "dma1_clk", .id = 50 }, @@ -245,7 +255,8 @@ static void __init sama5d4_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sama5d4_systemck); i++) { hw = at91_clk_register_system(regmap, sama5d4_systemck[i].n, sama5d4_systemck[i].p, - sama5d4_systemck[i].id); + sama5d4_systemck[i].id, + sama5d4_systemck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -258,7 +269,8 @@ static void __init sama5d4_pmc_setup(struct device_node *np) sama5d4_periphck[i].n, "masterck_div", sama5d4_periphck[i].id, - &range, INT_MIN); + &range, INT_MIN, + sama5d4_periphck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -271,7 +283,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np) sama5d4_periph32ck[i].n, "h32mxck", sama5d4_periph32ck[i].id, - &range, INT_MIN); + &range, INT_MIN, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 9a213ba9e58b..f135b662f1ff 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -1068,7 +1068,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sama7g5_systemck); i++) { hw = at91_clk_register_system(regmap, sama7g5_systemck[i].n, sama7g5_systemck[i].p, - sama7g5_systemck[i].id); + sama7g5_systemck[i].id, 0); if (IS_ERR(hw)) goto err_free; @@ -1083,7 +1083,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) sama7g5_periphck[i].id, &sama7g5_periphck[i].r, sama7g5_periphck[i].chgp ? 0 : - INT_MIN); + INT_MIN, 0); if (IS_ERR(hw)) goto err_free; From patchwork Thu Dec 8 11:45:14 2022 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id o15-20020a170902d4cf00b00186b697ec66si23747860plg.399.2022.12.08.03.47.02; Thu, 08 Dec 2022 03:47:15 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b="CnNaHB/v"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229879AbiLHLkM (ORCPT + 99 others); Thu, 8 Dec 2022 06:40:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229838AbiLHLkI (ORCPT ); Thu, 8 Dec 2022 06:40:08 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1EA169325; Thu, 8 Dec 2022 03:40:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670499607; x=1702035607; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SXgXKN1INOLiOr03fMta7P4w+3K6ZAXMlIImpfrLuB8=; b=CnNaHB/v8Wnzm02PRypDoQbP1VxO9CUy7aRozuJEIbAKiG8hANSB48Y4 Lm/pJiWnjIFZRfkVgAJ2U4bI8NfarX22OodwlJaxzDuyDs8CpPxYzvcTb V3IInepo5Fx+C3kVT31/6blPz3ua0R8166S2tWHOeA7EigU8FXgxOjnRd BofnUD4gTPIpRFhbdqw/Cr7OMBFNDgWJM5WBTRZicaBaJEok9JgORLr9K i/s8WsNcwaBdiU49ICAmQAwRAo8wvP+QjwOVR0gBk5s6NDmC5rsGV2ltx 0WfUWZ8nGv1iai1eOSewEzww7+FEhNM5Ao/OC8ZHS61zrsUEfJKgRxSOO Q==; X-IronPort-AV: E=Sophos;i="5.96,227,1665471600"; d="scan'208";a="127111681" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Dec 2022 04:40:07 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 8 Dec 2022 04:40:04 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 8 Dec 2022 04:40:02 -0700 From: Claudiu Beznea To: , , , , CC: , , , Claudiu Beznea Subject: [PATCH 2/3] memory: atmel-sdramc: remove the driver Date: Thu, 8 Dec 2022 13:45:14 +0200 Message-ID: <20221208114515.35179-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20221208114515.35179-1-claudiu.beznea@microchip.com> References: <20221208114515.35179-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751646245350828899?= X-GMAIL-MSGID: =?utf-8?q?1751646245350828899?= Driver does only clock request + enable for DDR clocks. DDR clocks are enabled by bootloader and need to stay that way in Linux. To avoid having these clocks disabled by clock subsystem in case there are no Linux consumers for them the clocks were marked as critical in clock drivers. With this, there is no need to have a separate driver that only does clock request + enable. Signed-off-by: Claudiu Beznea --- drivers/memory/Makefile | 1 - drivers/memory/atmel-sdramc.c | 76 ----------------------------------- 2 files changed, 77 deletions(-) delete mode 100644 drivers/memory/atmel-sdramc.c diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index e148f636c082..d1836be010ec 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -8,7 +8,6 @@ ifeq ($(CONFIG_DDR),y) obj-$(CONFIG_OF) += of_memory.o endif obj-$(CONFIG_ARM_PL172_MPMC) += pl172.o -obj-$(CONFIG_ATMEL_SDRAMC) += atmel-sdramc.o obj-$(CONFIG_ATMEL_EBI) += atmel-ebi.o obj-$(CONFIG_BRCMSTB_DPFE) += brcmstb_dpfe.o obj-$(CONFIG_BRCMSTB_MEMC) += brcmstb_memc.o diff --git a/drivers/memory/atmel-sdramc.c b/drivers/memory/atmel-sdramc.c deleted file mode 100644 index 9c49d00c2a96..000000000000 --- a/drivers/memory/atmel-sdramc.c +++ /dev/null @@ -1,76 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Atmel (Multi-port DDR-)SDRAM Controller driver - * - * Author: Alexandre Belloni - * - * Copyright (C) 2014 Atmel - */ - -#include -#include -#include -#include -#include -#include - -struct at91_ramc_caps { - bool has_ddrck; - bool has_mpddr_clk; -}; - -static const struct at91_ramc_caps at91rm9200_caps = { }; - -static const struct at91_ramc_caps at91sam9g45_caps = { - .has_ddrck = 1, - .has_mpddr_clk = 0, -}; - -static const struct at91_ramc_caps sama5d3_caps = { - .has_ddrck = 1, - .has_mpddr_clk = 1, -}; - -static const struct of_device_id atmel_ramc_of_match[] = { - { .compatible = "atmel,at91rm9200-sdramc", .data = &at91rm9200_caps, }, - { .compatible = "atmel,at91sam9260-sdramc", .data = &at91rm9200_caps, }, - { .compatible = "atmel,at91sam9g45-ddramc", .data = &at91sam9g45_caps, }, - { .compatible = "atmel,sama5d3-ddramc", .data = &sama5d3_caps, }, - {}, -}; - -static int atmel_ramc_probe(struct platform_device *pdev) -{ - const struct at91_ramc_caps *caps; - struct clk *clk; - - caps = of_device_get_match_data(&pdev->dev); - - if (caps->has_ddrck) { - clk = devm_clk_get(&pdev->dev, "ddrck"); - if (IS_ERR(clk)) - return PTR_ERR(clk); - clk_prepare_enable(clk); - } - - if (caps->has_mpddr_clk) { - clk = devm_clk_get(&pdev->dev, "mpddr"); - if (IS_ERR(clk)) { - pr_err("AT91 RAMC: couldn't get mpddr clock\n"); - return PTR_ERR(clk); - } - clk_prepare_enable(clk); - } - - return 0; -} - -static struct platform_driver atmel_ramc_driver = { - .probe = atmel_ramc_probe, - .driver = { - .name = "atmel-ramc", - .of_match_table = atmel_ramc_of_match, - }, -}; - -builtin_platform_driver(atmel_ramc_driver); From patchwork Thu Dec 8 11:45:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 31309 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp144889wrr; Thu, 8 Dec 2022 03:47:40 -0800 (PST) X-Google-Smtp-Source: AA0mqf5gOHp9EjebKaghvrtqt2DsDcoqxpcWzsDYVLrW484jdDRt5iRsmqb45CNBDUcZO2NVi23a X-Received: by 2002:a17:90a:f298:b0:219:a032:1760 with SMTP id fs24-20020a17090af29800b00219a0321760mr25495189pjb.88.1670500060124; Thu, 08 Dec 2022 03:47:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670500060; cv=none; d=google.com; s=arc-20160816; b=FpW/gbvN93qivIJ3zOfaC9u7yrpLlXy80C/Nfsi/eyPNwMZ+a94RADi+WYCWFXndxE LtQ5mcdwY6Pm0TLrJa1jxxXA36CxC2FOIbIh5iXlpH0fHYxzcne1lGQIGnuiQiMtFP10 QOP+WBBw93RPl0WRVgpP7heeoivqNrzsERHqnLk0kYp8VcAJeyavgwkCDLBDzuAPcA2V L/3arWeKFarZ10Ux3uRevAeGjBRnBd2au0d6bICDpxxmz9LpdkRgKdkckTrVeBg7hVwM VElhtjixQVs15dKtRh5x0K4A68i6JEHgdmkCwtXvrpI8s+vNHgfFjwgnTcbh5MTJIX/n RZrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Xm2iyTaJGOolXoYl6l2F/xpEy3y6DkX27GrTVj3Ae9w=; b=TUEb0xEwHZzFnU/CwSFGnFwdfSQchhZ3tapp+x8894BEIpKaBLptxg+KtpCrb7OSwq gN5+f7G7jbDeVcdYrRG+pEFRZq5gY7a2tz6Qf0VMCJdvNkc9tpyQgtT1nDNiNkyyg7fZ lQo3HEPHAzLqMqI1nGTUNV1Ndv2bBo31taYlNeeuSBDPlOp8oWOxkwDi+dLrKJMMFQpy lMWrQCBZ3cOwCIKjiNOxUkPFZnAI/jsiIzNy85yQZSr9styGzGFb/SKIxFawZfoLsybH OHBdoh/ceoxnW4h8tTODimV6sF5TYhwwTDOWPMq7u4fu2q5/tpQqo85P3STBSHhi07IR mPbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=UJtw0GpV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y18-20020a63fa12000000b00477e813f416si22818132pgh.718.2022.12.08.03.47.26; Thu, 08 Dec 2022 03:47:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=UJtw0GpV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229902AbiLHLkP (ORCPT + 99 others); Thu, 8 Dec 2022 06:40:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229849AbiLHLkJ (ORCPT ); Thu, 8 Dec 2022 06:40:09 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A453469312; Thu, 8 Dec 2022 03:40:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670499608; x=1702035608; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=P2AhuNuw0hhvvoHkPSD7i53bD4Fb2nu00CbdeKoWjDE=; b=UJtw0GpVBZ0lF89aLO8XpuiYkNhUj/GBtviPQyP8bCOfy2bCpsbqXcQC a7kWP8JwGtGgqsIPhQ1R820K/0jVtgK0/q7o+yNnGR1z3HbDW/vg67rwr pCAWKN8cIkGaW7KX4Cmf++0MXjdZNHHZSg/FY4U0vnUuWFcge1ix50y6k ZSDBLp96kVzBbdmtYG68gsQW+0u15DPXFhXf6auuD8yNTTprLbko4sfv3 1zT7FRKgTZQzFWyQZ5LLN6VS+zlrxXxGglRkN5t7vJmiteh5F9DhPh5oN SUMDbc6K3Im6vPyUS0IRQ+7xkDoe7BTz9wMHUF9vxf4JO2JpCOdfulahk A==; X-IronPort-AV: E=Sophos;i="5.96,227,1665471600"; d="scan'208";a="127111689" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Dec 2022 04:40:08 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 8 Dec 2022 04:40:07 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 8 Dec 2022 04:40:04 -0700 From: Claudiu Beznea To: , , , , CC: , , , Claudiu Beznea Subject: [PATCH 3/3] clk: at91: do not compile dt-compat.c for sama7g5 and sam9x60 Date: Thu, 8 Dec 2022 13:45:15 +0200 Message-ID: <20221208114515.35179-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20221208114515.35179-1-claudiu.beznea@microchip.com> References: <20221208114515.35179-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751646270554978845?= X-GMAIL-MSGID: =?utf-8?q?1751646270554978845?= There is no need to have dt-compat.c compiled for SAMA7G5 and SAM9X60 as there is no in kernel device tree that could use it. Thus avoid compiling dt-compat.c for them. Signed-off-by: Claudiu Beznea --- drivers/clk/at91/Makefile | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile index 79301e1c1c36..89061b85e7d2 100644 --- a/drivers/clk/at91/Makefile +++ b/drivers/clk/at91/Makefile @@ -3,7 +3,7 @@ # Makefile for at91 specific clk # -obj-y += pmc.o sckc.o dt-compat.o +obj-y += pmc.o sckc.o obj-y += clk-slow.o clk-main.o clk-pll.o clk-plldiv.o clk-master.o obj-y += clk-system.o clk-peripheral.o clk-programmable.o @@ -15,12 +15,12 @@ obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o obj-$(CONFIG_HAVE_AT91_SAM9X60_PLL) += clk-sam9x60-pll.o -obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o -obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o at91sam9rl.o at91sam9x5.o -obj-$(CONFIG_SOC_AT91SAM9) += at91sam9g45.o -obj-$(CONFIG_SOC_AT91SAM9) += at91sam9n12.o at91sam9x5.o +obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o dt-compat.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o at91sam9rl.o at91sam9x5.o dt-compat.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9g45.o dt-compat.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9n12.o at91sam9x5.o dt-compat.o obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o -obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o -obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o -obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o +obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o dt-compat.o +obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o dt-compat.o +obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o dt-compat.o obj-$(CONFIG_SOC_SAMA7G5) += sama7g5.o