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[8.43.85.97]) by mx.google.com with ESMTPS id v20-20020a056402185400b0046b4156d18dsi5350151edy.44.2022.12.08.01.49.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 01:49:56 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=n+UWi5nM; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id F37D5387387F for ; Thu, 8 Dec 2022 09:49:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F37D5387387F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1670492996; bh=Nd0PLgi4nOtMtEH8uo7SHDAkVIkwXYtZi/QXfh+Idmo=; h=Date:To:Cc:Subject:References:In-Reply-To:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=n+UWi5nMPnVRaJM8hObQ/UHwX8zrEO5/hBcy/EVjH1emrhohUi2PN8NU6SuxEy8pc j/1Gq5pxOUKu+bEk40E6Ni9yRt9ulrJUuXpNcqDs7Q8ual61jxeP7gw4BDJmoZaVcf DHMX+8HuTAqd5WeRfx3qj9XeBFzT7L+hzT3ZqEOo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id D6FA1385B1B7 for ; Thu, 8 Dec 2022 09:49:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D6FA1385B1B7 Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-653-C5PLePngMr6trAJzsWEH5g-1; Thu, 08 Dec 2022 04:49:00 -0500 X-MC-Unique: C5PLePngMr6trAJzsWEH5g-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 05A8D3C0CD58; Thu, 8 Dec 2022 09:49:00 +0000 (UTC) Received: from tucnak.zalov.cz (unknown [10.39.195.114]) by smtp.corp.redhat.com (Postfix) with ESMTPS id ACF4317582; Thu, 8 Dec 2022 09:48:59 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.17.1/8.17.1) with ESMTPS id 2B89ms1d1994164 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Thu, 8 Dec 2022 10:48:55 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.17.1/8.17.1/Submit) id 2B89mmXn1994163; Thu, 8 Dec 2022 10:48:48 +0100 Date: Thu, 8 Dec 2022 10:48:47 +0100 To: Uros Bizjak , Roger Sayle Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] i386: Add *concat3_{5,6,7} patterns [PR107627] Message-ID: References: MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 3.1 on 10.11.54.5 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-Spam-Status: No, score=-14.5 required=5.0 tests=BAYES_00, DKIM_INVALID, DKIM_SIGNED, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SCC_5_SHORT_WORD_LINES, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jakub Jelinek via Gcc-patches From: Jakub Jelinek Reply-To: Jakub Jelinek Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751638864604840185?= X-GMAIL-MSGID: =?utf-8?q?1751638864604840185?= Hi! On Thu, Dec 01, 2022 at 09:09:51AM +0100, Jakub Jelinek via Gcc-patches wrote: > BTW, I wonder if we couldn't add additional patterns which would catch > the case where one of the operands is constant. The following patch does add those. The difference with the patch on the 2 testcases is: baz: - movq 8(%rsi), %rax + movq 8(%rsi), %rsi + movq %rdi, %r8 movl %edx, %ecx - xorl %r8d, %r8d - xorl %edx, %edx - movabsq $-2401053089206453570, %r9 - orq %r8, %rax - orq %r9, %rdx - shrdq %rdx, %rax - movq %rax, (%rdi) + movabsq $-2401053089206453570, %rdi + movq %rsi, %rax + shrdq %rdi, %rax + movq %rax, (%r8) qux: - movq (%rsi), %rax + movq %rdi, %r8 + movq (%rsi), %rdi movl %edx, %ecx - xorl %r9d, %r9d - movabsq $-2401053089206453570, %r8 - movq %rax, %rdx - xorl %eax, %eax - orq %r8, %rax - orq %r9, %rdx - shrdq %rdx, %rax - movq %rax, (%rdi) + movabsq $-2401053089206453570, %rsi + movq %rsi, %rax + shrdq %rdi, %rax + movq %rax, (%r8) and garply: pushl %esi - xorl %edx, %edx + movl $-559038737, %esi pushl %ebx movl 16(%esp), %eax - orl $-559038737, %edx movl 20(%esp), %ecx - movl 4(%eax), %eax - shrdl %edx, %eax movl 12(%esp), %edx + movl 4(%eax), %ebx + movl %ebx, %eax + shrdl %esi, %eax fred: ... movl 16(%esp), %eax + movl $-889275714, %ebx movl 20(%esp), %ecx - movl (%eax), %eax - movl %eax, %edx - movl $0, %eax - orl $-889275714, %eax - shrdl %edx, %eax movl 12(%esp), %edx + movl (%eax), %esi + movl %ebx, %eax + shrdl %esi, %eax Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2022-12-08 Jakub Jelinek PR target/107627 * config/i386/i386.md (HALF, half): New mode attributes. (*concat3_5, *concat3_6, *concat3_7): New define_insn_and_split patterns. * gcc.target/i386/pr107627-3.c: New test. * gcc.target/i386/pr107627-4.c: New test. Jakub --- gcc/config/i386/i386.md.jj 2022-12-06 12:16:31.059905487 +0100 +++ gcc/config/i386/i386.md 2022-12-07 15:11:55.297914206 +0100 @@ -1134,6 +1134,10 @@ (define_mode_attr MODE_SIZE [(QI "1") (H (define_mode_attr DWI [(QI "HI") (HI "SI") (SI "DI") (DI "TI") (TI "OI")]) (define_mode_attr dwi [(QI "hi") (HI "si") (SI "di") (DI "ti") (TI "oi")]) +;; Half sized integer modes. +(define_mode_attr HALF [(TI "DI") (DI "SI")]) +(define_mode_attr half [(TI "di") (DI "si")]) + ;; LEA mode corresponding to an integer mode (define_mode_attr LEAMODE [(QI "SI") (HI "SI") (SI "SI") (DI "DI")]) @@ -11464,6 +11468,80 @@ (define_insn_and_split "*concatmode, operands[0], operands[1], operands[2]); DONE; }) + +(define_insn_and_split "*concat3_5" + [(set (match_operand:DWI 0 "nonimmediate_operand" "=ro") + (any_or_plus:DWI + (ashift:DWI (match_operand:DWI 1 "register_operand" "r") + (match_operand:DWI 2 "const_int_operand")) + (match_operand:DWI 3 "const_scalar_int_operand")))] + "INTVAL (operands[2]) == * BITS_PER_UNIT / 2 + && (mode == DImode + ? CONST_INT_P (operands[3]) + && (UINTVAL (operands[3]) & ~GET_MODE_MASK (SImode)) == 0 + : CONST_INT_P (operands[3]) + ? INTVAL (operands[3]) >= 0 + : CONST_WIDE_INT_NUNITS (operands[3]) == 2 + && CONST_WIDE_INT_ELT (operands[3], 1) == 0)" + "#" + "&& reload_completed" + [(clobber (const_int 0))] +{ + rtx op3 = simplify_subreg (mode, operands[3], mode, 0); + split_double_concat (mode, operands[0], op3, + gen_lowpart (mode, operands[1])); + DONE; +}) + +(define_insn_and_split "*concat3_6" + [(set (match_operand: 0 "nonimmediate_operand" "=ro,r") + (any_or_plus: + (ashift: + (zero_extend: + (match_operand:DWIH 1 "nonimmediate_operand" "r,m")) + (match_operand: 2 "const_int_operand")) + (match_operand: 3 "const_scalar_int_operand")))] + "INTVAL (operands[2]) == * BITS_PER_UNIT + && (mode == DImode + ? CONST_INT_P (operands[3]) + && (UINTVAL (operands[3]) & ~GET_MODE_MASK (SImode)) == 0 + : CONST_INT_P (operands[3]) + ? INTVAL (operands[3]) >= 0 + : CONST_WIDE_INT_NUNITS (operands[3]) == 2 + && CONST_WIDE_INT_ELT (operands[3], 1) == 0)" + "#" + "&& reload_completed" + [(clobber (const_int 0))] +{ + rtx op3 = simplify_subreg (mode, operands[3], mode, 0); + split_double_concat (mode, operands[0], op3, operands[1]); + DONE; +}) + +(define_insn_and_split "*concat3_7" + [(set (match_operand: 0 "nonimmediate_operand" "=ro,r") + (any_or_plus: + (zero_extend: + (match_operand:DWIH 1 "nonimmediate_operand" "r,m")) + (match_operand: 2 "const_scalar_int_operand")))] + "mode == DImode + ? CONST_INT_P (operands[2]) + && (UINTVAL (operands[2]) & GET_MODE_MASK (SImode)) == 0 + : CONST_WIDE_INT_P (operands[2]) + && CONST_WIDE_INT_NUNITS (operands[2]) == 2 + && CONST_WIDE_INT_ELT (operands[2], 0) == 0" + "#" + "&& reload_completed" + [(clobber (const_int 0))] +{ + rtx op2; + if (mode == DImode) + op2 = gen_int_mode (INTVAL (operands[2]) >> 32, mode); + else + op2 = gen_int_mode (CONST_WIDE_INT_ELT (operands[2], 1), mode); + split_double_concat (mode, operands[0], operands[1], op2); + DONE; +}) ;; Negation instructions --- gcc/testsuite/gcc.target/i386/pr107627-3.c.jj 2022-12-07 15:27:56.214095258 +0100 +++ gcc/testsuite/gcc.target/i386/pr107627-3.c 2022-12-07 13:22:44.728247774 +0100 @@ -0,0 +1,28 @@ +/* PR target/107627 */ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -masm=att" } */ +/* { dg-final { scan-assembler-not "\torq\t" } } */ + +static inline unsigned __int128 +foo (unsigned long long x, unsigned long long y) +{ + return ((unsigned __int128) x << 64) | y; +} + +static inline unsigned long long +bar (unsigned long long x, unsigned long long y, unsigned z) +{ + return foo (x, y) >> (z % 64); +} + +void +baz (unsigned long long *x, const unsigned long long *y, unsigned z) +{ + x[0] = bar (0xdeadbeefcafebabeULL, y[1], z); +} + +void +qux (unsigned long long *x, const unsigned long long *y, unsigned z) +{ + x[0] = bar (y[0], 0xdeadbeefcafebabeULL, z); +} --- gcc/testsuite/gcc.target/i386/pr107627-4.c.jj 2022-12-07 15:27:59.519047759 +0100 +++ gcc/testsuite/gcc.target/i386/pr107627-4.c 2022-12-07 13:23:28.050621778 +0100 @@ -0,0 +1,28 @@ +/* PR target/107627 */ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-O2 -masm=att" } */ +/* { dg-final { scan-assembler-not "\torl\t" } } */ + +static inline unsigned long long +qux (unsigned int x, unsigned int y) +{ + return ((unsigned long long) x << 32) | y; +} + +static inline unsigned int +corge (unsigned int x, unsigned int y, unsigned z) +{ + return qux (x, y) >> (z % 32); +} + +void +garply (unsigned int *x, const unsigned int *y, unsigned z) +{ + x[0] = corge (0xdeadbeefU, y[1], z); +} + +void +fred (unsigned int *x, const unsigned int *y, unsigned z) +{ + x[0] = corge (y[0], 0xcafebabeU, z); +}