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[2620:137:e000::1:20]) by mx.google.com with ESMTP id p13-20020a17090a4f0d00b001fe39932aa3si2666137pjh.48.2022.12.07.15.37.52; Wed, 07 Dec 2022 15:38:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=da9GYtBr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230155AbiLGX2o (ORCPT + 99 others); Wed, 7 Dec 2022 18:28:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230132AbiLGX2h (ORCPT ); Wed, 7 Dec 2022 18:28:37 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C167C89319; Wed, 7 Dec 2022 15:28:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670455716; x=1701991716; h=from:to:subject:date:message-id:in-reply-to:references: mime-version; bh=QKPsoAzxeNvFl5hmsKWF6pwp2BAjkHgHkpdCaHRvKJM=; b=da9GYtBrFyeQ5MspGJfHE4fwBniPl8V3tKInYgpyiz8aGlQDEbsbLHOW 3E4P0fjVq4qLOTPCtk0Kk8l6I0vhxV5fJjllAzoBW21TakK0PdZxf4KuZ wOxwMXU4SFJvXpEQFDV4fq3rNIuEz93ILHAsKbON5dRTg4SiRTfX3e+Si 95+qJ7jcMTlP6iFseuK4aFSEGZ2SKL66+de/I9H8rO/mLQZn9h5ZAH54n bLxyeZHAw/VY+BYu3xvh6qHH8QQ6GHBKamikSu4CpSl+8H3iFi/Qp+NNi nRb7xgTUf4p2nFlxpb45ps+9aUbwp3QwlL9pBvCE9fzmkqTKkF6XrgJUi A==; X-IronPort-AV: E=Sophos;i="5.96,226,1665471600"; d="scan'208";a="127028537" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Dec 2022 16:28:34 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 7 Dec 2022 16:28:30 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 7 Dec 2022 16:28:29 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , , Jerry Ray Subject: [PATCH net-next v4 1/2] dsa: lan9303: Whitespace Only Date: Wed, 7 Dec 2022 17:28:27 -0600 Message-ID: <20221207232828.7367-2-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221207232828.7367-1-jerry.ray@microchip.com> References: <20221207232828.7367-1-jerry.ray@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751600370025965433?= X-GMAIL-MSGID: =?utf-8?q?1751600370025965433?= Whitespace preparatory patch, making the dsa_switch_ops table consistent. No code is added or removed. Signed-off-by: Jerry Ray --- drivers/net/dsa/lan9303-core.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index 80f07bd20593..d9f7b554a423 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -1280,16 +1280,16 @@ static int lan9303_port_mdb_del(struct dsa_switch *ds, int port, } static const struct dsa_switch_ops lan9303_switch_ops = { - .get_tag_protocol = lan9303_get_tag_protocol, - .setup = lan9303_setup, - .get_strings = lan9303_get_strings, - .phy_read = lan9303_phy_read, - .phy_write = lan9303_phy_write, - .adjust_link = lan9303_adjust_link, - .get_ethtool_stats = lan9303_get_ethtool_stats, - .get_sset_count = lan9303_get_sset_count, - .port_enable = lan9303_port_enable, - .port_disable = lan9303_port_disable, + .get_tag_protocol = lan9303_get_tag_protocol, + .setup = lan9303_setup, + .get_strings = lan9303_get_strings, + .phy_read = lan9303_phy_read, + .phy_write = lan9303_phy_write, + .adjust_link = lan9303_adjust_link, + .get_ethtool_stats = lan9303_get_ethtool_stats, + .get_sset_count = lan9303_get_sset_count, + .port_enable = lan9303_port_enable, + .port_disable = lan9303_port_disable, .port_bridge_join = lan9303_port_bridge_join, .port_bridge_leave = lan9303_port_bridge_leave, .port_stp_state_set = lan9303_port_stp_state_set, From patchwork Wed Dec 7 23:28:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerry Ray X-Patchwork-Id: 31093 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp461738wrr; Wed, 7 Dec 2022 15:38:02 -0800 (PST) X-Google-Smtp-Source: AA0mqf659HAz2f72mKFE7hhU3DnizoCJzESldSX56sCZ2pd/ee+rqzbsSNv63kY0/qbsnNTWwUr6 X-Received: by 2002:a05:6a00:3204:b0:574:31bb:a576 with SMTP id bm4-20020a056a00320400b0057431bba576mr71723248pfb.46.1670456281840; Wed, 07 Dec 2022 15:38:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670456281; cv=none; d=google.com; s=arc-20160816; b=R1h5YQvwTgKGIAtB+vSa2mGHc+Ag34Ow6bcrCiA99faGKQI5QrOB5+yHnJ8G2FnTzt VQDYa9OObly7Mh4jtrdD/rvdBDzWof7K/g5jZB1nXgBbW0et/mHJfMQ3F2GeGRi1w7C8 Y/POw6YTm8g+CrD76w6zkdWaAg1fVAYWUM24n4SIAFMalsTaSU8848wwMr445OSsNZpe 5IEtekkjPq0LiZbRZV0/ubSvEK+lccnG/oFS7OL1Sa6fq20fNbQzavYkPYt75ee0IPgE wRQDdSf/1CmzILchFxIDUFvnCHrJU7JDjRzMthLTeYIYkZGIYo5VAlBQLHYb/p6VeupV Jg9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:to:from:dkim-signature; bh=cL0BBliEK0YmUsYClrsKPifNJ1+08ArnsraIhxiBPwg=; b=TfAWFQJJ92t3w/FHTivkm4e87LvIZXK33zaK7E/RG01Dq/U21oGZbVAciVMVCJQknV NW7glOlmCvE5FWN1G5Pc8iXopcy+n33Gf+Yia2ioG9YzNR6BV4WSyPt1IROk96bMVyDf ay9ggHOq77mMOaK0LhL+tJffCWBdNDNizKUKvntprkmSVBlN3MrmhATCOMwRyxCbAQnz /Ho1cB6cjPhzYglaNQX3DIts949OWn256yB1JYdQY3XXVmpJJl2G7sKkOa3ApPTUyTOI KjpK03pmSJxcePzfggVHvGq/Tv82kd70NoyivzYiEQfgrJiLD/dKfg37ApVbbEPl4mCq 5kAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=H9HtDNL3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y20-20020a634b14000000b0047761ad8456si21950921pga.166.2022.12.07.15.37.48; Wed, 07 Dec 2022 15:38:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=H9HtDNL3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229576AbiLGX2n (ORCPT + 99 others); Wed, 7 Dec 2022 18:28:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230135AbiLGX2g (ORCPT ); Wed, 7 Dec 2022 18:28:36 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C5CE189327; Wed, 7 Dec 2022 15:28:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670455712; x=1701991712; h=from:to:subject:date:message-id:in-reply-to:references: mime-version; bh=wFDv46KZwpq5kcmb3lOLiRlcLrD0XlNZKiv+rENbNkg=; b=H9HtDNL3Lh6lFx9SyWm0foVkBReqqjRRMSeOOG+JmbWdWKGrVSAFM8oD N3aRm716qALKJz/D63AT9hZLiTibHyhgevo+6PekGonqYc8OCfVSPoqKe pI7FtSYlD3dYtcftkM2BOcrWfNSQ/i/6kCAXZIbpA13xI0oBzRHqO3xa9 /Kj/P30KYfOMz5orUjVHYj4abxmBT5jb6gI88beox5FXn/foYze5Za/Ah jAtotlpPhI3rqdqE41H+R0Ruz0bPJ7dls5cuEYMFRREV9s2PBQ42kxyp7 9X3kQ9AqY7YvNy44dJJBQaZpYQOZlbOCe9yeR4Sh3Hv0dlqDXdtf9vIx7 w==; X-IronPort-AV: E=Sophos;i="5.96,226,1665471600"; d="scan'208";a="203062278" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Dec 2022 16:28:31 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 7 Dec 2022 16:28:31 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 7 Dec 2022 16:28:30 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , , Jerry Ray Subject: [PATCH net-next v4 2/2] dsa: lan9303: Migrate to PHYLINK Date: Wed, 7 Dec 2022 17:28:28 -0600 Message-ID: <20221207232828.7367-3-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221207232828.7367-1-jerry.ray@microchip.com> References: <20221207232828.7367-1-jerry.ray@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751600366267796867?= X-GMAIL-MSGID: =?utf-8?q?1751600366267796867?= This patch replaces the adjust_link api with the phylink apis to provide equivalent functionality. The functionality from the adjust_link is moved to the phylink_mac_link_up api. The code being removed only affected the cpu port. Removes: .adjust_link Adds: .phylink_get_caps .phylink_mac_link_up Signed-off-by: Jerry Ray --- v3-> v4: - Reworked the implementation to preserve the adjust_link functionality by including it in the phylink_mac_link_up api. v2-> v3: Added back in disabling Turbo Mode on the CPU MII interface. Removed the unnecessary clearing of the phy supported interfaces. --- drivers/net/dsa/lan9303-core.c | 123 +++++++++++++++++++++++---------- 1 file changed, 86 insertions(+), 37 deletions(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index d9f7b554a423..a800448c9433 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -1047,42 +1047,6 @@ static int lan9303_phy_write(struct dsa_switch *ds, int phy, int regnum, return chip->ops->phy_write(chip, phy, regnum, val); } -static void lan9303_adjust_link(struct dsa_switch *ds, int port, - struct phy_device *phydev) -{ - struct lan9303 *chip = ds->priv; - int ctl; - - if (!phy_is_pseudo_fixed_link(phydev)) - return; - - ctl = lan9303_phy_read(ds, port, MII_BMCR); - - ctl &= ~BMCR_ANENABLE; - - if (phydev->speed == SPEED_100) - ctl |= BMCR_SPEED100; - else if (phydev->speed == SPEED_10) - ctl &= ~BMCR_SPEED100; - else - dev_err(ds->dev, "unsupported speed: %d\n", phydev->speed); - - if (phydev->duplex == DUPLEX_FULL) - ctl |= BMCR_FULLDPLX; - else - ctl &= ~BMCR_FULLDPLX; - - lan9303_phy_write(ds, port, MII_BMCR, ctl); - - if (port == chip->phy_addr_base) { - /* Virtual Phy: Remove Turbo 200Mbit mode */ - lan9303_read(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, &ctl); - - ctl &= ~LAN9303_VIRT_SPECIAL_TURBO; - regmap_write(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, ctl); - } -} - static int lan9303_port_enable(struct dsa_switch *ds, int port, struct phy_device *phy) { @@ -1279,13 +1243,98 @@ static int lan9303_port_mdb_del(struct dsa_switch *ds, int port, return 0; } +static void lan9303_phylink_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) +{ + struct lan9303 *chip = ds->priv; + + dev_dbg(chip->dev, "%s(%d) entered.", __func__, port); + + config->mac_capabilities = MAC_10 | MAC_100 | MAC_ASYM_PAUSE | + MAC_SYM_PAUSE; + + if (dsa_is_cpu_port(ds, port)) { + __set_bit(PHY_INTERFACE_MODE_RMII, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_MII, + config->supported_interfaces); + } else { + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); + /* Compatibility for phylib's default interface type when the + * phy-mode property is absent + */ + __set_bit(PHY_INTERFACE_MODE_GMII, + config->supported_interfaces); + } + + /* This driver does not make use of the speed, duplex, pause or the + * advertisement in its mac_config, so it is safe to mark this driver + * as non-legacy. + */ + config->legacy_pre_march2020 = false; +} + +static void lan9303_phylink_mac_link_up(struct dsa_switch *ds, int port, + unsigned int mode, + phy_interface_t interface, + struct phy_device *phydev, int speed, + int duplex, bool tx_pause, + bool rx_pause) +{ + struct lan9303 *chip = ds->priv; + u32 ctl; + int ret; + + dev_dbg(chip->dev, "%s(%d) entered - %s.", __func__, port, + phy_modes(interface)); + + /* if this is not the cpu port, then simply return. */ + if (!dsa_port_is_cpu(dsa_to_port(ds, port))) + return; + + ctl = lan9303_phy_read(ds, port, MII_BMCR); + + ctl &= ~BMCR_ANENABLE; + + if (speed == SPEED_100) + ctl |= BMCR_SPEED100; + else if (speed == SPEED_10) + ctl &= ~BMCR_SPEED100; + else + dev_err(ds->dev, "unsupported speed: %d\n", speed); + + if (duplex == DUPLEX_FULL) + ctl |= BMCR_FULLDPLX; + else + ctl &= ~BMCR_FULLDPLX; + + lan9303_phy_write(ds, port, MII_BMCR, ctl); + + if (port == chip->phy_addr_base) { + /* Virtual Phy: Remove Turbo 200Mbit mode */ + ret = lan9303_read(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, + &ctl); + if (ret) + return; + + /* Clear the TURBO Mode bit if it was set. */ + if (ctl & LAN9303_VIRT_SPECIAL_TURBO) { + ctl &= ~LAN9303_VIRT_SPECIAL_TURBO; + regmap_write(chip->regmap, LAN9303_VIRT_SPECIAL_CTRL, + ctl); + } + } +} + static const struct dsa_switch_ops lan9303_switch_ops = { .get_tag_protocol = lan9303_get_tag_protocol, .setup = lan9303_setup, .get_strings = lan9303_get_strings, .phy_read = lan9303_phy_read, .phy_write = lan9303_phy_write, - .adjust_link = lan9303_adjust_link, + .phylink_get_caps = lan9303_phylink_get_caps, + .phylink_mac_link_up = lan9303_phylink_mac_link_up, .get_ethtool_stats = lan9303_get_ethtool_stats, .get_sset_count = lan9303_get_sset_count, .port_enable = lan9303_port_enable,