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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k5-20020a170902c40500b00189b421fff1si18335458plk.432.2022.12.07.06.02.33; Wed, 07 Dec 2022 06:02:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kFfZArHT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229676AbiLGOAM (ORCPT + 99 others); Wed, 7 Dec 2022 09:00:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229917AbiLGN7n (ORCPT ); Wed, 7 Dec 2022 08:59:43 -0500 Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 640045C746 for ; Wed, 7 Dec 2022 05:59:42 -0800 (PST) Received: by mail-pf1-x434.google.com with SMTP id x66so17520744pfx.3 for ; Wed, 07 Dec 2022 05:59:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nbt/wWAyXr8PXcpioECD5vFFYMiQG8G3AvxtqAGhEMs=; b=kFfZArHTfDZyg80wIAXF2jXhRpajwGRdSNrIM3HfbngbOS0QtYcZPhbpe5uywZzdZH eLlbtPhDElNZb29dTOLVwJNEzDn30mD3CXEIsZC1EqXA7i4TtJEXPnRNU9X8C3UG0fKo KcSbcpLX7VnuZANz8Rgq16oceq0ru5Utg4qYw4uQ3nYv3iefE53We/AJ4t+7fHjE5BE2 PGUVRG8oikyKil9hkWrvppK+FobpOF6g9wGO0xzvgulFp4SpAZ8v+N1EuhVcS+YPNfkX YE3gQ5SGN1O8QrWsZkLUlL2+on8lIO3jvDSHWU2o9l6gqXAFf5z1edVF5e4BwwNyiGlD vgpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nbt/wWAyXr8PXcpioECD5vFFYMiQG8G3AvxtqAGhEMs=; b=VgqkB5e/aTp2N6PVib5My3Ad+0QDhU8UJd6LvUOePephO5vBCSIRikLRJy+xAKAS9d 4wbOqoReiYIhI7bScFafPKEvN5Z1hnmfPh3UuNaegvsWQlC2vyPVBxIzzD+IUH5nOgo5 ahvEX2TRX2kHbx1QWu0ftn2NfcUd50BprgsySUKAx+S533GmFnjFg+EJzMFwyNLFMgxs zdf/3uAoHZVOAV+AsolGRUzv2PB+i5kVecdNrG8ZiLQrLfOM3g2NJnpff3EO2EhPaQf2 Qm57crv/nL3r1tKenDzqn9qE/N6w20qHDIl7Ci9YTbq7eGjHeaY7R9YT/vh9CwFJJsvx Ie5Q== X-Gm-Message-State: ANoB5plnpI/2RrSHI5fNSQKTSIly3wGaGRXXTFw8CrjTOzBCDKRFdhS9 PupdmJjBehJQb66SRXFkttcp X-Received: by 2002:a05:6a00:2883:b0:572:7b49:4f47 with SMTP id ch3-20020a056a00288300b005727b494f47mr76693326pfb.16.1670421581852; Wed, 07 Dec 2022 05:59:41 -0800 (PST) Received: from localhost.localdomain ([117.216.123.5]) by smtp.gmail.com with ESMTPSA id c18-20020a170902d49200b00186b69157ecsm14720160plg.202.2022.12.07.05.59.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 05:59:40 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, Manivannan Sadhasivam Subject: [PATCH 01/12] dt-bindings: arm: msm: Update the maintainers for LLCC Date: Wed, 7 Dec 2022 19:29:10 +0530 Message-Id: <20221207135922.314827-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> References: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751564179084860240?= X-GMAIL-MSGID: =?utf-8?q?1751564179084860240?= Rishabh Bhatnagar has left Qualcomm, and there is no evidence of him maintaining with a new identity. So his entry needs to be removed. Also, Sai Prakash Ranjan's email address should be updated to use quicinc domain. Cc: Sai Prakash Ranjan Signed-off-by: Manivannan Sadhasivam Acked-by: Sai Prakash Ranjan --- Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index 38efcad56dbd..d1df49ffcc1b 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Last Level Cache Controller maintainers: - - Rishabh Bhatnagar - - Sai Prakash Ranjan + - Sai Prakash Ranjan description: | LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, From patchwork Wed Dec 7 13:59:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30861 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp198642wrr; Wed, 7 Dec 2022 06:02:51 -0800 (PST) X-Google-Smtp-Source: AA0mqf66qN5twbC+Wk6vn1sTfWkmVgyTX76pFcEy3WKos8+gvQcrtsiwPmWiCRIQTSMFAEiHrxdv X-Received: by 2002:a17:902:7087:b0:189:d827:995c with SMTP id z7-20020a170902708700b00189d827995cmr14280020plk.155.1670421771554; Wed, 07 Dec 2022 06:02:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421771; cv=none; d=google.com; s=arc-20160816; b=hV3B101UjgqGTnqFl0FJPP3YxiqfoqjTVFdejE5M9CFrsBQ2nuGskBUQWgkIUl5V1H AWW19l2vp/AC3E9sKkKjPd/3evSxqx9+BG8py54mAjZmaZlLfIsouxYA3nmpxMHBt/ZF LYOOz6XA7cucS31fNo0nOdATXmGpumyRXx724eQkqyHGrcO2ea261HG7J30ZGHc3yaav 17fwrFsMF+FktlNODod/YEVsFNJl+iufviNPjmzWVKbuNFjumFuODdKibdc8ay/oyQvB xGV5Bh1aAymdmu2dfcrpglYUxc6KOTzsD6aL6BCk0SgLBzlmUD8g9jyNfwXeOCdTfK1u jGOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vwHmJ0i8eRrdJL4Dl+R0aoA35/USIsHe1f5AGZFuBf8=; b=Z6vaOE/RW7lfwxSLf/d1qpLvxgr5CsHPeyxoUkJaTotdMaNq8113tKjMFBjoSag8f9 BR8mEHnYvWuFGxsDfzJMREON0Ob/lKvhBr4byCxCGenv1TYF2Cglww7HoLRz2UTBjmvX QrFs6ifBICJr5gbc6Bi4Vyk1Aka9t+Ih9Ab3KYwUxdlht3bEhWTDGNnYOSs1yZMk4NRT 4IaNnW9K7kMNu78AtrcH96AvhZw6Y5N5REAt0/ciTEhtML7u12Kku2r96z2oZPpC1TZq jgrzrA5p7eMEFAcmyk7CS0ZKtQ97wPztmku1WeMBD/YhAxw3/KIVVGyn1jyRZhlm7rXA 2xTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OD+cAweO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Currently, the binding just lists the LLCC0 base address and specifies the size to cover all banks. This is not the correct approach since, there are holes and other registers located in between. So let's specify the base address of each LLCC bank. It should be noted that the bank count differs for each SoC, so that also needs to be taken into account in the binding. Cc: # 4.19 Fixes: 7e5700ae64f6 ("dt-bindings: Documentation for qcom, llcc") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- .../bindings/arm/msm/qcom,llcc.yaml | 125 ++++++++++++++++-- 1 file changed, 114 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index d1df49ffcc1b..7f694baa017c 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -33,14 +33,12 @@ properties: - qcom,sm8550-llcc reg: - items: - - description: LLCC base register region - - description: LLCC broadcast base register region + minItems: 2 + maxItems: 9 reg-names: - items: - - const: llcc_base - - const: llcc_broadcast_base + minItems: 2 + maxItems: 9 interrupts: maxItems: 1 @@ -50,15 +48,120 @@ required: - reg - reg-names +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7180-llcc + - qcom,sm6350-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7280-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-llcc + - qcom,sc8280xp-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC4 base register region + - description: LLCC5 base register region + - description: LLCC6 base register region + - description: LLCC7 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc4_base + - const: llcc5_base + - const: llcc6_base + - const: llcc7_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm845-llcc + - qcom,sm8150-llcc + - qcom,sm8250-llcc + - qcom,sm8350-llcc + - qcom,sm8450-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc_broadcast_base + additionalProperties: false examples: - | #include - system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; - reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; + soc { + #address-cells = <2>; + #size-cells = <2>; + + system-cache-controller@1100000 { + compatible = "qcom,sdm845-llcc"; + reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; + interrupts = ; + }; }; From patchwork Wed Dec 7 13:59:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30863 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp199118wrr; Wed, 7 Dec 2022 06:03:27 -0800 (PST) X-Google-Smtp-Source: AA0mqf612Rf+4G2rN0nqXDQF19PNJciJ6CtzuTR7O5atbc0N5DGajahfdaRwUTJr4TfiKJ+gCUje X-Received: by 2002:a05:6a00:78b:b0:577:91d6:f748 with SMTP id g11-20020a056a00078b00b0057791d6f748mr1830260pfu.7.1670421806851; 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Cc: # 5.4 Fixes: ba0411ddd133 ("arm64: dts: sdm845: Add device node for Last level cache controller") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 65032b94b46d..e1c0d9faf46e 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2132,8 +2132,11 @@ uart15: serial@a9c000 { llcc: system-cache-controller@1100000 { compatible = "qcom,sdm845-llcc"; - reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 7 13:59:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30864 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp199175wrr; Wed, 7 Dec 2022 06:03:31 -0800 (PST) X-Google-Smtp-Source: AA0mqf5SzV1ndE/bpsMT9LPrJy3akqVNcmv5derY3jU9Plj2iYN1N5EBtjLfXpsEV8GbxgNGCUzu X-Received: by 2002:a63:1d15:0:b0:478:dad2:1c6b with SMTP id d21-20020a631d15000000b00478dad21c6bmr8043045pgd.80.1670421810748; Wed, 07 Dec 2022 06:03:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421810; cv=none; d=google.com; s=arc-20160816; b=SEGCRBGaijM6qRoy1hJTLt3G1nRFTqs7xEtjyKlsVOAeTuLOeC4sO3uwxu939kfei6 FS/kf1fBuC7a3JQGUvqoYPSIozXHUO5WG+45TrigySe4Q59+nuu7/Eu273xweus1tVH1 cU+x/LnDEdfg3pdRna3lEtQgMMQjYKwjf3n6Pqp8hznqWPLrzdoE5scL+QrDoLXSYI9F XItCh7WlSp/UxPtm+KJt3J0OHBuPMH1DILy1iYjGry5GWDN9TPopklmkLbkzZ0/SXj3Q FXPTpE1+WckIfS+snu53n5HHeqkpI86VfzIFL4hwjIVUrl0XPJ1GPm/k8JY4s6BxRRPj J4BQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iUBfene/cnQwgTF0aG4S0NjKk1KSg5LGCh8ripuPt50=; b=tfPxKR8iJOEOBIYtt88AHffeGhclZsjYSwyIY8SxPjySIur1sx+GzOH4ndBgCO3cOT e2T11d/6OXG1SNnMPXOlqV1bjidkGrhB3ZVD90K1EQGWfungeJrjZQyvEJ4LUAoIh7HP 5K5nwtLoHMcwkQ8054vs6ZZH7nx51QZErX0xpAENoVKmnttg8vto8TUjhcgaCaA/+IIo yYDLms/NRXg9TLRvDmgY0EQ8MhH/+/IdxCk6BckoVVdUXmHhngUu08fr/B26iJWr+u4w isnNz1kDwoh7zOJ5ysQSEiVP4Xa12ihrOM25lRgdvdlHreVAN99EFVglMM6V/tp30P/w rb4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H8wT7Xpk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j7-20020a17090276c700b00189ac5a51c2si18466675plt.157.2022.12.07.06.02.51; Wed, 07 Dec 2022 06:03:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H8wT7Xpk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230273AbiLGOAi (ORCPT + 99 others); Wed, 7 Dec 2022 09:00:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230253AbiLGOAE (ORCPT ); Wed, 7 Dec 2022 09:00:04 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2B82D2F6 for ; Wed, 7 Dec 2022 06:00:00 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id b13-20020a17090a5a0d00b0021906102d05so1706153pjd.5 for ; Wed, 07 Dec 2022 06:00:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iUBfene/cnQwgTF0aG4S0NjKk1KSg5LGCh8ripuPt50=; b=H8wT7XpkqvaHjQ6Po/goMKj6V6jL/8Ey8Hf+GqZvdwrHx75UStaopLvvwyARJc7qO5 5UoJNpiMgUPfBpM1ZyE6UT7VLrFXYXeoGRckbpFv5xvbBUxLlTvOj8sqS5KRCwaQ1Fzi qztmo5Z4rB7+/QyLfJCSJIa1uG7AvVCX3XtsZI2rC5nfb6nvLpRJVPky+FSR204kiFNF BhDV1+OswALIVZavXenT6tiQ01rKxTbsg/oMCnlYCKLWTf2TB5yWAC2oFsw/AWa0/HNF z0gAf7S5LzBhpitYnxVtjOdLT50vK76PfjLoQfcJFur8TtrtNyauTbmHDx3nnT3sDQXT x+vA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iUBfene/cnQwgTF0aG4S0NjKk1KSg5LGCh8ripuPt50=; b=Ts0RKXJ+vKb6CquR3ffR8VbqTeDWWyS07Bg9Z/Dte5tKaLIg1mj/c3eWmK7mcYttGI U7lyFZLVqcPFVywinYV9EkLbhRy+jZ3tjFvEc286GP6HMPVWQMfR9F5nEKoPlSOzkUSm Drr8CmAIC23mrWWqTrMOICHDEvk1UF7nCs/mwnOd6KNk5pfdSuYowoEy3vWDFdppEpmy 99X1DBPBDEbrgiVkpG3UffNX1skzAyGAraoSivhV+7xEx55wxOR0XohVq8J15SWYHGuT H2hsZn0+AI6ohsS657+7uXrDBOmnB/8A7ckWprUcSye4f7PCEsdbLILCxTLWNlsjG8EU adPw== X-Gm-Message-State: ANoB5pna73VhWz5vbS9Oy9oNQLDJJXrYFEdzoZaZqSAbd+2DyxLB2Yde MsTC2hd3PLHDTPnosMfE1ctJ X-Received: by 2002:a17:90a:3da1:b0:219:61e5:4994 with SMTP id i30-20020a17090a3da100b0021961e54994mr37329693pjc.213.1670421600398; Wed, 07 Dec 2022 06:00:00 -0800 (PST) Received: from localhost.localdomain ([117.216.123.5]) by smtp.gmail.com with ESMTPSA id c18-20020a170902d49200b00186b69157ecsm14720160plg.202.2022.12.07.05.59.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 05:59:59 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH 04/12] arm64: dts: qcom: sc7180: Fix the base addresses of LLCC banks Date: Wed, 7 Dec 2022 19:29:13 +0530 Message-Id: <20221207135922.314827-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> References: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751564220833104980?= X-GMAIL-MSGID: =?utf-8?q?1751564220833104980?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SC7180, there is only one LLCC bank available. So let's just pass that as "llcc0_base". Cc: # 5.6 Fixes: c831fa299996 ("arm64: dts: qcom: sc7180: Add Last level cache controller node") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f71cf21a8dd8..f861f692c9b1 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2759,7 +2759,7 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sc7180-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 7 13:59:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30872 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp200588wrr; Wed, 7 Dec 2022 06:05:03 -0800 (PST) X-Google-Smtp-Source: AA0mqf6rCqjdD9cRe8WU6sAR1CbQ2Confj0fJuX1trMn1NYX/Dt5Bp7VKx25JmSiEfJ4EZzCuGYh X-Received: by 2002:a17:90a:a4e:b0:219:6737:b20e with SMTP id o72-20020a17090a0a4e00b002196737b20emr36020005pjo.178.1670421902724; Wed, 07 Dec 2022 06:05:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421902; cv=none; d=google.com; s=arc-20160816; b=QfL8ZlN7cPBCePpzfJncFGkz/iFQZwzUfvOmpyxbN2y8a2FBaHfz3PBeLMZ2MKR7OB 9tDrhYBGHmImqzI30M95vgu8SfI9Si5+rxTwOn1b/ZQbdTAWm/HHxhU3FjIk58VcCZs3 MrbrmxzIsG2eli1vN0gdAf7OcmH10gqUyFrJdbAOucJ6QDVFWbeAHsZAAD52ESXGwtwT 0P4xRdUOzRZCyaXUYVsLGiM0a0jvqa1fJ8R0zggQp4IPsQfUio5ldSGFksHpOb8iS8gp RbvX+S09ZE1YP2DsVn27dYD/bQN/aaCPMIJ8tRBX86kGMmpTwJvQTbyBumPrrgRpsAAL +KsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5n0Bzk4oRcwoQ/X+7mKiinSvd0WlsPB4Sg7t77MHfrg=; b=Vrb91Cd4sybh2iUQdVQIHEhWaWajF8bZdQhfhYoh45H82nOs5ZhpqculPHDFfzrGW5 Z1NnRw6yCGGfEMNkwEBtaYEpYG8BqNNzwIvg0Gb11+2gYxHXxPdpN7xaHs6MdVzhNS0E md+bgu5YeGNgTz9LgXqBVYyB6Qo4eyNjSqGnMwDWpYCawnkcDa9DMcHW9a0B8FYXQdqW rorTu7rNtKv4LHLyJB8F1bI36qmDhv4q1EW0HIMgBCtkq+VT6QgrREBVVYvGWuB1fGbp kd8ZKoXH5ynp/w11UOEABk6tkj4IMwLzJJhPfIYkIcmWCh5xSvQL7EH/cyP44vTzY6sy PaCw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bDfohewv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i191-20020a6387c8000000b004789508e6e6si12619318pge.809.2022.12.07.06.04.20; Wed, 07 Dec 2022 06:05:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bDfohewv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230048AbiLGOAq (ORCPT + 99 others); Wed, 7 Dec 2022 09:00:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230255AbiLGOAM (ORCPT ); Wed, 7 Dec 2022 09:00:12 -0500 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 475575C0F9 for ; Wed, 7 Dec 2022 06:00:07 -0800 (PST) Received: by mail-pg1-x52c.google.com with SMTP id 6so16445199pgm.6 for ; Wed, 07 Dec 2022 06:00:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5n0Bzk4oRcwoQ/X+7mKiinSvd0WlsPB4Sg7t77MHfrg=; b=bDfohewvK322PkyoaoeVx5utUGw02oRSdwD7E5T8JwmGQGI+eGv/eQmEAHEeI4vGL5 hZP4IorHbJ7MPDJkhHCOylqWDMSvmVSbLnJFLDTIEgY332WwAzDu189nbcYWtp+S4rNi z9STzDjpH/T0zBBOuHixzfS0FAqQNeMFZQf32hyw3yJhIIa909ZYhOuXKdNHbdafKcCl x4pcKDcJrV4bKkKB5rVESJiPcJMHfFC9n+KwxTy5Um5J2DkyeLigZnE0kjnzUawwxsDi JpmdU2q2fGPdoQvAiatfiJlIBZ+xxYPaPQ/CgfmUda81/rErjmpxirMtZgJtL6fg1qta Tq1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5n0Bzk4oRcwoQ/X+7mKiinSvd0WlsPB4Sg7t77MHfrg=; b=WtXlqZjlG0t44CEqnKB9qIEl+UObVPBg93+OMv++n5YuZSD9Gw+3ILsxnAHTyBWSN7 QHymjqwrtrSEdZEmyLepmDbJn/OjMkAcJKQ4XsAip88EDCcZNVZ9TsdkWI2oSe0GngYI ifhJeIm+pgapUk14kL7H4Nu7abH646e3LKS2Pe9KB4I2OQFYSujFUFJjYnrFbg0NbPF0 Ge51j3UhAQwzkvnp72qeXfKX7y/tUvjtZOjbUeLP0UmsMamfzn6HtYNQ0doHIC8xC/Yx jD7SGYMC/7CBuYdIK9cEdFRrCcxqD1oGuU+FPVP4EXrOx0cco8k3ArPjanRfdrJZKnUl SF2Q== X-Gm-Message-State: ANoB5pmW9jI4uSMKNr3d2VxaYrlzFXGC3njRWfp1g/KKtMwLvlA3nJbA hyBGAQlseHvJjPU2rYDy94W5 X-Received: by 2002:a63:5b4d:0:b0:478:ae0a:bd86 with SMTP id l13-20020a635b4d000000b00478ae0abd86mr15223904pgm.239.1670421606382; Wed, 07 Dec 2022 06:00:06 -0800 (PST) Received: from localhost.localdomain ([117.216.123.5]) by smtp.gmail.com with ESMTPSA id c18-20020a170902d49200b00186b69157ecsm14720160plg.202.2022.12.07.06.00.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 06:00:05 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH 05/12] arm64: dts: qcom: sc7280: Fix the base addresses of LLCC banks Date: Wed, 7 Dec 2022 19:29:14 +0530 Message-Id: <20221207135922.314827-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> References: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751564316784982864?= X-GMAIL-MSGID: =?utf-8?q?1751564316784982864?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. While at it, let's also fix the size of the llcc_broadcast_base to cover the whole region. Cc: # 5.13 Fixes: 0392968dbe09 ("arm64: dts: qcom: sc7280: Add device tree node for LLCC") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 0adf13399e64..6c6eb6f4f650 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3579,8 +3579,9 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sc7280-llcc"; - reg = <0 0x09200000 0 0xd0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 7 13:59:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30865 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp199299wrr; Wed, 7 Dec 2022 06:03:41 -0800 (PST) X-Google-Smtp-Source: AA0mqf5pA+EGQARct20PeKYR3PIX9CRDiDphCJkJLbJbwDJrydvBeJKwRzskQJ2hjLfqf4Qkw1cF X-Received: by 2002:a17:90b:350:b0:219:58c4:ccc9 with SMTP id fh16-20020a17090b035000b0021958c4ccc9mr39939049pjb.181.1670421820817; Wed, 07 Dec 2022 06:03:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421820; cv=none; d=google.com; s=arc-20160816; b=IUvoCBd/G0fpaeZNWOnPXwaL96+DSX4oPALjwBqfUJDL8HLbTBERNe7GKMBD1vIVQK 4tWshjPlCsu9l3KkknI0sCZjnk9eQTyVaR6jPHXT+jiKHVvKMGz/JouXnkakLasIWG2D vt5cfBTvlb+8qD7XC4Z/idJN7fMl4lBRmkl08tGCmPUq7sR/3NTlxgyPndfmAbmh1CMg OT88q1p1OkWw3ez+GMKbx4wrLfco7o/gOiiIZ2Ph4rBFVahLT7ipHMde6zNEwt6sDcfd uKWN4B+IO5au/chwtVJ0fH29JHvQ6fmwKwhaFeWIcplNCCCvV4i+vfidqtdh8yZmOx0o 7j3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jGefmKMEXqWoGu7xIFjnC5m/g9TolIorwDYvhcWeeRg=; b=aWYWpIPpdaNi1h99vzIdwnUfNckgzXF0LrZyvv6oCEcPgTH0KQ3YvkUqP0u02uPDXo fF1AkkA0uRF2L00HQPNC9fn1Kf/PnKHWrYoPR/9EOaYtXObyll/6pNavQKP7mj/m+ji2 mofxdruchL7NFZefncXipxp6A3bq8ZB0YZn+0l9q6LP+47AKF5UY1m0lLGFOFKEdDEXK BLb7icuXTxqu7sePrtLVLugbF1FgNyevw34IgoMKRhIazRXptIIbNsoHrhZCWynh0Hlx VnGbR0biGTogUkKqMww5ZL1uq3Ej7YhSfSByQ6XBVoThBYpPExFkgp+MouNEY27Lvy2c MJcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oJK7a30M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Cc: # 6.0 Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 109c9d2b684d..0510a5d510e7 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1856,8 +1856,14 @@ opp-6 { system-cache-controller@9200000 { compatible = "qcom,sc8280xp-llcc"; - reg = <0 0x09200000 0 0x58000>, <0 0x09600000 0 0x58000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>, + <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc4_base", "llcc5_base", + "llcc6_base", "llcc7_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 7 13:59:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30866 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp199531wrr; Wed, 7 Dec 2022 06:03:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf5SC7mhUyiGyodRg95KTUOIvTVK8Fod/CAaf9jqUc7bDf8+DgbPzC2DfGKYxsjqjADEFvtp X-Received: by 2002:a17:90a:bd01:b0:21a:557:bb72 with SMTP id y1-20020a17090abd0100b0021a0557bb72mr6865607pjr.46.1670421834131; Wed, 07 Dec 2022 06:03:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421834; cv=none; d=google.com; s=arc-20160816; b=0dDsSVqnYuSQa5wabgAF1TuUcTXoGzQc+x7d9dF8cyS/XA0di4EEMDN6zooHD2Jvah kk760Xp0kx7agudpA+xmSinYWZ8Wy9znEuP+w0X47u2HSf1s3hOuJ2XBaj+W5HcNJ9jy 4QHEpcfvQlMD5DzuF+Wxeutqr66f62bcS/Vx0A89RvxyqSIW9d0PGuVvm+hN8Az4c6/Q G2kVB4KMTEsSv31hwbttOtAqds7asTBH8JeaIOc+QPVtCpvRTtQWsgcvQstsjvCCVxdg 5UaqLcN0WfwrHEI8XPLuZW0WxUuRzErKuLDTTQUtUGhwEZPVudlzhSq3QUZvuA3KnMuO cGpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=K9kOWESGCOm8k/3B3plmWY9NGaRObo69+HdB8YdZ+wA=; b=r3JTqUrRQ4q4iN1AXRZhklWSlcLF7zn7EN0l/rmlCIN17H8YneftAw1erWGocMHTAj SHhQuWH6Q0gulVtm+ij1UIOaI6HNqdYlHaflrepssxp2jOSLXDzuy3NRhVjchc+Amvmm qSFnKXr5xtRfAkgZChOfj2dSDNilvOlc5I9L2+4MR2OVf8fzzJAe5+kbwHGQjG8JDveb iXhwxyMMS8/7TVVj0MRIX8X4KEQCWAVsL9zLJgT06cMD+6/W0LSzt+FBnUF9eWWltv0h QCD9ZJfeAnyFKIKF/le4KjOFG+v/241zWdZLgSZGwmEs4o6rS2quiOwF1mASzC5N3SV6 jnng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ivP8EYKN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id kb7-20020a17090ae7c700b00218b76cda10si1868872pjb.0.2022.12.07.06.03.33; Wed, 07 Dec 2022 06:03:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ivP8EYKN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230227AbiLGOBA (ORCPT + 99 others); Wed, 7 Dec 2022 09:01:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230220AbiLGOAW (ORCPT ); Wed, 7 Dec 2022 09:00:22 -0500 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E9DF5C757 for ; Wed, 7 Dec 2022 06:00:20 -0800 (PST) Received: by mail-pl1-x62d.google.com with SMTP id jn7so17086703plb.13 for ; Wed, 07 Dec 2022 06:00:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=K9kOWESGCOm8k/3B3plmWY9NGaRObo69+HdB8YdZ+wA=; b=ivP8EYKN1u/E0xlDkmB/S5OFTYeLn8a9LknTldtd6Cg9xUvnFhbCgJS0L5obXwqn/f /AUy9wHbUde2X4wqCDm4w164McIGh4ESzgfwXidJxLPTgSsZm9pdFjg7G3MjQmGpgQO1 dJ0JmO4IpNY39aqw2hUMqWp9lrdc9uqObpCcs5DnC6UeXUrkzqanCG2qgTw1ReaXsUYK 6ToT5MCElWbUNXspiD9RXk8nRiySKATCBrtOCGX+rTH8FsO5nfG5lKklW1W42bC30r2q nv0YE3LUUBV3LjstJPikWZtS+BEIfSOE7q0JpE6a1h8maHEi7U5QDAgqyHQxwCGK6quO +OZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K9kOWESGCOm8k/3B3plmWY9NGaRObo69+HdB8YdZ+wA=; b=Z3ZqV0yFXzGNM3LNMfVpEbg1pHTyrHVYDz9e+0wCQh9kbcsu3N5iFZdd5i+cKEn6E/ grgZcLqgC9xXk4ggOJxhaSKzxP+1u+7nWvyrxCKllmK854yMMz4+IhhN7VbMW8MpqYVJ QHWu4XDNVbGRbP3WMoPyXJsz1pXcHTssRdQZiblVsStDOMEyTMuhDm2nL/e7V3Trn2PI qcjtZUNswxFypSxm5Gq1Plu/wbWTyYV2GVDlH5HnJi3USQxkfHjb00NQlGLqc4BZ1wIZ G2uaDgExqT7uG8zQOsgz3JCzjtkFes71mJtBB7vAm6NBglaI+viSrPz1vyPwZzPSg3bQ YeSQ== X-Gm-Message-State: ANoB5pnguoNQI/XEuPw9S05eYclhYcvxbFjegrXL5f2LmDUv6B4fY0ZD qa0y3PvTYo5FELHb4aQifMkv X-Received: by 2002:a17:902:a589:b0:189:7a0f:703b with SMTP id az9-20020a170902a58900b001897a0f703bmr54474585plb.103.1670421619724; Wed, 07 Dec 2022 06:00:19 -0800 (PST) Received: from localhost.localdomain ([117.216.123.5]) by smtp.gmail.com with ESMTPSA id c18-20020a170902d49200b00186b69157ecsm14720160plg.202.2022.12.07.06.00.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 06:00:18 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH 07/12] arm64: dts: qcom: sm8150: Fix the base addresses of LLCC banks Date: Wed, 7 Dec 2022 19:29:16 +0530 Message-Id: <20221207135922.314827-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> References: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751564245242248856?= X-GMAIL-MSGID: =?utf-8?q?1751564245242248856?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Cc: # 5.11 Fixes: bb1f7cf68a2d ("arm64: dts: qcom: sm8150: Add LLC support for sm8150") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a0c57fb798d3..7fd2291b2638 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1762,8 +1762,11 @@ mmss_noc: interconnect@1740000 { system-cache-controller@9200000 { compatible = "qcom,sm8150-llcc"; - reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 7 13:59:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30867 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp199789wrr; Wed, 7 Dec 2022 06:04:09 -0800 (PST) X-Google-Smtp-Source: AA0mqf7ObKiZelkWLl+/h9FbeLJUgwUen99M8KRfzeSgJLnu84AhuGLSHr5meeHfIQFTgv6CmpKC X-Received: by 2002:a63:460f:0:b0:477:4fdd:dba1 with SMTP id t15-20020a63460f000000b004774fdddba1mr71310936pga.188.1670421849326; Wed, 07 Dec 2022 06:04:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421849; cv=none; d=google.com; s=arc-20160816; b=XsQAStGHw+oww4cqBvifkx+3Ng5klpHrVHjplEPcKG5WuGGAW/DSsFoR1OzMO3OvoF MS1N0jXLJZ8uhDtSnhQ+kRT52zY4divh2G/jCBMEWEaaTnWpoIEHbB/8ONnn+4GxU5Vd KFJ1EcUgTMzJTZkqhkTsm3W/Fja+TtY4oU3kGt/VtSSvFoXh+1j1LmNdjU9zWD5el6af KFS2Z1Kw6HDo3vCorU5nIIJIPz+xvpLaBNizRIFZaAFDM/jhqvRYwYg8HBFUieefRTr6 PUbN/beY1ysZH2+RQZgj8lfCLIxcWo5fBXcMt752VrTF7HRbG7M8UWAJ2tj8Z7RpqVMg LlCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=m9wB8HfZl3VNPDfTiqbYvNGJ+C+gB7rjqwIL9QWVnZY=; b=ylv1yae40VKM47Dd+T3Kf13Ce9Mxtn3gctGHkAjTeIfZOigSHWZInLDOfuWljx5i1s tb5MIxvYDf2x5ZiNQP6VpBidgqbTRakLfi+5xEyJK2ocLEFQWCiW7ibVlokCNnd1ZW4F rqSJv3LtllLwNJ4OQ2L/paZiMq6iv64n8qkaUVtzSacnJT8rOWwIb9uJo+BqR+qFfEK4 dLSpuCCcPO94CxxJFdBFOQKWnNwRZtnSOYeFlz/ftKnyWm1H1pYtJNxSynJmJ/aPmT88 /inevGIYMCd4MZXUJ/pDZBXXGcbP+exCu6642CcMWZLS8lhAvGe6ZNZ4f5/ec+/w1WVW 3XqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bGJ7XILZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Cc: # 5.12 Fixes: 0085a33a25cc ("arm64: dts: qcom: sm8250: Add support for LLCC block") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index dab5579946f3..d1b65fb3f3f3 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3545,8 +3545,11 @@ usb_1_dwc3: usb@a600000 { system-cache-controller@9200000 { compatible = "qcom,sm8250-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; }; usb_2: usb@a8f8800 { From patchwork Wed Dec 7 13:59:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30868 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp199992wrr; Wed, 7 Dec 2022 06:04:20 -0800 (PST) X-Google-Smtp-Source: AA0mqf43QSLiJjmSRvsSzcux3l9eA+KBULZ29CYkBV1lHYUUdwx78HuJBGJpqgPHJZTTXN2PM5q2 X-Received: by 2002:a17:903:32ce:b0:189:a0eb:4a26 with SMTP id i14-20020a17090332ce00b00189a0eb4a26mr38907855plr.162.1670421860397; Wed, 07 Dec 2022 06:04:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421860; cv=none; d=google.com; s=arc-20160816; b=yTTlN6EyOb/jZFvectwKivvuzmvCnF7Nurz08zeE9vJqHg7B5UyR4+clbbI+e3kTlr F4RpqX+l7Il2CgpxxMEptlVOk8+y+DntcrCky1nh6VRz9fYonNING/GWGDXuwz4+OZf2 VAtnBtzrq8viB+BcOBE+k9XCTH5eU8RNc6U9ZEjYGyu+EhTCnGLiZUE2qYisXsec6xiP PESSAEdGnTKmKyJ930GAsIMl8hxa27Ktgkf6f53rStCSWvrAeMX6fQtdXCCZDSalZ2Hf qG+mWIC5V73LIPRrxPnsNSgKjWspdqP8ZypJ8qfmEAhYb12pbQye723SU8UgV+ltfDHG /obw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vfunYPN7pQzIq/aXuuYsh9BqM9fjFphrjnxLDwW5HDM=; b=ffka1LWzTkeyudGy9myp8K1C0b1fZcii/SRwyD6IXUZpioEpAtCpt4Jmgl5co0AbCy dCpsMsfUvdNuT1DYAmM2TF2jGAHf2GHvMez9nR7Rw5VA66kfjRr8hLi9xJm30pAK8Dzv FzJWzgX9yZwxeYyYlD9QYKBLMO1s+7xXxRixEkPXTFPH/+ozDDpdS29SEhbtAF6waYVb lKKZG5Z+IU2Ts8O3BmpchLRT9BbTS3hMaM22YsCj1KeumWKANiUAt5D0N4ezJTDSmvVs amtGasncBiJVFn2thb/YuFgu4ARpA8DZMGXiEp1T0sjDrJtIcTtdKhKZ2lz9Gd51l9TJ 4WKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="P/D+hvsS"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b1-20020a170902d50100b0018745a8a351si22572654plg.517.2022.12.07.06.03.59; Wed, 07 Dec 2022 06:04:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="P/D+hvsS"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229544AbiLGOBe (ORCPT + 99 others); Wed, 7 Dec 2022 09:01:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229918AbiLGOAo (ORCPT ); Wed, 7 Dec 2022 09:00:44 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B32E5CD32 for ; Wed, 7 Dec 2022 06:00:33 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id e7-20020a17090a77c700b00216928a3917so1511297pjs.4 for ; Wed, 07 Dec 2022 06:00:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vfunYPN7pQzIq/aXuuYsh9BqM9fjFphrjnxLDwW5HDM=; b=P/D+hvsSzs5/Z2g+hUwoSTGiCaJQRcrqbPrEN3djw3epYnLFlbXktZajYPahX5bTnY Ro130UAGILR62rxsSXDZ7b5kM6S6yvNxWGoq6LVWl79Cajn0bPQT8OKkjger2zTNuBdS k0FP8H1x1NWDJIX+j2/Biaw23GI/3/Z5n3tGFa6Ukd3rUkE8MuO8K6pin/D18dIXOuxo jc28OHhgT2kWkqoZaoSe0TbvkPulj4hBNI7Vwmuks4Bn5Psj/0oIWEUx/Vf0iCkiKRUP bSDza/ogKT+CSehmv3ULvp/XU5wOSlCTAYvUxvXzUg+IC8mMa88hlA8wg5d2pdRPwa+K nsQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vfunYPN7pQzIq/aXuuYsh9BqM9fjFphrjnxLDwW5HDM=; b=5ROpAk1h2P6eR1pNxFpnuYZrhrpCIIaz8NZD5h7DJwLb4lwY2+To9Zxj8NDoQ3o2mO BlTEK4uViwfHm0wNbqrhk5iD1P/ANrYgWLITFU/j89yESh81LXvx71hvcRiyOkqZz2mE d9klbYc+D7l/rv/P1CiBcNjbM/dMoOXtvFFCEP8YQm8ejXbDMe8HeSqj0WIAvoyrBmXj p/OdKej2KwOMAehuZXPbrmObA5p7O0vPk8VZwX24oOQaElv1Qv6OdGcKKL0nu4Y/u4yZ 3zCnkxUpSW6Bwy5JgwNxrRKHmB0GMyfY/9Ka1Qj15pr8i5229RQUHHPTpqularNVtVBQ UxfA== X-Gm-Message-State: ANoB5pmZunRfmqDi2/l0BtGFfN2bA6dSgjOOjod4rhLx4ZNuw8qZ4iLe KJ1TRun6QKdplbP5QGSj//xo X-Received: by 2002:a17:902:ed94:b0:189:66dc:4af4 with SMTP id e20-20020a170902ed9400b0018966dc4af4mr59310310plj.149.1670421632460; Wed, 07 Dec 2022 06:00:32 -0800 (PST) Received: from localhost.localdomain ([117.216.123.5]) by smtp.gmail.com with ESMTPSA id c18-20020a170902d49200b00186b69157ecsm14720160plg.202.2022.12.07.06.00.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 06:00:31 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH 09/12] arm64: dts: qcom: sm8350: Fix the base addresses of LLCC banks Date: Wed, 7 Dec 2022 19:29:18 +0530 Message-Id: <20221207135922.314827-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> References: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751564272938910969?= X-GMAIL-MSGID: =?utf-8?q?1751564272938910969?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Cc: # 5.17 Fixes: 9ac8999e8d6c ("arm64: dts: qcom: sm8350: Add LLCC node") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 245dce24ec59..836732d16635 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2513,8 +2513,11 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sm8350-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; }; usb_1: usb@a6f8800 { From patchwork Wed Dec 7 13:59:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30871 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp200580wrr; Wed, 7 Dec 2022 06:05:02 -0800 (PST) X-Google-Smtp-Source: AA0mqf4Ak4M9LIVbU0b7z9GTRhsGCKEF5VqDWGwQg6GtCW7uQA1rnKyFEOQzdEvm6PrjcklxjBk4 X-Received: by 2002:a17:902:ec04:b0:189:8c37:6f17 with SMTP id l4-20020a170902ec0400b001898c376f17mr47240357pld.67.1670421902062; Wed, 07 Dec 2022 06:05:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421902; cv=none; d=google.com; s=arc-20160816; b=iNIPNGXUpcCeCRetqEtq/u/NU5utK3AVLFAJBijK08wCt5qVYMipDg8WiZXrJfdio0 SiY32Vl4WX2ZWnA0gw1cO4TkkENnPY38Zoo8pM/9crpL+I2B3yY2CYt792cIW1z9dCoH 8qxPBo7Wh5xstxP6YhRQkx0q/au4zh7XNJKsj0PjO8cTxB2rgYoHxn/69BbZKVlBcCcZ vfrQ1M93Txc3FxAlZS8Qb5VsAPe7uHbNXonZT44qjK0fdpaWBlOfwYS5SaRRekUP269X FkdRbNzGRYZfYM/2kTz22XVY8NC4lQQ8UfeGTfeb7AUFdFkCkOv4hU5h0OKcIrPSJLSN K6jA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4HXFRaipNAA/3SVXX4rMylP7rXb8WAB5NgKEFsbHAGk=; b=AB/f2dMvidwx52meAt26yM2LLUFDM7THXIpht9f0ZdbAHIA3+Av7oLMRxCX0W/ZfmG fGmwQ8C3v9TdJALp2iA2Jenka0JNcTUzIouejPJienjr3GY96qxx5cLDjXcVL/7nZBI5 CNaogB/lqwFQVh2wKsX8MYlOL0PWoWtDJWbbMic7hejbRZSf/OngD5mPFcTzKaeqpHoG Ib+/7F7rNxc4dxpq0ipE00DTaDF7BiQ7nvpXqqwCexYWP222omKy92ZTePg4bO95dgro TLmxVHN5/wk4OpJqz1w1xdUTxi4b9xyzkGPMqvWeO+iyvS8Ha94rxrg37F4BXQYh/u2+ ulxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mIbtkx5Z; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id mj1-20020a17090b368100b0021871478f6esi1446771pjb.85.2022.12.07.06.04.36; Wed, 07 Dec 2022 06:05:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mIbtkx5Z; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230170AbiLGOCk (ORCPT + 99 others); Wed, 7 Dec 2022 09:02:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230058AbiLGOBM (ORCPT ); Wed, 7 Dec 2022 09:01:12 -0500 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9349D12745 for ; Wed, 7 Dec 2022 06:00:39 -0800 (PST) Received: by mail-pg1-x535.google.com with SMTP id 82so16500147pgc.0 for ; Wed, 07 Dec 2022 06:00:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4HXFRaipNAA/3SVXX4rMylP7rXb8WAB5NgKEFsbHAGk=; b=mIbtkx5ZYYnroshvQ2t9MPgSjjE3QsY4ZeLxclpuzT+W76Iwc3E11RHLejCqci1+D9 9WtB0A54+LWedD3UwQkLkB7LEmqvAY19WypkTGi+TXwbf/fjH/kk4nLeRLs7zVaYUvbA t23Qsx47tB0Fi00bZVv6ftKAJpO+PHeY+S218JUg5vGPFUYP0/ZAfmKzO4vuBt+5nohQ kDZLJJN+R/wPCeKIRBKNg3Z4/aCacZsBCsm2lZSKTbEG+tunELjGU+pfhRlSfAvJqoJj MEBna6VUxY/BmXsUnS8lGe8zjELxJoq3DwXBJkJSvs85ARPApD8fxgKplvqbznD442t4 AedQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4HXFRaipNAA/3SVXX4rMylP7rXb8WAB5NgKEFsbHAGk=; b=MCd+LHHPRUgAW9DlBbt/WIBIR0IkqqYLN3syAkWadEe2acnBnNU0qUyqaWdDSrvbau b3Fn5vSGs13Tmf+rg30lJSyFiXzRNGJl2AjNsZXShaB/s6EoVuWE5WvmC9l1SN347xQi l/7WP7Z9AGls3LnqA/CJNn0YRpMfwfAckeIJxEvwJLKeVBEatkxVmgtJl0uOQ+qj/GIl krs6WVm/vnvuBQwvBJuHU9kYGKmUY2iyORbdrGSHdSTx3p9GN5h9p58neaStkyx2XFmv JTgZj9yDRoAaV9gt6YQU29DoVitFe7jALKs4+OCqfUUO/cxOu86GSrgtyRtoBx6QWAzg F8KA== X-Gm-Message-State: ANoB5pnh8CDDEn4Lki9m0V8nFNjlwIjgbmlJQp2FSxR/UmGQC6cVb6jo 3ha1Xc4oiNFHh3RxMyBswiWB X-Received: by 2002:a63:eb16:0:b0:477:6fe1:cd6d with SMTP id t22-20020a63eb16000000b004776fe1cd6dmr69810826pgh.334.1670421639019; Wed, 07 Dec 2022 06:00:39 -0800 (PST) Received: from localhost.localdomain ([117.216.123.5]) by smtp.gmail.com with ESMTPSA id c18-20020a170902d49200b00186b69157ecsm14720160plg.202.2022.12.07.06.00.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 06:00:38 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH 10/12] arm64: dts: qcom: sm8450: Fix the base addresses of LLCC banks Date: Wed, 7 Dec 2022 19:29:19 +0530 Message-Id: <20221207135922.314827-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> References: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751564316220760224?= X-GMAIL-MSGID: =?utf-8?q?1751564316220760224?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Cc: # 5.18 Fixes: 1dc3e50eb680 ("arm64: dts: qcom: sm8450: Add LLCC/system-cache-controller node") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 570475040d95..12549a2912c6 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3640,8 +3640,11 @@ gem_noc: interconnect@19100000 { system-cache-controller@19200000 { compatible = "qcom,sm8450-llcc"; - reg = <0 0x19200000 0 0x580000>, <0 0x19a00000 0 0x80000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x19200000 0 0x80000>, <0 0x19600000 0 0x80000>, + <0 0x19300000 0 0x80000>, <0 0x19700000 0 0x80000>, + <0 0x19a00000 0 0x80000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 7 13:59:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30870 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp200286wrr; Wed, 7 Dec 2022 06:04:40 -0800 (PST) X-Google-Smtp-Source: AA0mqf5gSYUJWlq6gh2CmNFd1hQiq60MopnY+lw+mCU23ZVehobxf4ZZKC3yWZljcx+trnS78zRD X-Received: by 2002:a05:6a00:4501:b0:56b:b049:6c6c with SMTP id cw1-20020a056a00450100b0056bb0496c6cmr78743987pfb.22.1670421880229; Wed, 07 Dec 2022 06:04:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421880; cv=none; d=google.com; s=arc-20160816; b=Bnp+E9nCKjiZHa3SkqUWijkxXLQBnuILwShKbjAIBybq5o4DeH/JYs80B9NP2RC9uD Pml6BDmQDHcodYaI6kUeqcrMtgB+uZQSRpfTvhgTjoXkdp4GfrgbPgInKunUCYKmcaAj iCAx9fBrQ6Vtb+3aKBeQMgrURPz/05j72fQzTuuo3xVoC1AgwwunF7xAY09tAP+Sf79y rbrd+mcbc4pD+FDKISaZ1+mM921FoVoeQiCN0YAVXDBd0bg7SNt+/4adBR0gWPztrWx0 CAHO+oBSNCl/i8esnO09McGDi9IG1PGypXPXKDfstM+p5ZLoD00mV0QGchlcxgSotHWa xhMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=AGwgSnOhYi02xVu+IbkUS49u1T5vi+3uXVqLwkjF92c=; b=cKHzrnldHmVTMj9PolWtN2s2tDDWOLDHD9GT0vjuTp3SwLPWh9gLEBwMLBpxzmTPgl OPz1ulc+W/j7LB/59HawaSadK4gK0oe0PR+dQnn0MTCgFXrog0CB+0tiKsNboXCn9iVZ XEyOc7VSRmSLPPulMUzAg5CKBn1ZrUVPLw1ViuQFzlHR5PHGsrNox6ox0Iq0/B3WsNhg 6HK5jN4s+ZtpC5x9pbuPa4VAopTsuNdK1OBzvKUBUZBk2dUMNlS9Jy5hrR/Iliu5vUYW xlEL0QlW113XI7OZpPBrr4AupWA2UcMIGZdv2OURDiqhliFRLSnWcYZCqbqLbkIeO1H9 ocEA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RelowFhh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c21-20020aa78e15000000b0055fa098c388si20081379pfr.259.2022.12.07.06.04.24; Wed, 07 Dec 2022 06:04:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RelowFhh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230143AbiLGOCf (ORCPT + 99 others); Wed, 7 Dec 2022 09:02:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229928AbiLGOB2 (ORCPT ); Wed, 7 Dec 2022 09:01:28 -0500 Received: from mail-pg1-x52d.google.com (mail-pg1-x52d.google.com [IPv6:2607:f8b0:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B89C65D684 for ; Wed, 7 Dec 2022 06:00:45 -0800 (PST) Received: by mail-pg1-x52d.google.com with SMTP id s196so16476448pgs.3 for ; Wed, 07 Dec 2022 06:00:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AGwgSnOhYi02xVu+IbkUS49u1T5vi+3uXVqLwkjF92c=; b=RelowFhh6oDnHAyNKyX5GbA0mViEyG82HTuOCWYZ5qrEcSdJzwUBvwFBBkWMWJVLJS XQ3r67OTKq+d0YJ+zYjUP+DwVXu6cA4OsIXmXxXwuJz0ZYIEj2jbu7bUdy/uIB64TN/B 3wp1Jd1vmyS5dBY19RdVefXiyHrbBtesuuq5FyzuRz0fd3ZAWF+Mbz0rRWgrPWxl2EWt DDesFiVgla6qIu4YzL9mosel0xcmbHZQ4Q913AxLMXeXPl67p9ko9DuQWmDMSrp9yxgt 5kM9BPICjX/IMuGDeziQRWvE5dnp7fZGCifql6pp8otxSixvDtscV77RApqMb76xzJc8 +Kag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AGwgSnOhYi02xVu+IbkUS49u1T5vi+3uXVqLwkjF92c=; b=b9wreoZjph7Q2fpGT4SNSj9ef3S1SAeSR2Ta4RUYceFCEENPiksnY6bcW7XGNPZesL ng1diop/lA/YGaXhz9Av5I7kmMq2mD38Pgh9T1UiXewrbqlvX3AT8bcqDGEcf6/Ks0pi VNUAyOrY4++3hlUba7hiqPVlp8MNz6qqb8K5UuOUL570cPDlzbHODJzNMpYpvqT2wHFA m97TiAjHfhTP2EAstJ1U0uH7nJ9IE77mLdfLtYZI9xxW0r8Akt0uteseGQkggN45TLB0 fgZbeP+4VUmf5OoIwmHoNoWLJz+dLd2Sz56BvOJcbWA10xPem+9aJ/cHHvWMGWHIvT9P SLGA== X-Gm-Message-State: ANoB5pkZKzKBq+Kqu1XQm5QobKa+6rcT3zD6Xo1BEb3JgGtVKhyPxox/ DvaCFt/DaKaeEzw/TeiI8rhF X-Received: by 2002:a62:ee0f:0:b0:56c:8dbc:f83e with SMTP id e15-20020a62ee0f000000b0056c8dbcf83emr73052440pfi.41.1670421645105; Wed, 07 Dec 2022 06:00:45 -0800 (PST) Received: from localhost.localdomain ([117.216.123.5]) by smtp.gmail.com with ESMTPSA id c18-20020a170902d49200b00186b69157ecsm14720160plg.202.2022.12.07.06.00.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 06:00:44 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH 11/12] arm64: dts: qcom: sm6350: Fix the base addresses of LLCC banks Date: Wed, 7 Dec 2022 19:29:20 +0530 Message-Id: <20221207135922.314827-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> References: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751564293564659667?= X-GMAIL-MSGID: =?utf-8?q?1751564293564659667?= The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SM6350, there is only one LLCC bank available. So let's just pass that as "llcc0_base". Cc: # 5.16 Fixes: ced2f0d75e13 ("arm64: dts: qcom: sm6350: Add LLCC node") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 43324bf291c3..c7701f5e4af6 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1174,7 +1174,7 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sm6350-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", "llcc_broadcast_base"; }; gem_noc: interconnect@9680000 { From patchwork Wed Dec 7 13:59:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 30869 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp200181wrr; Wed, 7 Dec 2022 06:04:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf5dIWgIY6yru+UT4Assw+FzVUXO6remOJtn3VZtONDtcjE7UxIqZYZlt3TaBP73oOYc0ito X-Received: by 2002:a17:903:152:b0:189:6bad:3c61 with SMTP id r18-20020a170903015200b001896bad3c61mr59329032plc.41.1670421873461; Wed, 07 Dec 2022 06:04:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670421873; cv=none; d=google.com; s=arc-20160816; b=QoC2ukxOBHe0xyc4APCWuebx5TV4oC4c2eR30VY9sTyuGK5axXiObi+fAKQtMxOIBY 39LJXEC5lbQrI04hFfetDkrbZIz4cIb47o2qFrLcRtOBAIAUuse5h9mFGW+BWEASkMY+ lNJxtUdEl1DjMVXBmFi02AQq4hhu/bEzyNN2BaRz3oyvTuO/Oq4V9iNX4/sa0lkh1DWR +fWilvwF+WPqw1w8brUC8Mj6kYkWd9ZCFjK5hKyd0hGSr7hFTByZkO+au+/gvSPFvSZh b3yxw4HJQdCsAS0QhLS91b/rkNcDsoKrKtaGUm0tvpEzaqkIfc0YF0ZCZ4Q0ij7c2Dcd FrDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=NhWX6rKQWUP57iw8+d4GFT7tQjEcrRRRTsFAecr4akA=; b=ulGn7xTXs+rGtbt3dO+coezMKe1mfrALDalo7ZVpqA1xqlGjoFpy//ExQlArvVNsyU XBSGTbMsTcz0FbuEK19BvQaJ+dCrL6mAlavyklYYrO0CZe0NBQipiLiTErCidxk8aiOo d6Zf4BRG4UIVXlcpkpc/cVpKTQPn69z3poyqxbxArPOYGKvlfhfrxhXkHs9OgsvEic66 BdoE6rStKsu8t04+oxfSXYg19CzKjEd7CRISPXh7waM+fEIqyNCvpO5LbmNPoVeO69vX Ad8O/zfztaeTfvc3vS0wVHaPJGG1HmtWld0igluqI5qqrt7hn4HIFEsMDpveWijdSnAS iPSg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=A9v9lLV5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q5-20020a170902bd8500b001866341b823si18582418pls.322.2022.12.07.06.04.17; Wed, 07 Dec 2022 06:04:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=A9v9lLV5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229940AbiLGOCb (ORCPT + 99 others); Wed, 7 Dec 2022 09:02:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230312AbiLGOCB (ORCPT ); Wed, 7 Dec 2022 09:02:01 -0500 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2F8C5E3EF for ; Wed, 7 Dec 2022 06:00:58 -0800 (PST) Received: by mail-pf1-x42d.google.com with SMTP id n3so13247053pfq.10 for ; Wed, 07 Dec 2022 06:00:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NhWX6rKQWUP57iw8+d4GFT7tQjEcrRRRTsFAecr4akA=; b=A9v9lLV56An3GhPsH89Ik473JrofRyBdoLoOAQPzQLQbyppH1iHysZpC0Uli4f28PT Jr+UzCAhJ4Wmoy3JXe25IScBIloO1gSmuRDg/+uUUiSrFA3Ynl/fFocpgyVhDgy4zcOM qjjxN2afRdMvUNXqPEmQQ+764HOjVcqIxAHRYgPi+ape3usBOAhruzcg2KTwLGMDc/wO yqYuQBDDfPOooe0BZ/f8ZXZQPlGYCAovECjM7P7/RSySESbiVolMeg4tljpXO7yboMlE VkUz0E2umgbcDz7IPJcOYaAsUgoxzeJ6NNR8J1XfkRA8WO8KFS6R38WBc7ozgXuvZQMF uZfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NhWX6rKQWUP57iw8+d4GFT7tQjEcrRRRTsFAecr4akA=; b=qntn7KzC6vAJH7p0PNaNPHxZs3BxbCbuvTSQwvOeqzByT9HPIr1Dfa8HtETepUMjJo gpCglwQycPYt4lER8DXWeMiFCSlDnXPvIJxrlhHEu8RhDZSGoBr2H+hJ2ovqaIYmzcS3 JKmRxQ3gYrjU4V84erBG2pN7+VkLVAILkQ5Zfo/ISbtSBR8542pjd5JRXWWsKKH/h+NV FJLkp+OwOPn6LpPh4LZ8Ao/6URwo94zdCbx8uVLTthUdJ2u2ugNuuQvWUhWyn/YO98Sg S0Z5HeLht+6sQ8g9bMwx2nRFtbXknhb3iG4HRlo/WaJmLaduqatwgBtTkNFsspJT6phX XpXQ== X-Gm-Message-State: ANoB5plrJ6IH96kE7uzHszLpAq74tKfU3scVqsL0pLOhjGTiF/H/4T41 uH5PDV0HAFlRb5kavdMl2gVY X-Received: by 2002:a65:5aca:0:b0:478:b2d5:d843 with SMTP id d10-20020a655aca000000b00478b2d5d843mr14474926pgt.415.1670421658483; Wed, 07 Dec 2022 06:00:58 -0800 (PST) Received: from localhost.localdomain ([117.216.123.5]) by smtp.gmail.com with ESMTPSA id c18-20020a170902d49200b00186b69157ecsm14720160plg.202.2022.12.07.06.00.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 06:00:57 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH 12/12] qcom: llcc/edac: Fix the base address used for accessing LLCC banks Date: Wed, 7 Dec 2022 19:29:22 +0530 Message-Id: <20221207135922.314827-14-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> References: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751564286495369036?= X-GMAIL-MSGID: =?utf-8?q?1751564286495369036?= The Qualcomm LLCC/EDAC drivers were using a fixed register stride for accessing the (Control and Status Registers) CSRs of each LLCC bank. This stride only works for some SoCs like SDM845 for which driver support was initially added. But the later SoCs use different register stride that vary between the banks with holes in-between. So it is not possible to use a single register stride for accessing the CSRs of each bank. By doing so could result in a crash. For fixing this issue, let's obtain the base address of each LLCC bank from devicetree and get rid of the fixed stride. Cc: # 4.20 Fixes: a3134fb09e0b ("drivers: soc: Add LLCC driver") Fixes: 27450653f1db ("drivers: edac: Add EDAC driver support for QCOM SoCs") Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 14 +++---- drivers/soc/qcom/llcc-qcom.c | 64 ++++++++++++++++++------------ include/linux/soc/qcom/llcc-qcom.h | 4 +- 3 files changed, 44 insertions(+), 38 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 97a27e42dd61..70bd39a91b89 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -213,7 +213,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) for (i = 0; i < reg_data.reg_cnt; i++) { synd_reg = reg_data.synd_reg + (i * 4); - ret = regmap_read(drv->regmap, drv->offsets[bank] + synd_reg, + ret = regmap_read(drv->regmap[bank], synd_reg, &synd_val); if (ret) goto clear; @@ -222,8 +222,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) reg_data.name, i, synd_val); } - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.count_status_reg, + ret = regmap_read(drv->regmap[bank], reg_data.count_status_reg, &err_cnt); if (ret) goto clear; @@ -233,8 +232,7 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type) edac_printk(KERN_CRIT, EDAC_LLCC, "%s: Error count: 0x%4x\n", reg_data.name, err_cnt); - ret = regmap_read(drv->regmap, - drv->offsets[bank] + reg_data.ways_status_reg, + ret = regmap_read(drv->regmap[bank], reg_data.ways_status_reg, &err_ways); if (ret) goto clear; @@ -296,8 +294,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) /* Iterate over the banks and look for Tag RAM or Data RAM errors */ for (i = 0; i < drv->num_banks; i++) { - ret = regmap_read(drv->regmap, - drv->offsets[i] + DRP_INTERRUPT_STATUS, + ret = regmap_read(drv->regmap[i], DRP_INTERRUPT_STATUS, &drp_error); if (!ret && (drp_error & SB_ECC_ERROR)) { @@ -312,8 +309,7 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) if (!ret) irq_rc = IRQ_HANDLED; - ret = regmap_read(drv->regmap, - drv->offsets[i] + TRP_INTERRUPT_0_STATUS, + ret = regmap_read(drv->regmap[i], TRP_INTERRUPT_0_STATUS, &trp_error); if (!ret && (trp_error & SB_ECC_ERROR)) { diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 23ce2f78c4ed..7264ac9993e0 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -62,8 +62,6 @@ #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c #define LLCC_TRP_ALGO_CFG8 0x21f30 -#define BANK_OFFSET_STRIDE 0x80000 - #define LLCC_VERSION_2_0_0_0 0x02000000 #define LLCC_VERSION_2_1_0_0 0x02010000 #define LLCC_VERSION_4_1_0_0 0x04010000 @@ -927,6 +925,7 @@ static int qcom_llcc_probe(struct platform_device *pdev) const struct llcc_slice_config *llcc_cfg; u32 sz; u32 version; + struct regmap *regmap; drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL); if (!drv_data) { @@ -934,12 +933,46 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; } - drv_data->regmap = qcom_llcc_init_mmio(pdev, "llcc_base"); - if (IS_ERR(drv_data->regmap)) { - ret = PTR_ERR(drv_data->regmap); + /* Initialize the first LLCC bank regmap */ + regmap = qcom_llcc_init_mmio(pdev, "llcc0_base"); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + goto err; + } + + cfg = of_device_get_match_data(&pdev->dev); + + ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], + &num_banks); + if (ret) + goto err; + + num_banks &= LLCC_LB_CNT_MASK; + num_banks >>= LLCC_LB_CNT_SHIFT; + drv_data->num_banks = num_banks; + + drv_data->regmap = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmap), GFP_KERNEL); + if (!drv_data->regmap) { + ret = -ENOMEM; goto err; } + drv_data->regmap[0] = regmap; + + /* Initialize rest of LLCC bank regmaps */ + for (i = 1; i < num_banks; i++) { + char *base = kasprintf(GFP_KERNEL, "llcc%d_base", i); + + drv_data->regmap[i] = qcom_llcc_init_mmio(pdev, base); + if (IS_ERR(drv_data->regmap[i])) { + ret = PTR_ERR(drv_data->regmap[i]); + kfree(base); + goto err; + } + + kfree(base); + } + drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, "llcc_broadcast_base"); if (IS_ERR(drv_data->bcast_regmap)) { @@ -947,8 +980,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; } - cfg = of_device_get_match_data(&pdev->dev); - /* Extract version of the IP */ ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], &version); @@ -957,15 +988,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) drv_data->version = version; - ret = regmap_read(drv_data->regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], - &num_banks); - if (ret) - goto err; - - num_banks &= LLCC_LB_CNT_MASK; - num_banks >>= LLCC_LB_CNT_SHIFT; - drv_data->num_banks = num_banks; - llcc_cfg = cfg->sct_data; sz = cfg->size; @@ -973,16 +995,6 @@ static int qcom_llcc_probe(struct platform_device *pdev) if (llcc_cfg[i].slice_id > drv_data->max_slices) drv_data->max_slices = llcc_cfg[i].slice_id; - drv_data->offsets = devm_kcalloc(dev, num_banks, sizeof(u32), - GFP_KERNEL); - if (!drv_data->offsets) { - ret = -ENOMEM; - goto err; - } - - for (i = 0; i < num_banks; i++) - drv_data->offsets[i] = i * BANK_OFFSET_STRIDE; - drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, GFP_KERNEL); if (!drv_data->bitmap) { diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index ad1fd718169d..4b8bf585f9ba 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -129,12 +129,11 @@ struct llcc_edac_reg_offset { * @max_slices: max slices as read from device tree * @num_banks: Number of llcc banks * @bitmap: Bit map to track the active slice ids - * @offsets: Pointer to the bank offsets array * @ecc_irq: interrupt for llcc cache error detection and reporting * @version: Indicates the LLCC version */ struct llcc_drv_data { - struct regmap *regmap; + struct regmap **regmap; struct regmap *bcast_regmap; const struct llcc_slice_config *cfg; const struct llcc_edac_reg_offset *edac_reg_offset; @@ -143,7 +142,6 @@ struct llcc_drv_data { u32 max_slices; u32 num_banks; unsigned long *bitmap; - u32 *offsets; int ecc_irq; u32 version; };