From patchwork Wed Dec 7 13:17:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 30834 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp178938wrr; Wed, 7 Dec 2022 05:23:07 -0800 (PST) X-Google-Smtp-Source: AA0mqf6Pz1RUfFH+Bt+c2fjyVPHstSRSlAM+szM6+gE3n5hyoqmdR1LVSLw5+C+f4ShdlokOa/K1 X-Received: by 2002:a17:907:c60d:b0:7bf:5fa6:b9b8 with SMTP id ud13-20020a170907c60d00b007bf5fa6b9b8mr38592448ejc.383.1670419387533; Wed, 07 Dec 2022 05:23:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670419387; cv=none; d=google.com; s=arc-20160816; b=ftdyLVeKpRTDIW/6+1DPpXbgT2j8H9/ELdNrBWWQbPEbuN3iJuU71gF7M3dMI2gxwx F74Z9qsOlDnnaH5nVsV8RvzX4hBUIZzZjU7F8rMR1+HNSIWM+yctBMKxDQou0HR4aYJl XC/PJWjqGtXez1k1fYGUmN0gwWKdTHlINvqM56lm3OJJTJPttpC35WKuObgFFI6t0C9v WeAvT12d1ZGKPGd8/dTF3I3XblJGki4ulfXumKsP0uHZZ3ZJjcDSI2eMGnRck/2nQG6F OAEouQeFxM9fjkDrUAZsLly9448AsWilOCro8Syv8ra8uA0oKj76slY8c3I7GSF2gnCP ZOQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=nw5ZkAzaiySJv6Grzc5WXx89OKF8I8XwNzpSjDz0tSE=; b=HNNmEsq184wyyUxfXobdOPzTLVOO5euvoeg1iwf7uofFPcIxFXcdaITazR2ZGxAs7T 3x9pzvxCy5SZh3nprmifDbn86/11MzUWyc1aOURbdsTMB9Ct54Vz2S+5WwpEMp1/yqKj 4feEFHnT6DcVCKy67vEPskokcxIWSDnFGlfvOh6+YrsyxGFGTCFnGuJYrTedQqv9bCl/ 77B7kzJySc01gnbk0W9FPATzNMkU7wp3+vI+mTXkyTzRC/8dqhjJN8sly6cWy8MLcU8I nHKl0Tgdx3cAkku/n0Qs/SvnU320xvN4dXV6we+PR/TvlEsn4ILM2MnfNqopabKOCY1U pkRA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hw9-20020a170907a0c900b007ab1b8b71a6si17369199ejc.40.2022.12.07.05.22.43; Wed, 07 Dec 2022 05:23:07 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229937AbiLGNRs convert rfc822-to-8bit (ORCPT + 99 others); Wed, 7 Dec 2022 08:17:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229886AbiLGNRh (ORCPT ); Wed, 7 Dec 2022 08:17:37 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E4FB26E6; Wed, 7 Dec 2022 05:17:36 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id AA3AB24E2AA; Wed, 7 Dec 2022 21:17:33 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 7 Dec 2022 21:17:33 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 7 Dec 2022 21:17:32 +0800 From: William Qiu To: , , CC: Rob Herring , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , William Qiu , Subject: [PATCH v1 1/3] dt-bindings: mmc: Add bindings for StarFive Date: Wed, 7 Dec 2022 21:17:29 +0800 Message-ID: <20221207131731.1291517-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221207131731.1291517-1-william.qiu@starfivetech.com> References: <20221207131731.1291517-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751561680012187864?= X-GMAIL-MSGID: =?utf-8?q?1751561680012187864?= Add documentation to describe StarFive designware mobile storage host controller driver. Signed-off-by: William Qiu --- .../bindings/mmc/starfive,jh7110-sdio.yaml | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/starfive,jh7110-sdio.yaml diff --git a/Documentation/devicetree/bindings/mmc/starfive,jh7110-sdio.yaml b/Documentation/devicetree/bindings/mmc/starfive,jh7110-sdio.yaml new file mode 100644 index 000000000000..4f27ef3cf4f3 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/starfive,jh7110-sdio.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/starfive,jh7110-sdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive Designware Mobile Storage Host Controller + +description: + StarFive uses the Synopsys designware mobile storage host controller + to interface a SoC with storage medium such as eMMC or SD/MMC cards. + +allOf: + - $ref: "synopsys-dw-mshc-common.yaml#" + +maintainers: + - William Qiu + +properties: + compatible: + const: starfive,jh7110-sdio + + reg: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: biu clock + - description: ciu clock + + clock-names: + minItems: 1 + items: + - const: biu + - const: ciu + + interrupts: + maxItems: 1 + + starfive,sys-syscon: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + The desired number of times that the host execute tuning when needed. + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + #include + mmc@16010000 { + compatible = "starfive,jh7110-sdio"; + reg = <0x16010000 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_SDIO0_AHB>, + <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; + clock-names = "biu","ciu"; + resets = <&syscrg JH7110_SYSRST_SDIO0_AHB>; + reset-names = "reset"; + interrupts = <74>; + fifo-depth = <32>; + fifo-watermark-aligned; + data-addr = <0>; + }; From patchwork Wed Dec 7 13:17:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 30832 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp178716wrr; Wed, 7 Dec 2022 05:22:41 -0800 (PST) X-Google-Smtp-Source: AA0mqf6+X8TCYCvcICAPHJm4UmASIrc604z3R+i1MrtW6zkMz1MSEoMvdxv2GIiCDPacf3I9GXhQ X-Received: by 2002:a17:902:a718:b0:189:7722:99d7 with SMTP id w24-20020a170902a71800b00189772299d7mr54176438plq.96.1670419361195; Wed, 07 Dec 2022 05:22:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670419361; cv=none; d=google.com; s=arc-20160816; b=Wo9vP049GavxeUGpkFNL/MbbcHHio7XYwzLKTPO6q9B9KNbkj4aHMRMnwtJpM39vaj g0ekKXuwGTqDGxNbC0prNVh+iNTRXKHMHnAFrAUUC6Dm0kPNhxIB7Yjq9g2AAjnqkGdR OhgQ16PBYEl4cNEdLZcRyq1l3qWulgSEoY2roOh/lp5pwh3eUXbq1wD8ssIig5p9UlfA Uv406tAVS6oGjxLukpoezydI7cEJC9iBt/l26AzoBj8TyBX72k3YbRpI2md8JZD1LzXh L87YTpoPksqzx1KPAq2/E7iuJy+Q9O4ZcfakR6UMi+kA66cnGkB9BKdaIry8+S6c2Q5h TxKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=HQSrBhl1pHOvW8RiTYLfOHp1hd+TpTRoydpc1ZUB4vg=; b=zRXRI3OZjCltUysir8oVg0vUpZlN7ZmmeUyKEjrd+x4K42lkUqiQi2tytMd8qyIZZ9 uW6vMFhnYRumxHMF0O6YRrHsw7wQpArWn8ej8Y7jvswO3RiIOt+gkfyAgxCHbGUoonGA s15ctfSfqFad7SdHPXuuIo/Bm7smwFkSPZ4/sX2qt4HYy5qL9ilgvCrS235wd1pu3mPe EMmXsEFhwkbTXA5CBQAEFr7AGeRCxmfmjhV26zam9XBsbgH3n9aGYd6oUjaS7ix5Nzf1 FeXMAv9tg0ffHLi0Eo7n8L5i6OkdxUg4QLrPfl+s1bfVDSWFyPwSNQErFbDOmMxF1C4r djfA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o3-20020a170902d4c300b00186e9ff4edcsi20296755plg.408.2022.12.07.05.22.27; Wed, 07 Dec 2022 05:22:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229919AbiLGNRp convert rfc822-to-8bit (ORCPT + 99 others); Wed, 7 Dec 2022 08:17:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229878AbiLGNRh (ORCPT ); Wed, 7 Dec 2022 08:17:37 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA5F91163; Wed, 7 Dec 2022 05:17:35 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 4AA2D24E2B0; Wed, 7 Dec 2022 21:17:34 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 7 Dec 2022 21:17:34 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 7 Dec 2022 21:17:33 +0800 From: William Qiu To: , , CC: Rob Herring , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , William Qiu , Subject: [PATCH v1 2/3] mmc: starfive: Add sdio/emmc driver support Date: Wed, 7 Dec 2022 21:17:30 +0800 Message-ID: <20221207131731.1291517-3-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221207131731.1291517-1-william.qiu@starfivetech.com> References: <20221207131731.1291517-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751561651691766357?= X-GMAIL-MSGID: =?utf-8?q?1751561651691766357?= Add sdio/emmc driver support for StarFive JH7110 soc. Signed-off-by: William Qiu --- MAINTAINERS | 6 + drivers/mmc/host/Kconfig | 10 ++ drivers/mmc/host/Makefile | 1 + drivers/mmc/host/dw_mmc-starfive.c | 197 +++++++++++++++++++++++++++++ 4 files changed, 214 insertions(+) create mode 100644 drivers/mmc/host/dw_mmc-starfive.c diff --git a/MAINTAINERS b/MAINTAINERS index a70c1d0f303e..2b46ef07f5dc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19623,6 +19623,12 @@ F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml F: drivers/reset/starfive/ F: include/dt-bindings/reset/starfive* +STARFIVE JH7110 MMC/SD/SDIO DRIVER +M: William Qiu +S: Maintained +F: Documentation/devicetree/bindings/mmc/starfive* +F: drivers/mmc/dw_mmc-starfive.c + STATIC BRANCH/CALL M: Peter Zijlstra M: Josh Poimboeuf diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index fb1062a6394c..b87262503403 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -871,6 +871,16 @@ config MMC_DW_ROCKCHIP Synopsys DesignWare Memory Card Interface driver. Select this option for platforms based on RK3066, RK3188 and RK3288 SoC's. +config MMC_DW_STARFIVE + tristate "StarFive specific extensions for Synopsys DW Memory Card Interface" + depends on SOC_STARFIVE + depends on MMC_DW + select MMC_DW_PLTFM + help + This selects support for StarFive JH7110 SoC specific extensions to the + Synopsys DesignWare Memory Card Interface driver. Select this option + for platforms based on StarFive JH7110 SoC. + config MMC_SH_MMCIF tristate "SuperH Internal MMCIF support" depends on SUPERH || ARCH_RENESAS || COMPILE_TEST diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index 4e4ceb32c4b4..32c0e5564b9a 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_MMC_DW_HI3798CV200) += dw_mmc-hi3798cv200.o obj-$(CONFIG_MMC_DW_K3) += dw_mmc-k3.o obj-$(CONFIG_MMC_DW_PCI) += dw_mmc-pci.o obj-$(CONFIG_MMC_DW_ROCKCHIP) += dw_mmc-rockchip.o +obj-$(CONFIG_MMC_DW_STARFIVE) += dw_mmc-starfive.o obj-$(CONFIG_MMC_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o obj-$(CONFIG_MMC_VUB300) += vub300.o diff --git a/drivers/mmc/host/dw_mmc-starfive.c b/drivers/mmc/host/dw_mmc-starfive.c new file mode 100644 index 000000000000..b2e6a0b6abf9 --- /dev/null +++ b/drivers/mmc/host/dw_mmc-starfive.c @@ -0,0 +1,197 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * StarFive Designware Mobile Storage Host Controller Driver + * + * Copyright (c) 2022 StarFive Technology Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#include "dw_mmc.h" +#include "dw_mmc-pltfm.h" + +#define ALL_INT_CLR 0x1ffff +#define MAX_DELAY_CHAIN 32 + +struct starfive_priv { + struct device *dev; + struct regmap *reg_syscon; + u32 syscon_offset; + u32 syscon_shift; + u32 syscon_mask; +}; + +static unsigned long dw_mci_starfive_caps[] = { + MMC_CAP_CMD23, + MMC_CAP_CMD23, + MMC_CAP_CMD23 +}; + +static void dw_mci_starfive_set_ios(struct dw_mci *host, struct mmc_ios *ios) +{ + int ret; + unsigned int clock; + + if (ios->timing == MMC_TIMING_MMC_DDR52 || ios->timing == MMC_TIMING_UHS_DDR50) { + clock = (ios->clock > 50000000 && ios->clock <= 52000000) ? 100000000 : ios->clock; + ret = clk_set_rate(host->ciu_clk, clock); + if (ret) + dev_dbg(host->dev, "Use an external frequency divider %uHz\n", ios->clock); + host->bus_hz = clk_get_rate(host->ciu_clk); + } else { + dev_dbg(host->dev, "Using the internal divider\n"); + } +} + +static int dw_mci_starfive_execute_tuning(struct dw_mci_slot *slot, + u32 opcode) +{ + static const int grade = MAX_DELAY_CHAIN; + struct dw_mci *host = slot->host; + struct starfive_priv *priv = host->priv; + int raise_point = -1, fall_point = -1; + int err, prev_err = -1; + int found = 0; + int i; + u32 regval; + + for (i = 0; i < grade; i++) { + regval = i << priv->syscon_shift; + err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, + priv->syscon_mask, regval); + if (err) + return err; + mci_writel(host, RINTSTS, ALL_INT_CLR); + + err = mmc_send_tuning(slot->mmc, opcode, NULL); + if (!err) + found = 1; + + if (i > 0) { + if (err && !prev_err) + fall_point = i - 1; + if (!err && prev_err) + raise_point = i; + } + + if (raise_point != -1 && fall_point != -1) + goto tuning_out; + + prev_err = err; + err = 0; + } + +tuning_out: + if (found) { + if (raise_point == -1) + raise_point = 0; + if (fall_point == -1) + fall_point = grade - 1; + if (fall_point < raise_point) { + if ((raise_point + fall_point) > + (grade - 1)) + i = fall_point / 2; + else + i = (raise_point + grade - 1) / 2; + } else { + i = (raise_point + fall_point) / 2; + } + + regval = i << priv->syscon_shift; + err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, + priv->syscon_mask, regval); + if (err) + return err; + mci_writel(host, RINTSTS, ALL_INT_CLR); + + dev_dbg(host->dev, "Found valid delay chain! use it [delay=%d]\n", i); + } else { + dev_err(host->dev, "No valid delay chain! use default\n"); + err = -EINVAL; + } + + mci_writel(host, RINTSTS, ALL_INT_CLR); + return err; +} + +static int dw_mci_starfive_parse_dt(struct dw_mci *host) +{ + struct of_phandle_args args; + struct starfive_priv *priv; + int ret; + + priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + ret = of_parse_phandle_with_fixed_args(host->dev->of_node, + "starfive,sys-syscon", 3, 0, &args); + if (ret) { + dev_err(host->dev, "Failed to parse starfive,sys-syscon\n"); + return -EINVAL; + } + + priv->reg_syscon = syscon_node_to_regmap(args.np); + of_node_put(args.np); + if (IS_ERR(priv->reg_syscon)) + return PTR_ERR(priv->reg_syscon); + + priv->syscon_offset = args.args[0]; + priv->syscon_shift = args.args[1]; + priv->syscon_mask = args.args[2]; + + host->priv = priv; + + return 0; +} + +static const struct dw_mci_drv_data starfive_data = { + .caps = dw_mci_starfive_caps, + .num_caps = ARRAY_SIZE(dw_mci_starfive_caps), + .set_ios = dw_mci_starfive_set_ios, + .parse_dt = dw_mci_starfive_parse_dt, + .execute_tuning = dw_mci_starfive_execute_tuning, +}; + +static const struct of_device_id dw_mci_starfive_match[] = { + { .compatible = "starfive,jh7110-sdio", + .data = &starfive_data }, + {}, +}; +MODULE_DEVICE_TABLE(of, dw_mci_starfive_match); + +static int dw_mci_starfive_probe(struct platform_device *pdev) +{ + return dw_mci_pltfm_register(pdev, &starfive_data); +} + +static int dw_mci_starfive_remove(struct platform_device *pdev) +{ + return dw_mci_pltfm_remove(pdev); +} + +static struct platform_driver dw_mci_starfive_driver = { + .probe = dw_mci_starfive_probe, + .remove = dw_mci_starfive_remove, + .driver = { + .name = "dwmmc_starfive", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = dw_mci_starfive_match, + }, +}; +module_platform_driver(dw_mci_starfive_driver); + +MODULE_DESCRIPTION("StarFive JH7110 Specific DW-MSHC Driver Extension"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:dwmmc_starfive"); From patchwork Wed Dec 7 13:17:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 30833 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp178761wrr; Wed, 7 Dec 2022 05:22:48 -0800 (PST) X-Google-Smtp-Source: AA0mqf6ACPKO5qZKYnK8Hh+UI+2K3VbCEzOQvKT+uEeW2n/O1+BVEn7BVrhefWOfWbkn5z/n/JWl X-Received: by 2002:a17:903:1014:b0:189:adf6:771d with SMTP id a20-20020a170903101400b00189adf6771dmr33736587plb.102.1670419368153; Wed, 07 Dec 2022 05:22:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670419368; cv=none; d=google.com; s=arc-20160816; b=qfk+sCEs+vSPHQy/5udxFaJZUjPJ8qd/0SVv/SsDlIt/FXQnsV+RmIgpIZCRPDx2Vv lFpuqa+EDbXUPZHzfOVfKt80vwWQCJddCDlU2N1hibYsaRswny3PoFUB2KJg5DsP+/Xk yd9D5KE8HSI9x1LHO49pW58EZRsRZxPF5nG7R+gp+TfUUFi+lbGOchSUiSKOIh95aMWI bg/waHerjrHcPbKunkw65Nv93OiVxo3BiagG+PxToHA9yUqUCFke3ADwaQB1EpPYQMML lUaMi5q8uHfrgHlJ7i6zCI+qRy35QNsm/nmLR503rsJrVMDMvogGuKhOHfAqgKbaZiMi nvaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=MdQ2wUxsDT2CzKerJ4t3DNkqTlUEp/puzvkUJYwMX5I=; b=pNLTRzjBwy2tz6YrTbM39fO4zwky07dlVuZWedokg0jVhqFpruFX+DGQ+vGUGsREME hiH7ltdfocMkREUqdksTksYiOrJP4Ox6XXUBmkbWG2nv0TkXuWPZnIK4cp1KrC8i6BwI OipauK0q+okacgdO9nVlmd3w4J4JwRKju1bgd6a6nWGfBUmvYMUmf9SRhNZ8f00zvP0L VDc3FTAx7QTdlLfcHSvl1K6UuZHSXPgnd9vWmNmj4605Qc8ZuV8cfO1zBLcHZdsvz6pG PW0fc+fHO7C9f5LxL7PBcii9WdJvSabIZE95U2HfMHlxlgR0zPHLM5XznCZPQ3syWCzo WV4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u8-20020a170902b28800b00186db024863si19147789plr.612.2022.12.07.05.22.33; Wed, 07 Dec 2022 05:22:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229586AbiLGNRm convert rfc822-to-8bit (ORCPT + 99 others); Wed, 7 Dec 2022 08:17:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49698 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229828AbiLGNRh (ORCPT ); Wed, 7 Dec 2022 08:17:37 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EED591172; Wed, 7 Dec 2022 05:17:35 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id D0E4624E2AF; Wed, 7 Dec 2022 21:17:34 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 7 Dec 2022 21:17:35 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 7 Dec 2022 21:17:34 +0800 From: William Qiu To: , , CC: Rob Herring , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , William Qiu , Subject: [PATCH v1 3/3] riscv: dts: starfive: Add mmc node Date: Wed, 7 Dec 2022 21:17:31 +0800 Message-ID: <20221207131731.1291517-4-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221207131731.1291517-1-william.qiu@starfivetech.com> References: <20221207131731.1291517-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751561659579422052?= X-GMAIL-MSGID: =?utf-8?q?1751561659579422052?= This adds the mmc node for the StarFive JH7110 SoC. Set sdioo node to emmc and set sdio1 node to sd. Signed-off-by: William Qiu --- .../jh7110-starfive-visionfive-v2.dts | 25 ++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 38 +++++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts index c8946cf3a268..6ef8e303c2e6 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts @@ -47,6 +47,31 @@ &clk_rtc { clock-frequency = <32768>; }; +&sdio0 { + max-frequency = <100000000>; + card-detect-delay = <300>; + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + cap-mmc-hw-reset; + post-power-on-delay-ms = <200>; + status = "okay"; +}; + +&sdio1 { + max-frequency = <100000000>; + card-detect-delay = <300>; + bus-width = <4>; + no-sdio; + no-mmc; + broken-cd; + cap-sd-highspeed; + post-power-on-delay-ms = <200>; + status = "okay"; +}; + &gmac0_rmii_refin { clock-frequency = <50000000>; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index c22e8f1d2640..e90b085d7e41 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -331,6 +331,11 @@ aoncrg: clock-controller@17000000 { #reset-cells = <1>; }; + sys_syscon: sys_syscon@13030000 { + compatible = "syscon"; + reg = <0x0 0x13030000 0x0 0x1000>; + }; + gpio: gpio@13040000 { compatible = "starfive,jh7110-sys-pinctrl"; reg = <0x0 0x13040000 0x0 0x10000>; @@ -433,5 +438,38 @@ uart5: serial@12020000 { reg-shift = <2>; status = "disabled"; }; + + /* unremovable emmc as mmcblk0 */ + sdio0: mmc@16010000 { + compatible = "starfive,jh7110-sdio"; + reg = <0x0 0x16010000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_SDIO0_AHB>, + <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; + clock-names = "biu","ciu"; + resets = <&syscrg JH7110_SYSRST_SDIO0_AHB>; + reset-names = "reset"; + interrupts = <74>; + fifo-depth = <32>; + fifo-watermark-aligned; + data-addr = <0>; + starfive,sys-syscon = <&sys_syscon 0x14 0x1a 0x7c000000>; + status = "disabled"; + }; + + sdio1: mmc@16020000 { + compatible = "starfive,jh7110-sdio"; + reg = <0x0 0x16020000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_SDIO1_AHB>, + <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; + clock-names = "biu","ciu"; + resets = <&syscrg JH7110_SYSRST_SDIO1_AHB>; + reset-names = "reset"; + interrupts = <75>; + fifo-depth = <32>; + fifo-watermark-aligned; + data-addr = <0>; + starfive,sys-syscon = <&sys_syscon 0x9c 0x1 0x3e>; + status = "disabled"; + }; }; };