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[2620:137:e000::1:20]) by mx.google.com with ESMTP id d63-20020a17090a6f4500b00219c0cd0f1dsi1029512pjk.145.2022.12.07.02.08.04; Wed, 07 Dec 2022 02:08:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Dpra1l8p; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230248AbiLGJtq (ORCPT + 99 others); Wed, 7 Dec 2022 04:49:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230213AbiLGJtg (ORCPT ); Wed, 7 Dec 2022 04:49:36 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A60027D; Wed, 7 Dec 2022 01:49:35 -0800 (PST) X-UUID: 37be9170f0514ba9bdcaa9f74a10d17d-20221207 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=crufHaBJqDwuFiPQOlCXJvq1DOxDaZbIVtDdwONvRV4=; b=Dpra1l8pJFu9XIRFTn2JlLHC2MpfMb1yDkDRRjN25YnWWlVlLJ0Be2bQpn7/K5ewjmV2Jfz/8vk/mH/900hxdhu/ss515DqzpoKq58Gs7fL7fdroP69y8b8rl9+fM6n6f8Wk4r1nYLAXBK5vY3jljSSxOGI1kuFpaMAUwvy1tss=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14,REQID:f3ae7130-d8ed-4a3b-b1d8-1e1d707f738c,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:dcaaed0,CLOUDID:06fd9224-4387-4253-a41d-4f6f2296b154,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 37be9170f0514ba9bdcaa9f74a10d17d-20221207 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 54277046; Wed, 07 Dec 2022 17:49:24 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Wed, 7 Dec 2022 17:49:23 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 7 Dec 2022 17:49:23 +0800 From: Moudy Ho To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , Moudy Ho Subject: [PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS Date: Wed, 7 Dec 2022 17:49:14 +0800 Message-ID: <20221207094921.15450-2-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221207094921.15450-1-moudy.ho@mediatek.com> References: <20221207094921.15450-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751549423038062843?= X-GMAIL-MSGID: =?utf-8?q?1751549423038062843?= For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with hardware differences in power domains, clocks and subsystem counts, which should be determined by compatible names. Signed-off-by: Moudy Ho Acked-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 0711f1834fbd..493aa9e8d484 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -48,7 +48,10 @@ properties: - const: syscon - items: - - const: mediatek,mt8195-vdosys0 + - enum: + - mediatek,mt8195-vdosys0 + - mediatek,mt8195-vppsys0 + - mediatek,mt8195-vppsys1 - const: mediatek,mt8195-mmsys - const: syscon From patchwork Wed Dec 7 09:49:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 30739 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp90362wrr; Wed, 7 Dec 2022 02:08:17 -0800 (PST) X-Google-Smtp-Source: AA0mqf5BSKgh0c+q/FIZ9hBgOMtq7Yyekywv05JLpvVUPGOFtqi7pg+FU3YrzufDwdFbqtqJr/iA X-Received: by 2002:a05:6402:189:b0:469:85d:2663 with SMTP id r9-20020a056402018900b00469085d2663mr5421000edv.56.1670407696992; Wed, 07 Dec 2022 02:08:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670407696; cv=none; d=google.com; s=arc-20160816; b=P8fP4XNaccJpIbFjHnEW0vX2pdmNrXUtfNqSlf4comJQXOjYoW/h5+wWAv2S1igiOg HGGUktXx3bPsudRiqbzF4wPPjHCreQ8Z1jytbWTgCCW9iQ+OX9qtqIjdlcKvnZksebSQ EB5rqVbE8t7jB9LgpuSC7FGQqvhMBFg8BzpEvlN8eIJrsLWezonHXsWbOezMxc5X3GkK n98g/ZVhhNa057XpDj4ltuQ4/SvV056cuES+fo/73Jm3j0C2qBatV4P/LgWKr6bsGR7t 3B5wH9F1sS+V+4CV1QHIUWlY5OngAe/Y6Rz5frywXveCx42AkTZN4DChm43ost8IMzVx ER+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=z0BwPTiJq45XxbEGYv/PjtFL9GF0yWhObVdRootrVoo=; b=c6GXH3qaUdzKZq3Q7XEtnfgBfMcncp20ItNcXWnnmtnDDTmnV8oh1ZPqmCDCBL2xTA kFk9xtPVxFwB0IyPCHz3b5ufU3P/o84ez0HcZf5qzGdRsZxsQUVtcphDEGjdgZFVAYnW s1pNEEQSsHjMaO9mXP0ep3EVPYMRLHodFeWNBQXQ4q8PcgDhoyJVEyM/Xbxk1U9QocAT 2R+KsmEL9IhsJWJQVRhLB9AaEYKzGNlxShXB17Fd++wzDK2ZDh/YuuBA+dqfIv1ffAP7 L68c5S7btH6Y1QT75zCvF4cM06cN4b6ChdrR0+xbMQ8AXufDUOxY0Op17e+VaBzdXdWY Izew== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=NZISzmMP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. 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Before working with them, the addresses, interrupts, clocks and power domains need to be set up in dts. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index bd33b414c484..0ece3b46b66a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1639,6 +1639,15 @@ #clock-cells = <1>; }; + mutex@1400f000 { + compatible = "mediatek,mt8195-vpp-mutex"; + reg = <0 0x1400f000 0 0x1000>; + interrupts = ; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MUTEX>; + power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS0>; + }; + smi_sub_common_vpp0_vpp1_2x1: smi@14010000 { compatible = "mediatek,mt8195-smi-sub-common"; reg = <0 0x14010000 0 0x1000>; @@ -1745,6 +1754,15 @@ #clock-cells = <1>; }; + mutex@14f01000 { + compatible = "mediatek,mt8195-vpp-mutex"; + reg = <0 0x14f01000 0 0x1000>; + interrupts = ; + mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>; + clocks = <&vppsys1 CLK_VPP1_DISP_MUTEX>; + power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS1>; + }; + larb5: larb@14f02000 { compatible = "mediatek,mt8195-smi-larb"; reg = <0 0x14f02000 0 0x1000>;