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[2620:137:e000::1:20]) by mx.google.com with ESMTP id y7-20020a056402358700b0046b1abd7893si4526528edc.531.2022.12.07.01.13.09; Wed, 07 Dec 2022 01:13:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=analog.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230003AbiLGJL2 (ORCPT + 99 others); Wed, 7 Dec 2022 04:11:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230007AbiLGJLK (ORCPT ); Wed, 7 Dec 2022 04:11:10 -0500 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B27852F3A6; Wed, 7 Dec 2022 01:10:56 -0800 (PST) Received: from pps.filterd (m0167089.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B78UIg2012921; Wed, 7 Dec 2022 04:10:30 -0500 Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3m848dpv02-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 07 Dec 2022 04:10:30 -0500 Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 2B79ASbm009984 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Dec 2022 04:10:29 -0500 Received: from ASHBCASHYB5.ad.analog.com (10.64.17.133) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Wed, 7 Dec 2022 04:10:28 -0500 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBCASHYB5.ad.analog.com (10.64.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Wed, 7 Dec 2022 04:10:27 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Wed, 7 Dec 2022 04:10:25 -0500 Received: from okan.localdomain ([10.158.19.61]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 2B799G9V029801; Wed, 7 Dec 2022 04:10:04 -0500 From: Okan Sahin To: CC: Okan Sahin , Lee Jones , "Rob Herring" , Krzysztof Kozlowski , Liam Girdwood , Mark Brown , Jonathan Cameron , Lars-Peter Clausen , Andy Shevchenko , Marcus Folkesson , Manish Narani , "Geert Uytterhoeven" , Lad Prabhakar , William Breathitt Gray , Anand Ashok Dumbre , ChiYuan Huang , "Ramona Bolboaca" , Caleb Connolly , Marcelo Schmitt , , , Subject: [PATCH 1/5] staging: drivers: mfd: Add MAX77541/MAX77540 PMIC Support Date: Wed, 7 Dec 2022 12:08:40 +0300 Message-ID: <20221207090906.5896-2-okan.sahin@analog.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221207090906.5896-1-okan.sahin@analog.com> References: <20221207090906.5896-1-okan.sahin@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-ORIG-GUID: dR59ETXGJoC0PxZr-FcigMO0ylLG35QR X-Proofpoint-GUID: dR59ETXGJoC0PxZr-FcigMO0ylLG35QR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-07_04,2022-12-06_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 lowpriorityscore=0 clxscore=1011 priorityscore=1501 adultscore=0 bulkscore=0 suspectscore=0 malwarescore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212070076 X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751545977340590390?= X-GMAIL-MSGID: =?utf-8?q?1751545977340590390?= This patch adds MFD driver for MAX77541/MAX77540 to enable its sub devices. The MAX77541 is a multi-function devices. It includes buck converter and ADC. The MAX77540 is a high-efficiency buck converter with two 3A switching phases. They have same regmap except for ADC part of MAX77541. Signed-off-by: Okan Sahin --- MAINTAINERS | 7 ++ drivers/mfd/Kconfig | 13 ++ drivers/mfd/Makefile | 1 + drivers/mfd/max77541.c | 236 +++++++++++++++++++++++++++++++++++ include/linux/mfd/max77541.h | 150 ++++++++++++++++++++++ 5 files changed, 407 insertions(+) create mode 100644 drivers/mfd/max77541.c create mode 100644 include/linux/mfd/max77541.h diff --git a/MAINTAINERS b/MAINTAINERS index cf0f18502372..af94d06bb9f0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12497,6 +12497,13 @@ S: Maintained F: Documentation/devicetree/bindings/regulator/maxim,max20086.yaml F: drivers/regulator/max20086-regulator.c +MAXIM MAX77541 PMIC MFD DRIVER +M: Okan Sahin +L: linux-kernel@vger.kernel.org +S: Maintained +F: drivers/mfd/max77541.c +F: include/linux/mfd/max77541.h + MAXIM MAX77650 PMIC MFD DRIVER M: Bartosz Golaszewski L: linux-kernel@vger.kernel.org diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 8b93856de432..153e8d6757b0 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -791,6 +791,19 @@ config MFD_MAX14577 additional drivers must be enabled in order to use the functionality of the device. +config MFD_MAX77541 + tristate "Analog Devices MAX77541/77540 PMIC Support" + depends on I2C=y + select MFD_CORE + select REGMAP_I2C + select REGMAP_IRQ + help + Say yes here to add support for Analog Devices + MAX77541 and MAX77540 Power Management ICs. + This driver provides common support for accessing the device; + additional drivers must be enabled in order to use the functionality + of the device. + config MFD_MAX77620 bool "Maxim Semiconductor MAX77620 and MAX20024 PMIC Support" depends on I2C=y diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 7ed3ef4a698c..bf21228f5742 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -161,6 +161,7 @@ obj-$(CONFIG_MFD_DA9063) += da9063.o obj-$(CONFIG_MFD_DA9150) += da9150-core.o obj-$(CONFIG_MFD_MAX14577) += max14577.o +obj-$(CONFIG_MFD_MAX77541) += max77541.o obj-$(CONFIG_MFD_MAX77620) += max77620.o obj-$(CONFIG_MFD_MAX77650) += max77650.o obj-$(CONFIG_MFD_MAX77686) += max77686.o diff --git a/drivers/mfd/max77541.c b/drivers/mfd/max77541.c new file mode 100644 index 000000000000..97a2df3ce0b6 --- /dev/null +++ b/drivers/mfd/max77541.c @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2022 Analog Devices, Inc. + * Mfd core driver for the MAX77540 and MAX77541 + */ + + #include + #include + #include + #include + #include + +static const struct regmap_config max77541_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static const struct regmap_irq max77541_src_irqs[] = { + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_INT_SRC_TOPSYS), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_INT_SRC_BUCK), +}; + +static const struct regmap_irq_chip max77541_src_irq_chip = { + .name = "max77541-src", + .status_base = MAX77541_REG_INT_SRC, + .mask_base = MAX77541_REG_INT_SRC, + .num_regs = 1, + .irqs = max77541_src_irqs, + .num_irqs = ARRAY_SIZE(max77541_src_irqs), +}; + +static const struct regmap_irq max77541_topsys_irqs[] = { + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_TOPSYS_INT_TJ_120C), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_TOPSYS_INT_TJ_140C), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_TOPSYS_INT_TSHDN), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_TOPSYS_INT_UVLO), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_TOPSYS_INT_ALT_SWO), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_TOPSYS_INT_EXT_FREQ_DET), +}; + +static const struct regmap_irq_chip max77541_topsys_irq_chip = { + .name = "max77541-topsys", + .status_base = MAX77541_REG_TOPSYS_INT, + .mask_base = MAX77541_REG_TOPSYS_INT_M, + .num_regs = 1, + .irqs = max77541_topsys_irqs, + .num_irqs = ARRAY_SIZE(max77541_topsys_irqs), +}; + +static const struct regmap_irq max77541_buck_irqs[] = { + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_BUCK_INT_M1_POK_FLT), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_BUCK_INT_M2_POK_FLT), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_BUCK_INT_M1_SCFLT), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_BUCK_INT_M2_SCFLT), +}; + +static const struct regmap_irq_chip max77541_buck_irq_chip = { + .name = "max77541-buck", + .status_base = MAX77541_REG_BUCK_INT, + .mask_base = MAX77541_REG_BUCK_INT_M, + .num_regs = 1, + .irqs = max77541_buck_irqs, + .num_irqs = ARRAY_SIZE(max77541_buck_irqs), +}; + +static const struct regmap_irq max77541_adc_irqs[] = { + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_ADC_INT_CH1_I), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_ADC_INT_CH2_I), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_ADC_INT_CH3_I), + MAX77541_REGMAP_IRQ_REG(MAX77541_BIT_ADC_INT_CH6_I), +}; + +static const struct regmap_irq_chip max77541_adc_irq_chip = { + .name = "max77541-adc", + .status_base = MAX77541_REG_ADC_INT, + .mask_base = MAX77541_REG_ADC_MSK, + .num_regs = 1, + .irqs = max77541_adc_irqs, + .num_irqs = ARRAY_SIZE(max77541_adc_irqs), +}; + +static const struct mfd_cell max77540_devs[] = { + MFD_CELL_OF("max77540-regulator", NULL, NULL, 0, 0, + "adi,max77540-regulator"), +}; + +static const struct mfd_cell max77541_devs[] = { + MFD_CELL_OF("max77541-regulator", NULL, NULL, 0, 0, + "adi,max77541-regulator"), + MFD_CELL_OF("max77541-adc", NULL, NULL, 0, 0, + NULL), +}; + +static int max77541_pmic_irq_init(struct max77541_dev *me) +{ + struct regmap *regmap = me->regmap; + struct device *dev = me->dev; + int irq = me->i2c->irq; + int ret; + + ret = devm_regmap_add_irq_chip(dev, regmap, irq, + IRQF_ONESHOT | IRQF_SHARED, 0, + &max77541_src_irq_chip, &me->irq_data); + if (ret) + return ret; + + ret = devm_regmap_add_irq_chip(dev, regmap, irq, + IRQF_ONESHOT | IRQF_SHARED, 0, + &max77541_topsys_irq_chip, &me->irq_topsys); + if (ret) + return ret; + + ret = devm_regmap_add_irq_chip(dev, regmap, irq, + IRQF_ONESHOT | IRQF_SHARED, 0, + &max77541_buck_irq_chip, &me->irq_buck); + if (ret) + return ret; + + if (me->type == MAX77541) { + ret = devm_regmap_add_irq_chip(dev, regmap, irq, + IRQF_ONESHOT | IRQF_SHARED, 0, + &max77541_adc_irq_chip, + &me->irq_adc); + if (ret) + return ret; + } + + return ret; +} + +static int max77541_pmic_setup(struct max77541_dev *me) +{ + struct regmap *regmap = me->regmap; + struct device *dev = me->dev; + unsigned int val; + int ret; + + ret = max77541_pmic_irq_init(me); + if (ret) + return dev_err_probe(dev, ret, "Failed to initialize IRQ\n"); + + ret = regmap_read(regmap, MAX77541_REG_INT_SRC, &val); + if (ret) + return ret; + + ret = regmap_read(regmap, MAX77541_REG_TOPSYS_INT, &val); + if (ret) + return ret; + + ret = regmap_read(regmap, MAX77541_REG_BUCK_INT, &val); + if (ret) + return ret; + + ret = device_init_wakeup(dev, true); + if (ret) + return dev_err_probe(dev, ret, "Unable to init wakeup\n"); + + switch (me->type) { + case MAX77540: + return devm_mfd_add_devices(dev, -1, max77540_devs, ARRAY_SIZE(max77540_devs), + NULL, 0, NULL); + case MAX77541: + return devm_mfd_add_devices(dev, -1, max77541_devs, ARRAY_SIZE(max77541_devs), + NULL, 0, NULL); + default: + return -EINVAL; + } +} + +static int max77541_i2c_probe(struct i2c_client *client) +{ + const struct i2c_device_id *chip_id; + struct max77541_dev *me; + const void *chip_data; + + me = devm_kzalloc(&client->dev, sizeof(*me), GFP_KERNEL); + if (!me) + return -ENOMEM; + + i2c_set_clientdata(client, me); + me->dev = &client->dev; + me->i2c = client; + + chip_id = to_i2c_driver(client->dev.driver)->id_table; + + chip_data = device_get_match_data(me->dev); + if (!chip_data) { + chip_data = (void *)i2c_match_id(chip_id, client)->driver_data; + if (!chip_data) + return dev_err_probe(me->dev, -ENODEV, "Unable to find device\n"); + } + + me->type = (enum dev_type)chip_data; + me->regmap = devm_regmap_init_i2c(client, &max77541_regmap_config); + if (IS_ERR(me->regmap)) + return dev_err_probe(me->dev, PTR_ERR(me->regmap), + "Failed to allocate register map\n"); + + return max77541_pmic_setup(me); +} + +static const struct of_device_id max77541_of_id[] = { + { + .compatible = "adi,max77540", + .data = (void *)MAX77540, + }, + { + .compatible = "adi,max77541", + .data = (void *)MAX77541, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, max77541_of_id); + +static const struct i2c_device_id max77541_i2c_id[] = { + { "max77540", MAX77540 }, + { "max77541", MAX77541 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, max77541_i2c_id); + +static struct i2c_driver max77541_i2c_driver = { + .driver = { + .name = "max77541", + .of_match_table = max77541_of_id, + }, + .probe_new = max77541_i2c_probe, + .id_table = max77541_i2c_id, +}; + +module_i2c_driver(max77541_i2c_driver); + +MODULE_DESCRIPTION("MAX7740/MAX7741 MFD Driver"); +MODULE_AUTHOR("Okan Sahin "); +MODULE_LICENSE("GPL"); +MODULE_VERSION("1.0"); diff --git a/include/linux/mfd/max77541.h b/include/linux/mfd/max77541.h new file mode 100644 index 000000000000..6f2753300227 --- /dev/null +++ b/include/linux/mfd/max77541.h @@ -0,0 +1,150 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __MAX77541_MFD_H__ +#define __MAX77541_MFD_H__ + +/* REGISTERS */ + +/* GLOBAL CONFIG1 */ +#define MAX77541_REG_INT_SRC 0x00 +#define MAX77541_REG_INT_SRC_M 0x01 +#define MAX77541_REG_TOPSYS_INT 0x02 +#define MAX77541_REG_TOPSYS_INT_M 0x03 +#define MAX77541_REG_TOPSYS_STAT 0x04 +#define MAX77541_REG_DEVICE_CFG1 0x06 +#define MAX77541_REG_DEVICE_CFG2 0x07 +#define MAX77541_REG_TOPSYS_CFG 0x08 +#define MAX77541_REG_PROT_CFG 0x09 +#define MAX77541_REG_EN_CTRL 0x0B + +/* GLOBAL CONFIG2 */ +#define MAX77541_REG_GLB_CFG1 0x11 + +/* BUCK CONFIG */ +#define MAX77541_REG_BUCK_INT 0x20 +#define MAX77541_REG_BUCK_INT_M 0x21 +#define MAX77541_REG_BUCK_STAT 0x22 + +/* BUCK1 */ +#define MAX77541_REG_M1_VOUT 0x23 +#define MAX77541_REG_M1_CFG1 0x25 +#define MAX77541_REG_M1_CFG2 0x26 +#define MAX77541_REG_M1_CFG3 0x27 + +/* BUCK2 */ +#define MAX77541_REG_M2_VOUT 0x33 +#define MAX77541_REG_M2_CFG1 0x35 +#define MAX77541_REG_M2_CFG2 0x36 +#define MAX77541_REG_M2_CFG3 0x37 + +#define MAX77541_REG_NOT_AVAILABLE 0xFF + +/* INTERRUPT MASKS*/ +#define MAX77541_REG_INT_SRC_MASK 0x00 +#define MAX77541_REG_TOPSYS_INT_MASK 0x00 +#define MAX77541_REG_BUCK_INT_MASK 0x00 + +/*BITS OF REGISTERS*/ + +#define MAX77541_BIT_INT_SRC_TOPSYS BIT(0) +#define MAX77541_BIT_INT_SRC_BUCK BIT(1) + +#define MAX77541_BIT_TOPSYS_INT_TJ_120C BIT(0) +#define MAX77541_BIT_TOPSYS_INT_TJ_140C BIT(1) +#define MAX77541_BIT_TOPSYS_INT_TSHDN BIT(2) +#define MAX77541_BIT_TOPSYS_INT_UVLO BIT(3) +#define MAX77541_BIT_TOPSYS_INT_ALT_SWO BIT(4) +#define MAX77541_BIT_TOPSYS_INT_EXT_FREQ_DET BIT(5) + +#define MAX77541_BIT_BUCK_INT_M1_POK_FLT BIT(0) +#define MAX77541_BIT_BUCK_INT_M2_POK_FLT BIT(1) +#define MAX77541_BIT_BUCK_INT_M1_SCFLT BIT(4) +#define MAX77541_BIT_BUCK_INT_M2_SCFLT BIT(5) + +#define MAX77541_BITS_DEVICE_CFG1_SEL1_LATCH GENMASK(4, 0) +#define MAX77541_BITS_DEVICE_CFG2_SEL2_LATCH GENMASK(4, 0) + +#define MAX77541_BIT_TOPSYS_CFG_DIS_ALT_IN BIT(0) + +#define MAX77541_BITS_PROT_CFG_POK_TO GENMASK(1, 0) +#define MAX77541_BIT_PROT_CFG_EN_FTMON BIT(2) + +#define MAX77541_BIT_M1_EN BIT(0) +#define MAX77541_BIT_M2_EN BIT(1) +#define MAX77541_BIT_M1_LPM BIT(4) +#define MAX77541_BIT_M2_LPM BIT(5) + +#define MAX77541_BITS_GLB_CFG1_SSTOP_SR GENMASK(2, 0) +#define MAX77541_BITS_GLB_CFG1_SSTRT_SR GENMASK(5, 3) + +#define MAX77541_BITS_MX_VOUT GENMASK(7, 0) + +#define MAX77541_BITS_MX_CFG1_RU_SR GENMASK(2, 0) +#define MAX77541_BITS_MX_CFG1_RD_SR GENMASK(5, 3) +#define MAX77541_BITS_MX_CFG1_RNG GENMASK(7, 6) + +#define MAX77541_BIT_MX_CFG2_FPWM BIT(0) +#define MAX77541_BIT_MX_CFG2_FSREN BIT(1) +#define MAX77541_BITS_MX_CFG2_SS_PAT GENMASK(3, 2) +#define MAX77541_BITS_MX_CFG2_SS_FREQ GENMASK(5, 4) +#define MAX77541_BITS_MX_CFG2_SS_ENV GENMASK(7, 6) + +#define MAX77541_BITS_MX_CFG3_ILIM GENMASK(1, 0) +#define MAX77541_BITS_MX_CFG3_FREQ GENMASK(3, 2) +#define MAX77541_BIT_MX_CFG3_FTRAK BIT(4) +#define MAX77541_BIT_MX_CFG3_RESRESH BIT(5) +#define MAX77541_BIT_MX_CFG3_ADIS1 BIT(6) +#define MAX77541_BIT_MX_CFG3_ADIS100 BIT(7) + +#define MAX77541_MAX_REGULATORS 2 + +/* ADC */ +#define MAX77541_REG_ADC_INT 0x70 +#define MAX77541_REG_ADC_MSK 0x71 + +#define MAX77541_REG_ADC_DATA_CH1 0x72 +#define MAX77541_REG_ADC_DATA_CH2 0x73 +#define MAX77541_REG_ADC_DATA_CH3 0x74 +#define MAX77541_REG_ADC_DATA_CH6 0x77 + +#define MAX77541_BIT_ADC_INT_CH1_I BIT(0) +#define MAX77541_BIT_ADC_INT_CH2_I BIT(1) +#define MAX77541_BIT_ADC_INT_CH3_I BIT(2) +#define MAX77541_BIT_ADC_INT_CH6_I BIT(5) + +#define MAX77541_REGMAP_IRQ_REG(_mask) \ + { .mask = (_mask), } + +enum dev_type { + MAX77540 = 1, + MAX77541 = 2, +}; + +enum max77541_regulators { + MAX77541_BUCK1 = 1, + MAX77541_BUCK2, +}; + +enum mx_range { + LOW_RANGE, + MID_RANGE, + HIGH_RANGE, + RESERVED +}; + +struct max77541_dev { + void *pdata; + struct device *dev; + + struct regmap_irq_chip_data *irq_data; + struct regmap_irq_chip_data *irq_buck; + struct regmap_irq_chip_data *irq_topsys; + struct regmap_irq_chip_data *irq_adc; + + struct i2c_client *i2c; + struct regmap *regmap; + + u8 type; +}; + +#endif /* __MAX77541_MFD_H__ */ From patchwork Wed Dec 7 09:08:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sahin, Okan" X-Patchwork-Id: 30716 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp70078wrr; Wed, 7 Dec 2022 01:13:34 -0800 (PST) X-Google-Smtp-Source: AA0mqf4jGl22HR/erOxMicE/qkT0UVkik1Kt4z7CZXar3Lv5AiWq32Ea6kIy8qs1P9/VK4G+64pC X-Received: by 2002:a17:907:c719:b0:7ae:31a0:e22f with SMTP id ty25-20020a170907c71900b007ae31a0e22fmr35709389ejc.248.1670404414696; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id qw35-20020a1709066a2300b007c10ff4df9csi3372924ejc.371.2022.12.07.01.13.11; Wed, 07 Dec 2022 01:13:34 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=analog.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230023AbiLGJLu (ORCPT + 99 others); Wed, 7 Dec 2022 04:11:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229809AbiLGJLY (ORCPT ); Wed, 7 Dec 2022 04:11:24 -0500 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 565446258; Wed, 7 Dec 2022 01:11:23 -0800 (PST) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B77xjVZ003958; Wed, 7 Dec 2022 04:11:01 -0500 Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3m816bfjtn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 07 Dec 2022 04:11:01 -0500 Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 2B79B04A010034 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Dec 2022 04:11:00 -0500 Received: from ASHBCASHYB5.ad.analog.com (10.64.17.133) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Wed, 7 Dec 2022 04:10:59 -0500 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBCASHYB5.ad.analog.com (10.64.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Wed, 7 Dec 2022 04:10:59 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Wed, 7 Dec 2022 04:10:59 -0500 Received: from okan.localdomain ([10.158.19.61]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 2B799G9W029801; Wed, 7 Dec 2022 04:10:42 -0500 From: Okan Sahin To: CC: Okan Sahin , Lee Jones , "Rob Herring" , Krzysztof Kozlowski , Liam Girdwood , Mark Brown , Jonathan Cameron , Lars-Peter Clausen , Andy Shevchenko , Geert Uytterhoeven , Manish Narani , "Marcelo Schmitt" , Caleb Connolly , Marcus Folkesson , ChiYuan Huang , Anand Ashok Dumbre , Ramona Bolboaca , William Breathitt Gray , , , Subject: [PATCH 2/5] staging: dt-bindings: mfd: adi,max77541.yaml Add MAX77541 bindings Date: Wed, 7 Dec 2022 12:08:41 +0300 Message-ID: <20221207090906.5896-3-okan.sahin@analog.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221207090906.5896-1-okan.sahin@analog.com> References: <20221207090906.5896-1-okan.sahin@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: jqkVibCxSabldY4RyF_93y7ETJ56xcOT X-Proofpoint-ORIG-GUID: jqkVibCxSabldY4RyF_93y7ETJ56xcOT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-07_04,2022-12-06_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 spamscore=0 adultscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 bulkscore=0 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212070076 X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751545979615596090?= X-GMAIL-MSGID: =?utf-8?q?1751545979615596090?= This patch adds document the bindings for MAX77541 MFD driver. It also includes MAX77540 driver whose regmap is covered by MAX77541. Signed-off-by: Okan Sahin --- .../devicetree/bindings/mfd/adi,max77541.yaml | 134 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 135 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/adi,max77541.yaml diff --git a/Documentation/devicetree/bindings/mfd/adi,max77541.yaml b/Documentation/devicetree/bindings/mfd/adi,max77541.yaml new file mode 100644 index 000000000000..205953e6dd15 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/adi,max77541.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/adi,max77541.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MAX77540/MAX77541 PMIC from ADI. + +maintainers: + - Okan Sahin + +description: | + MAX77540 is a Power Management IC with 2 buck regulators. + + MAX77541 is a Power Management IC with 2 buck regulators and 1 ADC. + +properties: + compatible: + enum: + - adi,max77540 + - adi,max77541 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + regulators: + $ref: /schemas/regulator/adi,max77541.yaml# + + adc: + type: object + additionalProperties: false + properties: + compatible: + const: adi,max77541-adc + required: + -compatible + +required: + - compatible + - reg + - interrupts + +allOf: + - if: + properties: + compatible: + contains: + const: adi,max77540 + then: + properties: + regulator: + properties: + compatible: + const: adi,max77540-regulator + else: + properties: + regulator: + properties: + compatible: + const: adi,max77541-regulator + adc: + properties: + compatible: + const: adi,max77541-adc + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@69 { + compatible = "adi,max77540"; + reg = <0x69>; + interrupt-parent = <&gpio>; + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; + + regulators { + buck1 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <5200000>; + regulator-boot-on; + regulator-always-on; + }; + buck2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <5200000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + }; + + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@69 { + compatible = "adi,max77541"; + reg = <0x63>; + interrupt-parent = <&gpio>; + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; + + regulators { + buck1 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <5200000>; + regulator-boot-on; + regulator-always-on; + }; + buck2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <5200000>; + regulator-boot-on; + regulator-always-on; + }; + }; + + adc { + compatible = "adi,max77541-adc"; + } + }; + }; \ No newline at end of file diff --git a/MAINTAINERS b/MAINTAINERS index af94d06bb9f0..22f5a9c490e3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12501,6 +12501,7 @@ MAXIM MAX77541 PMIC MFD DRIVER M: Okan Sahin L: linux-kernel@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/mfd/adi,max77541.yaml F: drivers/mfd/max77541.c F: include/linux/mfd/max77541.h From patchwork Wed Dec 7 09:08:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sahin, Okan" X-Patchwork-Id: 30718 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp70349wrr; Wed, 7 Dec 2022 01:14:14 -0800 (PST) X-Google-Smtp-Source: AA0mqf4VuZtM3bZQZIE7lYe6eC8bgZXWIaLBf/bZoDUsTbmj75so0mg4qBmt3I66KPFhc2YTSpfc X-Received: by 2002:aa7:d4d4:0:b0:46b:5c9f:52e with SMTP id t20-20020aa7d4d4000000b0046b5c9f052emr35150462edr.416.1670404454564; Wed, 07 Dec 2022 01:14:14 -0800 (PST) ARC-Seal: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b7-20020a056402350700b00461f10cb543si4207477edd.154.2022.12.07.01.13.51; Wed, 07 Dec 2022 01:14:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=analog.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229990AbiLGJMo (ORCPT + 99 others); Wed, 7 Dec 2022 04:12:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58238 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230089AbiLGJMO (ORCPT ); Wed, 7 Dec 2022 04:12:14 -0500 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C33372FC04; Wed, 7 Dec 2022 01:12:05 -0800 (PST) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B78URlJ003955; Wed, 7 Dec 2022 04:11:42 -0500 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3m816bfjyr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 07 Dec 2022 04:11:41 -0500 Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 2B79BeM2045869 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Dec 2022 04:11:40 -0500 Received: from ASHBCASHYB5.ad.analog.com (10.64.17.133) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Wed, 7 Dec 2022 04:11:39 -0500 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBCASHYB5.ad.analog.com (10.64.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Wed, 7 Dec 2022 04:11:39 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Wed, 7 Dec 2022 04:11:37 -0500 Received: from okan.localdomain ([10.158.19.61]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 2B799G9X029801; Wed, 7 Dec 2022 04:11:17 -0500 From: Okan Sahin To: CC: Okan Sahin , Lee Jones , "Rob Herring" , Krzysztof Kozlowski , Liam Girdwood , Mark Brown , Jonathan Cameron , Lars-Peter Clausen , Andy Shevchenko , Marcelo Schmitt , ChiYuan Huang , "Geert Uytterhoeven" , Marcus Folkesson , Caleb Connolly , Anand Ashok Dumbre , Ramona Bolboaca , William Breathitt Gray , Manish Narani , , , Subject: [PATCH 3/5] staging: drivers: regulator: Add MAX77541 Regulator Support Date: Wed, 7 Dec 2022 12:08:42 +0300 Message-ID: <20221207090906.5896-4-okan.sahin@analog.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221207090906.5896-1-okan.sahin@analog.com> References: <20221207090906.5896-1-okan.sahin@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: _wawgfvLKz0bA9QpYWNq403yJl0YRfVH X-Proofpoint-ORIG-GUID: _wawgfvLKz0bA9QpYWNq403yJl0YRfVH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-07_04,2022-12-06_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 spamscore=0 adultscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 bulkscore=0 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212070076 X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751546021602696544?= X-GMAIL-MSGID: =?utf-8?q?1751546021602696544?= This patch adds regulator driver for both MAX77541 and MAX77540. The MAX77541 is a high-efficiency step-down converter with two 3A switching phases for single-cell Li+ battery and 5VDC systems. The MAX77540 is a high-efficiency step-down converter with two 3A switching phases. Signed-off-by: Okan Sahin --- MAINTAINERS | 1 + drivers/regulator/Kconfig | 9 ++ drivers/regulator/Makefile | 1 + drivers/regulator/max77541-regulator.c | 181 +++++++++++++++++++++++++ 4 files changed, 192 insertions(+) create mode 100644 drivers/regulator/max77541-regulator.c diff --git a/MAINTAINERS b/MAINTAINERS index 22f5a9c490e3..5704ed5afce3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12503,6 +12503,7 @@ L: linux-kernel@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/mfd/adi,max77541.yaml F: drivers/mfd/max77541.c +F: drivers/regulator/max77541-regulator.c F: include/linux/mfd/max77541.h MAXIM MAX77650 PMIC MFD DRIVER diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 070e4403c6c2..1e416c195af9 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -556,6 +556,15 @@ config REGULATOR_MAX597X The MAX5970/5978 is a smart switch with no output regulation, but fault protection and voltage and current monitoring capabilities. +config REGULATOR_MAX77541 + tristate "Analog Devices MAX77541/77540 Regulator" + depends on MFD_MAX77541 + help + This driver controls a Analog Devices MAX77541/77540 regulators + via I2C bus. Both MAX77540 and MAX77541 are dual-phase + high-efficiency buck converter. Say Y here to + enable the regulator driver. + config REGULATOR_MAX77620 tristate "Maxim 77620/MAX20024 voltage regulator" depends on MFD_MAX77620 || COMPILE_TEST diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 5962307e1130..c19efc7cfbef 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -68,6 +68,7 @@ obj-$(CONFIG_REGULATOR_LTC3676) += ltc3676.o obj-$(CONFIG_REGULATOR_MAX14577) += max14577-regulator.o obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o obj-$(CONFIG_REGULATOR_MAX597X) += max597x-regulator.o +obj-$(CONFIG_REGULATOR_MAX77541) += max77541-regulator.o obj-$(CONFIG_REGULATOR_MAX77620) += max77620-regulator.o obj-$(CONFIG_REGULATOR_MAX77650) += max77650-regulator.o obj-$(CONFIG_REGULATOR_MAX8649) += max8649.o diff --git a/drivers/regulator/max77541-regulator.c b/drivers/regulator/max77541-regulator.c new file mode 100644 index 000000000000..9204b15f8eed --- /dev/null +++ b/drivers/regulator/max77541-regulator.c @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2022 Analog Devices, Inc. + * ADI Regulator driver for the MAX77540 and MAX77541 + * + */ + +#include +#include +#include +#include +#include +#include + +static const struct regulator_ops max77541_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_pickable_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, + .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, +}; + +static const struct linear_range max77540_buck_ranges[] = { + /* Ranges when VOLT_SEL bits are 0x00 */ + REGULATOR_LINEAR_RANGE(500000, 0x00, 0x8B, 5000), + REGULATOR_LINEAR_RANGE(1200000, 0x8C, 0xFF, 0), + /* Ranges when VOLT_SEL bits are 0x40 */ + REGULATOR_LINEAR_RANGE(1200000, 0x00, 0x8B, 10000), + REGULATOR_LINEAR_RANGE(2400000, 0x8C, 0xFF, 0), + /* Ranges when VOLT_SEL bits are 0x80 */ + REGULATOR_LINEAR_RANGE(2000000, 0x00, 0x9F, 20000), + REGULATOR_LINEAR_RANGE(5200000, 0xA0, 0xFF, 0), +}; + +static const struct linear_range max77541_buck_ranges[] = { + /* Ranges when VOLT_SEL bits are 0x00 */ + REGULATOR_LINEAR_RANGE(300000, 0x00, 0xB3, 5000), + REGULATOR_LINEAR_RANGE(1200000, 0xB4, 0xFF, 0), + /* Ranges when VOLT_SEL bits are 0x40 */ + REGULATOR_LINEAR_RANGE(1200000, 0x00, 0x8B, 10000), + REGULATOR_LINEAR_RANGE(2400000, 0x8C, 0xFF, 0), + /* Ranges when VOLT_SEL bits are 0x80 */ + REGULATOR_LINEAR_RANGE(2000000, 0x00, 0x9F, 20000), + REGULATOR_LINEAR_RANGE(5200000, 0xA0, 0xFF, 0), +}; + +static const unsigned int max77541_buck_volt_range_sel[] = { + 0x00, 0x00, 0x40, 0x40, 0x80, 0x80 +}; + +#define MAX77540_BUCK(_id, _ops) \ + { .id = MAX77541_BUCK ## _id, \ + .name = "BUCK"#_id, \ + .of_match = "BUCK"#_id, \ + .regulators_node = "regulators", \ + .enable_reg = MAX77541_REG_EN_CTRL, \ + .enable_mask = MAX77541_BIT_M ## _id ## _EN, \ + .ops = &(_ops), \ + .type = REGULATOR_VOLTAGE, \ + .linear_ranges = max77540_buck_ranges, \ + .n_linear_ranges = ARRAY_SIZE(max77540_buck_ranges), \ + .vsel_reg = MAX77541_REG_M ## _id ## _VOUT, \ + .vsel_mask = MAX77541_BITS_MX_VOUT, \ + .vsel_range_reg = MAX77541_REG_M ## _id ## _CFG1, \ + .vsel_range_mask = MAX77541_BITS_MX_CFG1_RNG, \ + .linear_range_selectors = max77541_buck_volt_range_sel, \ + .owner = THIS_MODULE, \ + } + +#define MAX77541_BUCK(_id, _ops) \ + { .id = MAX77541_BUCK ## _id, \ + .name = "BUCK"#_id, \ + .of_match = "BUCK"#_id, \ + .regulators_node = "regulators", \ + .enable_reg = MAX77541_REG_EN_CTRL, \ + .enable_mask = MAX77541_BIT_M ## _id ## _EN, \ + .ops = &(_ops), \ + .type = REGULATOR_VOLTAGE, \ + .linear_ranges = max77541_buck_ranges, \ + .n_linear_ranges = ARRAY_SIZE(max77541_buck_ranges), \ + .vsel_reg = MAX77541_REG_M ## _id ## _VOUT, \ + .vsel_mask = MAX77541_BITS_MX_VOUT, \ + .vsel_range_reg = MAX77541_REG_M ## _id ## _CFG1, \ + .vsel_range_mask = MAX77541_BITS_MX_CFG1_RNG, \ + .linear_range_selectors = max77541_buck_volt_range_sel, \ + .owner = THIS_MODULE, \ + } + +static const struct regulator_desc max77540_regulators_desc[] = { + MAX77540_BUCK(1, max77541_buck_ops), + MAX77540_BUCK(2, max77541_buck_ops) +}; + +static const struct regulator_desc max77541_regulators_desc[] = { + MAX77541_BUCK(1, max77541_buck_ops), + MAX77541_BUCK(2, max77541_buck_ops) +}; + +struct max77541_regulator_dev { + struct device *dev; + struct max77541_dev *max77541; +}; + +static int max77541_regulator_probe(struct platform_device *pdev) +{ + struct max77541_dev *max77541 = dev_get_drvdata(pdev->dev.parent); + struct max77541_regulator_dev *regulator; + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + + regulator = devm_kzalloc(&pdev->dev, sizeof(*regulator), GFP_KERNEL); + if (!regulator) + return -ENOMEM; + + regulator->dev = &pdev->dev; + regulator->max77541 = max77541; + + config.dev = pdev->dev.parent; + config.driver_data = regulator; + config.regmap = regulator->max77541->regmap; + + for (i = 0; i < MAX77541_MAX_REGULATORS; i++) { + switch (regulator->max77541->type) { + case MAX77540: + rdev = devm_regulator_register(&pdev->dev, + &max77540_regulators_desc[i], &config); + if (IS_ERR(rdev)) + return dev_err_probe(&pdev->dev, PTR_ERR(rdev), + "Failed to register regulator\n"); + break; + case MAX77541: + rdev = devm_regulator_register(&pdev->dev, + &max77541_regulators_desc[i], &config); + if (IS_ERR(rdev)) + return dev_err_probe(&pdev->dev, PTR_ERR(rdev), + "Failed to register regulator\n"); + break; + default: + return -EINVAL; + } + } + + return 0; +} + +static const struct platform_device_id max77541_regulator_platform_id[] = { + { "max77540-regulator", MAX77540 }, + { "max77541-regulator", MAX77541 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, max77541_regulator_platform_id); + +static const struct of_device_id max77541_regulator_of_id[] = { + { + .compatible = "adi,max77540-regulator", + .data = (void *)MAX77540, + }, + { + .compatible = "adi,max77541-regulator", + .data = (void *)MAX77541, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, max77541_regulator_of_id); + +static struct platform_driver max77541_regulator_driver = { + .driver = { + .name = "max77541-regulator", + .of_match_table = max77541_regulator_of_id, + }, + .probe = max77541_regulator_probe, + .id_table = max77541_regulator_platform_id, +}; + +module_platform_driver(max77541_regulator_driver); + +MODULE_AUTHOR("Okan Sahin "); +MODULE_DESCRIPTION("MAX77540/MAX77541 regulator driver"); +MODULE_LICENSE("GPL"); From patchwork Wed Dec 7 09:08:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sahin, Okan" X-Patchwork-Id: 30719 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp70358wrr; Wed, 7 Dec 2022 01:14:17 -0800 (PST) X-Google-Smtp-Source: AA0mqf4X6J/xVLZhgZx5NvAkf/0MRpGvqQFJ/H6uSfZqwDU4r+zjtp6r6dgUZ/JnF4L+5dvp+XI/ X-Received: by 2002:a05:6402:214f:b0:46d:5e60:5b6 with SMTP id bq15-20020a056402214f00b0046d5e6005b6mr1637099edb.351.1670404457148; Wed, 07 Dec 2022 01:14:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670404457; cv=none; d=google.com; s=arc-20160816; b=yvKzp44dzdXgCcm+l0AQAWujkPsbRRorOtOMlOX/2elydhdI9z4TNVp3YJKFYin2+6 iVJL6fP0al0o6ilxRQB4GXU1ohVai4Tl/UD1S8mvnyX7cNiRLyVnIYqG6JR7JB+JgRz7 HtQVSlO/ADno7PC9HScZFDrMv0MvdTRkvwZ+IVdCqSk7vj3tbvHrm1xZM9AgNtZaAKU4 bOd2B90WhF54o3IbAUdYwAXdsUcSLKc4S23S5KVR8xcBtsx48/vAxd6ZC9EnIsQshtTP LSHxdDV/CTkquASQErOchH/Doo8jVxjG4EgToTyWFzxYArLY5u2rGpXpmIsjd7DD4Al5 xLkw== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id m22-20020a056402431600b0046d3597c12asi2462439edc.558.2022.12.07.01.13.54; Wed, 07 Dec 2022 01:14:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=analog.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230160AbiLGJNJ (ORCPT + 99 others); Wed, 7 Dec 2022 04:13:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230113AbiLGJMb (ORCPT ); Wed, 7 Dec 2022 04:12:31 -0500 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C770E2339E; Wed, 7 Dec 2022 01:12:27 -0800 (PST) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B78W2dx004018; Wed, 7 Dec 2022 04:12:08 -0500 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3m816bfk2w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 07 Dec 2022 04:12:08 -0500 Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 2B79C7Qo045941 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Dec 2022 04:12:07 -0500 Received: from ASHBCASHYB5.ad.analog.com (10.64.17.133) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Wed, 7 Dec 2022 04:12:06 -0500 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBCASHYB5.ad.analog.com (10.64.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Wed, 7 Dec 2022 04:12:06 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Wed, 7 Dec 2022 04:12:06 -0500 Received: from okan.localdomain ([10.158.19.61]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 2B799G9Y029801; Wed, 7 Dec 2022 04:11:49 -0500 From: Okan Sahin To: CC: Okan Sahin , Lee Jones , "Rob Herring" , Krzysztof Kozlowski , Liam Girdwood , Mark Brown , Jonathan Cameron , Lars-Peter Clausen , Andy Shevchenko , Ramona Bolboaca , William Breathitt Gray , Marcelo Schmitt , Marcus Folkesson , Anand Ashok Dumbre , ChiYuan Huang , "Caleb Connolly" , , , Subject: [PATCH 4/5] staging: dt-bindings: regulator: adi,max77541.yaml Add MAX77541 Regulator bindings Date: Wed, 7 Dec 2022 12:08:43 +0300 Message-ID: <20221207090906.5896-5-okan.sahin@analog.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221207090906.5896-1-okan.sahin@analog.com> References: <20221207090906.5896-1-okan.sahin@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: eWl1qgPqY1aDS_ug1Qg8znMVv3pSP33n X-Proofpoint-ORIG-GUID: eWl1qgPqY1aDS_ug1Qg8znMVv3pSP33n X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-07_04,2022-12-06_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 spamscore=0 adultscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 bulkscore=0 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212070076 X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751546023921742327?= X-GMAIL-MSGID: =?utf-8?q?1751546023921742327?= This patch adds document the bindings for MAX77541 and MAX77540 regulator drivers. Signed-off-by: Okan Sahin --- .../bindings/regulator/adi,max77541.yaml | 44 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/adi,max77541.yaml diff --git a/Documentation/devicetree/bindings/regulator/adi,max77541.yaml b/Documentation/devicetree/bindings/regulator/adi,max77541.yaml new file mode 100644 index 000000000000..1f828895ab3a --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/adi,max77541.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/adi,max77541.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Buck Converter driver for MAX77540/MAX77541 + +maintainers: + - Okan Sahin + +description: | + This is a part of device tree bindings for ADI MAX77540/MAX77541 + + The buck convertere is represented as a sub-node of the PMIC node on the device tree. + + The device has two buck regulators. + See also Documentation/devicetree/bindings/mfd/adi,max77541.yaml for + additional information and example. + +properties: + compatible: + enum: + - adi,max77540-regulator + - adi,max77541-regulator + +patternProperties: + "^BUCK[12]$": + type: object + $ref: regulator.yaml# + additionalProperties: false + description: | + Buck regulator. + + properties: + regulator-name: true + regulator-always-on: true + regulator-boot-on: true + regulator-min-microvolt: + minimum: 300000 + regulator-max-microvolt: + maximum: 5200000 + +additionalProperties: false \ No newline at end of file diff --git a/MAINTAINERS b/MAINTAINERS index 5704ed5afce3..8e5572b28a8c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12502,6 +12502,7 @@ M: Okan Sahin L: linux-kernel@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/mfd/adi,max77541.yaml +F: Documentation/devicetree/bindings/regulator/adi,max77541.yaml F: drivers/mfd/max77541.c F: drivers/regulator/max77541-regulator.c F: include/linux/mfd/max77541.h From patchwork Wed Dec 7 09:08:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sahin, Okan" X-Patchwork-Id: 30722 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp75770wrr; Wed, 7 Dec 2022 01:29:48 -0800 (PST) X-Google-Smtp-Source: AA0mqf7z7JQrPedWHIX/M68I8t6jPuBTij6PsSNBAXaibXauNlLHYAsqdymVGg32NzeY6GYKL7Iz X-Received: by 2002:a17:902:da83:b0:189:2809:2f11 with SMTP id j3-20020a170902da8300b0018928092f11mr2515718plx.105.1670405388213; Wed, 07 Dec 2022 01:29:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670405388; cv=none; d=google.com; s=arc-20160816; b=J4uhVpbLa3i4Iyklks2c+gJuBREA0G8Af+Q+vC/j/S5xvOLwiDpYs6xoj0yB8HxlMH 7nJR7dm/amGIbOeEVSeQdvAUQgq/KDY3KgZQoUMkg+XOZTOdcjnc1bJ1JzhgjS/fghRr qnVOevZM8zDyEpt+Y3TExvqbL7iceg/n2SGB/TZqmRmy/Twok9bDIcFf8WlZ+GgGsZKk qvJ/4ROVZC3oUqb8HpKZ+8Ran9OZaVvHXWVRDTgw/ku24U0rz1SIpxBACngP3Gq/sZwl TVp1/UhCyGzT3Tl9GgOI1XZkR/ebFXcL3BdLGAwcPnOi0T7/JCy7fIvZoqF3jACiviKz BIdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ZIcqywNDLyajc64D0409h6bA8tWHrwBwb7Bopbz/7XU=; b=Hq0GBnHADlc8i6bVmKEXoZ18tyoLrIDCWgSw7fwO1SejQQ7SOBNaJPsrDPeWEhZOX9 mqHIUn6ioz36H8GJPskEE7iCOtBzzx9mEZS/2MRS7PbFRKdawLu29ofQ6JG2mYrc3bx4 B3rw01Gk39+1U048jtV3NUyAdSDD/xt+Sk/V41IAKQA5fyuvVjtoqQqBj4UJBgs9nkyT XeDipEho8HoHD/rOw/kG6T5hcdhpXN3tig9PrRRTLLumg7oPUZXO8KAkZKKBWcJIkogh u8JJWodffQs1F4dH3187BrnQS8T5PCQ7YV6Ya4Bq63TvnIex738S4mcGB23byDK9QYl4 /Z5g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=analog.com Received: from out1.vger.email (out1.vger.email. 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The MAX77541 has an 8-bit Successive Approximation Register (SAR) ADC with four multiplexers for supporting the telemetry feature Signed-off-by: Okan Sahin --- MAINTAINERS | 1 + drivers/iio/adc/Kconfig | 11 ++ drivers/iio/adc/Makefile | 1 + drivers/iio/adc/max77541-adc.c | 224 +++++++++++++++++++++++++++++++++ 4 files changed, 237 insertions(+) create mode 100644 drivers/iio/adc/max77541-adc.c diff --git a/MAINTAINERS b/MAINTAINERS index 8e5572b28a8c..18ce4644cc75 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12503,6 +12503,7 @@ L: linux-kernel@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/mfd/adi,max77541.yaml F: Documentation/devicetree/bindings/regulator/adi,max77541.yaml +F: drivers/iio/adc/max77541-adc.c F: drivers/mfd/max77541.c F: drivers/regulator/max77541-regulator.c F: include/linux/mfd/max77541.h diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 791612ca6012..2e7833b33f12 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -696,6 +696,17 @@ config MAX1363 To compile this driver as a module, choose M here: the module will be called max1363. +config MAX77541_ADC + tristate "Analog Devices MAX77541 ADC driver" + depends on MFD_MAX77541 + help + This driver controls a Analog Devices MAX77541 adc + via I2C bus. This device has one adc. Say yes here to build + support for Analog Devices MAX77541 ADC interface. + + To compile this driver as a module, choose M here: the module will be + called max77541-adc. + config MAX9611 tristate "Maxim max9611/max9612 ADC driver" depends on I2C diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index 46caba7a010c..03774cccbb4b 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -64,6 +64,7 @@ obj-$(CONFIG_MAX1118) += max1118.o obj-$(CONFIG_MAX11205) += max11205.o obj-$(CONFIG_MAX1241) += max1241.o obj-$(CONFIG_MAX1363) += max1363.o +obj-$(CONFIG_MAX77541_ADC) += max77541-adc.o obj-$(CONFIG_MAX9611) += max9611.o obj-$(CONFIG_MCP320X) += mcp320x.o obj-$(CONFIG_MCP3422) += mcp3422.o diff --git a/drivers/iio/adc/max77541-adc.c b/drivers/iio/adc/max77541-adc.c new file mode 100644 index 000000000000..7ca8576bd4e1 --- /dev/null +++ b/drivers/iio/adc/max77541-adc.c @@ -0,0 +1,224 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2022 Analog Devices, Inc. + * ADI MAX77541 ADC Driver with IIO interface + */ + +#include +#include +#include +#include +#include +#include +#include + +#define MAX77541_ADC_CHANNEL(_channel, _name, _type, _reg) \ + { \ + .type = _type, \ + .indexed = 1, \ + .channel = _channel, \ + .address = _reg, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_SCALE) |\ + BIT(IIO_CHAN_INFO_OFFSET),\ + .datasheet_name = _name, \ + } + +enum { + MAX77541_ADC_CH1_I = 0, + MAX77541_ADC_CH2_I, + MAX77541_ADC_CH3_I, + MAX77541_ADC_CH6_I, + + MAX77541_ADC_IRQMAX_I, +}; + +struct max77541_adc_iio { + struct regmap *regmap; + int irq; + int irq_arr[MAX77541_ADC_IRQMAX_I]; +}; + +enum max77541_adc_channel { + MAX77541_ADC_VSYS_V = 0, + MAX77541_ADC_VOUT1_V, + MAX77541_ADC_VOUT2_V, + MAX77541_ADC_TEMP, +}; + +static int max77541_adc_offset(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2) +{ + switch (chan->channel) { + case MAX77541_ADC_VSYS_V: + case MAX77541_ADC_VOUT1_V: + case MAX77541_ADC_VOUT2_V: + *val = 0; + *val2 = 0; + return IIO_VAL_INT_PLUS_MICRO; + case MAX77541_ADC_TEMP: + *val = -273; + *val2 = 0; + return IIO_VAL_INT_PLUS_MICRO; + default: + return -EINVAL; + } +} + +static int max77541_adc_scale(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2) +{ + struct max77541_adc_iio *info = iio_priv(indio_dev); + unsigned int reg_val; + int ret; + + switch (chan->channel) { + case MAX77541_ADC_VSYS_V: + *val = 0; + *val2 = 25000; + return IIO_VAL_INT_PLUS_MICRO; + case MAX77541_ADC_VOUT1_V: + ret = regmap_read(info->regmap, MAX77541_REG_M2_CFG1, ®_val); + if (ret) + return ret; + + reg_val = FIELD_GET(MAX77541_BITS_MX_CFG1_RNG, reg_val); + + *val = 0; + + if (reg_val == LOW_RANGE) + *val2 = 6250; + else if (reg_val == MID_RANGE) + *val2 = 12500; + else if (reg_val == HIGH_RANGE) + *val2 = 25000; + else + return -EINVAL; + + return IIO_VAL_INT_PLUS_MICRO; + case MAX77541_ADC_VOUT2_V: + ret = regmap_read(info->regmap, MAX77541_REG_M2_CFG1, ®_val); + if (ret) + return ret; + reg_val = FIELD_GET(MAX77541_BITS_MX_CFG1_RNG, reg_val); + + *val = 0; + + if (reg_val == LOW_RANGE) + *val2 = 6250; + else if (reg_val == MID_RANGE) + *val2 = 12500; + else if (reg_val == HIGH_RANGE) + *val2 = 25000; + else + return -EINVAL; + + return IIO_VAL_INT_PLUS_MICRO; + case MAX77541_ADC_TEMP: + *val = 1; + *val2 = 725000; + return IIO_VAL_INT_PLUS_MICRO; + default: + return -EINVAL; + } +} + +static int max77541_adc_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val) +{ + struct max77541_adc_iio *info = iio_priv(indio_dev); + int ret; + + ret = regmap_read(info->regmap, chan->address, val); + if (ret) + return ret; + + return IIO_VAL_INT; +} + +static const struct iio_chan_spec max77541_adc_channels[] = { + MAX77541_ADC_CHANNEL(MAX77541_ADC_VSYS_V, "vsys_v", IIO_VOLTAGE, + MAX77541_REG_ADC_DATA_CH1), + MAX77541_ADC_CHANNEL(MAX77541_ADC_VOUT1_V, "vout1_v", IIO_VOLTAGE, + MAX77541_REG_ADC_DATA_CH2), + MAX77541_ADC_CHANNEL(MAX77541_ADC_VOUT2_V, "vout2_v", IIO_VOLTAGE, + MAX77541_REG_ADC_DATA_CH3), + MAX77541_ADC_CHANNEL(MAX77541_ADC_TEMP, "temp", IIO_TEMP, + MAX77541_REG_ADC_DATA_CH6), +}; + +static int max77541_adc_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + switch (mask) { + case IIO_CHAN_INFO_OFFSET: + return max77541_adc_offset(indio_dev, chan, val, val2); + case IIO_CHAN_INFO_SCALE: + return max77541_adc_scale(indio_dev, chan, val, val2); + case IIO_CHAN_INFO_RAW: + return max77541_adc_raw(indio_dev, chan, val); + default: + return -EINVAL; + } +} + +static const struct iio_info max77541_adc_info = { + .read_raw = max77541_adc_read_raw, +}; + +static int max77541_adc_probe(struct platform_device *pdev) +{ + struct max77541_dev *max77541; + struct max77541_adc_iio *info; + struct iio_dev *indio_dev; + + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); + if (!indio_dev) + return -ENOMEM; + + info = iio_priv(indio_dev); + + info->regmap = max77541->regmap; + indio_dev->modes = INDIO_DIRECT_MODE; + + indio_dev->name = platform_get_device_id(pdev)->name; + indio_dev->info = &max77541_adc_info; + indio_dev->channels = max77541_adc_channels; + indio_dev->num_channels = ARRAY_SIZE(max77541_adc_channels); + + return devm_iio_device_register(&pdev->dev, indio_dev); +} + +static const struct platform_device_id max77541_adc_platform_id[] = { + { "max77541-adc", MAX77541, }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, max77541_adc_platform_id); + +static const struct of_device_id max77541_adc_of_id[] = { + { + .compatible = "adi,max77541-adc", + .data = (void *)MAX77541, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, max77541_adc_of_id); + +static struct platform_driver max77541_adc_driver = { + .driver = { + .name = "max77541-adc", + .of_match_table = max77541_adc_of_id, + }, + .probe = max77541_adc_probe, + .id_table = max77541_adc_platform_id, +}; + +module_platform_driver(max77541_adc_driver); + +MODULE_AUTHOR("Okan Sahin "); +MODULE_DESCRIPTION("MAX77541 ADC driver"); +MODULE_LICENSE("GPL");