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[75.76.18.234]) by smtp.gmail.com with ESMTPSA id f12-20020ac8464c000000b003a55fe9f352sm2908912qto.64.2022.12.01.10.15.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Dec 2022 10:15:44 -0800 (PST) From: Nathan Barrett-Morrison Cc: nathan.morrison@timesys.com, greg.malysa@timesys.com, Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org (open list:SPI NOR SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/3] mtd: spi-nor: Extend SFDP 4byte address instruction lookup table with new octal modes as per JEDEC JESD216F Date: Thu, 1 Dec 2022 13:15:30 -0500 Message-Id: <20221201181532.255449-2-nathan.morrison@timesys.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221201181532.255449-1-nathan.morrison@timesys.com> References: <20221201181532.255449-1-nathan.morrison@timesys.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751036638599167668?= X-GMAIL-MSGID: =?utf-8?q?1751036638599167668?= This adds the new bit fields for reading: 1S-1S-8S, 1S-8S-8S, 1D-8D-8D programming: 1S-1S-8S, 1S-8S-8S Signed-off-by: Nathan Barrett-Morrison --- drivers/mtd/spi-nor/sfdp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 2257f1b4c2e2..e4e87815ba94 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -953,11 +953,16 @@ static int spi_nor_parse_4bait(struct spi_nor *nor, { SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) }, { SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) }, { SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) }, + { SNOR_HWCAPS_READ_1_1_8, BIT(20) }, + { SNOR_HWCAPS_READ_1_8_8, BIT(21) }, + { SNOR_HWCAPS_READ_1_8_8_DTR, BIT(22) }, }; static const struct sfdp_4bait programs[] = { { SNOR_HWCAPS_PP, BIT(6) }, { SNOR_HWCAPS_PP_1_1_4, BIT(7) }, { SNOR_HWCAPS_PP_1_4_4, BIT(8) }, + { SNOR_HWCAPS_PP_1_1_8, BIT(23) }, + { SNOR_HWCAPS_PP_1_8_8, BIT(24) }, }; static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = { { 0u /* not used */, BIT(9) }, From patchwork Thu Dec 1 18:15:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nathan Barrett-Morrison X-Patchwork-Id: 28500 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp414390wrr; Thu, 1 Dec 2022 10:17:50 -0800 (PST) X-Google-Smtp-Source: AA0mqf4D1M+2cX2UAbPMzlGnDPxNSIY8nBnkHwjZ7qUtmPOcw77LN44RmtIoKV2xflm5eZQZjg2H X-Received: by 2002:a63:d249:0:b0:43c:ac7c:ee27 with SMTP id t9-20020a63d249000000b0043cac7cee27mr41222950pgi.583.1669918669758; Thu, 01 Dec 2022 10:17:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669918669; cv=none; d=google.com; s=arc-20160816; b=NveMLr0l9yyfiU0GoxRiQ544zSfvnociFnYW2ivqFru/STXgI8BFKd6ckAhQ2Byq3h mIJjQ6s2A5e+GuQOK+qLWtsG9JAL4HFHn8+kOGoIQ8CfxtIIcEcPtChGNK+t+vfLG9j4 ylI5wECblcCZSI7MoNDMsApVYyxR5xkaog66QS+UIvi780cH3aBSDKXmXncU/IWm+KIS Oa43x63uY12euEx9iEveZbZ9OfPlPOg5WipICPdFA+QmgWGirutTjqIWYwGpbNZ4XYrp WPMKKXiowt6He9jLG5Egm8fea5HSIn20fnrNThLa1oF5bOTpHrC76x+rNmTDjMMuv4Ea ClAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:from :dkim-signature; bh=aQZKgZOgE0+wcpYy5gXw4iw3dPKVanHGPihBaubSi28=; b=kV2/fP8L6CR4Pak6Oile0i5G4hXPP6fo92KybPRZ5ZLE70xoax8CdFbmgflgxO+Hzp eGJXGJE3DmNlU9h10rkHbuWJgZij+sgtA3ePak9kPeDLW1bBfuPmTnItWiKOPPj5nDbB 3iA6+zobI0dV8i2Bxe1FjJCY++uKf0K5UABUW6+wyIaqG5olz7Lt5XLpFucJ2dFC84o6 3px23JbQmzK8KTG+qyHyXbp0EyCGanjOS5lcko4mbsdGvrzEI0SbxzHC5Fru3bEIEQC3 umZYqd0RemRAHbH7xuNKbn8fcCd9miJtZpqb+YCmSqp5+k4ZrK4/NxKzQm96XiwdjhLI zBew== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@timesys-com.20210112.gappssmtp.com header.s=20210112 header.b=x59QEa7b; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[75.76.18.234]) by smtp.gmail.com with ESMTPSA id f12-20020ac8464c000000b003a55fe9f352sm2908912qto.64.2022.12.01.10.15.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Dec 2022 10:15:45 -0800 (PST) From: Nathan Barrett-Morrison Cc: nathan.morrison@timesys.com, greg.malysa@timesys.com, Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org (open list:SPI NOR SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/3] mtd: spi-nor: Add additional octal-mode flags to be checked during SFDP Date: Thu, 1 Dec 2022 13:15:31 -0500 Message-Id: <20221201181532.255449-3-nathan.morrison@timesys.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221201181532.255449-1-nathan.morrison@timesys.com> References: <20221201181532.255449-1-nathan.morrison@timesys.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751036638929532463?= X-GMAIL-MSGID: =?utf-8?q?1751036638929532463?= This adds some support for searching a chips SFDP table for: read commands: 1S-8S-8S program commands: 1S-1S-8S, 1S-8S-8S Signed-off-by: Nathan Barrett-Morrison --- drivers/mtd/spi-nor/core.c | 21 ++++++++++++++++++++- drivers/mtd/spi-nor/core.h | 9 ++++++--- 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index bee8fc4c9f07..7475a9a22881 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2335,7 +2335,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) { struct spi_nor_flash_parameter *params = nor->params; struct spi_nor_erase_map *map = ¶ms->erase_map; - const u8 no_sfdp_flags = nor->info->no_sfdp_flags; + const u16 no_sfdp_flags = nor->info->no_sfdp_flags; u8 i, erase_mask; if (no_sfdp_flags & SPI_NOR_DUAL_READ) { @@ -2359,6 +2359,25 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) SNOR_PROTO_1_1_8); } + if (no_sfdp_flags & SPI_NOR_OCTAL_READ_1_8_8) { + params->hwcaps.mask |= SNOR_HWCAPS_READ_1_8_8; + spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_8_8], + 0, 16, SPINOR_OP_READ_1_8_8, + SNOR_PROTO_1_8_8); + } + + if (no_sfdp_flags & SPI_NOR_OCTAL_PP) { + params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_8; + spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_1_1_8], + SPINOR_OP_PP_1_1_8, SNOR_PROTO_1_1_8); + } + + if (no_sfdp_flags & SPI_NOR_OCTAL_PP_1_8_8) { + params->hwcaps.mask |= SNOR_HWCAPS_PP_1_8_8; + spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_8_8_8], + SPINOR_OP_PP_1_8_8, SNOR_PROTO_1_8_8); + } + if (no_sfdp_flags & SPI_NOR_OCTAL_DTR_READ) { params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR; spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR], diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 85b0cf254e97..25a0d4f1850b 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -508,14 +508,17 @@ struct flash_info { #define NO_CHIP_ERASE BIT(7) #define SPI_NOR_NO_FR BIT(8) - u8 no_sfdp_flags; + u16 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) #define SECT_4K BIT(1) #define SPI_NOR_DUAL_READ BIT(3) #define SPI_NOR_QUAD_READ BIT(4) #define SPI_NOR_OCTAL_READ BIT(5) -#define SPI_NOR_OCTAL_DTR_READ BIT(6) -#define SPI_NOR_OCTAL_DTR_PP BIT(7) +#define SPI_NOR_OCTAL_READ_1_8_8 BIT(6) +#define SPI_NOR_OCTAL_PP BIT(7) +#define SPI_NOR_OCTAL_PP_1_8_8 BIT(8) +#define SPI_NOR_OCTAL_DTR_READ BIT(9) +#define SPI_NOR_OCTAL_DTR_PP BIT(10) u8 fixup_flags; #define SPI_NOR_4B_OPCODES BIT(0) From patchwork Thu Dec 1 18:15:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nathan Barrett-Morrison X-Patchwork-Id: 28501 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp414412wrr; Thu, 1 Dec 2022 10:17:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf6Ib8VMM9H7x9X2loo+Kxb1QzzS6Pnb0LhRQpXz/5FP7pIH1UqsOynxvxz9w7mw0UMgzCAf X-Received: by 2002:a17:902:c702:b0:189:4bde:53c1 with SMTP id p2-20020a170902c70200b001894bde53c1mr41595611plp.1.1669918674375; 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[75.76.18.234]) by smtp.gmail.com with ESMTPSA id f12-20020ac8464c000000b003a55fe9f352sm2908912qto.64.2022.12.01.10.15.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Dec 2022 10:15:47 -0800 (PST) From: Nathan Barrett-Morrison Cc: nathan.morrison@timesys.com, greg.malysa@timesys.com, Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org (open list:SPI NOR SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 3/3] mtd: spi-nor: Add support for IS25LX256 operating in 1S-1S-8S mode Date: Thu, 1 Dec 2022 13:15:32 -0500 Message-Id: <20221201181532.255449-4-nathan.morrison@timesys.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221201181532.255449-1-nathan.morrison@timesys.com> References: <20221201181532.255449-1-nathan.morrison@timesys.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751036643746756075?= X-GMAIL-MSGID: =?utf-8?q?1751036643746756075?= This adds the IS25LX256 chip into the ISSI flash_info parts table Signed-off-by: Nathan Barrett-Morrison --- drivers/mtd/spi-nor/issi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 89a66a19d754..b4412a9afc4e 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -74,6 +74,9 @@ static const struct flash_info issi_nor_parts[] = { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) FIXUP_FLAGS(SPI_NOR_4B_OPCODES) .fixups = &is25lp256_fixups }, + { "is25lx256", INFO(0x9d5a19, 0, 128 * 1024, 256) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_4B_OPCODES | + SPI_NOR_OCTAL_PP | SPI_NOR_OCTAL_READ) }, /* PMC */ { "pm25lv512", INFO(0, 0, 32 * 1024, 2)