From patchwork Wed Nov 30 15:55:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 27866 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1008470wrr; Wed, 30 Nov 2022 08:00:45 -0800 (PST) X-Google-Smtp-Source: AA0mqf4fBsjXjPQG7DKYOsC+Mtdl82RE4beoTD2cfuER/cEik52bTaoBO9d5LIDFBBWQTW6v4cmn X-Received: by 2002:a17:90b:3944:b0:214:1df0:fe53 with SMTP id oe4-20020a17090b394400b002141df0fe53mr70264332pjb.214.1669824044237; Wed, 30 Nov 2022 08:00:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669824044; cv=none; d=google.com; s=arc-20160816; b=KbXpVV9uAos/Tgcwlm0FeIv1cEIxCEZlfQX7FwbJcMz/xOhYg7T9TfyQgPtCD1u560 8RwMKSD6eaJuMVn3aXx4d0WNeDATOzA6zv+DX3OFkjpXO9LM6YMpciBZIfls8iqYDNUy O6RVtQvCRdcI/NI7Ptrx64bfSWQNDWDLgmuHUZkJC/ZuIYnk/D76dG/qzZDW2xf7tS3w FiO47EPBaTYZYJ6MazPkFWcZop9h4Jnwc1odB3fDd5K2Pzl/98tQ3ORrgKdw4cUhb7pU dgFrjodBPTW/qH9gr7OK9pdqojRkTsAPtcVIFttUMvGTqo9uFSsybijOUmV2xAsMF3y0 riZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=tz7QNBDUrostUtBMrqjH3KyFBPVkyave0qqH+EyQ6Y4=; b=It7hfUXC6vKzvjN/5dA8aPvI8glrWxXDB2PgypTqdiFGsBhjRtlQ5a6/lK5m0hXZhl YrOZu7QHxptcayUdx7+pqR445Ruzj23dOq3I4rhyGe3XksPBb+zy3BLJaluJaxAg501K f/8X0bsFdfyLF+VDQ2U8i1V+5fBEeZ/Scb869qpaKG5wmYwCyxff3ERCey7zxhq5qEAu x9KGrRfRfpQ/WbDI1jgKGfEfA7fVyqNeAwZxFjMGiscSw6yaraAfv6OQ8H7PfTK6AHJa fgjkZa/6/6gYvmBTeRkOxyizhQi/dFkHVj0z0W74AE6/KfXdw7PIQrWp7z39sg9jmacU RB+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=mPm+VoFj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t11-20020a170902e1cb00b001898c6b8ec4si1417664pla.317.2022.11.30.08.00.29; Wed, 30 Nov 2022 08:00:44 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=mPm+VoFj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230036AbiK3PzG (ORCPT + 99 others); Wed, 30 Nov 2022 10:55:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229678AbiK3PzD (ORCPT ); Wed, 30 Nov 2022 10:55:03 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD6DC2AC4B; Wed, 30 Nov 2022 07:55:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669823702; x=1701359702; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=W3W8UQp+uTMVzTm3Ojr0JjiDtmOtEXslOxckk+D0c1g=; b=mPm+VoFj7iYbvN/TThkolFhFYFGzZvdsylpDxejo7Re6VC/yXHUhAaHE uqyZoUPh2GzptJ1KJnYsR2whRrm2KHwYFWaQ2ZWi+KyziTptg9X0dQ6LY JqUtzDHjQfJaE5rcZTX/CYA6uWb4gPoqPXq5w2V07lIOwXyFmptJqC566 2bp5nIKYlUM6F5sRbnz4DAhFTzEKbA7kMx7jt6JoFtuLQkwgZtBfKDZnN 7TP4osZNhVQ6WkXO5gP9yGXQMO1HSP7J2BeW8Z6x6x3L98jVs8+XD+TeN UONmg4k9V6bVHhKiZ/xJNNKApGQir5yIIXjYQtOR6ypBIZjzav9KWH94M w==; X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="295126527" X-IronPort-AV: E=Sophos;i="5.96,206,1665471600"; d="scan'208";a="295126527" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 07:55:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="707693498" X-IronPort-AV: E=Sophos;i="5.96,206,1665471600"; d="scan'208";a="707693498" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 30 Nov 2022 07:54:59 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id E65CA10E; Wed, 30 Nov 2022 17:55:25 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Marc Zyngier , linux-gpio@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Linus Walleij , Bartosz Golaszewski , Jonathan Corbet , Hans de Goede Subject: [PATCH v1 1/3] Documentation: gpio: Input mode is not true Hi-Z Date: Wed, 30 Nov 2022 17:55:17 +0200 Message-Id: <20221130155519.20362-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750937416960035586?= X-GMAIL-MSGID: =?utf-8?q?1750937416960035586?= The true Hi-Z (a.k.a. high impedance) mode is when pin is completely disconnected from the chip. This includes input buffer as well. Nevertheless, some hardware may not support that mode and they are considering input only as Hi-Z, but more precisely it is an equivalent to that, in electronics it's basically "an antenna mode". Sligthly correct documentation to take the above into consideration. Signed-off-by: Andy Shevchenko Reviewed-by: Linus Walleij --- Documentation/driver-api/gpio/driver.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst index 6baaeab79534..bf6319cc531b 100644 --- a/Documentation/driver-api/gpio/driver.rst +++ b/Documentation/driver-api/gpio/driver.rst @@ -218,10 +218,10 @@ not support open drain/open source in hardware, the GPIO library will instead use a trick: when a line is set as output, if the line is flagged as open drain, and the IN output value is low, it will be driven low as usual. But if the IN output value is set to high, it will instead *NOT* be driven high, -instead it will be switched to input, as input mode is high impedance, thus -achieving an "open drain emulation" of sorts: electrically the behaviour will -be identical, with the exception of possible hardware glitches when switching -the mode of the line. +instead it will be switched to input, as input mode is an equivalent to +high impedance, thus achieving an "open drain emulation" of sorts: electrically +the behaviour will be identical, with the exception of possible hardware glitches +when switching the mode of the line. For open source configuration the same principle is used, just that instead of actively driving the line low, it is set to input. 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id bd5-20020a656e05000000b0047867817cbasi802825pgb.274.2022.11.30.08.00.00; Wed, 30 Nov 2022 08:00:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=OyKgCM30; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229963AbiK3PzE (ORCPT + 99 others); Wed, 30 Nov 2022 10:55:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229566AbiK3PzC (ORCPT ); Wed, 30 Nov 2022 10:55:02 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E8212A72C; Wed, 30 Nov 2022 07:55:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669823702; x=1701359702; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zyte05y+upKDfse9Z8XVDo9E7nJa4Ll5iv0RvnzSuUM=; b=OyKgCM302H4QTJYDajAlaG+QHVr0ipZL2EbhntMfrqn4riMfXgY4jCpR JBQEWgj6Pj/t0nOCUaHeU0eyHVUW6Wxnpp4Wwssrx34UrfJbXuUvkbEvn XZFhX/dkLTnpLRQ8bFEwfB3h/1fxFlcwQKMa9dkYgXO8/e5H+eGJeEguW USMx79sKpiuorxJsuOC7u2tcoR2HJjosqO2Buglf2EBnkvaEXh1EYxyXl Ip0Fk7wmq15BAC5EhP2tNFlz3bBqYsD+fAkGCBrxbPS3r0VAjNix6lxSj lA/dRJsSupbEfsXULWiuil0Sx3N3SlkHU8n2r07Xv/YvfYGSr9dfZygIU Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="295126520" X-IronPort-AV: E=Sophos;i="5.96,206,1665471600"; d="scan'208";a="295126520" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 07:55:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="707693497" X-IronPort-AV: E=Sophos;i="5.96,206,1665471600"; d="scan'208";a="707693497" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 30 Nov 2022 07:54:59 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 015CC6A; Wed, 30 Nov 2022 17:55:25 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Marc Zyngier , linux-gpio@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Linus Walleij , Bartosz Golaszewski , Jonathan Corbet , Hans de Goede Subject: [PATCH v1 2/3] Documentation: gpio: Add a section on what to return in ->get() callback Date: Wed, 30 Nov 2022 17:55:18 +0200 Message-Id: <20221130155519.20362-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221130155519.20362-1-andriy.shevchenko@linux.intel.com> References: <20221130155519.20362-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750937385226659480?= X-GMAIL-MSGID: =?utf-8?q?1750937385226659480?= The ->get() callback depending on other settings and hardware support may return different values, while the line outside the chip is kept in the same state. Let's discuss that in the documentation. Signed-off-by: Andy Shevchenko --- Documentation/driver-api/gpio/driver.rst | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst index bf6319cc531b..3d2f36001a7a 100644 --- a/Documentation/driver-api/gpio/driver.rst +++ b/Documentation/driver-api/gpio/driver.rst @@ -251,6 +251,30 @@ supports more versatile control over electrical properties and can handle different pull-up or pull-down resistance values. +Considerations of the ->get() returned value +-------------------------------------------- + +Due to different possible electrical configurations and software applications +the value that ->get() callback returns may vary depending on the other settings. +This will allow to use pins in the I2C emulation mode or other not so standard +uses. + +The below table gathered the most used cases. + +========== ========== =============== ======================= + Input Output State What value to return? +========== ========== =============== ======================= + Disabled Disabled Hi-Z input buffer + Disabled OS/OD/etc Single ended [cached] output buffer + x Push-Pull Out [cached] output buffer + Enabled Disabled In input buffer + Enabled OS/OD/etc Bidirectional input buffer +========== ========== =============== ======================= + +The [cached] here is used in a broader sense: either pure software cache, or +read back value from the GPIO output buffer (not all hardware support that). + + GPIO drivers providing IRQs =========================== From patchwork Wed Nov 30 15:55:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 27867 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1008629wrr; Wed, 30 Nov 2022 08:01:01 -0800 (PST) X-Google-Smtp-Source: AA0mqf5+oPPhn7jtm0Thfq5xU5dbwCTRhSWgdPMxHaDNFD/DVjif1J4MHGSXAWI6USugL03inESm X-Received: by 2002:a63:5409:0:b0:476:e3bb:2340 with SMTP id i9-20020a635409000000b00476e3bb2340mr36417898pgb.530.1669824060946; Wed, 30 Nov 2022 08:01:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669824060; cv=none; d=google.com; s=arc-20160816; b=w4WkDOU6HbET/4B9EtOVgTJ4muaLZGC/g/GKbmpAI9USlfUZaRYtTo5K7khJHErQAc +VYG74ZB+DButYkaX61XwxZxEJGDmXZ6lBXZYcYJYBddhQ7VficcwVTUEv8sruBuLKd6 GCSORViUznYoNA4dvlzr8Qd6A3h3bWLPuO2hrbVJQczVeTIgfhLIZ8bjFKYHRoUr/E4I ucO2L/dQ5DxZVzl+rVFu1MR7KWIej+6hQU3KllgBAczh9vbXmd3THWtDqGUsj3mlOVSR Gp0XCDjjtzCE/JxtTGErvBM9LfSY+N7pLcnVy/FPlKDLy3VXCfHeTVIwrLe3+K2IvA+f VpKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Gy2JKUQcTOdJ3eoPZzOwTMB7Jv22/V9EUIA8tFMyF9M=; b=pmXFq2jkP1gjbrBQLtR2kWoi+k8FJKUzFm12hQ0gxO8LwUgMkl8l/G1p6w6BLZzfrb oIOnFRLqcRamOkTtwLRtDRiwgjTIwTN4IAVrQHERPBdDWIAdwosJHpnZmmlKIWHvcA4r tCQHbbjNKiTScR5jevCIltdBSCnTj/aw/hRR3TXHlFdOpBs+34qvlLBWwAV+pJ+U0bba kuv7qDmtTxSH4vsbKzXCfRLhnMcuSKKDyFHhkShy66CPIIagv0Qnbd+CWtxZlLlaWdiL zEUGlug17X5VFEEGjK49X1CMnoEHq4YxQsa4RI1kOanJYT0dR4NhC3tbABWUMa0RFIdd aP2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Ua8xLNJH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. 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To prevent that unify all code blocks by using spaces instead of leading TAB(s). Signed-off-by: Andy Shevchenko Acked-by: Linus Walleij --- Documentation/driver-api/gpio/driver.rst | 28 ++++++++++++------------ 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst index 3d2f36001a7a..d69ea7547aee 100644 --- a/Documentation/driver-api/gpio/driver.rst +++ b/Documentation/driver-api/gpio/driver.rst @@ -7,7 +7,7 @@ This document serves as a guide for writers of GPIO chip drivers. Each GPIO controller driver needs to include the following header, which defines the structures used to define a GPIO driver:: - #include + #include Internal Representation of GPIOs @@ -144,7 +144,7 @@ is not open, it will present a high-impedance (tristate) to the external rail:: in ----|| |/ ||--+ in ----| | |\ - GND GND + GND GND This configuration is normally used as a way to achieve one of two things: @@ -574,10 +574,10 @@ the interrupt separately and go with it: struct my_gpio *g; struct gpio_irq_chip *girq; - ret = devm_request_threaded_irq(dev, irq, NULL, - irq_thread_fn, IRQF_ONESHOT, "my-chip", g); + ret = devm_request_threaded_irq(dev, irq, NULL, irq_thread_fn, + IRQF_ONESHOT, "my-chip", g); if (ret < 0) - return ret; + return ret; /* Get a pointer to the gpio_irq_chip */ girq = &g->gc.irq; @@ -705,12 +705,12 @@ certain operations and keep track of usage inside of the gpiolib subsystem. Input GPIOs can be used as IRQ signals. When this happens, a driver is requested to mark the GPIO as being used as an IRQ:: - int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset) + int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset) This will prevent the use of non-irq related GPIO APIs until the GPIO IRQ lock is released:: - void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset) + void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset) When implementing an irqchip inside a GPIO driver, these two functions should typically be called in the .startup() and .shutdown() callbacks from the @@ -732,12 +732,12 @@ When a GPIO is used as an IRQ signal, then gpiolib also needs to know if the IRQ is enabled or disabled. In order to inform gpiolib about this, the irqchip driver should call:: - void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset) + void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset) This allows drivers to drive the GPIO as an output while the IRQ is disabled. When the IRQ is enabled again, a driver should call:: - void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset) + void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset) When implementing an irqchip inside a GPIO driver, these two functions should typically be called in the .irq_disable() and .irq_enable() callbacks from the @@ -787,12 +787,12 @@ Sometimes it is useful to allow a GPIO chip driver to request its own GPIO descriptors through the gpiolib API. A GPIO driver can use the following functions to request and free descriptors:: - struct gpio_desc *gpiochip_request_own_desc(struct gpio_desc *desc, - u16 hwnum, - const char *label, - enum gpiod_flags flags) + struct gpio_desc *gpiochip_request_own_desc(struct gpio_desc *desc, + u16 hwnum, + const char *label, + enum gpiod_flags flags) - void gpiochip_free_own_desc(struct gpio_desc *desc) + void gpiochip_free_own_desc(struct gpio_desc *desc) Descriptors requested with gpiochip_request_own_desc() must be released with gpiochip_free_own_desc().