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Signed-off-by: Vadym Kochan --- Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml index 3ee758886558..e1178a49f264 100644 --- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml @@ -25,6 +25,7 @@ properties: - enum: - marvell,armada-cp110-sdhci - marvell,armada-ap806-sdhci + - marvell,ac5-sdhci - items: - const: marvell,armada-ap807-sdhci From patchwork Wed Nov 30 13:37:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vadym Kochan X-Patchwork-Id: 27802 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp929082wrr; Wed, 30 Nov 2022 05:38:53 -0800 (PST) X-Google-Smtp-Source: AA0mqf40r0aemaRNS8pRDlDuc5cLt48hiLP0qA/wl8PmRzsP2itUX0AmItxjC/Se9myeeS8mxb01 X-Received: by 2002:a17:90a:a898:b0:219:263c:3ee3 with SMTP id h24-20020a17090aa89800b00219263c3ee3mr19483769pjq.89.1669815533164; Wed, 30 Nov 2022 05:38:53 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1669815533; cv=pass; d=google.com; s=arc-20160816; b=ncp9S7X8hZjov+YK1S3fAGsUqEjJATD6A+yfydp4ZaQHmTDCkF6GWetthAeKScABs2 95KIrsi6LuPJ1c5++5YKX66OF2vtJpwZeKMIvxvL2eGLUy3req716q6dTs/nFW2V6p1e jdZT2ZDrj/UDUw3xYYQ3nL9acWwjLGKrU4Ffh2aW5paohHFhCh5qG2fXLbkJIEG8sf1f m4nEMncNnziXDwnQuKOgd/U/u+njHnrrE1MgTFhFItz/XwGJRwm6XUiqmPXqsDL7Wp1Y VVjBCluRL10b0R/9h46mR/A+aYwneiRqufdzSTc/OK6cjeGq6Beh93XCwnfOY3iKhcGa 5dIQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2q5pw07O8LLInZ9JVL3ZCnjb7KZ/LT8mqYy9Bnciscg=; b=PAc1NuN96hCEWhvjIPuCEgCwPMeF8Vd7A76BiS1/MPmnvG/X1aVA0tfuL56OmWu0Ez d/9jPrmLCKKDrEbS3YQXIRTyEA+9yjGOGZqqmqyaO439MB/N1H9nu9pVpEj286ipgU5C F83SKQl43R9tlwc/zr42L/6m81tnsRp+4KmGy46YpPzd8p557Tvdkm7L3haPftPc370+ +A5M3ZzylQmeIAZffbgmLAQe8qtAMTvHxTexVE77qfdQetgPj76FtreLUhuAdWIPnqUb FgX1qnIkEjow5Rp3jRYGDeccpyCoQLocMmKw9FrQsd2bDOGL1LkbaoqJvAiQHEtjohX2 +X6g== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@plvision.eu header.s=selector2 header.b=FNjEmkZE; arc=pass (i=1 spf=pass spfdomain=plvision.eu dkim=pass dkdomain=plvision.eu dmarc=pass fromdomain=plvision.eu); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=plvision.eu Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Vadym Kochan --- drivers/mmc/host/sdhci.c | 2 +- drivers/mmc/host/sdhci.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 2108e8075609..e5d9abcc2116 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -4022,7 +4022,7 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev, EXPORT_SYMBOL_GPL(sdhci_alloc_host); -static int sdhci_set_dma_mask(struct sdhci_host *host) +int sdhci_set_dma_mask(struct sdhci_host *host) { struct mmc_host *mmc = host->mmc; struct device *dev = mmc_dev(mmc); diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 908da47ac5ba..b46d47c19650 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -815,4 +815,6 @@ void sdhci_switch_external_dma(struct sdhci_host *host, bool en); void sdhci_set_data_timeout_irq(struct sdhci_host *host, bool enable); void __sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd); +int sdhci_set_dma_mask(struct sdhci_host *host); + #endif /* __SDHCI_HW_H */ From patchwork Wed Nov 30 13:37:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vadym Kochan X-Patchwork-Id: 27803 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp930631wrr; Wed, 30 Nov 2022 05:42:17 -0800 (PST) X-Google-Smtp-Source: AA0mqf4rbyq8EZkQ07jzp/MUpJN88iWbEZx8UH6ou1lLjpLwXzcPKlUNgIEsrge6ACvxLRgxeS/E X-Received: by 2002:a17:906:2693:b0:7aa:57c3:3f26 with SMTP id t19-20020a170906269300b007aa57c33f26mr35631806ejc.195.1669815737540; Wed, 30 Nov 2022 05:42:17 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1669815737; cv=pass; d=google.com; s=arc-20160816; b=Yk10qqOrVJZm1L3B+3fKDSB/gcpi9Wcx60rgI2JMyU6wT3URkltQ2RitCAAtCGnCFx xOPN3L7HeyZ0FRNA37XrNP5l2aQu86GVM2e7B8ETQLqrnrw9Ic4HpRPxcYBlAERgFn8/ nJEycQovk70FydFfEANHZ0XhMtebK2o8LnBCp1m/VnnEoqOJzLdW40KqPl2qcn8v8ugX u/tOLlvryFVMzIfm5pvH46voJXgKV5+s0w31tN4/MLcLHIGVX6JwY56eErhQaLyFPfZ6 4MgExAXZvOUmiGlvEfBVb4+41z8/yTbMOlDOTdOSQaYoiVA/oIORFEwzfjb5Hg+VpPwk X5ng== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=3His+zrSJ0Epx1XGYz2o6BCePmujYxlnbK/1bctSts8=; b=K5VaCdeW388o30ydWWGMiX9+SxN6+FV/bKbK8mqo/iMOLmZWx1tiYs0Qa9Y9uO9Igy N0ezbG9JGnx9I46/KZBJyrvbXoB7EWvcGy1WBY08yJrkIg5SYDOUTLlaGDBTjfG2rhFG siQ2ZYl9XFfcqlmMq/HI8I2cX9m7wKgNtjLsiWNwwpRhDCIV0Y2mauHI/qBaKLAvF5LD wGK1uh4z7sALd2S+regbcjqzT8XJihW2Hw+DDB+/exP8uuS+U+cM8MQFnB7mfuZW4+KD lYUpMU4wUD5bhV0q+MT+jB7dIav5TTUG9lapuqvSbFuiBC7utfAOj/c5fp1AA/v26q28 LOMQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@plvision.eu header.s=selector2 header.b="L2s/bg+o"; arc=pass (i=1 spf=pass spfdomain=plvision.eu dkim=pass dkdomain=plvision.eu dmarc=pass fromdomain=plvision.eu); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=plvision.eu Received: from out1.vger.email (out1.vger.email. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 1Ri3SdvDbobbIrccMxz3BqqRJwg9QmjM8VOC2UvncxXHx0wJAyvgnAspivg+jIWw2xxzBbNb3hko1p7WxXbEOo6eZYzRrAFQi5yUphBLmzZoxs6W7lyiQMVNJqQMXNrfM6Xs+IejC4CQlMFZOlMgNyyI+AXqU88OiPGyYBvznkYPFKlaRFj11uXw/bUSs2Uuke6xxXGH9FG9ATUjUopQlritdlZiD84JqnR+dHG4dyQMClKIsIFAjMUQrsXvQ1E1UNj8M/T1ytLtBTx/Bu8rPozPqsYCLfW9x6VaazE7shqAmiCcdMrMNkguFV+at2+2KgGxGaitlw78t/sNb8jlQfAbrKzajHED8Q4fdglo287jRcvKQ4ufiaQ5kVSMJz7rg8dL/RPAATlckhIp/zBjMbyNfxzawCn4b42F2nrCpzTWRFcEgGNWUbCvv7l3YIaMQjd4SDHYs1KRo66XhDV5FpBpPOm5iwI3yiXsIEhVT13p3+maQgxgHaMEDIjOyK2aWlLbT5oqU249MAWYy7cPfLxqMsAdjwQKO9M2i5y2AHH34MCgDartOXy/Y824MAQF2n8k2ubSzq/drwdqyYSnkCSwHdN17YG8p1RC7uexv7HDG6ketuA/ku+6FV5/b7L7sULwoOe8RntANxRWu/0h+ZkOAqBsSZnXhD96FzlunjVithXrE/toD6Z/9BP3Lsn3g/EpSa+JQSl4SPsOxhKJbdCn622dKYsvuz+nXEnsVz1jCFtdGNYPNeZirQx2avEpYCWuWw9OvIe2RiyI5Asjy5xXUqZGZ5UhkY8R1amLFUB3F1aSsiA6sGKBpBL0gMHPxZL8qFQhUUvMI/O+l8YhtSqnmR6AyRebe0K9ruTCRs95syI0gy/wn47OK+nheDU2u572SMrPHEHv/netrpYC8j4dxvOnT/oij3Kl88gHbf16LaiSsuPFX8DnDnxIzddHOX9ZP2P+4m3mj2ShROV1/PxmxpdhLx/OPKBVTMTGJhScdkeBK/oIqpkd9Gp2Q/tKhsNz610wB7z8VBjEGunWy+NqDA7eB9u6n1AsxV+dcmdEMs93UY/AjpdSmcTj7WibxXO++kkSnd6JegqlKuBLEdYtkkRGE04XSPV2gFKvHcPQvBVlWhWsns31plxxjYuAxVDMnTIrVE21utbfgJiFRSvwLm2+k+1YUM0ceSE3MfOJPsh2An9YftBKwrgeEQCtIQ9hXAcERmcH9HgT9GOlx6P/03nh0aWZrJxzzYu44oMWfgUjqOjOTZaXof+4arj68H7cyJxjLALzXC9CUdUGVfkj682SNcQZ3Drz4S1L7p1MNs76hjNHIDgecPTNXB01qtqWeNsTvC+f4iFXVmasb16cNYI6HcUsyDS82mgjkevCIeW855H5yCrDblGU7EX0BIIY1CZru7RjbvlrRTmQ2f9euswGExjZTes5X0EG9QRGTUzsHtMpAsseuVk0A3zTRvJ/DJY5eE1zmoph0MGtQ7C3wCoRBFKIwlaRAGnB/HYdjrwCZZnoAytlh6G7jtgiDBz8XbweMlDcoAjvuVWfvozbIqI65EIYjR08sriCBiXM0Mn2bBg5px4tRypZP6rY+sLQkSh2f2gZLdG9YEMqRQ== X-OriginatorOrg: plvision.eu X-MS-Exchange-CrossTenant-Network-Message-Id: 3b48161c-9a10-4a32-88fe-08dad2d81da6 X-MS-Exchange-CrossTenant-AuthSource: VI1P190MB0317.EURP190.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Nov 2022 13:38:07.9663 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 03707b74-30f3-46b6-a0e0-ff0a7438c9c4 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: baUOSCdE/RE1yAAgjxEsJrk6y6ilNL4rdqSsTNvYduIptcdDS4yiqrHbpkD9ydSZxv1Ff6otgCK5KJD7hq8bgu6cWXqiw38Cr3RZh9yVCps= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PR3P190MB0858 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750928707122138678?= X-GMAIL-MSGID: =?utf-8?q?1750928707122138678?= There is a limitation on AC5 SoC that mmc controller can't have DMA access over 2G memory, so use SDMA with a bounce buffer. Swiotlb can't help because on arm64 arch it reserves memblock's at the end of the memory. Additionally set mask to 34 bit since on AC5 SoC RAM starts at 0x2_00000000. Co-developed-by: Elad Nachman Signed-off-by: Elad Nachman Signed-off-by: Vadym Kochan --- v2: #1 Use SDMA with a bounce buffer instead of PIO. drivers/mmc/host/sdhci-xenon.c | 38 ++++++++++++++++++++++++++++++++++ drivers/mmc/host/sdhci-xenon.h | 3 ++- 2 files changed, 40 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c index 08e838400b52..5f3db0425674 100644 --- a/drivers/mmc/host/sdhci-xenon.c +++ b/drivers/mmc/host/sdhci-xenon.c @@ -13,7 +13,9 @@ #include #include +#include #include +#include #include #include #include @@ -253,6 +255,22 @@ static unsigned int xenon_get_max_clock(struct sdhci_host *host) return pltfm_host->clock; } +static int xenon_set_dma_mask(struct sdhci_host *host) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct xenon_priv *priv = sdhci_pltfm_priv(pltfm_host); + struct mmc_host *mmc = host->mmc; + struct device *dev = mmc_dev(mmc); + + if (priv->hw_version == XENON_AC5) { + host->flags &= ~SDHCI_USE_64_BIT_DMA; + + return dma_set_mask_and_coherent(dev, DMA_BIT_MASK(34)); + } + + return sdhci_set_dma_mask(host); +} + static const struct sdhci_ops sdhci_xenon_ops = { .voltage_switch = xenon_voltage_switch, .set_clock = sdhci_set_clock, @@ -261,6 +279,7 @@ static const struct sdhci_ops sdhci_xenon_ops = { .reset = xenon_reset, .set_uhs_signaling = xenon_set_uhs_signaling, .get_max_clock = xenon_get_max_clock, + .set_dma_mask = xenon_set_dma_mask, }; static const struct sdhci_pltfm_data sdhci_xenon_pdata = { @@ -486,6 +505,18 @@ static void xenon_sdhc_unprepare(struct sdhci_host *host) xenon_disable_sdhc(host, sdhc_id); } +static int xenon_ac5_probe(struct sdhci_host *host) +{ + struct sysinfo si; + + si_meminfo(&si); + + if ((si.totalram * si.mem_unit) > SZ_2G) + host->quirks |= SDHCI_QUIRK_BROKEN_ADMA; + + return 0; +} + static int xenon_probe(struct platform_device *pdev) { struct sdhci_pltfm_host *pltfm_host; @@ -533,6 +564,12 @@ static int xenon_probe(struct platform_device *pdev) } } + if (priv->hw_version == XENON_AC5) { + err = xenon_ac5_probe(host); + if (err) + goto err_clk_axi; + } + err = mmc_of_parse(host->mmc); if (err) goto err_clk_axi; @@ -682,6 +719,7 @@ static const struct of_device_id sdhci_xenon_dt_ids[] = { { .compatible = "marvell,armada-ap807-sdhci", .data = (void *)XENON_AP807}, { .compatible = "marvell,armada-cp110-sdhci", .data = (void *)XENON_CP110}, { .compatible = "marvell,armada-3700-sdhci", .data = (void *)XENON_A3700}, + { .compatible = "marvell,ac5-sdhci", .data = (void *)XENON_AC5}, {} }; MODULE_DEVICE_TABLE(of, sdhci_xenon_dt_ids); diff --git a/drivers/mmc/host/sdhci-xenon.h b/drivers/mmc/host/sdhci-xenon.h index 3e9c6c908a79..0460d97aad26 100644 --- a/drivers/mmc/host/sdhci-xenon.h +++ b/drivers/mmc/host/sdhci-xenon.h @@ -57,7 +57,8 @@ enum xenon_variant { XENON_A3700, XENON_AP806, XENON_AP807, - XENON_CP110 + XENON_CP110, + XENON_AC5 }; struct xenon_priv {