From patchwork Tue Nov 29 19:10:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 27414 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp521315wrr; Tue, 29 Nov 2022 11:14:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf7Hu4giRMy9xs1XXc6wZG4eJvzC8EuCRsib1DOvhspyyRwsMJpVykT4+C1Gs3eO5wyXPX4N X-Received: by 2002:a65:63d8:0:b0:477:172b:c350 with SMTP id n24-20020a6563d8000000b00477172bc350mr35493935pgv.313.1669749272947; Tue, 29 Nov 2022 11:14:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669749272; cv=none; d=google.com; s=arc-20160816; b=FdJyMElRTlhr5D8pkk/i9Nmbl3Vbe/EMjwY1CftH2NxrlqSuqqwM01WW9im3Rhp2xs pb+aDvkeIbiDDnYl7NdS/X4XlLRJJWmrt0vLVEITf+SH2kXAR7lVfP+wXlBZQZu0PNni 4LzsX+Yze8p6LykE3T0j+Jdtep+OVczu0pcpcpi5ZtN+0hauWz+hS5iQp4VzzVYghz+y vEUqfT4wuUa2juRQcmA4VSI2PuXWa99J11jlZV/wiOBsTXezf7V3IMs+QnND6mAd3Z/C 3LVjwNUnySrkY2s4NwRkB5hbA5+mlg2ubHE/F+SwZHxR1egAVU+I2wFOw7EtOtToZGx2 1ZHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LWauFrTKFora3ZH0Jo4MEah4Z0NNZSk4ApzOJgiGBSA=; b=WbhRlfyR8TVVA0BToK4KbTCZrfjIGZV2NNPdOf82CReP6hgruHRyYWAKAsWx17IBTH ky/SC5v2voUS8trZ6xK3/0QBzq13c2XKTAHI0Bi9I+LPmFsz1YjPZ+crjxgs2jU9p2Qh 3BBVIyJdscRz7/ENeO7yMalp87A0VmDMemnI0v5r0M+EsApFMjqfJ9eLTSLl+MLdIboC BwRGeYkUxRX5dI8oECTMrrMd0SdG+27eBRpmT5XfXOuuckPtz0OYYdESUTDXjnc8pbiQ Kx5TnIr/Eo8VF99sEI2OLGdce7QKOIqnaan8HFXSZC0PpDlzzoaoqHxQyXbX56XML6zi uHww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bh56K2WB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s30-20020a63ff5e000000b00476ff5e43d6si15423841pgk.319.2022.11.29.11.14.19; Tue, 29 Nov 2022 11:14:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bh56K2WB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236597AbiK2TKu (ORCPT + 99 others); Tue, 29 Nov 2022 14:10:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48238 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236435AbiK2TKq (ORCPT ); Tue, 29 Nov 2022 14:10:46 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BB7357B5B for ; Tue, 29 Nov 2022 11:10:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669749045; x=1701285045; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=L0LysSy+o68gZus5CsHds3iLhv9K3aJ1XZA9pHukedQ=; b=bh56K2WBV1+vSnm7F6pJ57im2zbjdENd4DULmpkQN8oZSGJ4o1JXtKPx 3HEZ5iG5bpqb7z1T7TAsrYknGKP3j5wL6XxoF0//IpQYt1es5r9hrK4l/ tVwrqG2JdDhsveLTcFJT4Y1hNJ3HOa9BoOZNXnKEIMme7C/ic3bVKvFMh /a0RIoriLTvfvufmdp82xuFeT39fnMMlp80z7SGTVktfF2nfSPt4ZQMmk IhfUYm2b+1ByVs7bTkEF4HOZazU7mwXSUVC7wipOeq5EdcrrT5v2itr9B HTKYCK57EAh+8iseOVGA9iZJHutf1DVUud4TzTkJf9r69kfLO9/s5Pzf4 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="379490763" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="379490763" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 11:10:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="749991992" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="749991992" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga002.fm.intel.com with ESMTP; 29 Nov 2022 11:10:33 -0800 From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org Cc: steve.wahl@hpe.com, alexander.antonov@linux.intel.com, ak@linux.intel.com, eranian@google.com, namhyung@kernel.org, Kan Liang Subject: [PATCH 1/5] perf/x86/uncore: Factor out uncore_device_to_die() Date: Tue, 29 Nov 2022 11:10:19 -0800 Message-Id: <20221129191023.936738-2-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221129191023.936738-1-kan.liang@linux.intel.com> References: <20221129191023.936738-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750859013414452336?= X-GMAIL-MSGID: =?utf-8?q?1750859013414452336?= From: Kan Liang The same code is used to retrieve the logical die ID with a given PCI device in both the discovery code and the code that supports a system with > 8 nodes. Factor out uncore_device_to_die() to replace the duplicate code. No functional change. Signed-off-by: Kan Liang --- arch/x86/events/intel/uncore.c | 15 +++++++++++++++ arch/x86/events/intel/uncore.h | 1 + arch/x86/events/intel/uncore_discovery.c | 16 ++-------------- arch/x86/events/intel/uncore_snbep.c | 12 +----------- 4 files changed, 19 insertions(+), 25 deletions(-) diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 6f1ccc57a692..8caf253be1de 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -65,6 +65,21 @@ int uncore_die_to_segment(int die) return bus ? pci_domain_nr(bus) : -EINVAL; } +int uncore_device_to_die(struct pci_dev *dev) +{ + int node = pcibus_to_node(dev->bus); + int cpu; + + for_each_cpu(cpu, cpumask_of_pcibus(dev->bus)) { + struct cpuinfo_x86 *c = &cpu_data(cpu); + + if (c->initialized && cpu_to_node(cpu) == node) + return c->logical_die_id; + } + + return -1; +} + static void uncore_free_pcibus_map(void) { struct pci2phy_map *map, *tmp; diff --git a/arch/x86/events/intel/uncore.h b/arch/x86/events/intel/uncore.h index e278e2e7c051..8d493bea9eb6 100644 --- a/arch/x86/events/intel/uncore.h +++ b/arch/x86/events/intel/uncore.h @@ -208,6 +208,7 @@ struct pci2phy_map { struct pci2phy_map *__find_pci2phy_map(int segment); int uncore_pcibus_to_dieid(struct pci_bus *bus); int uncore_die_to_segment(int die); +int uncore_device_to_die(struct pci_dev *dev); ssize_t uncore_event_show(struct device *dev, struct device_attribute *attr, char *buf); diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/intel/uncore_discovery.c index 5fd72d4b8bbb..08af92af2be2 100644 --- a/arch/x86/events/intel/uncore_discovery.c +++ b/arch/x86/events/intel/uncore_discovery.c @@ -33,7 +33,7 @@ static int logical_die_id; static int get_device_die_id(struct pci_dev *dev) { - int cpu, node = pcibus_to_node(dev->bus); + int node = pcibus_to_node(dev->bus); /* * If the NUMA info is not available, assume that the logical die id is @@ -43,19 +43,7 @@ static int get_device_die_id(struct pci_dev *dev) if (node < 0) return logical_die_id++; - for_each_cpu(cpu, cpumask_of_node(node)) { - struct cpuinfo_x86 *c = &cpu_data(cpu); - - if (c->initialized && cpu_to_node(cpu) == node) - return c->logical_die_id; - } - - /* - * All CPUs of a node may be offlined. For this case, - * the PCI and MMIO type of uncore blocks which are - * enumerated by the device will be unavailable. - */ - return -1; + return uncore_device_to_die(dev); } #define __node_2_type(cur) \ diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index 44c2f879f708..31acc96ccb69 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -1453,9 +1453,6 @@ static int snbep_pci2phy_map_init(int devid, int nodeid_loc, int idmap_loc, bool } raw_spin_unlock(&pci2phy_map_lock); } else { - int node = pcibus_to_node(ubox_dev->bus); - int cpu; - segment = pci_domain_nr(ubox_dev->bus); raw_spin_lock(&pci2phy_map_lock); map = __find_pci2phy_map(segment); @@ -1465,15 +1462,8 @@ static int snbep_pci2phy_map_init(int devid, int nodeid_loc, int idmap_loc, bool break; } - die_id = -1; - for_each_cpu(cpu, cpumask_of_pcibus(ubox_dev->bus)) { - struct cpuinfo_x86 *c = &cpu_data(cpu); + map->pbus_to_dieid[bus] = die_id = uncore_device_to_die(ubox_dev); - if (c->initialized && cpu_to_node(cpu) == node) { - map->pbus_to_dieid[bus] = die_id = c->logical_die_id; - break; - } - } raw_spin_unlock(&pci2phy_map_lock); if (WARN_ON_ONCE(die_id == -1)) { From patchwork Tue Nov 29 19:10:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 27415 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp521319wrr; Tue, 29 Nov 2022 11:14:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf5RkXq3N/0v1phW8ETo6jzw1mPJ+JPGLP50iU2CNpGVANUd4Q68nRuY1/HoPM6HCqA6q8tx X-Received: by 2002:a63:e84f:0:b0:477:7dc8:57a7 with SMTP id a15-20020a63e84f000000b004777dc857a7mr33419374pgk.498.1669749273629; Tue, 29 Nov 2022 11:14:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669749273; cv=none; d=google.com; s=arc-20160816; b=FyulXdVfhHv5dPzDBW5C568x+SuVy0gx4M9ihLyK+mQMQEixw3Sx6+FvLehgahdXdA z34C03hReewa3doRF11MRsNq+6vIMHEOUcX8DJLzm3NWwEj/gq6ht9X9sQSDcPs18e0h eYya+2tfsG+K5kEEiXdbYev3+ET7CyvshgtDw2xlkKbsTJfCQH9vMRALIDGBuRBGTleb vuVQTN8g0PhfvNviM66CtfyCEgzIimbkRI8z/h0LBgDLpZs6V25zcJf0+XGGBACnRi48 Q9D8uy3O7YKh3n4JyZBRQAeccmDbp5fmYYbS8YSvZ6rGnL1Fjqck4hH30KPfWc3Bcu6h F5Aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=SFcIc/pbsf2BE19ok0Eidy2+t0Rf/TZtRJsABVbqP7A=; b=pczs0SCCtF/UuoMbocyS8X6opPg6Kwk6whsxD3OtpBhrhxhx2av9cer3JX5NTuZbFS BCKDftsDA0P8RgEiQmImxujPXyVvttALm9crau1oPsfXtJtjWPmhXAQpCjSi4Df5FKHF h1mVcLT/PWn5i/L7DSc0pUsRu3X1TwBSgVEzFPxEHMZheva0NH21heJVqupU/Co4jS8y SWMsnbmEIWyzOQDNsrYKiDTcVzTP00DJRBwIX2Fr8FJ9GP+M2kuezJowTX7yd+MXNxEY hBbLy8Tt80FdmWtaaGH0nb4SCl/uC2/KYytluglwQMyAK+nCEOd79b+niT4r1Ec13X3F 1u2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=E9uKHfWh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o12-20020a056a0015cc00b0057509d0411esi9728713pfu.192.2022.11.29.11.14.20; Tue, 29 Nov 2022 11:14:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=E9uKHfWh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236611AbiK2TKw (ORCPT + 99 others); Tue, 29 Nov 2022 14:10:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236493AbiK2TKq (ORCPT ); Tue, 29 Nov 2022 14:10:46 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF6A830556 for ; Tue, 29 Nov 2022 11:10:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669749045; x=1701285045; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NSeYAfZ211QEML4KPYcbjU+itn+gXqaZo2yeuqVu2i0=; b=E9uKHfWhgop1pO3srDFUejjztksRHsGBpcJz1Dj6xHcys2jtve6lZ8MW EEjlBgFT6k9dJJ2YnOmcAniIJ/7TZvkv21lhC/P3miT/EC3qXke4MuIJv f5YFIfj7YPtyGO/VWDc9qp1SJ93vAsNyxNHSY1kjY8yhe9/UHvnlv3q2C Ak/Jkkp3rx0BY/14WFyo99V2HLxz3Kw1Yhml4BZ0bNhN9Wl45kGB7m0IS Aw1dxvx3Z8CDVSNlDbmt29q95399gjVUWrjSlFEPmJFapkUOExssPhnYH E9hIWTZkCW1hVjXBZCW9PqapkrtpMnpuX30PznXW/kqgsgtTNFaO1RBo8 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="379490770" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="379490770" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 11:10:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="749991998" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="749991998" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga002.fm.intel.com with ESMTP; 29 Nov 2022 11:10:34 -0800 From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org Cc: steve.wahl@hpe.com, alexander.antonov@linux.intel.com, ak@linux.intel.com, eranian@google.com, namhyung@kernel.org, Kan Liang Subject: [PATCH 2/5] perf/x86/uncore: Fix potential NULL pointer in uncore_get_alias_name Date: Tue, 29 Nov 2022 11:10:20 -0800 Message-Id: <20221129191023.936738-3-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221129191023.936738-1-kan.liang@linux.intel.com> References: <20221129191023.936738-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750859014470992130?= X-GMAIL-MSGID: =?utf-8?q?1750859014470992130?= From: Kan Liang The current code assumes that the discovery table provides valid box_ids for the normal units. It's not the case anymore since some units in the discovery table are broken on some SPR variants. Factor out uncore_get_box_id(). Check the existence of the type->box_ids before using it. If it's not available, use pmu_idx. Signed-off-by: Kan Liang --- arch/x86/events/intel/uncore.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 8caf253be1de..d63be6d1224e 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -857,6 +857,12 @@ static const struct attribute_group uncore_pmu_attr_group = { .attrs = uncore_pmu_attrs, }; +static inline int uncore_get_box_id(struct intel_uncore_type *type, + struct intel_uncore_pmu *pmu) +{ + return type->box_ids ? type->box_ids[pmu->pmu_idx] : pmu->pmu_idx; +} + void uncore_get_alias_name(char *pmu_name, struct intel_uncore_pmu *pmu) { struct intel_uncore_type *type = pmu->type; @@ -865,7 +871,7 @@ void uncore_get_alias_name(char *pmu_name, struct intel_uncore_pmu *pmu) sprintf(pmu_name, "uncore_type_%u", type->type_id); else { sprintf(pmu_name, "uncore_type_%u_%d", - type->type_id, type->box_ids[pmu->pmu_idx]); + type->type_id, uncore_get_box_id(type, pmu)); } } @@ -892,7 +898,7 @@ static void uncore_get_pmu_name(struct intel_uncore_pmu *pmu) * Use the box ID from the discovery table if applicable. */ sprintf(pmu->name, "uncore_%s_%d", type->name, - type->box_ids ? type->box_ids[pmu->pmu_idx] : pmu->pmu_idx); + uncore_get_box_id(type, pmu)); } } From patchwork Tue Nov 29 19:10:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 27417 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp522274wrr; Tue, 29 Nov 2022 11:16:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf6hCPbVZjA8kMJJCdb7edkSThNFqZsBXEFHr9QbhE6A2nYtz60E6R12B7YazY0MM6d9I3qy X-Received: by 2002:a17:902:b7cc:b0:189:a5b9:483c with SMTP id v12-20020a170902b7cc00b00189a5b9483cmr851479plz.106.1669749393154; Tue, 29 Nov 2022 11:16:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669749393; cv=none; d=google.com; s=arc-20160816; b=lFZ3ByNfp77RCAXn4J7Djd/anqO9duK6vMJtZcEaIBTKZx4+ifOLiJVx9qSL+bxEOx 3jjGdiBMdvd9K4tc2o68H4KqlUTE+PFSa3n6wbNtH5eG77A9n+h+o4e+q69xDvW7Ghcu 4Vxg3T1gPzFF/x7YA0S8bLVDeeZUaHpWpRHgiGbJgkdbJtq7novOk1BGBQ9JRgzDTOmm 4fn77cXyeIvYu5peYSTTxTaiVqlS2Fw1jta848JWmeRBPl1aE6P9uih4vo2d1HiVPdnl C6ExLhv3kJq76stH26+NgGeuQxJz+xH/uEPGwa11VnL9w1jOu1n1lTFgO3F9GcbqYzR5 PLjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YF0VEleFmnIZHuAM8ANdwJF3JLoVpn4ORdkKEyZDo+s=; b=spRhC1F1zpTDZunlSE9kqZAM1suPxUiYK/Z9wCkTs4d3Ix9cvFL6t0PAu+17w88sUb PMQ/rnUMyeMNrGagjlw6nfAOv9jOYxVLXnXi0CAAzAa/b7vKmneJwseHveUA0RbzWylz 0csTUy6z947HeevIEl+mtErIbLL3eYjibparbIcxEwZJzeRkrAyA6PGxqOuAvEhpdlRm hGdhXDvH5XFPgUn12P6WzBOZNHnBNPwiWA79dr2VPexo3B3zQ9TyV+8hUIlJCnU9LwQP itCIYYHKsNdutHbwy2HDA1MSX+pjTpkDzskK68Q4wmrnEqjRZ45J5CkUf2vKGigzYkOZ 8yvw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=JZbC4PnU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 194-20020a6217cb000000b00575428b9ea7si5058125pfx.204.2022.11.29.11.16.19; Tue, 29 Nov 2022 11:16:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=JZbC4PnU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236627AbiK2TK6 (ORCPT + 99 others); Tue, 29 Nov 2022 14:10:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236562AbiK2TKr (ORCPT ); Tue, 29 Nov 2022 14:10:47 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 417025B5A4 for ; Tue, 29 Nov 2022 11:10:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669749046; x=1701285046; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=k3olYJGDuAsTwkx4jY139eZ6Hwoc0t134R0hr6yBmNI=; b=JZbC4PnUvK6tiSOyygQHOJxVlsBRxWHWCW33qbPfPTT2SBZ8vBDqEZWC 5RlQXLytS+tpDuj73PILscw8yoQTue5S8LW0wKWFdsNPMMLgoHQKZ5FA0 wEeDpT6fwIrt6ZjLtbfnDe7ywab9hJf/9q+fZJrXBmqA+T5MSRKcpQZeg JN8/Y1bK+mqohMR+RtIcXffeBvLDX4GsZbAyYl4a4QPetJLNlynLUSKGi QIkw6ZQjLGKPtg/3qXInvBHHixnSsYjwnN7nVpM9M/dTN1okxPM9o+4PB nuxeQuw6wnMSHB7R/UEcWB6rLLKSXUxdncZe1O52L7tGtbWsIjv9d6ETt A==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="379490778" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="379490778" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 11:10:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="749992004" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="749992004" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga002.fm.intel.com with ESMTP; 29 Nov 2022 11:10:34 -0800 From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org Cc: steve.wahl@hpe.com, alexander.antonov@linux.intel.com, ak@linux.intel.com, eranian@google.com, namhyung@kernel.org, Kan Liang Subject: [PATCH 3/5] perf/x86/uncore: Ignore broken units in discovery table Date: Tue, 29 Nov 2022 11:10:21 -0800 Message-Id: <20221129191023.936738-4-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221129191023.936738-1-kan.liang@linux.intel.com> References: <20221129191023.936738-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750859139521136183?= X-GMAIL-MSGID: =?utf-8?q?1750859139521136183?= From: Kan Liang Some units in a discovery table may be broken, e.g., UPI of SPR MCC. A generic method is required to ignore the broken units. Add uncore_units_ignore in the struct intel_uncore_init_fun, which indicates the type ID of broken units. It will be assigned by the platform-specific code later when the platform has a broken discovery table. Signed-off-by: Kan Liang --- arch/x86/events/intel/uncore.c | 8 ++++++-- arch/x86/events/intel/uncore.h | 2 ++ arch/x86/events/intel/uncore_discovery.c | 26 +++++++++++++++++++++--- arch/x86/events/intel/uncore_discovery.h | 2 +- 4 files changed, 32 insertions(+), 6 deletions(-) diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index d63be6d1224e..751df6460bff 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -1695,7 +1695,10 @@ struct intel_uncore_init_fun { void (*cpu_init)(void); int (*pci_init)(void); void (*mmio_init)(void); + /* Discovery table is required */ bool use_discovery; + /* The units in the discovery table should be ignored. */ + int *uncore_units_ignore; }; static const struct intel_uncore_init_fun nhm_uncore_init __initconst = { @@ -1873,7 +1876,7 @@ static int __init intel_uncore_init(void) id = x86_match_cpu(intel_uncore_match); if (!id) { - if (!uncore_no_discover && intel_uncore_has_discovery_tables()) + if (!uncore_no_discover && intel_uncore_has_discovery_tables(NULL)) uncore_init = (struct intel_uncore_init_fun *)&generic_uncore_init; else return -ENODEV; @@ -1881,7 +1884,8 @@ static int __init intel_uncore_init(void) uncore_init = (struct intel_uncore_init_fun *)id->driver_data; if (uncore_no_discover && uncore_init->use_discovery) return -ENODEV; - if (uncore_init->use_discovery && !intel_uncore_has_discovery_tables()) + if (uncore_init->use_discovery && + !intel_uncore_has_discovery_tables(uncore_init->uncore_units_ignore)) return -ENODEV; } diff --git a/arch/x86/events/intel/uncore.h b/arch/x86/events/intel/uncore.h index 8d493bea9eb6..bbaa57cd868d 100644 --- a/arch/x86/events/intel/uncore.h +++ b/arch/x86/events/intel/uncore.h @@ -34,6 +34,8 @@ #define UNCORE_EVENT_CONSTRAINT(c, n) EVENT_CONSTRAINT(c, n, 0xff) +#define UNCORE_IGNORE_END -1 + struct pci_extra_dev { struct pci_dev *dev[UNCORE_EXTRA_PCI_DEV_MAX]; }; diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/intel/uncore_discovery.c index 08af92af2be2..abb51191f5af 100644 --- a/arch/x86/events/intel/uncore_discovery.c +++ b/arch/x86/events/intel/uncore_discovery.c @@ -190,8 +190,25 @@ uncore_insert_box_info(struct uncore_unit_discovery *unit, } +static bool +uncore_ignore_unit(struct uncore_unit_discovery *unit, int *ignore) +{ + int i; + + if (!ignore) + return false; + + for (i = 0; ignore[i] != UNCORE_IGNORE_END ; i++) { + if (unit->box_type == ignore[i]) + return true; + } + + return false; +} + static int parse_discovery_table(struct pci_dev *dev, int die, - u32 bar_offset, bool *parsed) + u32 bar_offset, bool *parsed, + int *ignore) { struct uncore_global_discovery global; struct uncore_unit_discovery unit; @@ -246,6 +263,9 @@ static int parse_discovery_table(struct pci_dev *dev, int die, if (unit.access_type >= UNCORE_ACCESS_MAX) continue; + if (uncore_ignore_unit(&unit, ignore)) + continue; + uncore_insert_box_info(&unit, die, *parsed); } @@ -254,7 +274,7 @@ static int parse_discovery_table(struct pci_dev *dev, int die, return 0; } -bool intel_uncore_has_discovery_tables(void) +bool intel_uncore_has_discovery_tables(int *ignore) { u32 device, val, entry_id, bar_offset; int die, dvsec = 0, ret = true; @@ -290,7 +310,7 @@ bool intel_uncore_has_discovery_tables(void) if (die < 0) continue; - parse_discovery_table(dev, die, bar_offset, &parsed); + parse_discovery_table(dev, die, bar_offset, &parsed, ignore); } } diff --git a/arch/x86/events/intel/uncore_discovery.h b/arch/x86/events/intel/uncore_discovery.h index f4439357779a..41637022b5d1 100644 --- a/arch/x86/events/intel/uncore_discovery.h +++ b/arch/x86/events/intel/uncore_discovery.h @@ -122,7 +122,7 @@ struct intel_uncore_discovery_type { unsigned int *box_offset; /* Box offset */ }; -bool intel_uncore_has_discovery_tables(void); +bool intel_uncore_has_discovery_tables(int *ignore); void intel_uncore_clear_discovery_tables(void); void intel_uncore_generic_uncore_cpu_init(void); int intel_uncore_generic_uncore_pci_init(void); From patchwork Tue Nov 29 19:10:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 27419 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp522670wrr; Tue, 29 Nov 2022 11:17:28 -0800 (PST) X-Google-Smtp-Source: AA0mqf55mNiQTq/rsXbbw8vIGnn1/SZFGG+XM0Xgf6X0ZaJTOMdl5QMnJPVM3x32a3zKHXckPVI8 X-Received: by 2002:a17:906:dfe8:b0:7c0:8711:7a4 with SMTP id lc8-20020a170906dfe800b007c0871107a4mr4137050ejc.667.1669749448160; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e5-20020a50a685000000b0046775f92f19si12264585edc.50.2022.11.29.11.17.04; Tue, 29 Nov 2022 11:17:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Im3+PoVL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236656AbiK2TLF (ORCPT + 99 others); Tue, 29 Nov 2022 14:11:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236567AbiK2TKs (ORCPT ); Tue, 29 Nov 2022 14:10:48 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A5975ADF9 for ; Tue, 29 Nov 2022 11:10:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669749047; x=1701285047; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iAOm52S+zGz+4hb/ZX5jqXvAjhsP8kD0UOXj6xS3eys=; b=Im3+PoVLkWKVlOwnTwRgL5llj9VnNfePeY3HPvmJuqdR38mKfzLjMe8F vxogtr1aukDp5bPFtcnRsuvkjnrQS9lLLkvhM7bz2rvFKolXq0RdTvZ7E sBgcMTN4inVijVzorBmaPMz92UENm6X9TIHWA9MUGfvHq9eEfMN0vZNc8 Er3U8Hb+y7LdAwWUIL5ZecItRr4YLTBfrNS5BE7Sdx/jLmXx2XhE4n0Ev 9PHCneFIYjjyQUKVlLeu0/EkB7ZEpfYQ/0mC3y3vhzKcn73xQpxyxeNVx ncIJQUOetin8PB2smZ3vtpfsYi8q2Jum8CS395hESfSWLfJcXrhdjvLTf Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="379490784" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="379490784" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 11:10:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="749992010" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="749992010" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga002.fm.intel.com with ESMTP; 29 Nov 2022 11:10:35 -0800 From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org Cc: steve.wahl@hpe.com, alexander.antonov@linux.intel.com, ak@linux.intel.com, eranian@google.com, namhyung@kernel.org, Kan Liang Subject: [PATCH 4/5] perf/x86/uncore: Add a quirk for UPI on SPR Date: Tue, 29 Nov 2022 11:10:22 -0800 Message-Id: <20221129191023.936738-5-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221129191023.936738-1-kan.liang@linux.intel.com> References: <20221129191023.936738-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750859197125761398?= X-GMAIL-MSGID: =?utf-8?q?1750859197125761398?= From: Kan Liang The discovery table of UPI on some SPR variants, e.g., MCC, is broken. The third UPI table may includes a wrong address which points to a non-exists device. The bug impacts both UPI and M3UPI uncore PMON. Use a pre-defined UPI and M3UPI table to replace the broken table. Different BIOS may populate a device into a different domain or a different BUS. The accurate location can only be retrieved at load time. Add spr_update_device_location() to update the location of the UPI and M3UPI in the pre-defined table. Signed-off-by: Kan Liang --- arch/x86/events/intel/uncore.c | 1 + arch/x86/events/intel/uncore.h | 1 + arch/x86/events/intel/uncore_discovery.h | 12 +- arch/x86/events/intel/uncore_snbep.c | 146 +++++++++++++++++++---- 4 files changed, 136 insertions(+), 24 deletions(-) diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 751df6460bff..0ac7ebfa1faa 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -1806,6 +1806,7 @@ static const struct intel_uncore_init_fun spr_uncore_init __initconst = { .pci_init = spr_uncore_pci_init, .mmio_init = spr_uncore_mmio_init, .use_discovery = true, + .uncore_units_ignore = spr_uncore_units_ignore, }; static const struct intel_uncore_init_fun generic_uncore_init __initconst = { diff --git a/arch/x86/events/intel/uncore.h b/arch/x86/events/intel/uncore.h index bbaa57cd868d..e76b945a079e 100644 --- a/arch/x86/events/intel/uncore.h +++ b/arch/x86/events/intel/uncore.h @@ -592,6 +592,7 @@ extern raw_spinlock_t pci2phy_map_lock; extern struct list_head pci2phy_map_head; extern struct pci_extra_dev *uncore_extra_pci_dev; extern struct event_constraint uncore_constraint_empty; +extern int spr_uncore_units_ignore[]; /* uncore_snb.c */ int snb_uncore_pci_init(void); diff --git a/arch/x86/events/intel/uncore_discovery.h b/arch/x86/events/intel/uncore_discovery.h index 41637022b5d1..6ee80ad3423e 100644 --- a/arch/x86/events/intel/uncore_discovery.h +++ b/arch/x86/events/intel/uncore_discovery.h @@ -21,9 +21,15 @@ /* Global discovery table size */ #define UNCORE_DISCOVERY_GLOBAL_MAP_SIZE 0x20 -#define UNCORE_DISCOVERY_PCI_DOMAIN(data) ((data >> 28) & 0x7) -#define UNCORE_DISCOVERY_PCI_BUS(data) ((data >> 20) & 0xff) -#define UNCORE_DISCOVERY_PCI_DEVFN(data) ((data >> 12) & 0xff) +#define UNCORE_DISCOVERY_PCI_DOMAIN_OFFSET 28 +#define UNCORE_DISCOVERY_PCI_DOMAIN(data) \ + ((data >> UNCORE_DISCOVERY_PCI_DOMAIN_OFFSET) & 0x7) +#define UNCORE_DISCOVERY_PCI_BUS_OFFSET 20 +#define UNCORE_DISCOVERY_PCI_BUS(data) \ + ((data >> UNCORE_DISCOVERY_PCI_BUS_OFFSET) & 0xff) +#define UNCORE_DISCOVERY_PCI_DEVFN_OFFSET 12 +#define UNCORE_DISCOVERY_PCI_DEVFN(data) \ + ((data >> UNCORE_DISCOVERY_PCI_DEVFN_OFFSET) & 0xff) #define UNCORE_DISCOVERY_PCI_BOX_CTRL(data) (data & 0xfff) diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index 31acc96ccb69..b6ba76bc669d 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -6132,24 +6132,6 @@ static int spr_upi_get_topology(struct intel_uncore_type *type) return discover_upi_topology(type, SPR_UBOX_DID, SPR_UPI_REGS_ADDR_DEVICE_LINK0); } -static struct intel_uncore_type spr_uncore_upi = { - .event_mask = SNBEP_PMON_RAW_EVENT_MASK, - .event_mask_ext = SPR_RAW_EVENT_MASK_EXT, - .format_group = &spr_uncore_raw_format_group, - .ops = &spr_uncore_pci_ops, - .name = "upi", - .attr_update = spr_upi_attr_update, - .get_topology = spr_upi_get_topology, - .set_mapping = spr_upi_set_mapping, - .cleanup_mapping = spr_upi_cleanup_mapping, -}; - -static struct intel_uncore_type spr_uncore_m3upi = { - SPR_UNCORE_PCI_COMMON_FORMAT(), - .name = "m3upi", - .constraints = icx_uncore_m3upi_constraints, -}; - static struct intel_uncore_type spr_uncore_mdf = { SPR_UNCORE_COMMON_FORMAT(), .name = "mdf", @@ -6158,7 +6140,13 @@ static struct intel_uncore_type spr_uncore_mdf = { #define UNCORE_SPR_NUM_UNCORE_TYPES 12 #define UNCORE_SPR_IIO 1 #define UNCORE_SPR_IMC 6 +#define UNCORE_SPR_UPI 8 +#define UNCORE_SPR_M3UPI 9 +/* + * The uncore units, which are supported by the discovery table, + * are defined here. + */ static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = { &spr_uncore_chabox, &spr_uncore_iio, @@ -6168,12 +6156,56 @@ static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = { NULL, &spr_uncore_imc, &spr_uncore_m2m, - &spr_uncore_upi, - &spr_uncore_m3upi, + NULL, + NULL, NULL, &spr_uncore_mdf, }; +/* + * The uncore units, which are not supported by the discovery table, + * are implemented from here. + */ +#define SPR_UNCORE_UPI_NUM_BOXES 4 + +static unsigned int spr_upi_pci_offsets[SPR_UNCORE_UPI_NUM_BOXES] = { + 0, 0x8000, 0x10000, 0x18000 +}; + +static struct intel_uncore_type spr_uncore_upi = { + .event_mask = SNBEP_PMON_RAW_EVENT_MASK, + .event_mask_ext = SPR_RAW_EVENT_MASK_EXT, + .format_group = &spr_uncore_raw_format_group, + .ops = &spr_uncore_pci_ops, + .name = "upi", + .attr_update = spr_upi_attr_update, + .get_topology = spr_upi_get_topology, + .set_mapping = spr_upi_set_mapping, + .cleanup_mapping = spr_upi_cleanup_mapping, + .type_id = UNCORE_SPR_UPI, + .num_counters = 4, + .num_boxes = SPR_UNCORE_UPI_NUM_BOXES, + .perf_ctr_bits = 48, + .perf_ctr = ICX_UPI_PCI_PMON_CTR0, + .event_ctl = ICX_UPI_PCI_PMON_CTL0, + .box_ctl = ICX_UPI_PCI_PMON_BOX_CTL, + .pci_offsets = spr_upi_pci_offsets, +}; + +static struct intel_uncore_type spr_uncore_m3upi = { + SPR_UNCORE_PCI_COMMON_FORMAT(), + .name = "m3upi", + .type_id = UNCORE_SPR_M3UPI, + .num_counters = 4, + .num_boxes = SPR_UNCORE_UPI_NUM_BOXES, + .perf_ctr_bits = 48, + .perf_ctr = ICX_M3UPI_PCI_PMON_CTR0, + .event_ctl = ICX_M3UPI_PCI_PMON_CTL0, + .box_ctl = ICX_M3UPI_PCI_PMON_BOX_CTL, + .pci_offsets = spr_upi_pci_offsets, + .constraints = icx_uncore_m3upi_constraints, +}; + enum perf_uncore_spr_iio_freerunning_type_id { SPR_IIO_MSR_IOCLK, SPR_IIO_MSR_BW_IN, @@ -6304,6 +6336,7 @@ static struct intel_uncore_type spr_uncore_imc_free_running = { #define UNCORE_SPR_MSR_EXTRA_UNCORES 1 #define UNCORE_SPR_MMIO_EXTRA_UNCORES 1 +#define UNCORE_SPR_PCI_EXTRA_UNCORES 2 static struct intel_uncore_type *spr_msr_uncores[UNCORE_SPR_MSR_EXTRA_UNCORES] = { &spr_uncore_iio_free_running, @@ -6313,6 +6346,17 @@ static struct intel_uncore_type *spr_mmio_uncores[UNCORE_SPR_MMIO_EXTRA_UNCORES] &spr_uncore_imc_free_running, }; +static struct intel_uncore_type *spr_pci_uncores[UNCORE_SPR_PCI_EXTRA_UNCORES] = { + &spr_uncore_upi, + &spr_uncore_m3upi +}; + +int spr_uncore_units_ignore[] = { + UNCORE_SPR_UPI, + UNCORE_SPR_M3UPI, + UNCORE_IGNORE_END +}; + static void uncore_type_customized_copy(struct intel_uncore_type *to_type, struct intel_uncore_type *from_type) { @@ -6413,9 +6457,69 @@ void spr_uncore_cpu_init(void) spr_uncore_iio_free_running.num_boxes = uncore_type_max_boxes(uncore_msr_uncores, UNCORE_SPR_IIO); } +#define SPR_UNCORE_UPI_PCIID 0x3241 +#define SPR_UNCORE_UPI0_DEVFN 0x9 +#define SPR_UNCORE_M3UPI_PCIID 0x3246 +#define SPR_UNCORE_M3UPI0_DEVFN 0x29 + +static void spr_update_device_location(int type_id) +{ + struct intel_uncore_type *type; + struct pci_dev *dev = NULL; + u32 device, devfn; + u64 *ctls; + int die; + + if (type_id == UNCORE_SPR_UPI) { + type = &spr_uncore_upi; + device = SPR_UNCORE_UPI_PCIID; + devfn = SPR_UNCORE_UPI0_DEVFN; + } else if (type_id == UNCORE_SPR_M3UPI) { + type = &spr_uncore_m3upi; + device = SPR_UNCORE_M3UPI_PCIID; + devfn = SPR_UNCORE_M3UPI0_DEVFN; + } else + return; + + ctls = kcalloc(__uncore_max_dies, sizeof(u64), GFP_KERNEL); + if (!ctls) { + type->num_boxes = 0; + return; + } + + while ((dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, dev)) != NULL) { + if (devfn != dev->devfn) + continue; + + die = uncore_device_to_die(dev); + if (die < 0) + continue; + + ctls[die] = pci_domain_nr(dev->bus) << UNCORE_DISCOVERY_PCI_DOMAIN_OFFSET | + dev->bus->number << UNCORE_DISCOVERY_PCI_BUS_OFFSET | + devfn << UNCORE_DISCOVERY_PCI_DEVFN_OFFSET | + type->box_ctl; + } + + type->box_ctls = ctls; +} + int spr_uncore_pci_init(void) { - uncore_pci_uncores = uncore_get_uncores(UNCORE_ACCESS_PCI, 0, NULL); + /* + * The discovery table of UPI on some SPR variant is broken, + * which impacts the detection of both UPI and M3UPI uncore PMON. + * Use the pre-defined UPI and M3UPI table to replace. + * + * The accurate location, e.g., domain and BUS number, + * can only be retrieved at load time. + * Update the location of UPI and M3UPI. + */ + spr_update_device_location(UNCORE_SPR_UPI); + spr_update_device_location(UNCORE_SPR_M3UPI); + uncore_pci_uncores = uncore_get_uncores(UNCORE_ACCESS_PCI, + UNCORE_SPR_PCI_EXTRA_UNCORES, + spr_pci_uncores); return 0; } From patchwork Tue Nov 29 19:10:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 27416 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp521984wrr; Tue, 29 Nov 2022 11:15:58 -0800 (PST) X-Google-Smtp-Source: AA0mqf4rtgAnG/ekuqStvmdVsv+UcOmsiNn5w92eualjGpmXfLSAfbWb7BlmNJajHtOSViJhytBc X-Received: by 2002:a17:902:6a86:b0:187:722:f4db with SMTP id n6-20020a1709026a8600b001870722f4dbmr39542930plk.87.1669749358052; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id x70-20020a638649000000b0047856d87247si790727pgd.603.2022.11.29.11.15.44; Tue, 29 Nov 2022 11:15:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Z9A08qGR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236638AbiK2TLB (ORCPT + 99 others); Tue, 29 Nov 2022 14:11:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236565AbiK2TKr (ORCPT ); Tue, 29 Nov 2022 14:10:47 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62C435B844 for ; Tue, 29 Nov 2022 11:10:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669749046; x=1701285046; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=e37VGWZJt5D4i22LVtIZLifzbTAg/lau23PCib3BX/M=; b=Z9A08qGReGDcgdfyrgS6mVuxHyOHnv8Z/X8UCvSKgfFrVU1OOnZcF2ft SZwlcoDHm76cURqbgEZazAgOm+4lEqTyjbBsWewiIAmEqPIKAGxTWG/zh zaAV7iJQvqt+ffXTsf+LpQ0Ozkpx9awiQuzPuXJDDNnejuaKLPxV6Ds4z za/k0NfGycwYz9NrshEbfm3ammcFIVqBAbEFKjSwl0YqG4p8NHFzM1V+Q dp/wt/sGNkWBZZbbYZTBCnpe7FLKHOvrWLsBeDbw/E+G+xkA19U4i/vvq VaT1sVsQo2MDK1mKWZvGhGnoa+1uMnFCM7SWp7D1a8Eea7wb0rJvpwxGt Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="379490791" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="379490791" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 11:10:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="749992012" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="749992012" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga002.fm.intel.com with ESMTP; 29 Nov 2022 11:10:35 -0800 From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org Cc: steve.wahl@hpe.com, alexander.antonov@linux.intel.com, ak@linux.intel.com, eranian@google.com, namhyung@kernel.org, Kan Liang Subject: [PATCH 5/5] perf/x86/uncore: Don't WARN_ON_ONCE() for a broken discovery table Date: Tue, 29 Nov 2022 11:10:23 -0800 Message-Id: <20221129191023.936738-6-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221129191023.936738-1-kan.liang@linux.intel.com> References: <20221129191023.936738-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750859102648827129?= X-GMAIL-MSGID: =?utf-8?q?1750859102648827129?= From: Kan Liang The kernel warning message is triggered, when SPR MCC is used. [ 17.945331] ------------[ cut here ]------------ [ 17.946305] WARNING: CPU: 65 PID: 1 at arch/x86/events/intel/uncore_discovery.c:184 intel_uncore_has_discovery_tables+0x4c0/0x65c [ 17.946305] Modules linked in: [ 17.946305] CPU: 65 PID: 1 Comm: swapper/0 Not tainted 5.4.17-2136.313.1-X10-2c+ #4 It's caused by the broken discovery table of UPI. The discovery tables are from hardware. Except for dropping the broken information, there is nothing Linux can do. Using WARN_ON_ONCE() is overkilled. Use the pr_info() to replace WARN_ON_ONCE(), and specify what uncore unit is dropped and the reason. Signed-off-by: Kan Liang --- arch/x86/events/intel/uncore_discovery.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/intel/uncore_discovery.c index abb51191f5af..cb488e41807c 100644 --- a/arch/x86/events/intel/uncore_discovery.c +++ b/arch/x86/events/intel/uncore_discovery.c @@ -128,13 +128,21 @@ uncore_insert_box_info(struct uncore_unit_discovery *unit, unsigned int *box_offset, *ids; int i; - if (WARN_ON_ONCE(!unit->ctl || !unit->ctl_offset || !unit->ctr_offset)) + if (!unit->ctl || !unit->ctl_offset || !unit->ctr_offset) { + pr_info("Invalid address is detected for uncore type %d box %d, " + "Disable the uncore unit.\n", + unit->box_type, unit->box_id); return; + } if (parsed) { type = search_uncore_discovery_type(unit->box_type); - if (WARN_ON_ONCE(!type)) + if (!type) { + pr_info("A spurious uncore type %d is detected, " + "Disable the uncore type.\n", + unit->box_type); return; + } /* Store the first box of each die */ if (!type->box_ctrl_die[die]) type->box_ctrl_die[die] = unit->ctl; @@ -169,8 +177,12 @@ uncore_insert_box_info(struct uncore_unit_discovery *unit, ids[i] = type->ids[i]; box_offset[i] = type->box_offset[i]; - if (WARN_ON_ONCE(unit->box_id == ids[i])) + if (unit->box_id == ids[i]) { + pr_info("Duplicate uncore type %d box ID %d is detected, " + "Drop the duplicate uncore unit.\n", + unit->box_type, unit->box_id); goto free_ids; + } } ids[i] = unit->box_id; box_offset[i] = unit->ctl - type->box_ctrl;