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(fttx-pool-217.61.157.144.bambit.de [217.61.157.144]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id 62797122713; Sun, 27 Nov 2022 11:41:53 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Greg Kroah-Hartman , Matthias Brugger , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Krzysztof Kozlowski , AngeloGioacchino Del Regno Subject: [next v7 1/8] dt-bindings: phy: mediatek,tphy: add support for mt7986 Date: Sun, 27 Nov 2022 12:41:35 +0100 Message-Id: <20221127114142.156573-2-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221127114142.156573-1-linux@fw-web.de> References: <20221127114142.156573-1-linux@fw-web.de> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750650039700689745?= X-GMAIL-MSGID: =?utf-8?q?1750650039700689745?= From: Frank Wunderlich Add compatible string for mt7986. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: Chunfeng Yun Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger --- Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml index 5613cc5106e3..230a17f24966 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml @@ -79,6 +79,7 @@ properties: - enum: - mediatek,mt2712-tphy - mediatek,mt7629-tphy + - mediatek,mt7986-tphy - mediatek,mt8183-tphy - mediatek,mt8186-tphy - mediatek,mt8192-tphy From patchwork Sun Nov 27 11:41:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 26332 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp5072848wrr; Sun, 27 Nov 2022 03:43:12 -0800 (PST) X-Google-Smtp-Source: AA0mqf4RHFwHBjzh1whsDFNhlaQQnTzFz6ruR9KRSEqx4qDTOrssMSL59+nkcKsw2YqZkeiE48Yi X-Received: by 2002:a17:902:d413:b0:189:85c3:f26d with SMTP id b19-20020a170902d41300b0018985c3f26dmr1279856ple.101.1669549392260; Sun, 27 Nov 2022 03:43:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669549392; cv=none; d=google.com; s=arc-20160816; b=YmyIUqazYkei9tXGtjV3oftiMgVrU8Q0tNPgcjLN3cGkAo2XNurPjWp9XRJNp9H9ZX SwTztaCdvBUwN85tIOWd6OgeQ2pZ7RZIgmrNRtxdgg7Yxz5npo1pQ7nvOat4bkQUO4ce JZ9NQANojh7MOa7RVbbshEHaF4lmQFUrKcAN3Ggy8bfaihkrOIJ58X31rgfh9xOgeaGs xO+R9n8xkgLvXYLY2RspywV5/NbKvbVI09dtQwGrrIhSmiEjMLQxk6pX56XMSXAzDlkn Ng+q44cLAVzLLWPoh5pagD20iY1pXSnoYph9q1+5DqAw5+q+sc75u9fmUiiSo9Mvjobn PmJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=In9W5EgdkU7a4QBxzIaCDmagtpQjNfrjtKnBMS0D15U=; b=FBETIwVTti7jmpS24/VguH9FCGYVuOirFG880fO+PYz6xmGdzL1l5j03h5Ye9Mt8en 2f4YsiZBum27pqRbj2F+N1QsbUgewmDLT2AztoXpQeSyGoqHsRlWekKXKxw5mfr0HW+y sFQKFcBSjK4nB3CD/1TEEWtyPsRAoOrRChWw136gQ8LGzRe8IsljtL8yYKbM7/6En940 26lLAwS+TKOoXY+9JTRwVmhQatb8p4J28HmMMWPfDoH+fpuQY+bgUNSovqX/t4/ReQ9r IiftrLgRjb1YEBzJj26D8+OYuVSltpnaoeqDBw3X9RSrDzvV8osyL+m8tCj227WGCA1E zz9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=Udff+wwM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-217.61.157.144.bambit.de [217.61.157.144]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id BB5341226D4; Sun, 27 Nov 2022 11:41:53 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Greg Kroah-Hartman , Matthias Brugger , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Krzysztof Kozlowski , AngeloGioacchino Del Regno Subject: [next v7 2/8] dt-bindings: usb: mtk-xhci: add support for mt7986 Date: Sun, 27 Nov 2022 12:41:36 +0100 Message-Id: <20221127114142.156573-3-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221127114142.156573-1-linux@fw-web.de> References: <20221127114142.156573-1-linux@fw-web.de> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750649423435478193?= X-GMAIL-MSGID: =?utf-8?q?1750649423435478193?= From: Frank Wunderlich Add compatible string for mt7986. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: Chunfeng Yun Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger --- Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index 939623867a64..a3c37944c630 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -28,6 +28,7 @@ properties: - mediatek,mt7622-xhci - mediatek,mt7623-xhci - mediatek,mt7629-xhci + - mediatek,mt7986-xhci - mediatek,mt8173-xhci - mediatek,mt8183-xhci - mediatek,mt8186-xhci From patchwork Sun Nov 27 11:41:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 26334 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp5073222wrr; Sun, 27 Nov 2022 03:44:30 -0800 (PST) X-Google-Smtp-Source: AA0mqf4A5H4s3pRJ+ZjnXdxfG9tV2rvKVLD05Oihnqtco44Suf62Nmo22Yz9osbw+bQWEeodnWq9 X-Received: by 2002:a17:903:2055:b0:17f:b05:bbc4 with SMTP id q21-20020a170903205500b0017f0b05bbc4mr27229692pla.41.1669549469715; Sun, 27 Nov 2022 03:44:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669549469; cv=none; d=google.com; s=arc-20160816; b=pnJk0RUHXi67MnzEPleGlzKMt779jtbGjS/nsZdrMDDAL3Yl8X3XlhXN1sq2tdWLxU PJa+F0nBpEJesio48BkGz3EDy8/6jr1ePGk7fPFKu26z2AYcnrKDKT9eMZI7akFBX9gN nuPXrXYX4k+8OpjCGItqDELYvxutZkoiM6RBoFBRuMcABrCY9BNdHbQc+Rh+qXdSxpe8 YJL3xHRf2HboXRpXJ/ypbo0pXrHPQfTL4gvkmcMVNqQnXFNFBYRcLA/pA0BD2mUm9hE6 FewFwtXe3pq6/TAVPpf9/BS129c81R3iJxhABc0w1TV9p/prxqhAZPs7QO3xEEWPgg5c K2xw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WALMBuY7INShNtkqIsTso2pECzqOAjCdqYrA13JcDXw=; b=QyaFFpL+tO3+bfAOoSccrg1gEgmXAnjzPbB9IgKLEIDsUW2yM8W5ATMdC/38CStTSA FLYkv9pskR0Egy90G6WwehKDcNytAXaN93nYlcoKsCjQxOIMORIMDWaIQun74InNFMz7 3rcE/+RSy/6sW5+NQdpU3NINSnF4fuSQtRyPwT8yAhzHjmJ0wpXmfDN2IsbuGfXx/84K exw8ILwP5YJLVDT/6rv4oBV+O9H3RNeP2BwVoeVEUCe+O+9xGRtO7L6VWqTGeulbgYem 5D2Kf6SYR6wU5h6p45kMTzQI3EUBDWjHFt8VTB/NpolcMwtfpDWpJcnhyw1/AH5fJD50 hYyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=XuxAvDBU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-217.61.157.144.bambit.de [217.61.157.144]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id 1C7EE122713; Sun, 27 Nov 2022 11:41:54 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Greg Kroah-Hartman , Matthias Brugger , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, AngeloGioacchino Del Regno Subject: [next v7 3/8] dt-bindings: PCI: mediatek-gen3: add SoC based clock config Date: Sun, 27 Nov 2022 12:41:37 +0100 Message-Id: <20221127114142.156573-4-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221127114142.156573-1-linux@fw-web.de> References: <20221127114142.156573-1-linux@fw-web.de> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750649505030130552?= X-GMAIL-MSGID: =?utf-8?q?1750649505030130552?= From: Frank Wunderlich The PCIe driver covers different SOC which needing different clock configs. Define them based on compatible. Signed-off-by: Frank Wunderlich Reviewed-by: Rob Herring Acked-by: Jianjun Wang Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger --- v2: - fix typo in mediatek,mt8192-pcie v3: - remove contains to match only if compatible is no fallback tested with series "Add driver nodes for MT8195 SoC" and mt7986 pcie-nodes, dtbs_check is now clean --- .../bindings/pci/mediatek-pcie-gen3.yaml | 47 ++++++++++++++----- 1 file changed, 35 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index bc90f0ec7bd9..ef5cc1fc4d10 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -43,9 +43,6 @@ description: |+ each set has its own address for MSI message, and supports 32 MSI vectors to generate interrupt. -allOf: - - $ref: /schemas/pci/pci-bus.yaml# - properties: compatible: oneOf: @@ -90,15 +87,7 @@ properties: maxItems: 6 clock-names: - items: - - const: pl_250m - - const: tl_26m - - const: tl_96m - - const: tl_32k - - const: peri_26m - - enum: - - top_133m # for MT8192 - - peri_mem # for MT8188/MT8195 + maxItems: 6 assigned-clocks: maxItems: 1 @@ -147,6 +136,40 @@ required: - '#interrupt-cells' - interrupt-controller +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + - if: + properties: + compatible: + const: mediatek,mt8192-pcie + then: + properties: + clock-names: + items: + - const: pl_250m + - const: tl_26m + - const: tl_96m + - const: tl_32k + - const: peri_26m + - const: top_133m + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8188-pcie + - mediatek,mt8195-pcie + then: + properties: + clock-names: + items: + - const: pl_250m + - const: tl_26m + - const: tl_96m + - const: tl_32k + - const: peri_26m + - const: peri_mem + unevaluatedProperties: false examples: From patchwork Sun Nov 27 11:41:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 26331 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp5072782wrr; Sun, 27 Nov 2022 03:42:59 -0800 (PST) X-Google-Smtp-Source: AA0mqf4QLqEQORgV3V9CSiCx6emjpMgavBCi3VnjjgW2o3GILGIJ/nPNeB0KhhSjpVAVtu/7p6sn X-Received: by 2002:a17:902:c283:b0:189:89e2:540d with SMTP id i3-20020a170902c28300b0018989e2540dmr363028pld.73.1669549378862; Sun, 27 Nov 2022 03:42:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669549378; cv=none; d=google.com; s=arc-20160816; b=mIqmGp+GEeyJ1HJ11wbIvXY0zw4TwnFwfADdTZ0iaCX5LMtsyutd+oOjxBVX7TYhwf EZiEov14CrI1fKm2PVD5lSC6i9iAutYWTC0E2Qc39i8gV4FYwpYq/jh81Ezxhgk+W5op xSKLC22UUT4CDBgVlcSfLqPWQcgWdBkjOptwfRUJXrEGtB/vYmABvsHVnvTXP2j5Zpya AB3FxU9A0OgSmOrRDy6r/ZnetpiJzyQDUVzosKnVFdY35TVdlne9UGm6N0xO2o06WVIx ul8jRbpDC2P2dJfQAAy6ZvYFIo0uX79lXd42yQGtb3spannnY94jODSWCphET8mMXqQ3 Lacw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EJOqtkf4M1ebGM5Xi7j4/YDkzCfTWa8PiFMyLTAYIew=; b=Ahx5/d2anwhdrh2+sMJbs8uJOkzIuSYuaQD6X2AcAPS0DqW0pWQlwajlP2543n24ZI LZ2WK3FasR+bBO1M48zNk3pR7DJE8LEjxTRrKUij92jkwmUhUOkK6TWywuS4ZXSkYp5c o4Mv7+0wSxb9T1OPQnj0bNydc4/7B2VjITxyQMs3WlTgM8vwv6Sm6uCWWjj6jG91NQYy kq8RDRkHRMgMLAzB7oyiMrNP5+7XVWf3cT/vW2tFvDqXrD/9hnlT4cWdAVWbS0Qkx2xJ 371GZBssTNJ0ZmPplAlXPt8UAEzVJLb8CN20SW4GeThvsBcLs1Ibd+BKMZt0JW6nbEbk degw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=ahuA7yrm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-217.61.157.144.bambit.de [217.61.157.144]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id 6D0301226D4; Sun, 27 Nov 2022 11:41:54 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Greg Kroah-Hartman , Matthias Brugger , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org Subject: [next v7 4/8] dt-bindings: PCI: mediatek-gen3: add support for mt7986 Date: Sun, 27 Nov 2022 12:41:38 +0100 Message-Id: <20221127114142.156573-5-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221127114142.156573-1-linux@fw-web.de> References: <20221127114142.156573-1-linux@fw-web.de> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750649409223057931?= X-GMAIL-MSGID: =?utf-8?q?1750649409223057931?= From: Frank Wunderlich Add compatible string and clock-definition for mt7986. It needs 4 clocks for PCIe, define them in binding. Signed-off-by: Frank Wunderlich Reviewed-by: Rob Herring Acked-by: Jianjun Wang Reviewed-by: Matthias Brugger --- v2: - squashed patch 2+3 (compatible and clock definition) --- .../bindings/pci/mediatek-pcie-gen3.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index ef5cc1fc4d10..7e8c7a2a5f9b 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -48,6 +48,7 @@ properties: oneOf: - items: - enum: + - mediatek,mt7986-pcie - mediatek,mt8188-pcie - mediatek,mt8195-pcie - const: mediatek,mt8192-pcie @@ -84,9 +85,11 @@ properties: enum: [ phy, mac ] clocks: + minItems: 4 maxItems: 6 clock-names: + minItems: 4 maxItems: 6 assigned-clocks: @@ -169,6 +172,20 @@ allOf: - const: tl_32k - const: peri_26m - const: peri_mem + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt7986-pcie + then: + properties: + clock-names: + items: + - const: pl_250m + - const: tl_26m + - const: peri_26m + - const: top_133m unevaluatedProperties: false From patchwork Sun Nov 27 11:41:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 26335 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp5074794wrr; Sun, 27 Nov 2022 03:50:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf6JQ/4hlO+qaZ/JwFLtAq/SsIxivnFRNmmzkjZnbfaIpT/8vJ1rXX2lxj8ezl/w+wjb2OWs X-Received: by 2002:a17:903:31d5:b0:185:4e4c:3483 with SMTP id v21-20020a17090331d500b001854e4c3483mr28697368ple.163.1669549853885; Sun, 27 Nov 2022 03:50:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669549853; cv=none; d=google.com; s=arc-20160816; b=AkH/7q/99J6njgFQaAIJUGYRBeGFB7a47p+iv1dVuS4HTyRwC5SY6veTtHURkwWBic bLmiGNBNihLEDZd4BIMpdT8ZfDof61LdSJmnXG8AwcxrI3FmO+AmfO76+NA/Toeir3DI eVW8O7ZKPIMQ8ingCnMXELHlqHdo7q/oXteGmTsFllGAogtK6Xi7jfphCUcMmc1K41Kj miuxwgbIZ/1S9Fvcvz3zf4QE6YMuD9C5lyNc5uDTQdXZmofoYVYvfsNqbJ/S7RsB3MEv 77xY8FvLQZTv3glGXsetgn/Et6R27nMLspOjaPhQlZ/Oq6jZh92Nx4Jo76UobBb3z4nt sGng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=NdrLgZ7kHEHZCcXHBTGh4SDP3w9h0DuG6QN4UIa1As8=; b=U3PYeepbJZFBSvey4yB/LkDAU6WjUwGD8wlqTo2xfD7Mwj7PKIOMaAkPUPG6026f/B B0Wt4TLGqrvPSFsxhHnoA+WIdLnokI9tWpyfD+pvQJBuaRrc7DigRSH1bHwXmKhWcdVm ZBUGJ+m0gaSkOCZSBCrkaauswopnw4zF/HvGq3O/AKkXFKBdERPFtnVhEbvvIZMDgbhO HmkKbN8HOzpZLKGhKBIS/gRgOCte0L+PahUUqVCBVRgilNFuRafMibOAzQvDH82jRovz 9LkhYyL9xZbzEgAspi6bEZG+QmCbO2g7ddvxnjlssJkFvC15hAtt/j+MkBZ6ER+3ldPP AGvw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=Dgu9lhCZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-217.61.157.144.bambit.de [217.61.157.144]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id B9E15122713; Sun, 27 Nov 2022 11:41:54 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Greg Kroah-Hartman , Matthias Brugger , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Sam Shih Subject: [next v7 5/8] arm64: dts: mt7986: add usb related device nodes Date: Sun, 27 Nov 2022 12:41:39 +0100 Message-Id: <20221127114142.156573-6-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221127114142.156573-1-linux@fw-web.de> References: <20221127114142.156573-1-linux@fw-web.de> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750649907673234280?= X-GMAIL-MSGID: =?utf-8?q?1750649907673234280?= From: Sam Shih This patch adds USB support for MT7986. Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich Reviewed-by: Chunfeng Yun --- changes compared to sams original version: - reorder xhci-clocks based on yaml binding v5: - update ranges/reg of usb-phy - not added RB from AngeloGioacchino for v4 because of these changes v6: - remove unused usb regulators - remove 3v3 regulator (will be added with emmc-patch) --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 8 +++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 55 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 8 +++ 3 files changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 9b83925893b7..58089fcf4d16 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -140,6 +140,10 @@ &spi1 { status = "okay"; }; +&ssusb { + status = "okay"; +}; + &switch { ports { #address-cells = <1>; @@ -201,6 +205,10 @@ &uart2 { status = "okay"; }; +&usb_phy { + status = "okay"; +}; + &wifi { status = "okay"; pinctrl-names = "default", "dbdc"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 0e9406fc63e2..9ff2968152ae 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -323,6 +323,61 @@ spi1: spi@1100b000 { status = "disabled"; }; + ssusb: usb@11200000 { + compatible = "mediatek,mt7986-xhci", + "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x2e00>, + <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = ; + clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>, + <&infracfg CLK_INFRA_IUSB_CK>, + <&infracfg CLK_INFRA_IUSB_133_CK>, + <&infracfg CLK_INFRA_IUSB_66M_CK>, + <&topckgen CLK_TOP_U2U3_XHCI_SEL>; + clock-names = "sys_ck", + "ref_ck", + "mcu_ck", + "dma_ck", + "xhci_ck"; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>, + <&u2port1 PHY_TYPE_USB2>; + status = "disabled"; + }; + + usb_phy: t-phy@11e10000 { + compatible = "mediatek,mt7986-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x11e10000 0x1700>; + status = "disabled"; + + u2port0: usb-phy@0 { + reg = <0x0 0x700>; + clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>, + <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + }; + + u3port0: usb-phy@700 { + reg = <0x700 0x900>; + clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>; + clock-names = "ref"; + #phy-cells = <1>; + }; + + u2port1: usb-phy@1000 { + reg = <0x1000 0x700>; + clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>, + <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + }; + }; + ethsys: syscon@15000000 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts index 243760cd3011..188ce82ae56c 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -167,10 +167,18 @@ &spi1 { status = "okay"; }; +&ssusb { + status = "okay"; +}; + &uart0 { status = "okay"; }; +&usb_phy { + status = "okay"; +}; + &wifi { status = "okay"; pinctrl-names = "default", "dbdc"; From patchwork Sun Nov 27 11:41:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 26337 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp5075266wrr; Sun, 27 Nov 2022 03:52:30 -0800 (PST) X-Google-Smtp-Source: AA0mqf6oG3d9cXYZpIfhtwxDAsub5uIe86VhG63+g59TwLFEyZXBAZz13wmZPuexUltGkMgc9wyK X-Received: by 2002:a63:7353:0:b0:477:467e:357f with SMTP id d19-20020a637353000000b00477467e357fmr23365317pgn.263.1669549950096; Sun, 27 Nov 2022 03:52:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669549950; cv=none; d=google.com; s=arc-20160816; b=SouPVrPrOCnJkH3h1kKerRiZCXes5V7b10TWsy6IUf4Xp9Qez+tver/7ZkQgZtd1ut d1/QQyHHOj52kZw+H4NnpnNcWY4FoCOj8dLWcUj+1yOc+JDLMvaqpTUW6+k+pzUy6u8d 29ZOrXZ03tXfOX75xQSp5387KDoebNDbBeEadAaI7HQ4QPVTIIp9FEZeUhmZaVL7Olim OJeESS2m5P9bC9kshkZfr6v2Qr9Sw4boRaJV2IeksgrOovEYEHFa4/GQXh/QezgblNDM 0zWVqsntKyZIVUWOf2Cm9M4OQ30MBBz0YZFa1lIGC5WivE/UNpcjmMUppv9lKULcspMP iNXA== ARC-Message-Signature: i=1; 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(fttx-pool-217.61.157.144.bambit.de [217.61.157.144]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id 17C131226D4; Sun, 27 Nov 2022 11:41:55 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Greg Kroah-Hartman , Matthias Brugger , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Sam Shih Subject: [next v7 6/8] arm64: dts: mt7986: add mmc related device nodes Date: Sun, 27 Nov 2022 12:41:40 +0100 Message-Id: <20221127114142.156573-7-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221127114142.156573-1-linux@fw-web.de> References: <20221127114142.156573-1-linux@fw-web.de> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750650008334716421?= X-GMAIL-MSGID: =?utf-8?q?1750650008334716421?= From: Sam Shih This patch adds mmc support for MT7986. Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich --- v2: - update mmc-node because clocks changed v3: - fix pullups/pulldowns for mt7986a-rfb to have generic bias-pull-* v6: - add 3v3 regulator in mt7986a-rfb (was in usb patch before) - dropped AngeloGioacchino RB because of this change --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 96 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 +++ 2 files changed, 111 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 58089fcf4d16..c7a2ac764a30 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -5,6 +5,8 @@ */ /dts-v1/; +#include + #include "mt7986a.dtsi" / { @@ -23,6 +25,24 @@ memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x40000000>; }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; }; &crypto { @@ -58,7 +78,83 @@ switch: switch@0 { }; }; +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + hs400-ds-delay = <0x14014>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + no-sd; + no-sdio; + status = "okay"; +}; + &pio { + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 9ff2968152ae..9c552442c02d 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -346,6 +346,21 @@ ssusb: usb@11200000 { status = "disabled"; }; + mmc0: mmc@11230000 { + compatible = "mediatek,mt7986-mmc"; + reg = <0 0x11230000 0 0x1000>, + <0 0x11c20000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>, + <&infracfg CLK_INFRA_MSDC_HCK_CK>, + <&infracfg CLK_INFRA_MSDC_CK>, + <&infracfg CLK_INFRA_MSDC_133M_CK>, + <&infracfg CLK_INFRA_MSDC_66M_CK>; + clock-names = "source", "hclk", "source_cg", "bus_clk", + "sys_cg"; + status = "disabled"; + }; + usb_phy: t-phy@11e10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; From patchwork Sun Nov 27 11:41:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 26338 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp5075420wrr; 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(fttx-pool-217.61.157.144.bambit.de [217.61.157.144]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id 78A68122713; Sun, 27 Nov 2022 11:41:55 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Greg Kroah-Hartman , Matthias Brugger , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Sam Shih , Jieyy Yang , AngeloGioacchino Del Regno Subject: [next v7 7/8] arm64: dts: mt7986: add pcie related device nodes Date: Sun, 27 Nov 2022 12:41:41 +0100 Message-Id: <20221127114142.156573-8-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221127114142.156573-1-linux@fw-web.de> References: <20221127114142.156573-1-linux@fw-web.de> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750650039981657522?= X-GMAIL-MSGID: =?utf-8?q?1750650039981657522?= From: Sam Shih This patch adds PCIe support for MT7986. Signed-off-by: Jieyy Yang Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- changes compared to sams original version: - add clock-names to pcie node - update clocks to new binding --- bindings-patches: https://patchwork.kernel.org/project/linux-mediatek/list/?series=690172 --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 16 ++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 52 ++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index c7a2ac764a30..4f18b4a9a8c8 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -93,6 +93,15 @@ &mmc0 { non-removable; no-sd; no-sdio; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { status = "okay"; }; @@ -155,6 +164,13 @@ conf-rst { }; }; + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_wake", "pcie_pereset"; + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 9c552442c02d..f6e980771b69 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { compatible = "mediatek,mt7986a"; @@ -361,6 +362,57 @@ mmc0: mmc@11230000 { status = "disabled"; }; + pcie: pcie@11280000 { + compatible = "mediatek,mt7986-pcie", + "mediatek,mt8192-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0x00 0x11280000 0x00 0x4000>; + reg-names = "pcie-mac"; + interrupts = ; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0x00 0x20000000 0x00 + 0x20000000 0x00 0x10000000>; + clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>, + <&infracfg CLK_INFRA_IPCIE_CK>, + <&infracfg CLK_INFRA_IPCIER_CK>, + <&infracfg CLK_INFRA_IPCIEB_CK>; + clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m"; + status = "disabled"; + + phys = <&pcie_port PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + pcie_intc: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie_phy: t-phy@11c00000 { + compatible = "mediatek,mt7986-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + pcie_port: pcie-phy@11c00000 { + reg = <0 0x11c00000 0 0x20000>; + clocks = <&clk40m>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + usb_phy: t-phy@11e10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; From patchwork Sun Nov 27 11:41:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 26336 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp5074796wrr; Sun, 27 Nov 2022 03:50:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf4kwsOLRPo0lygu8D7CaTlb2wztzdQlyCm8Vyx5lQITzBsY/izFjaUgfMTshx9vAzF5vUMW X-Received: by 2002:a17:902:e484:b0:189:3b9d:59bd with SMTP id i4-20020a170902e48400b001893b9d59bdmr23182898ple.81.1669549853951; Sun, 27 Nov 2022 03:50:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669549853; cv=none; d=google.com; s=arc-20160816; b=lGMzJyP4/2K9ofu0gCrwTF5Ewr8szEH2vQtTBequPZhef4XRdh42lnnjvjolbbIcuD CW5wAUZNODcN1WLh4mfFVIkFe5LbR7zPIIfcxZsMquKFJ8W0+jbfYu2JD8EyASsxlUaw FftdBSt6ugyb2fa7mfLq+RbBp3c7QuKaC7hFVeOpia0Di9gJxocUOAmJRdkSDy8ly5Ff 8FJEUCciUSwNniydYRjWAEAbdHzXBvOs6VW1mRYnGaTDXuaEz2414gAU4mL6Lr9yBJGw 5e+q2+XLMllEHxktu4h1IcxXM/2js7iONvQZBLE+1WD0rVa4EzPYCDTM9lEbdZBhHDKA nXow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xXb5cyE2qS3zMsbew6j5YkfvhLAL3KMYFcocU0qq5Fk=; b=oB9QVH2m1mj7tky5jhzgjgS9W61WNyUm94cI/1elTORLWeLS9YGUYmLVbZg7Wh5Jgk tyvks5b9r39sXtQhXwk8iSnZq/zt5V1posRv1jfoWfrzE2oFFxSeFP/hSuJO7Wb64DX3 eGbM/lNtS2qC0/Aq6EUOubt67Mu3K5rQVPbNbR5cKBt57Y67WsSewNHvpiR/WelZhiIN /ZHygwnsA5CnmTgMjtwxosxxs5rXcQNkPe3BaEAEzvRmFH+zL2cJI1avfwMH3+twANxe vSpjamVover8lpnCkjPmk0GDXZ00/7/ft7EzTwvqQKyz9iT/9wd5fawTs0UbmZeE4OFz 4Inw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b="Cwqup+v/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-217.61.157.144.bambit.de [217.61.157.144]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id CE4321226D4; Sun, 27 Nov 2022 11:41:55 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Greg Kroah-Hartman , Matthias Brugger , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org Subject: [next v7 8/8] arm64: dts: mt7986: add Bananapi R3 Date: Sun, 27 Nov 2022 12:41:42 +0100 Message-Id: <20221127114142.156573-9-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221127114142.156573-1-linux@fw-web.de> References: <20221127114142.156573-1-linux@fw-web.de> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750649907613191121?= X-GMAIL-MSGID: =?utf-8?q?1750649907613191121?= From: Frank Wunderlich Add support for Bananapi R3 SBC. - SD/eMMC support (switching first 4 bits of data-bus with sw6/D) - SPI-NAND/NOR support (switched CS by sw5/C) - all rj45 ports and both SFP working (eth1/lan4) - all USB-Ports + SIM-Slot tested - i2c and all uarts tested - wifi tested (with eeprom calibration data) The device can boot from all 4 storage options. Both, SPI and MMC, can be switched using hardware switches on the board, see https://wiki.banana-pi.org/Banana_Pi_BPI-R3#Jumper_setting Signed-off-by: Frank Wunderlich --- changes: v7: - squashed overlay-patch and converted sd/emmc dts to overlay too - moved mmc-regulators to base dts - changed common dtsi to (base dts) and overlay extension to dtso v6: - drop usb 5v regulator from bpi-r3 based on chunfengs response it is only needed if regulator is switched (like for otg), usb works without it. v4: - add PCIe nodes - fix sfp-properties of sfp-1 (need to be plural) thx to Denis Odintsov for this v3: - rename factory-key to reset-key - add dcin regulator and add it as input for 3v3 (with renaming) - remove memory-node - dropped wifi eeprom (calibration) data - move mmc0 pinctrl to common dtsi and drop sdcard comment - change mmc pull-up/down to have generic bias-pull* v2: - remove pcie to be added later (discussion about clocks) - some fixes based on suggestions on ML - add key suffix like it's done in mt7622-bpi-r64 devicetree - add dash in sfp node names - use reg as unit for switch-node - drop "-3-4" suffix from i2c-pins node name - fix order in Makefile --- arch/arm64/boot/dts/mediatek/Makefile | 5 + .../mt7986a-bananapi-bpi-r3-emmc.dtso | 30 ++ .../mt7986a-bananapi-bpi-r3-nand.dtso | 55 +++ .../mediatek/mt7986a-bananapi-bpi-r3-nor.dtso | 68 +++ .../mediatek/mt7986a-bananapi-bpi-r3-sd.dtso | 24 + .../dts/mediatek/mt7986a-bananapi-bpi-r3.dts | 448 ++++++++++++++++++ 6 files changed, 630 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 813e735c5b96..d5cd7b3e09cf 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -8,6 +8,11 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-emmc.dtbo +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nand.dtbo +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nor.dtbo +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso new file mode 100644 index 000000000000..c15f2f5760ed --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Author: Sam.Shih + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + model = "Bananapi BPI-R3 (emmc)"; + + fragment@0 { + target-path = "/soc/mmc@11230000"; + __overlay__ { + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + hs400-ds-delay = <0x14014>; + non-removable; + no-sd; + no-sdio; + status = "okay"; + }; + }; +}; + diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso new file mode 100644 index 000000000000..15ee8c568f3c --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Authors: Daniel Golle + * Frank Wunderlich + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + + fragment@0 { + target-path = "/soc/spi@1100a000"; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spi_nand: spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "reserved"; + reg = <0x80000 0x300000>; + }; + + partition@380000 { + label = "fip"; + reg = <0x380000 0x200000>; + read-only; + }; + + partition@580000 { + label = "ubi"; + reg = <0x580000 0x7a80000>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso new file mode 100644 index 000000000000..84aa229e80f3 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Authors: Daniel Golle + * Frank Wunderlich + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + + fragment@0 { + target-path = "/soc/spi@1100a000"; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + label = "reserved"; + reg = <0x20000 0x20000>; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x40000 0x40000>; + }; + + partition@80000 { + label = "reserved2"; + reg = <0x80000 0x80000>; + }; + + partition@100000 { + label = "fip"; + reg = <0x100000 0x80000>; + read-only; + }; + + partition@180000 { + label = "recovery"; + reg = <0x180000 0xa80000>; + }; + + partition@c00000 { + label = "fit"; + reg = <0xc00000 0x1400000>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso new file mode 100644 index 000000000000..08af778d8adc --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Author: Sam.Shih + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + model = "Bananapi BPI-R3 (sdmmc)"; + + fragment@0 { + target-path = "/soc/mmc@11230000"; + __overlay__ { + bus-width = <4>; + max-frequency = <52000000>; + cap-sd-highspeed; + status = "okay"; + }; + }; +}; + diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts new file mode 100644 index 000000000000..618d3bb2f32f --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts @@ -0,0 +1,448 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Authors: Sam.Shih + * Frank Wunderlich + * Daniel Golle + */ + +/dts-v1/; +#include +#include +#include +#include + +#include "mt7986a.dtsi" + +/ { + model = "Bananapi BPI-R3"; + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + + aliases { + serial0 = &uart0; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + dcin: regulator-12vd { + compatible = "regulator-fixed"; + regulator-name = "12vd"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-boot-on; + regulator-always-on; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset-key { + label = "reset"; + linux,code = ; + gpios = <&pio 9 GPIO_ACTIVE_LOW>; + }; + + wps-key { + label = "wps"; + linux,code = ; + gpios = <&pio 10 GPIO_ACTIVE_LOW>; + }; + }; + + /* i2c of the left SFP cage (wan) */ + i2c_sfp1: i2c-gpio-0 { + compatible = "i2c-gpio"; + sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* i2c of the right SFP cage (lan) */ + i2c_sfp2: i2c-gpio-1 { + compatible = "i2c-gpio"; + sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + leds { + compatible = "gpio-leds"; + + green_led: led-0 { + color = ; + function = LED_FUNCTION_POWER; + gpios = <&pio 69 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + blue_led: led-1 { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&pio 86 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1.8vd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + vin-supply = <&dcin>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3.3vd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + vin-supply = <&dcin>; + }; + + /* left SFP cage (wan) */ + sfp1: sfp-1 { + compatible = "sff,sfp"; + i2c-bus = <&i2c_sfp1>; + los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; + }; + + /* right SFP cage (lan) */ + sfp2: sfp-2 { + compatible = "sff,sfp"; + i2c-bus = <&i2c_sfp2>; + los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>; + }; +}; + +&crypto { + status = "okay"; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "2500base-x"; + sfp = <&sfp1>; + managed = "in-band-status"; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&mdio { + switch: switch@31 { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; + }; +}; + +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + +&pio { + i2c_pins: i2c-pins { + mux { + function = "i2c"; + groups = "i2c"; + }; + }; + + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_pereset"; + }; + }; + + spi_flash_pins: spi-flash-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + spic_pins: spic-pins { + mux { + function = "spi"; + groups = "spi1_0"; + }; + }; + + uart1_pins: uart1-pins { + mux { + function = "uart"; + groups = "uart1_rx_tx"; + }; + }; + + uart2_pins: uart2-pins { + mux { + function = "uart"; + groups = "uart2_0_rx_tx"; + }; + }; + + wf_2g_5g_pins: wf-2g-5g-pins { + mux { + function = "wifi"; + groups = "wf_2g", "wf_5g"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + wf_dbdc_pins: wf-dbdc-pins { + mux { + function = "wifi"; + groups = "wf_dbdc"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + wf_led_pins: wf-led-pins { + mux { + function = "led"; + groups = "wifi_led"; + }; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + +&ssusb { + status = "okay"; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "wan"; + }; + + port@1 { + reg = <1>; + label = "lan0"; + }; + + port@2 { + reg = <2>; + label = "lan1"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + }; + + port@4 { + reg = <4>; + label = "lan3"; + }; + + port5: port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "2500base-x"; + sfp = <&sfp2>; + managed = "in-band-status"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&trng { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; + pinctrl-names = "default", "dbdc"; + pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>; + pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>; +}; +