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[46.135.44.69]) by smtp.gmail.com with ESMTPSA id v11-20020a5d4b0b000000b002368f6b56desm4207406wrq.18.2022.11.25.03.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 03:19:38 -0800 (PST) Sender: Tomeu Vizoso From: Tomeu Vizoso Cc: Tomeu Vizoso , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Amlogic Meson SoC support), linux-amlogic@lists.infradead.org (open list:ARM/Amlogic Meson SoC support), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/6] dt-bindings: reset: meson-g12a: Add missing NNA reset Date: Fri, 25 Nov 2022 12:19:14 +0100 Message-Id: <20221125111921.37261-2-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221125111921.37261-1-tomeu.vizoso@collabora.com> References: <20221125111921.37261-1-tomeu.vizoso@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750467099078685094?= X-GMAIL-MSGID: =?utf-8?q?1750467099078685094?= Doesn't appear in the TRM I have, but it is used by the downstream galcore driver. Signed-off-by: Tomeu Vizoso Acked-by: Neil Armstrong --- include/dt-bindings/reset/amlogic,meson-g12a-reset.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h index 6d487c5eba2c..45f6b8a951d0 100644 --- a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h +++ b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h @@ -69,7 +69,9 @@ #define RESET_PARSER_FETCH 72 #define RESET_CTL 73 #define RESET_PARSER_TOP 74 -/* 75-77 */ +/* 75 */ +#define RESET_NNA 76 +/* 77 */ #define RESET_DVALIN 78 #define RESET_HDMITX 79 /* 80-95 */ From patchwork Fri Nov 25 11:19:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 25934 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3939464wrr; Fri, 25 Nov 2022 03:25:17 -0800 (PST) X-Google-Smtp-Source: AA0mqf4zJJ5EG8ZM8ziOBOY/sA39kAScQJwx4VFxEDXBldRKNQdGFoKgbkDYe2bmAtYgPeTNrc3l X-Received: by 2002:a05:6402:5519:b0:461:e3f2:38bc with SMTP id fi25-20020a056402551900b00461e3f238bcmr24529416edb.149.1669375517129; Fri, 25 Nov 2022 03:25:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669375517; cv=none; d=google.com; s=arc-20160816; b=Ghi0mWQf0QB61jmbfiMNpKLA2wICd8+lS4me+K+zhI1BiPmU6dZXelqOBzdHE9fF3/ JcTq8Qkrye21hm0jI+t03+ZSpXF4jvyG4/epex1xIge8n2Th8F7SLP4dTN++3SDU8mZV XoCo9c1r+fAwIR0cFAmiMpuQ81as80Yy9PHTydInavHdGhZeSVbj9pq+VDizUBJsBtuh +O8dmjTcrRPkRhiqm6d92UPG/JZI+5DI7IQqZ4e94kafEgQ01Ffvf4xbaszUYAJYX+D3 AeOY8EUYB/K31kZtQSVbfRJzMQYe+TpjVQMdQrq8BgSb0hMCoE8j25unVuZxyzrYcNM+ P6wg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:from:sender :dkim-signature; bh=Fl6GRHmDwXTkupYiop0EErlDiZv2DZKUPdgh77pu4+I=; b=mzqqiycbOZHN/YpOZiFW5EbOKUHHzROQqkSXhvxMVa8FFk8g/BSw1rhRnAtdm48u2+ YpAbLaiA53rAmmqyyuiTkK0uOmjPH+tuvcSu/FZIsZxIrV/4vXyiWVUjD0PbVy5hCrEf ph2bFg8xEh/fRwkxY9J9/SDo2PkGqxIxr7XpYLiu6yqqpYLVguBQ4ln/xSxsnGd3lpAV ckFuyvio4osgyqrI05jwTXiOW6HuIAeph5pYDCk1Y5vFbYtWXRAZDINHr+nz+W0D8VNa IhiFJyx8OjF5VRx1q1e6ZpSVP829ZQ5g8tFIfL9cN7XqbwUsNGXeSnx21wXlV8wgqqxC T0yw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20210112 header.b=bZvwjPkK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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[46.135.44.69]) by smtp.gmail.com with ESMTPSA id v11-20020a5d4b0b000000b002368f6b56desm4207406wrq.18.2022.11.25.03.19.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 03:19:40 -0800 (PST) Sender: Tomeu Vizoso From: Tomeu Vizoso Cc: Tomeu Vizoso , Rob Herring , Krzysztof Kozlowski , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Amlogic Meson SoC support), linux-amlogic@lists.infradead.org (open list:ARM/Amlogic Meson SoC support), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/6] dt-bindings: power: Add NNA power domain Date: Fri, 25 Nov 2022 12:19:15 +0100 Message-Id: <20221125111921.37261-3-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221125111921.37261-1-tomeu.vizoso@collabora.com> References: <20221125111921.37261-1-tomeu.vizoso@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750467102167968136?= X-GMAIL-MSGID: =?utf-8?q?1750467102167968136?= Signed-off-by: Tomeu Vizoso Acked-by: Neil Armstrong --- include/dt-bindings/power/meson-g12a-power.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h index bb5e67a842de..93b03bdd60b7 100644 --- a/include/dt-bindings/power/meson-g12a-power.h +++ b/include/dt-bindings/power/meson-g12a-power.h @@ -9,5 +9,6 @@ #define PWRC_G12A_VPU_ID 0 #define PWRC_G12A_ETH_ID 1 +#define PWRC_G12A_NNA_ID 2 #endif From patchwork Fri Nov 25 11:19:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 25936 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3939501wrr; Fri, 25 Nov 2022 03:25:21 -0800 (PST) X-Google-Smtp-Source: AA0mqf7qQgU5N0CP15wfqE5mqh9+5CpWI392qB5g4aTlZhmS9tPEKoHsdH1tO4a65+dMEAhwwkZ8 X-Received: by 2002:a17:907:118b:b0:7b9:c08b:8084 with SMTP id uz11-20020a170907118b00b007b9c08b8084mr10486300ejb.393.1669375521591; Fri, 25 Nov 2022 03:25:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669375521; cv=none; d=google.com; s=arc-20160816; b=I/wSNTWaMDOH/fXa6KbPBKBP9kqBX5EwFd5VEUaqnEcLYCGVvhzWKsV0Njo6kKV9u5 n1eOupvbNCYm9Lpdie1S/u3gRB++kP27UzEuZc50tRpGjWsBZ1KBpQ3ywmi3+AeGk1xA K/ddYJqiQPsgHw2lErDjrOtOapsXc1BI3H6SBf3dA7I0DydLI8ZlQuCpyiJrs/PWT0A+ WEcvVMzCZ4CyXOojp7inAbPNQDw4DfLr0O4YVzrFLcCPGFhJ3XtEI+Pg+0KzHjvQ5rym HF7OECQyNmQPK2VvIYvY51hiUJ0cZw/yshOq65tmYtXJNtO7vrf1vt5EiREUmEx5DTFG Op9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:from:sender :dkim-signature; bh=Q+Dm0WodzoCwPekd8CO1ZcYNi+jBHrS/Ym57B3kSSJQ=; b=tmrPNTGUcXEziRv6ORlY5Ef0N3nPSczN3IjCrBvgkVq2Qr/XEHAXhIZs2uQdEGmc1W 2h5QCdxLj+8ufpvACCMHhvzY4+nuwBPnwMfmCIcNatzc6Urxq4sGYMh7/y0890zcwVYU taYi8NFQYplTqQmhJc7FAepeOjlkcdhscyOuGg+2Y2eX8/OEl9pgyFfBa7IL46nXQjp6 vDU8/Ft8U7XHu4yPmdOyRWiIip4nn6TsqdMBS0vHvRm5kqSaeKw2CPAkIe3xuaBV08sy 2yuh++X3O4WIfovaDuOAi4Ewu8tNwtLi2BP0ovUKckzWBxF+znBLZ8257PwcPLj3kgFo rCGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20210112 header.b=Hn6VrYty; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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[46.135.44.69]) by smtp.gmail.com with ESMTPSA id v11-20020a5d4b0b000000b002368f6b56desm4207406wrq.18.2022.11.25.03.19.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 03:19:41 -0800 (PST) Sender: Tomeu Vizoso From: Tomeu Vizoso Cc: Tomeu Vizoso , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Amlogic Meson SoC support), linux-amlogic@lists.infradead.org (open list:ARM/Amlogic Meson SoC support), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 3/6] soc: amlogic: meson-pwrc: Add NNA power domain for A311D Date: Fri, 25 Nov 2022 12:19:16 +0100 Message-Id: <20221125111921.37261-4-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221125111921.37261-1-tomeu.vizoso@collabora.com> References: <20221125111921.37261-1-tomeu.vizoso@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750467107121507905?= X-GMAIL-MSGID: =?utf-8?q?1750467107121507905?= Based on power initialization sequence in downstream driver. Signed-off-by: Tomeu Vizoso Reviewed-by: Neil Armstrong --- drivers/soc/amlogic/meson-ee-pwrc.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/soc/amlogic/meson-ee-pwrc.c b/drivers/soc/amlogic/meson-ee-pwrc.c index dd5f2a13ceb5..925cfaf50d11 100644 --- a/drivers/soc/amlogic/meson-ee-pwrc.c +++ b/drivers/soc/amlogic/meson-ee-pwrc.c @@ -46,6 +46,9 @@ #define HHI_NANOQ_MEM_PD_REG1 (0x47 << 2) #define HHI_VPU_MEM_PD_REG2 (0x4d << 2) +#define G12A_HHI_NANOQ_MEM_PD_REG0 (0x43 << 2) +#define G12A_HHI_NANOQ_MEM_PD_REG1 (0x44 << 2) + struct meson_ee_pwrc; struct meson_ee_pwrc_domain; @@ -106,6 +109,13 @@ static struct meson_ee_pwrc_top_domain sm1_pwrc_usb = SM1_EE_PD(17); static struct meson_ee_pwrc_top_domain sm1_pwrc_pci = SM1_EE_PD(18); static struct meson_ee_pwrc_top_domain sm1_pwrc_ge2d = SM1_EE_PD(19); +static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = { \ + .sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0, \ + .sleep_mask = BIT(16) | BIT(17), \ + .iso_reg = GX_AO_RTI_GEN_PWR_ISO0, \ + .iso_mask = BIT(16) | BIT(17), \ + }; + /* Memory PD Domains */ #define VPU_MEMPD(__reg) \ @@ -217,6 +227,11 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = { { HHI_AUDIO_MEM_PD_REG0, GENMASK(27, 26) }, }; +static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = { + { G12A_HHI_NANOQ_MEM_PD_REG0, 0xffffffff }, + { G12A_HHI_NANOQ_MEM_PD_REG1, 0xffffffff }, +}; + #define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks) \ { \ .name = __name, \ @@ -253,6 +268,8 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = { [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu, pwrc_ee_is_powered_off, 11, 2), [PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth), + [PWRC_G12A_NNA_ID] = TOP_PD("NNA", &g12a_pwrc_nna, g12a_pwrc_mem_nna, + pwrc_ee_is_powered_off), }; static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = { From patchwork Fri Nov 25 11:19:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 25935 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3939504wrr; Fri, 25 Nov 2022 03:25:22 -0800 (PST) X-Google-Smtp-Source: AA0mqf6++IuT38/11ihom3xkC/sOIClbJMnivjUygwnJd6PFnIT3CJRHgIi0Tsg9pksm/YQ3t7wf X-Received: by 2002:a17:907:7f9f:b0:7b2:a48e:302f with SMTP id qk31-20020a1709077f9f00b007b2a48e302fmr29498076ejc.334.1669375521737; Fri, 25 Nov 2022 03:25:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669375521; cv=none; d=google.com; s=arc-20160816; b=rrDM4VMwfixfY+ItShGpm0SoxVMb+uVoMvgfefjKBudPitmdiExnEUqUTz1mpp9hL1 FDi2eWpHJE8UptmLHRUYSsi3mJcpWzkFcHgwmomut3EX4lLYamfx7BSkmAOPt5Vfl4bb +W7CpUVzvvXezSCNHo77ixWOwr+JxDwLqNa2l09fvyHJcPRI5GQj/ixrkj3kjM8eLv+K 3AWOQL0Xr7cRQeSYPRhS5H8jvceVkPXP/IwpQc0mqXruho29mQGrq5dO96gM8W/Ohu2Q H6wcevWEEvq79f/j86tQZHzbWGRF4w/c/cSb4QY0pbC9wZDh7BHJOcnC94myxy8QNAdS uZTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:from:sender :dkim-signature; bh=H4DbuMCnCKfZ/X33NVzzgb/ifknYJFeQAyg/fDbKILM=; b=wagWHc4LtilXNXx87aTY+LVwAR3/KMMR03XNliyk9pOXf4GUIrz4BIaTEuT6EPuGTr +Bkk63z4LMXKvnYVaVPpOulvhvA6O2UiUPArChU9AvwyLM6SUeM5+qAwICGSR4Yabd0W etJAeBLj9QEQCwDJKTe5PFfZ/MbdIWEHrhoRpfbjoy4OfLWKiG+u4ujjZv5fKxHgD2yF chxb+OVQHDpXawoFdqYeH6UvD5JpGkC7Pz1AhgPyvvu32vxhr6yMRe1Mx835I/kh+vrX 64uoX3v2AykX8KaDcVr4L58JmHDkEC19yekEjCRkBFaysiW2MFAnQAVv2SvikN7PqUz9 n9ow== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20210112 header.b=MJTopbFM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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[46.135.44.69]) by smtp.gmail.com with ESMTPSA id v11-20020a5d4b0b000000b002368f6b56desm4207406wrq.18.2022.11.25.03.19.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 03:19:43 -0800 (PST) Sender: Tomeu Vizoso From: Tomeu Vizoso Cc: Tomeu Vizoso , Rob Herring , Krzysztof Kozlowski , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Amlogic Meson SoC support), linux-amlogic@lists.infradead.org (open list:ARM/Amlogic Meson SoC support), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 4/6] arm64: dts: meson-g12-common: Add reference to NNA reset to pwrc Date: Fri, 25 Nov 2022 12:19:17 +0100 Message-Id: <20221125111921.37261-5-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221125111921.37261-1-tomeu.vizoso@collabora.com> References: <20221125111921.37261-1-tomeu.vizoso@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750467106982490699?= X-GMAIL-MSGID: =?utf-8?q?1750467106982490699?= Based on the power sequence in the downstream driver. Signed-off-by: Tomeu Vizoso --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 45947c1031c4..fa96fddf4633 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1625,10 +1625,11 @@ pwrc: power-controller { <&reset RESET_VDAC>, <&reset RESET_VDI6>, <&reset RESET_VENCL>, - <&reset RESET_VID_LOCK>; + <&reset RESET_VID_LOCK>, + <&reset RESET_NNA>; reset-names = "viu", "venc", "vcbus", "bt656", "rdma", "venci", "vencp", "vdac", - "vdi6", "vencl", "vid_lock"; + "vdi6", "vencl", "vid_lock", "nna"; clocks = <&clkc CLKID_VPU>, <&clkc CLKID_VAPB>; clock-names = "vpu", "vapb"; From patchwork Fri Nov 25 11:19:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 25933 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3939442wrr; Fri, 25 Nov 2022 03:25:14 -0800 (PST) X-Google-Smtp-Source: AA0mqf5esxFOuTCqHFI1Ggiertzog8o0qKqPa1SY6h+SCsuDrVeMr0gK+g0L1QNX1hR62xbNv0H9 X-Received: by 2002:a17:90a:458a:b0:214:166e:e202 with SMTP id v10-20020a17090a458a00b00214166ee202mr40574672pjg.165.1669375514409; Fri, 25 Nov 2022 03:25:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669375514; cv=none; d=google.com; s=arc-20160816; b=O3Im/OBvJBjlH8b2QrZ8HsvbJjtwLC6848Ff0PIBeun6ijhpQ3cMG1IrIh+CFDQXMb pwXoMiO7tJfZwdUPOb1kNBEX3NAZxl/9kkUQDQvW6wAHFMzWMz3FvQKxQxwuoX9GgvjN Eb9d4CJr78eQRINiBO11wYDs52TAuSrBTAfwzn20998iA4UbPNfAGocF2FWX0ZelpdPS bbinUJ6OdH7eUCrEaTcSmrm4mVkeb8egiIX0GsfLyIbSKdhZrWsc75R/icUdx4XmNEbS /6Z9ut6BJd1Irki5ekAsffCH7k21aGHUf2349hfH7CiMXN+CAmy8vGS7xb2yin4n5qQw vHrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:from:sender :dkim-signature; bh=7PfQ2W7+jfq13mv60YI0ZFUsMp5wOyJ2UsW2Qs+puQY=; b=Xfb4N+KNCVh5vEYODh39pTrLLo7vTjnOlE5BgI4EmCuP3wxuS8cfjZlyIFR+cfqbuG O3+ohtVM76XHV8634xAM31pLzCfrwBqtVmB7kDRjza0Qd2FADbPM64BXhF6ghB4lHV+d BjBAL9uWfADND2+o+x9qSpScGqQsrfDUthCCZK1p4kbjy6WPHdXeLO/umtGuGRSA5CMW nUOT9qskBjqu5Jb/QyTXkhOKMb/aH0lSzdZsPYOcdbcZzUEwbhiDwm95m5yj2Oe/ceHL Sv91PHsGEepPHdxS28hGTW//l9NyiJNL4qeY+cU+R9muyOvs6GMlxKXkJJmXV8dbutk+ tZzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20210112 header.b=SbOHS903; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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[46.135.44.69]) by smtp.gmail.com with ESMTPSA id v11-20020a5d4b0b000000b002368f6b56desm4207406wrq.18.2022.11.25.03.19.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 03:19:45 -0800 (PST) Sender: Tomeu Vizoso From: Tomeu Vizoso Cc: Tomeu Vizoso , Rob Herring , Krzysztof Kozlowski , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Amlogic Meson SoC support), linux-amlogic@lists.infradead.org (open list:ARM/Amlogic Meson SoC support), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 5/6] arm64: dts: Add DT node for the VIPNano-QI on the A311D Date: Fri, 25 Nov 2022 12:19:18 +0100 Message-Id: <20221125111921.37261-6-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221125111921.37261-1-tomeu.vizoso@collabora.com> References: <20221125111921.37261-1-tomeu.vizoso@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750467099280200404?= X-GMAIL-MSGID: =?utf-8?q?1750467099280200404?= This "NPU" is very similar to the Vivante GPUs and Etnaviv works well with it with just a few small changes. Signed-off-by: Tomeu Vizoso --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 10 ++++++++++ .../boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts | 4 ++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index fa96fddf4633..13c79676a356 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include / { interrupt-parent = <&gic>; @@ -2485,4 +2486,13 @@ xtal: xtal-clk { #clock-cells = <0>; }; + npu: npu@ff100000 { + compatible = "vivante,gc"; + reg = <0x0 0xff100000 0x0 0x20000>; + interrupts = <0 147 4>; + clocks = <&clkc CLKID_NNA_CORE_CLK>, + <&clkc CLKID_NNA_AXI_CLK>; + clock-names = "core", "bus"; + power-domains = <&pwrc PWRC_G12A_NNA_ID>; + }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts index 124a80901084..73f3d87dcefd 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts @@ -15,6 +15,10 @@ / { compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b"; }; +&npu { + status = "okay"; +}; + /* * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between From patchwork Fri Nov 25 11:19:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 25938 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3940305wrr; Fri, 25 Nov 2022 03:26:51 -0800 (PST) X-Google-Smtp-Source: AA0mqf7DheTEZzJYbyinzr1HSiRKTs1NIbuQlND36nWXghtrwxPEdo89vPrt9uWRM/SLjQJDb2rD X-Received: by 2002:a05:6402:3785:b0:461:e598:e0bb with SMTP id et5-20020a056402378500b00461e598e0bbmr34899457edb.21.1669375611273; Fri, 25 Nov 2022 03:26:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669375611; cv=none; d=google.com; s=arc-20160816; b=wk01S2VOX9mtM91hi/dAhi1nSixUBDICCHUjavWrAdf8DQ6TU8YxiPIc29STduOeix o0xGgS5F0XiZ2bEwNbLva8TvBy8kwSTMFNVcJtMCG4NlBpP9jKz+pN+wdmiU1wC3/I0c 5MLJ410h4aIMQCMbmIn2mq/bAd0gqbFbpq3/UUQEpThYTF8KlLF7x/UMrm6dgwkWGiCH Adt74ewUWmsgjQ+34S68R1Y4O39cEjv2VmpiubGWUc0YT1Kw4iqF4Qf/1XM4EVZcSuGM ok0CAHy0Wptekdxkn5NwFEFsVlX/x5fA1MjApkuEzB31YJvJQO6Uvow/myXqasx4GWhV XEhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:from:sender :dkim-signature; bh=j/wAlj9+lbLEBeIqsdF+yfeUS1s2V84+JTVk1VCdcTE=; b=y55T3XcvqjsoZQC7fSt/fQ7AH8JLb51GJEuqjrk1Z+BVcV43uzfFVPBsW9AlpAr1VH 3CKXaXkIyx9kBtDzKYV/4nvLeM7eE0AnqIXYVWYjgNSaSfrEiJkJvN/biitckf9T4dli HgMr6brbSiKaQy/NErQkmgl6VJk9L98nLpYwMrDJbN3Kqf9pYIoJ/gNiuB8g9VnFlrLS WrFnJ2NZ8EcP1KWfaQreZ0jxvPdLn7Vp9XKa6JKr0KLmjTQSalq8EDmrFkAx8roezn7/ HgGkRd0C3TlxSjgwNnU3Oi6eh0M65sn30ciOevclyyY8n9gwVrX26Sz9UKeaIP46/NCE p0JQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20210112 header.b=Q67PhOoP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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[46.135.44.69]) by smtp.gmail.com with ESMTPSA id v11-20020a5d4b0b000000b002368f6b56desm4207406wrq.18.2022.11.25.03.19.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 03:19:46 -0800 (PST) Sender: Tomeu Vizoso From: Tomeu Vizoso Cc: Tomeu Vizoso , Lucas Stach , Russell King , Christian Gmeiner , David Airlie , Daniel Vetter , etnaviv@lists.freedesktop.org (moderated list:DRM DRIVERS FOR VIVANTE GPU IP), dri-devel@lists.freedesktop.org (open list:DRM DRIVERS FOR VIVANTE GPU IP), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 6/6] drm/etnaviv: add HWDB entry for VIPNano-QI.7120.0055 Date: Fri, 25 Nov 2022 12:19:19 +0100 Message-Id: <20221125111921.37261-7-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221125111921.37261-1-tomeu.vizoso@collabora.com> References: <20221125111921.37261-1-tomeu.vizoso@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750467200751580170?= X-GMAIL-MSGID: =?utf-8?q?1750467200751580170?= This is a compute-only module marketed towards AI and vision acceleration. This particular version can be found on the Amlogic A311D SoC. The feature bits are taken from the Khadas downstream kernel driver 6.4.4.3.310723AAA. Signed-off-by: Tomeu Vizoso --- drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c index f2fc645c7956..3f6fd9a3c088 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c @@ -130,6 +130,37 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = { .minor_features10 = 0x90044250, .minor_features11 = 0x00000024, }, + { + .model = 0x8000, + .revision = 0x7120, + .product_id = 0x45080009, + .customer_id = 0x88, + .eco_id = 0, + .stream_count = 8, + .register_max = 64, + .thread_count = 256, + .shader_core_count = 1, + .vertex_cache_size = 16, + .vertex_output_buffer_size = 1024, + .pixel_pipes = 1, + .instruction_count = 512, + .num_constants = 320, + .buffer_size = 0, + .varyings_count = 16, + .features = 0xe0287cac, + .minor_features0 = 0xc1799eff, + .minor_features1 = 0xfefbfadb, + .minor_features2 = 0xeb9d6fbf, + .minor_features3 = 0xedfffced, + .minor_features4 = 0xd30dafc7, + .minor_features5 = 0x7b5ac333, + .minor_features6 = 0xfc8ee200, + .minor_features7 = 0x03fffa6f, + .minor_features8 = 0x00fe0ef0, + .minor_features9 = 0x0088003c, + .minor_features10 = 0x108048c0, + .minor_features11 = 0x00000010, + }, }; bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu)