From patchwork Thu Nov 24 23:24:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25718 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659354wrr; Thu, 24 Nov 2022 15:24:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf7+GSEXgfGKVeMfR2rTUBJ382uOWh5I8lyLRn7xE+7vNg4lRyHBhy5VIUqT4reXbedu+pXh X-Received: by 2002:a63:4c4d:0:b0:46f:8c3a:8b2b with SMTP id m13-20020a634c4d000000b0046f8c3a8b2bmr13935058pgl.477.1669332293945; Thu, 24 Nov 2022 15:24:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332293; cv=none; d=google.com; s=arc-20160816; b=BAE22VENWTW5dp2r7krJpuSh0frwrwgr7cv196GRhDj/mrCBHFzcVgeuXsbSnUFb+F 8usDKZAHKv2ExguDIXXrHkb172tjSU6yMteMFijr4BUKZAp6Z91vWD7OGkRhgqo8C3mY NkqbtElD9ucDhJ4CONXUqvut/gBrPXBxvh4L3xhwch86N7LzYUvOOvjWmD4vyDul6Q36 tJtJUYW1OrRo2No9iclOcWXMJFfaci5NzoV+2aZB1zFF1aHGbKpgvj/Gj7+Og6wi9qvn fvNmSO9fSDMs3PCjnpihuChtPYlpdUP6JlWRuxKXfiMO7ojQ+giY5PUsl46PP9+r6AwG 8HVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=XzEU6xpUtYERldMqsji8DXGQ2kRnY83P6uKMpYacBXc=; b=BtkesA3d8aMTcHj03rbU2gDkp5DkRbtlu6n2UrnhMT7OP4bjc7/IFP09Ump/YlCaZe 4g0Rq56kzVNwu87JPYAc6Dvv62o+6qH5K3o75IFnen4ofWdXAGpSKuf6YRsfMzSP4GJD 8WrxNLtBGh7c4N41CmiDcMzGvaOMMJ+zpwNi3NvLeU9DHfwtwvWdKFngb+5UAGLMiAYi 1hs2cH9/JKVQio6NG8QL6+YzeBnIha3Q0QEBzDJVrlXaKbQFGnGx9RIckIW92MNtvbcV WksURiw5Cf2+5xbVK5j6Fq3XGS27swwU275ocDGIozFnlXDmfhuj3GeK701Y0rGHxGLN 6omQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ukIIKAx8; dkim=neutral (no key) header.i=@linutronix.de header.b=uZK8oU7I; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j4-20020a170903028400b001727963f929si1362815plr.130.2022.11.24.15.24.41; Thu, 24 Nov 2022 15:24:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ukIIKAx8; dkim=neutral (no key) header.i=@linutronix.de header.b=uZK8oU7I; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229613AbiKXXYN (ORCPT + 99 others); Thu, 24 Nov 2022 18:24:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229436AbiKXXYL (ORCPT ); Thu, 24 Nov 2022 18:24:11 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 006F1827E2; Thu, 24 Nov 2022 15:24:10 -0800 (PST) Message-ID: <20221124230313.454246167@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332249; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=XzEU6xpUtYERldMqsji8DXGQ2kRnY83P6uKMpYacBXc=; b=ukIIKAx8omFoZX6BNrtQ1em1fyJt/74yF410M9ACw6pOid0mSVs4Ymv1U2mL520WbTQdEV NveAgzjpB6kbJKcFylAR2OeasZWzCVEb13DfaqSsMp3UVXVB1+er6vzOOP71Qz+7SGGmkH c83rppVhgA3TNahZ61zP8grr22JRQZlH5luMLeuW/lIN2Z3S2R5JB3HDJzQYDQtXMQuesw E5N0YMBkApwSda46jRcvpMGktAwaZybBjbosT4RH307qiYzpPVWT76ZeIVdNystezpm41P q/V3QaxsAwsfl5n9eUp5yKE6/CazXwSRiq0DknVTzrJUfMcOq9HKM7GrxwIiMw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332249; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=XzEU6xpUtYERldMqsji8DXGQ2kRnY83P6uKMpYacBXc=; b=uZK8oU7IO9NrWdwfr0Xs6kpzBUGublrROtVf5kgC6Era+r/3nY/aRVmS9xsA6mpNwEZe7H ObBeydzQWlavkcDg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Jason Gunthorpe Subject: [patch V3 01/22] genirq/msi: Move IRQ_DOMAIN_MSI_NOMASK_QUIRK to MSI flags References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:08 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421779458002324?= X-GMAIL-MSGID: =?utf-8?q?1750421779458002324?= It's truly a MSI only flag and for the upcoming per device MSI domains this must be in the MSI flags so it can be set during domain setup without exposing this quirk outside of x86. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- arch/x86/kernel/apic/msi.c | 5 ++--- include/linux/irqdomain.h | 9 +-------- include/linux/msi.h | 6 ++++++ kernel/irq/msi.c | 2 +- 4 files changed, 10 insertions(+), 12 deletions(-) --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -176,7 +176,8 @@ static struct msi_domain_ops pci_msi_dom static struct msi_domain_info pci_msi_domain_info = { .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_PCI_MSIX, + MSI_FLAG_PCI_MSIX | MSI_FLAG_NOMASK_QUIRK, + .ops = &pci_msi_domain_ops, .chip = &pci_msi_controller, .handler = handle_edge_irq, @@ -200,8 +201,6 @@ struct irq_domain * __init native_create if (!d) { irq_domain_free_fwnode(fn); pr_warn("Failed to initialize PCI-MSI irqdomain.\n"); - } else { - d->flags |= IRQ_DOMAIN_MSI_NOMASK_QUIRK; } return d; } --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -186,15 +186,8 @@ enum { /* Irq domain implements MSI remapping */ IRQ_DOMAIN_FLAG_MSI_REMAP = (1 << 5), - /* - * Quirk to handle MSI implementations which do not provide - * masking. Currently known to affect x86, but partially - * handled in core code. - */ - IRQ_DOMAIN_MSI_NOMASK_QUIRK = (1 << 6), - /* Irq domain doesn't translate anything */ - IRQ_DOMAIN_FLAG_NO_MAP = (1 << 7), + IRQ_DOMAIN_FLAG_NO_MAP = (1 << 6), /* * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -399,6 +399,12 @@ enum { MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS = (1 << 9), /* Free MSI descriptors */ MSI_FLAG_FREE_MSI_DESCS = (1 << 10), + /* + * Quirk to handle MSI implementations which do not provide + * masking. Currently known to affect x86, but has to be partially + * handled in the core MSI code. + */ + MSI_FLAG_NOMASK_QUIRK = (1 << 11), }; int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -875,7 +875,7 @@ static int __msi_domain_alloc_irqs(struc * MSI affinity setting requires a special quirk (X86) when * reservation mode is active. */ - if (domain->flags & IRQ_DOMAIN_MSI_NOMASK_QUIRK) + if (info->flags & MSI_FLAG_NOMASK_QUIRK) vflags |= VIRQ_NOMASK_QUIRK; } From patchwork Thu Nov 24 23:24:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25726 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659762wrr; Thu, 24 Nov 2022 15:25:58 -0800 (PST) X-Google-Smtp-Source: AA0mqf6kbLPKyE7oOmxQjvKkN0+Ksp+zuN2HoarbRJJO28p82LCxzMaSFA19RqA/pKBoUwNMHNQ6 X-Received: by 2002:a63:4b0f:0:b0:439:3b80:615d with SMTP id y15-20020a634b0f000000b004393b80615dmr13833629pga.255.1669332358606; Thu, 24 Nov 2022 15:25:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332358; cv=none; d=google.com; s=arc-20160816; b=JvTdq+wplWxq5lQwFAbIie1bGKU2wVr4/diGreAbxy65U/QwP8YmGGQbcQW9RtPMSW 9gm5j2DS4C0LMNSTXWyiOMlcoB0aMohTdp1uYBODzltuZ0lOCj1dtSqv445pE2636ZRw MGlOC8Lx5YFaX4nWqGG86sBVw3TLDG/mp1BScPhI//GEhP5PE3G7PjLVrULOOR5rHVHc Ku7G0cYQSasc4N9cZ3ptXcQAqXmxhRlmQsRYOHm9e+YIcus2nbhQTfZEFH8w8iM1DuPw AkWyrCEG8rqqAS7JeaNtykbfpi7dXv2xLqloTszCg+M/PG+SPz9VVILld7tbKWcgczV0 mP2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=E6KtSq0yDLolu/6n+fAhU+2bN1LDYJtV3H1STAwY1WQ=; b=wMp+kkDwtQhEMPwJK+Z7IhVTo8FJOJtuRIiCxEBshxplrzR+R4O0sTLr24WIyIkl/k dPv/5SBgFN4y3d7oJyTQADJRRWyM83guq+18tQOOyObtARVqryDfNdSG2HvdIenIL3rl SaH5iYIuVbwB9+pvfxNHsVExPXeWr/aV/kDqzm6BplvjU4B2ZcMh4DGtFniPGq9lT92j p7VqjgbtwySVd4HNBzh7OwXds0NI3rDuQPxEHTHyBpeL9EX03gf+soVvSwVA27Yibw91 ZOdRpHcjm0kdQQQoA9rPZb4azjfUBA7UmaijBVXfhyGbVYYnQ3LAjyKwPWw7DCb9IAAT ce0Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=KJJP4jXO; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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No functional change. Signed-off-by: Thomas Gleixner --- V2: Split out from the irqdomain::dev rename patch (Jason) --- include/linux/irqdomain.h | 74 +++++++++++++++++++++++----------------------- 1 file changed, 37 insertions(+), 37 deletions(-) --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -117,53 +117,53 @@ struct irq_domain_chip_generic; /** * struct irq_domain - Hardware interrupt number translation object - * @link: Element in global irq_domain list. - * @name: Name of interrupt domain - * @ops: pointer to irq_domain methods - * @host_data: private data pointer for use by owner. Not touched by irq_domain - * core code. - * @flags: host per irq_domain flags - * @mapcount: The number of mapped interrupts + * @link: Element in global irq_domain list. + * @name: Name of interrupt domain + * @ops: Pointer to irq_domain methods + * @host_data: Private data pointer for use by owner. Not touched by irq_domain + * core code. + * @flags: Per irq_domain flags + * @mapcount: The number of mapped interrupts * - * Optional elements - * @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy - * to swap it for the of_node via the irq_domain_get_of_node accessor - * @gc: Pointer to a list of generic chips. There is a helper function for - * setting up one or more generic chips for interrupt controllers - * drivers using the generic chip library which uses this pointer. - * @dev: Pointer to a device that the domain represent, and that will be - * used for power management purposes. - * @parent: Pointer to parent irq_domain to support hierarchy irq_domains + * Optional elements: + * @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy + * to swap it for the of_node via the irq_domain_get_of_node accessor + * @gc: Pointer to a list of generic chips. There is a helper function for + * setting up one or more generic chips for interrupt controllers + * drivers using the generic chip library which uses this pointer. + * @dev: Pointer to a device that can be utilized for power management + * purposes related to the irq domain. + * @parent: Pointer to parent irq_domain to support hierarchy irq_domains * - * Revmap data, used internally by irq_domain - * @revmap_size: Size of the linear map table @revmap[] - * @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map - * @revmap_mutex: Lock for the revmap - * @revmap: Linear table of irq_data pointers + * Revmap data, used internally by the irq domain code: + * @revmap_size: Size of the linear map table @revmap[] + * @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map + * @revmap_mutex: Lock for the revmap + * @revmap: Linear table of irq_data pointers */ struct irq_domain { - struct list_head link; - const char *name; - const struct irq_domain_ops *ops; - void *host_data; - unsigned int flags; - unsigned int mapcount; + struct list_head link; + const char *name; + const struct irq_domain_ops *ops; + void *host_data; + unsigned int flags; + unsigned int mapcount; /* Optional data */ - struct fwnode_handle *fwnode; - enum irq_domain_bus_token bus_token; - struct irq_domain_chip_generic *gc; - struct device *dev; + struct fwnode_handle *fwnode; + enum irq_domain_bus_token bus_token; + struct irq_domain_chip_generic *gc; + struct device *dev; #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY - struct irq_domain *parent; + struct irq_domain *parent; #endif /* reverse map data. The linear map gets appended to the irq_domain */ - irq_hw_number_t hwirq_max; - unsigned int revmap_size; - struct radix_tree_root revmap_tree; - struct mutex revmap_mutex; - struct irq_data __rcu *revmap[]; + irq_hw_number_t hwirq_max; + unsigned int revmap_size; + struct radix_tree_root revmap_tree; + struct mutex revmap_mutex; + struct irq_data __rcu *revmap[]; }; /* Irq domain flags */ From patchwork Thu Nov 24 23:24:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25720 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659454wrr; Thu, 24 Nov 2022 15:25:11 -0800 (PST) X-Google-Smtp-Source: AA0mqf7Pn8Q5ox43i/EpOqi1BsMfkvxrA1PrGaibqkedS8TfEY7xQeRzeL+fWGwr2juRsnwracTp X-Received: by 2002:a17:90a:aa93:b0:218:94ff:ce1f with SMTP id l19-20020a17090aaa9300b0021894ffce1fmr28985678pjq.217.1669332310854; Thu, 24 Nov 2022 15:25:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332310; cv=none; d=google.com; s=arc-20160816; b=B7zr1aeU09KI9Qqu+S90kPmGCRfMW5RwIE/ldPZhHLNPj0wn5fQJpHAo2ozswKfTHp ZM33hra0G5XZw9T2gsTUeAb/cMBNOlOguGg8OKClvX/q1BUwBr3i1FNfra5PNK5FtMQp 9wPF/JTROkiaYIH4K4VDyIOSg8SGj46vp/2TuJZ3F01s6IQMUlTRUz+Qb8CdIFOJudkw HBYiAkQceb1Xjnzfre4CoSbZ54D5ZZUhHLb/wCZAYO3H7wq+rILMR9d8GWGLNtk4sX7f lfa555vdRhh9nUzZy0v3sqDjgDxyMyByVlpLHMiKrxzkGv2CTbgICjPNB9X2Hv88e93a VUtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=r4t3gJp+Epgg61Tiq3or6HjYA/efOz+SN1LtRddhdOs=; b=RzhXY7S21JcgaQLCYCMFzv9iYtgtSKKYUnWLNHxfSOeH/QqQPJ02qj1Dbq3paLD4qK G82LlCiAyUBU4eTNjPmldJ2J9AdQEbbmDGDtqYutMc+EELvrltWfD9KORw0IcJTYDz/e +4Apg/bazojUyf6XvvFkkCvdqPMojLQRaivrA0mZFBVZ3FKShoY6uyW0hO95aH2f/rjt t/1xOpuUVvl/yueofO3Al+maN1OTMRy5sEKPWDXh6eWk1aahyIDmllVax++/JIGkD7a6 oTIwvo34GCDmgLBR5j5GEdyP7ihns+kjH1+8cYpnd8nzkvD3jtECIeKT6HIElvumeyRB xS3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=suRBtcBW; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=9WetNsKd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l19-20020a637013000000b0041da571906fsi1629976pgc.121.2022.11.24.15.24.58; Thu, 24 Nov 2022 15:25:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=suRBtcBW; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=9WetNsKd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229646AbiKXXYV (ORCPT + 99 others); Thu, 24 Nov 2022 18:24:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229632AbiKXXYQ (ORCPT ); Thu, 24 Nov 2022 18:24:16 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EA8E827E2; Thu, 24 Nov 2022 15:24:15 -0800 (PST) Message-ID: <20221124230313.574541683@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332252; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=r4t3gJp+Epgg61Tiq3or6HjYA/efOz+SN1LtRddhdOs=; b=suRBtcBWsuoHnNDku70nvLLCb4ahDk0yeRe3n7IB9ZXig1+0hzWJXKCNi+orquLKd808FX EeVpL92NST/vy6i6kHvlErQxQJxEAkl4g8O6XO1QCbI3iP1mRs5fFeFgpLGtiyhSSCO09h 7uAl0iBEKamhsmB1uM+252+2pqHCf7T9Doo/yoBTpi4MgE6UG4rUEmTAcS/tuBTc/Gbo1w TreVB4jUWeLXMRQpaWBnlHOyrezYjdhmHLnjll3vIYSDFeVf/X4HB4taDqwdNXrhbaU+jE UHGSLlxGAj0d6fRRXQ/EKzDT+GMv0szf1rC9FrFKY/HWS5kFlliLMhZaKuTQhw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332252; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=r4t3gJp+Epgg61Tiq3or6HjYA/efOz+SN1LtRddhdOs=; b=9WetNsKd7JDkoSylPgR4THzUKZKt1ot9g0kPKUk6OBfGuL+ndi0R7klTUzDj+yaftQroJA TexxN1RsK/qvgXDQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Jason Gunthorpe Subject: [patch V3 03/22] genirq/irqdomain: Rename irq_domain::dev to irq_domain::pm_dev References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:12 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421797309320539?= X-GMAIL-MSGID: =?utf-8?q?1750421797309320539?= irq_domain::dev is a misnomer as it's usually the rule that a device pointer points to something which is directly related to the instance. irq_domain::dev can point to some other device for power management to ensure that this underlying device is not powered down when an interrupt is allocated. The upcoming per device MSI domains really require a pointer to the device which instantiated the irq domain and not to some random other device which is required for power management down the chain. Rename irq_domain::dev to irq_domain::pm_dev and fixup the few sites which use that pointer. Conversion was done with the help of coccinelle. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- drivers/irqchip/irq-gic.c | 4 ++-- include/linux/irqdomain.h | 6 +++--- kernel/irq/chip.c | 8 ++++---- 3 files changed, 9 insertions(+), 9 deletions(-) --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -401,8 +401,8 @@ static void gic_irq_print_chip(struct ir { struct gic_chip_data *gic = irq_data_get_irq_chip_data(d); - if (gic->domain->dev) - seq_printf(p, gic->domain->dev->of_node->name); + if (gic->domain->pm_dev) + seq_printf(p, gic->domain->pm_dev->of_node->name); else seq_printf(p, "GIC-%d", (int)(gic - &gic_data[0])); } --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -131,7 +131,7 @@ struct irq_domain_chip_generic; * @gc: Pointer to a list of generic chips. There is a helper function for * setting up one or more generic chips for interrupt controllers * drivers using the generic chip library which uses this pointer. - * @dev: Pointer to a device that can be utilized for power management + * @pm_dev: Pointer to a device that can be utilized for power management * purposes related to the irq domain. * @parent: Pointer to parent irq_domain to support hierarchy irq_domains * @@ -153,7 +153,7 @@ struct irq_domain { struct fwnode_handle *fwnode; enum irq_domain_bus_token bus_token; struct irq_domain_chip_generic *gc; - struct device *dev; + struct device *pm_dev; #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY struct irq_domain *parent; #endif @@ -206,7 +206,7 @@ static inline void irq_domain_set_pm_dev struct device *dev) { if (d) - d->dev = dev; + d->pm_dev = dev; } #ifdef CONFIG_IRQ_DOMAIN --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -1561,10 +1561,10 @@ int irq_chip_compose_msi_msg(struct irq_ return 0; } -static struct device *irq_get_parent_device(struct irq_data *data) +static struct device *irq_get_pm_device(struct irq_data *data) { if (data->domain) - return data->domain->dev; + return data->domain->pm_dev; return NULL; } @@ -1578,7 +1578,7 @@ static struct device *irq_get_parent_dev */ int irq_chip_pm_get(struct irq_data *data) { - struct device *dev = irq_get_parent_device(data); + struct device *dev = irq_get_pm_device(data); int retval = 0; if (IS_ENABLED(CONFIG_PM) && dev) @@ -1597,7 +1597,7 @@ int irq_chip_pm_get(struct irq_data *dat */ int irq_chip_pm_put(struct irq_data *data) { - struct device *dev = irq_get_parent_device(data); + struct device *dev = irq_get_pm_device(data); int retval = 0; if (IS_ENABLED(CONFIG_PM) && dev) From patchwork Thu Nov 24 23:24:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25721 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659466wrr; Thu, 24 Nov 2022 15:25:13 -0800 (PST) X-Google-Smtp-Source: AA0mqf7TseaKAizHfTRNhk6QLbVdTtiTSFYO4p/FYdAXLU3F1m1RRDf6b0BWLoT8o2RgPaShp+5R X-Received: by 2002:a17:902:c7d1:b0:189:1a24:2865 with SMTP id r17-20020a170902c7d100b001891a242865mr17721532pla.18.1669332313586; Thu, 24 Nov 2022 15:25:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332313; cv=none; d=google.com; s=arc-20160816; b=AOwWEtWQrZ4El83JxX8EnDhzhyCYETdiWp48jq21/ccB1gkRER7JYAmN9WTOnaBjdz qddISpeCwksrEzoutRSosc0Jl6ZAp1L/BhSaqi2ToL8Nv0KZLtJ0QXr9Rp8WFZfrXHl/ 4rQeZw56rWi4hAGByHYH7LtqTJPqstJYNZfXXbYRvKpJ3DPpiGxKVF2wshByrhwbLyQX W55URGssFEd1n9aavnSip9/05cRMZPK767pvfY+Ri7JrCAVjPe8r4P4Tot9BM3eWkcHl 54GN3AEaaSDkGlawOnMz+TqAPaAl9DTLSmdm2pMyFbeh5g8Cj0NViNY9q/JM6mwuaNDV pS3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=fX3YyaTkrRIM3kSpqK/PVSD3oj0zimiyOCtXLtrgK+M=; b=uRJt5S3zSrjinhNi8MLCClm63PdAnQ4VANzHiGoxQco1CCknhJXyzzzTqvaYshl/oI xffiLHpeHd0tPkrGB9rRJPqmEiO/trg1sabQuKHPHete/1NYFrgJetn4V32wYwiCY3xT sq8KsDGRHQCzerVLvI8WWE+IIE29vh5sJnUnLXz+icsAGY4fW8p1HwSY55qGo1Nm/rC3 H8eK1dyO0r+xb3D8zfEXwHapJOFu9RYHAaKZI7vfLXC8CaI4LKcd8j0OMqY1pYMVIlhd qzc9JGgS4YkxSIiLC3en50GvT0tBM8SmVq5AZGVte1eZPUJun9bgkXufEaL9uM/Iq58h CjFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=RuUSjWj3; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t64-20020a638143000000b0045fd05b2ce9si2311733pgd.521.2022.11.24.15.25.01; Thu, 24 Nov 2022 15:25:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=RuUSjWj3; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229672AbiKXXYY (ORCPT + 99 others); Thu, 24 Nov 2022 18:24:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229610AbiKXXYR (ORCPT ); Thu, 24 Nov 2022 18:24:17 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BEB4487A71; Thu, 24 Nov 2022 15:24:16 -0800 (PST) Message-ID: <20221124230313.632679220@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332254; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=fX3YyaTkrRIM3kSpqK/PVSD3oj0zimiyOCtXLtrgK+M=; b=RuUSjWj3sp0CZyFt3RTyw1tmWDGmWl9Quimkod7ubNdHV2gj94Vns/2U6Nufd7LPif6u0K bvo6ZqMwv/Fv/shLAPLGhwzaQrzRxw2g5Mq4nRiZ5Onkahf23x+V/jhsRBM7GjDPaWa+P3 gSslr8kqBebwKVZwvaRoSOsk3PD7aahl5FOlDluX6jWZdZAP2oQCOmv6X6k6uUXXFuDvI1 PNXPeKMZpI6QTVouSAfPbkCPSO/HkjpdVm4dHYSi3X/JcdKqjd9l6NIpFkdVDWO8w9mhoM zE4BDwcXGYct7pY2DiWDQQo7dDibEtKjEUKkBCHalVrYoX3OnK2fMTragZ9bpQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332254; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=fX3YyaTkrRIM3kSpqK/PVSD3oj0zimiyOCtXLtrgK+M=; b=tQPHfy2XIhMpnnlr1ZD/kJBJWg1FxQ32uKZXH5nnCYz5PHvtkDbtr/ykZEM26do4eXsVmg BRky1tNIwGf+sMCg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Jason Gunthorpe Subject: [patch V3 04/22] genirq/msi: Create msi_api.h References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:14 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421799651326869?= X-GMAIL-MSGID: =?utf-8?q?1750421799651326869?= Create a API header for MSI specific functions which are relevant to device drivers. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- include/linux/msi.h | 6 ++++-- include/linux/msi_api.h | 15 +++++++++++++++ 2 files changed, 19 insertions(+), 2 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -13,11 +13,14 @@ * * Regular device drivers have no business with any of these functions and * especially storing MSI descriptor pointers in random code is considered - * abuse. The only function which is relevant for drivers is msi_get_virq(). + * abuse. + * + * Device driver relevant functions are available in */ #include #include +#include #include #include #include @@ -188,7 +191,6 @@ struct msi_device_data { int msi_setup_device_data(struct device *dev); -unsigned int msi_get_virq(struct device *dev, unsigned int index); void msi_lock_descs(struct device *dev); void msi_unlock_descs(struct device *dev); --- /dev/null +++ b/include/linux/msi_api.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef LINUX_MSI_API_H +#define LINUX_MSI_API_H + +/* + * APIs which are relevant for device driver code for allocating and + * freeing MSI interrupts and querying the associations between + * hardware/software MSI indices and the Linux interrupt number. + */ + +struct device; + +unsigned int msi_get_virq(struct device *dev, unsigned int index); + +#endif From patchwork Thu Nov 24 23:24:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25730 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659857wrr; Thu, 24 Nov 2022 15:26:13 -0800 (PST) X-Google-Smtp-Source: AA0mqf5xOiUifVnICMzwY1vQMcJXe6GP/u9SZguCT3k1IRo2ZNwWQhmUU+mdZlqEVDu8WcqG2Pm6 X-Received: by 2002:a17:903:300a:b0:186:5de3:8f10 with SMTP id o10-20020a170903300a00b001865de38f10mr27954836pla.92.1669332373254; Thu, 24 Nov 2022 15:26:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332373; cv=none; d=google.com; s=arc-20160816; b=PCUS/qVKJYo2Iolg6NT4H9twabRWDu0yOBK1gVSPKJMkPGV1VKZDFeAHCSfN+rYjld kpH99YARHH8sOcOuWyoaooOt/er5ZHvBjjTxdojUo8MDZ+0kvQ72zkhB+626omKIF8+3 ISdVnbQcs1JrKIba35PG+2BHOgLCmpnIv4yjwD0fCX1DEyKtDzNv7cdZSAdSPi36fQJL d8hgr33tCECIe7Am+fqAUJvoiKWXg47Srb/rhDG0VEBpj/HsHLL/W+rZd86Om5Ua+u4Q Z9A8HEN14a1fmOsnZyLYVCvWiZvsXAOtoVUcr2RxoU9i8rcw7fLoi4Oykukt/Zcj4EdD Ygqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=5KOdOFErPOp6C7y41wmv9AEPY8LdxWiLCXWagjX0LQo=; b=bCPtJ2mxezGqL01KFiUn3OauganUgt02c/8O+mZ1RvTzPko8gxw0rhEMbRTcPv5d7P paaJTPBw7p/0rwxK45/LgjcEONBQxP/cfDoOrclvp9FuDoqUhqQbu+BU4LKWOZaXjFSz bkHqvhsb/GKK827n+wwyl0JT01HIbey8FhnIRqqnGEWcFW4uJXVuDbFv91ZthEiQxRJd zIfreLbV4m2GwFg4GsdFzbiwkInJG1Qgdu6x9S0a2IVZQ5y4MmCU/40xsv3e4vZrhzdn FPJ6ADQO38mb1kvyh7ZutRHu+I6Pu8B6/YB+xgjvQECqJDWIjE4e57oJN8cY3OjyVBBe mcQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=r+Z8jdx9; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h62-20020a628341000000b005745a589315si2218592pfe.74.2022.11.24.15.26.00; Thu, 24 Nov 2022 15:26:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=r+Z8jdx9; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229662AbiKXXY1 (ORCPT + 99 others); Thu, 24 Nov 2022 18:24:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229580AbiKXXYT (ORCPT ); Thu, 24 Nov 2022 18:24:19 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 862CD87A71; Thu, 24 Nov 2022 15:24:18 -0800 (PST) Message-ID: <20221124230313.690038274@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332256; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=5KOdOFErPOp6C7y41wmv9AEPY8LdxWiLCXWagjX0LQo=; b=r+Z8jdx9xiQfYn5DRFzz11GXCK6mfw7b1g7tFnernXYIVmZ8TOJHD8m23Drrw7/gxKCPmu aPE5euuxAO4/RGB5PN5kSHj6VMB/wjQHp0dRHRm8l6ZDWJ7jxY4K3/hkErUkSNzzkkXHjw 9uD0WaGsw3Er/v5oUThLIp6iRka4J5N6DnGn934N4TtZBi/JArt3/hJ/ddJPbxjFF5v36x aWCXVqJxUzvc2LfZ9Ly9S90q1sNMPiDplZruABNWlvP2CVhzgsPqJ3cPIr7AgCs1i2h5uZ w5nB9ZlEQFUbtzgHixcfAJF7OnRk5VfMTwa1/LQYO752lAoFFGf8OlEQqJBf7w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332256; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=5KOdOFErPOp6C7y41wmv9AEPY8LdxWiLCXWagjX0LQo=; b=Ae9PXJiTiv4j38UV/yuuVqEQNgrWN9fsu3zd4F1eRkF+CaOB1yMTiFjvW/oZXoo58P/uqf v6tA6iTdLO6moFCg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Jason Gunthorpe Subject: [patch V3 05/22] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_PARENT References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:15 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421862625085219?= X-GMAIL-MSGID: =?utf-8?q?1750421862625085219?= The new PCI/IMS (Interrupt Message Store) functionality is allowing hardware vendors to provide implementation specific storage for the MSI messages. This can be device memory and also host/guest memory, e.g. in queue memory which is shared with the hardware. This requires device specific MSI interrupt domains, which cannot be achieved by expanding the existing PCI/MSI interrupt domain concept which is a global interrupt domain shared by all PCI devices on a particular (IOMMU) segment: |--- device 1 [Vector]---[Remapping]---[PCI/MSI]--|... |--- device N This works because the PCI/MSI[-X] space is uniform, but falls apart with PCI/IMS which is implementation defined and must be available along with PCI/MSI[-X] on the same device. To support PCI/MSI[-X] plus PCI/IMS on the same device it is required to rework the PCI/MSI interrupt domain hierarchy concept in the following way: |--- [PCI/MSI] device 1 [Vector]---[Remapping]---|... |--- [PCI/MSI] device N That allows in the next step to create multiple interrupt domains per device: |--- [PCI/MSI] device 1 |--- [PCI/IMS] device 1 [Vector]---[Remapping]---|... |--- [PCI/MSI] device N |--- [PCI/IMS] device N So the domain which previously created the global PCI/MSI domain must now act as parent domain for the per device domains. The hierarchy depth is the same as before, but the PCI/MSI domains are then device specific and not longer global. Provide IRQ_DOMAIN_FLAG_MSI_PARENT, which allows to identify these parent domains, along with helpers to query it. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- include/linux/irqdomain.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -189,6 +189,9 @@ enum { /* Irq domain doesn't translate anything */ IRQ_DOMAIN_FLAG_NO_MAP = (1 << 6), + /* Irq domain is a MSI parent domain */ + IRQ_DOMAIN_FLAG_MSI_PARENT = (1 << 8), + /* * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved * for implementation specific purposes and ignored by the @@ -551,6 +554,11 @@ static inline bool irq_domain_is_msi_rem extern bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain); +static inline bool irq_domain_is_msi_parent(struct irq_domain *domain) +{ + return domain->flags & IRQ_DOMAIN_FLAG_MSI_PARENT; +} + #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ static inline int irq_domain_alloc_irqs(struct irq_domain *domain, unsigned int nr_irqs, int node, void *arg) @@ -596,6 +604,12 @@ irq_domain_hierarchical_is_msi_remap(str { return false; } + +static inline bool irq_domain_is_msi_parent(struct irq_domain *domain) +{ + return false; +} + #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ #else /* CONFIG_IRQ_DOMAIN */ From patchwork Thu Nov 24 23:24:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25722 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659576wrr; Thu, 24 Nov 2022 15:25:29 -0800 (PST) X-Google-Smtp-Source: AA0mqf5QhNrEEJy/iDaYPdAOYk11tm4g5sHSqmZ8QgRqzr4Bv/ee2jbgnqvWqxQhrSOc6FuQxwVC X-Received: by 2002:a17:902:b611:b0:189:1c94:99c3 with SMTP id b17-20020a170902b61100b001891c9499c3mr15720489pls.140.1669332329485; Thu, 24 Nov 2022 15:25:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332329; cv=none; d=google.com; s=arc-20160816; b=sfV3lmauDbsAqwhKqy1979Z7E4FajR6dEGmXGxcrEn0SnKi5uy0eGAEKJwoDEWW4cI qcX3pIMBwqrykILZf+S7QhzzdwYpZC5SuVszOF1ZCoABGYztFC0LfWqET5+Z3bEHgF+o oc6gKEQH3zKz2JEvkfOWCHoSVARl0tajU+cCkpkq7Vjv77iGSD/bA4F9E6TPBVVcu/pl uUaU575WloUCwTh6VD+pU6gNtMUf2DvKg5AWZ7D5wpfkV7V5aUpkathSq1M9dJxyuMVJ A0k6nimiTYFGHHg430CYdy6U35+nDp5sGA1ReP+Tg/b972m/9jl6+fs+1KKKkEb6DnbU q65w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=+CkTPHTMXOvRSl4YB673TzHqsVFLjHUDowE8deLkwuw=; b=O4ZQ71GTeCRcXaWumeZSsMwazyM1OQfI0UxfMpQxueXqM/+LMzQrtPetFtCBsdKnfw KgLEJMQ9oEyWJ1YffVqLNt+oriJOo37pthBHYtwLLruTEJpLAXASu2+Vi/LLAgVayfy9 /wtAHTqlanlYR0oHyE6KLYes122yPGL/XOSmj7EAZupvu3XAZSQyxbPFI5SHKoBhTiOB uUSoDfg4QffNcNcCVBCA/vYVGVfCOZhjH0M/kWB4Y5oqA2ZOAMJNJX8RBKaVD4ZcbrOg Vq/FYGyJ+ri5Gq83NjfFkmsriu1L6ggyT7eOCIS/Vzv+9jaNcGO7dSCztEVHKZ3/zM6O mZfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="iHZCIG/c"; dkim=neutral (no key) header.i=@linutronix.de header.b=zJfPk91O; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e17-20020a17090301d100b001783bc48eb2si2203391plh.4.2022.11.24.15.25.16; Thu, 24 Nov 2022 15:25:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="iHZCIG/c"; dkim=neutral (no key) header.i=@linutronix.de header.b=zJfPk91O; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229749AbiKXXYh (ORCPT + 99 others); Thu, 24 Nov 2022 18:24:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229687AbiKXXYZ (ORCPT ); Thu, 24 Nov 2022 18:24:25 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42BBB8757C; Thu, 24 Nov 2022 15:24:20 -0800 (PST) Message-ID: <20221124230313.747627287@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332258; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=+CkTPHTMXOvRSl4YB673TzHqsVFLjHUDowE8deLkwuw=; b=iHZCIG/cHXpD7WKPRYdgcDW35TWhbcCwmEj1hHREbZK+wJZiDn7hcg4f4bZX5hg4GCPQJB xlLigskN1507vPq6NLK55NNEcB1SMKTUHKcznSBb34c2hDmPbmDHoIQ2yjvySwOC6dceu0 FT+IrAwleEdy35HvzApWQNWCq7ki/zrjvPHhuqO5fdpiYiv70eUv2l8nddVUofTnt3Zo4p m3sfa0us8oaxzd9vI2KbOqDmixC3WipVjKUtlNXN8qSn3/Wim0H5/T6bSWI0L1qgkxwU1V baA46kEEU03IzcehgEfAYwT5WADk49/l19oA5fqPaijIWXH2zEnd6/YQtEpW7g== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332258; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=+CkTPHTMXOvRSl4YB673TzHqsVFLjHUDowE8deLkwuw=; b=zJfPk91OdvfHBBvIw058Rm2gSOpHIDNVtmli3FpQqrdhf4wbK8EO0F3yMcEJdH/6GGCLF4 koEXG5vYC7ar4CAg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 06/22] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_DEVICE References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:17 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421816799917036?= X-GMAIL-MSGID: =?utf-8?q?1750421816799917036?= Similar to marking parent MSI domains it's required to identify per device domains. Add flag and helpers. Signed-off-by: Thomas Gleixner --- include/linux/irqdomain.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -192,6 +192,9 @@ enum { /* Irq domain is a MSI parent domain */ IRQ_DOMAIN_FLAG_MSI_PARENT = (1 << 8), + /* Irq domain is a MSI device domain */ + IRQ_DOMAIN_FLAG_MSI_DEVICE = (1 << 9), + /* * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved * for implementation specific purposes and ignored by the @@ -559,6 +562,11 @@ static inline bool irq_domain_is_msi_par return domain->flags & IRQ_DOMAIN_FLAG_MSI_PARENT; } +static inline bool irq_domain_is_msi_device(struct irq_domain *domain) +{ + return domain->flags & IRQ_DOMAIN_FLAG_MSI_DEVICE; +} + #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ static inline int irq_domain_alloc_irqs(struct irq_domain *domain, unsigned int nr_irqs, int node, void *arg) @@ -609,6 +617,11 @@ static inline bool irq_domain_is_msi_par { return false; } + +static inline bool irq_domain_is_msi_device(struct irq_domain *domain) +{ + return false; +} #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ From patchwork Thu Nov 24 23:24:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25723 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659666wrr; Thu, 24 Nov 2022 15:25:45 -0800 (PST) X-Google-Smtp-Source: AA0mqf5y+YJsNKfvqF8YQDajNcZmclKw+K6HlK07WUORzn2epBQCK8WoibrkTEJBjwmEZOZ3/A2T X-Received: by 2002:a17:902:7885:b0:17e:c0f0:96a4 with SMTP id q5-20020a170902788500b0017ec0f096a4mr16744253pll.80.1669332345083; Thu, 24 Nov 2022 15:25:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332345; cv=none; d=google.com; s=arc-20160816; b=O+K6ArdsPxOE/HSrxAssKnikUkof5gvqepB5fc/dsG07wT67UdzXOtnJEztCtPqtPK 1C7cm7HwpAG6ISv0UbXAKT+6dp1KtWk+LEKV21t4GMhwiPWwFrAX9K7XUdAqwjozUKil f4V5JIs0k2XlD78GzlEWZN1HvKSqUNMpnwndlV0C5LX4vq5V3a0bbFcPbxR/wDT0/S3c LUVAh8818fsAHftObTgNUr7650ypq/37U5k4ltdLwcyqAImbk/4D8VIiJvJHvb/2U8nU AOxkMTgiZsyF1SsN/OWDjTFTgA3LCi7I5LKBPwOl5y47v0ZH0rWDKlWOviH7G7V7tqmV kalg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=9rEv0ZCHRcbwfGXHvRaB+26Gs3i0vHsf2KEnMS96bjY=; b=WW99LEdaZtkfH4wM7Dc3MR+ePdTgL4SCdwND5NO4b3OORRoF3xsXqOgVSXJAXKRa7X DqV4cG6RwyiztlAE4q+xiMQLrqivCEfq2HrfuXiiq6u1uRubUZwgmEUtKqCDhFYXmdqI +iQfXfgV8k73Nj9CA6B8j0TUGhZKzmMrfbz4V+gCnUnRLULT/WVynPEaRcT8OQXafsnn YU4DU2rZ2I0Zwsp891qtbzLZNzSZi2J7uyvZZpwj4PEV46+lfr8BP7br4VrsiLtEdJtD nNTtRnt5EzES/IrgJgKVq1uympjaWtNT9myD0PM/5fUVYchgv7suPQbGTWMnIUrCQMy9 6kxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=vsPAFMCy; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=9Tyg7PWS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r29-20020a63a55d000000b0047063e59929si1541009pgu.836.2022.11.24.15.25.30; Thu, 24 Nov 2022 15:25:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=vsPAFMCy; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=9Tyg7PWS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229776AbiKXXYk (ORCPT + 99 others); Thu, 24 Nov 2022 18:24:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229690AbiKXXYe (ORCPT ); Thu, 24 Nov 2022 18:24:34 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81BFC88B4E; Thu, 24 Nov 2022 15:24:21 -0800 (PST) Message-ID: <20221124230313.806128070@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332259; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=9rEv0ZCHRcbwfGXHvRaB+26Gs3i0vHsf2KEnMS96bjY=; b=vsPAFMCy1onT5uOAgcfpdCJaq1W7nRGPk5Oovvujiv005FbeclV1d37UGDuBaxg3bAnevx +oMjUxaBs2nufee8n1bjtgj4213C96760kyYDTlsbaePWRnyG8kCZOPrmCrn4wMtxItFdS tFkyFmLs/W4WvILbaYe7YjIVn7TrKXBqXUmOczrvsKpe5mr7q5sEsVABK/8VkHGfHpw3rL /QYeZne8Ys/lLumai1Ju/blYMzYGGMPe1BH9pP9xEIn+JRvzuPNEdg7MzeWNi+iJ2WKAxs zQITEy/Qt+p1Ykcb9TLcx1gfBc1U2gjZ1CgYIHBRtTv3wNy57WqZRzx6gepplg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332259; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=9rEv0ZCHRcbwfGXHvRaB+26Gs3i0vHsf2KEnMS96bjY=; b=9Tyg7PWSN9dj4EwqeKIBZ0++IEDFe9b3qoZRvfs2pSLMKkR5ib9qqQv7pwXlvTp72AwZPp iWimgDqkaMlmznDQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 07/22] genirq/msi: Check for invalid MSI parent domain usage References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:19 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421832985562170?= X-GMAIL-MSGID: =?utf-8?q?1750421832985562170?= In the upcoming per device MSI domain concept the MSI parent domains are not allowed to be used as regular MSI domains where the MSI allocation/free operations are applicable. Add appropriate checks. Signed-off-by: Thomas Gleixner --- V2: Made the error return understandable. (Kevin) --- kernel/irq/msi.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -937,13 +937,21 @@ int msi_domain_alloc_irqs_descs_locked(s lockdep_assert_held(&dev->msi.data->mutex); + if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) { + ret = -EINVAL; + goto free; + } + + /* Frees allocated descriptors in case of failure. */ ret = msi_domain_add_simple_msi_descs(info, dev, nvec); if (ret) - return ret; + goto free; ret = ops->domain_alloc_irqs(domain, dev, nvec); - if (ret) - msi_domain_free_irqs_descs_locked(domain, dev); + if (!ret) + return 0; +free: + msi_domain_free_irqs_descs_locked(domain, dev); return ret; } @@ -1013,6 +1021,9 @@ void msi_domain_free_irqs_descs_locked(s lockdep_assert_held(&dev->msi.data->mutex); + if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) + return; + ops->domain_free_irqs(domain, dev); if (ops->msi_post_free) ops->msi_post_free(domain, dev); From patchwork Thu Nov 24 23:24:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25724 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659692wrr; Thu, 24 Nov 2022 15:25:47 -0800 (PST) X-Google-Smtp-Source: AA0mqf4o43vVO1Mol96VJiAq4DCkBf+vDtkR2SrKl+F1jIY6J8DB/yPwdVLFIlsTg/jzVJyEZusW X-Received: by 2002:a17:902:c60b:b0:189:651d:5c9e with SMTP id r11-20020a170902c60b00b00189651d5c9emr1247640plr.24.1669332347078; Thu, 24 Nov 2022 15:25:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332347; cv=none; d=google.com; s=arc-20160816; b=s0LqZzAkWraNXYaXr9t0hhqQNmreUqNemsdjBcnWr86eSVMP9FZ6qBXzNXsSCK9P8t Br8yx7WJrA/x1BhlL5tOORg0RBux16QgmjYyNmPyf/RenDwlEEGo+rgH+KPXaN6pf0cd +8tvcF6Vcx4H1mcsEhW4anPFsFzAPtcsRQXoa8eCyQd9GF5IWzLPi+7FISxo2QsnUxxt PfoddhOAwEm2zTsBh0KRlIrjpcgewWhS62Z9yF0B7RHNTYv8pvu0hUk8vdSiUQq1n47y f6+JC1GVtb18F5NwsFBwnxSb+uhHqETWnA+oh/kWo/LVJoD5mM4ROPpZxklnaRB/IlFC 1H5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=NnY4k5ND5J68IEMTrYz8pNwP6PIWNLBi+fOo/MjnRyo=; b=Hk4ouNqY8VZ/wl+BVtHSRZp5XShe1qUVRqNLmOrJ9zl4soEAGQkwSn4DBkO5d6qtNi SZFVvrjPiORSshXFiCWpPx/wvg/M16sceISzri668KqG7+c60Js7XJw6AM3uy+xq3bhw s/L7pASTAl79G8oGX8ZCAPKWM//r68OMwEiO6UYt+R6MkqcD8e5iH+kHe08DuVuMkldP O7d8JyjQ8NuA15OMm4pCmIgUa+ApSm2z24/jCgmBLqxLiy7j9mBzBc6/zAvZQ2vZnRSm Xx9mHHnpE+zzJv7DpsIew6jdXDkMOT5iLHyagd+5X0k3UasFQ6b3O1SGag+6kjXTtbwI hD4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=HM1HfQDS; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t23-20020a170902b21700b00186a06a3396si2005059plr.153.2022.11.24.15.25.32; Thu, 24 Nov 2022 15:25:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=HM1HfQDS; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229783AbiKXXYn (ORCPT + 99 others); Thu, 24 Nov 2022 18:24:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229683AbiKXXYe (ORCPT ); Thu, 24 Nov 2022 18:24:34 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D2C688B51; Thu, 24 Nov 2022 15:24:23 -0800 (PST) Message-ID: <20221124230313.864887773@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332261; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=NnY4k5ND5J68IEMTrYz8pNwP6PIWNLBi+fOo/MjnRyo=; b=HM1HfQDSQXO7ZFOEwPiY6bEBSZmkbhTocrtAjj9GAmbn7I++7rFXTsmzYUoidOWlolCx2E cW6w5UPS5Z2/T0zGQikoWs78c++WPLJtCDxdhlOoB66xITSAs+F85O4zAR67tgCH9po3gw nTJFp6B2clr0mhZ5HmNRvYC0pSBST62o2NMWmgcjd6zMJGmJnFGFQni8u4CpAua8R0SIfV n8zmdffKGUXDbqJwj63KEoYRWWPiqqTMsASYaLdnymE4JrHTVFNfPo9m7E2BBFt7G3kpY1 tXTDEfpD2gi0cXJaVLLk5taLQhpf5F9y9loAeXm3Y4bIE5lBOHK9UGBKFcoehQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332261; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=NnY4k5ND5J68IEMTrYz8pNwP6PIWNLBi+fOo/MjnRyo=; b=mg3UZqz7MjLrqPbSwSowHzkClGzyjSE6/0d/Z5rbjPfG6lJpB1lI/z0/5bajKe51lUayxj QIFAUelszC5jUWDw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 08/22] genirq/msi: Move xarray into a separate struct and create an array References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:20 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421835456473656?= X-GMAIL-MSGID: =?utf-8?q?1750421835456473656?= The upcoming support for multiple MSI domains per device requires storage for the MSI descriptors and in a second step storage for the irqdomain pointers. Move the xarray into a separate data structure msi_dev_domain and create an array with size 1 in msi_device_data, which can be expanded later when the support for per device domains is implemented. Signed-off-by: Thomas Gleixner --- V3: New patch to avoid the segmentation of the xarray (Marc) --- include/linux/msi.h | 13 +++++++++++-- include/linux/msi_api.h | 8 ++++++++ kernel/irq/msi.c | 32 ++++++++++++++++++++++---------- 3 files changed, 41 insertions(+), 12 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -173,19 +173,28 @@ enum msi_desc_filter { MSI_DESC_ASSOCIATED, }; + +/** + * struct msi_dev_domain - The internals of MSI domain info per device + * @store: Xarray for storing MSI descriptor pointers + */ +struct msi_dev_domain { + struct xarray store; +}; + /** * msi_device_data - MSI per device data * @properties: MSI properties which are interesting to drivers * @platform_data: Platform-MSI specific data * @mutex: Mutex protecting the MSI descriptor store - * @__store: Xarray for storing MSI descriptor pointers + * @__domains: Internal data for per device MSI domains * @__iter_idx: Index to search the next entry for iterators */ struct msi_device_data { unsigned long properties; struct platform_msi_priv_data *platform_data; struct mutex mutex; - struct xarray __store; + struct msi_dev_domain __domains[MSI_MAX_DEVICE_IRQDOMAINS]; unsigned long __iter_idx; }; --- a/include/linux/msi_api.h +++ b/include/linux/msi_api.h @@ -10,6 +10,14 @@ struct device; +/* + * Per device interrupt domain related constants. + */ +enum msi_domain_ids { + MSI_DEFAULT_DOMAIN, + MSI_MAX_DEVICE_IRQDOMAINS, +}; + unsigned int msi_get_virq(struct device *dev, unsigned int index); #endif --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -60,10 +60,11 @@ static void msi_free_desc(struct msi_des static int msi_insert_desc(struct msi_device_data *md, struct msi_desc *desc, unsigned int index) { + struct xarray *xa = &md->__domains[MSI_DEFAULT_DOMAIN].store; int ret; desc->msi_index = index; - ret = xa_insert(&md->__store, index, desc, GFP_KERNEL); + ret = xa_insert(xa, index, desc, GFP_KERNEL); if (ret) msi_free_desc(desc); return ret; @@ -147,7 +148,7 @@ static bool msi_desc_match(struct msi_de void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index) { - struct xarray *xa = &dev->msi.data->__store; + struct xarray *xa = &dev->msi.data->__domains[MSI_DEFAULT_DOMAIN].store; struct msi_desc *desc; unsigned long idx; @@ -179,9 +180,12 @@ EXPORT_SYMBOL_GPL(get_cached_msi_msg); static void msi_device_data_release(struct device *dev, void *res) { struct msi_device_data *md = res; + int i; - WARN_ON_ONCE(!xa_empty(&md->__store)); - xa_destroy(&md->__store); + for (i = 0; i < MSI_MAX_DEVICE_IRQDOMAINS; i++) { + WARN_ON_ONCE(!xa_empty(&md->__domains[i].store)); + xa_destroy(&md->__domains[i].store); + } dev->msi.data = NULL; } @@ -198,7 +202,7 @@ static void msi_device_data_release(stru int msi_setup_device_data(struct device *dev) { struct msi_device_data *md; - int ret; + int ret, i; if (dev->msi.data) return 0; @@ -213,7 +217,9 @@ int msi_setup_device_data(struct device return ret; } - xa_init(&md->__store); + for (i = 0; i < MSI_MAX_DEVICE_IRQDOMAINS; i++) + xa_init(&md->__domains[i].store); + mutex_init(&md->mutex); dev->msi.data = md; devres_add(dev, md); @@ -236,7 +242,7 @@ EXPORT_SYMBOL_GPL(msi_lock_descs); */ void msi_unlock_descs(struct device *dev) { - /* Invalidate the index wich was cached by the iterator */ + /* Invalidate the index which was cached by the iterator */ dev->msi.data->__iter_idx = MSI_MAX_INDEX; mutex_unlock(&dev->msi.data->mutex); } @@ -244,9 +250,10 @@ EXPORT_SYMBOL_GPL(msi_unlock_descs); static struct msi_desc *msi_find_desc(struct msi_device_data *md, enum msi_desc_filter filter) { + struct xarray *xa = &md->__domains[MSI_DEFAULT_DOMAIN].store; struct msi_desc *desc; - xa_for_each_start(&md->__store, md->__iter_idx, desc, md->__iter_idx) { + xa_for_each_start(xa, md->__iter_idx, desc, md->__iter_idx) { if (msi_desc_match(desc, filter)) return desc; } @@ -320,6 +327,7 @@ unsigned int msi_get_virq(struct device { struct msi_desc *desc; unsigned int ret = 0; + struct xarray *xa; bool pcimsi; if (!dev->msi.data) @@ -328,7 +336,8 @@ unsigned int msi_get_virq(struct device pcimsi = dev_is_pci(dev) ? to_pci_dev(dev)->msi_enabled : false; msi_lock_descs(dev); - desc = xa_load(&dev->msi.data->__store, pcimsi ? 0 : index); + xa = &dev->msi.data->__domains[MSI_DEFAULT_DOMAIN].store; + desc = xa_load(xa, pcimsi ? 0 : index); if (desc && desc->irq) { /* * PCI-MSI has only one descriptor for multiple interrupts. @@ -707,6 +716,7 @@ int msi_domain_populate_irqs(struct irq_ struct msi_domain_info *info = domain->host_data; struct msi_domain_ops *ops = info->ops; struct msi_desc *desc; + struct xarray *xa; int ret, virq; msi_lock_descs(dev); @@ -714,8 +724,10 @@ int msi_domain_populate_irqs(struct irq_ if (ret) goto unlock; + xa = &dev->msi.data->__domains[MSI_DEFAULT_DOMAIN].store; + for (virq = virq_base; virq < virq_base + nvec; virq++) { - desc = xa_load(&dev->msi.data->__store, virq); + desc = xa_load(xa, virq); desc->irq = virq; ops->set_desc(arg, desc); From patchwork Thu Nov 24 23:24:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25725 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659738wrr; Thu, 24 Nov 2022 15:25:55 -0800 (PST) X-Google-Smtp-Source: AA0mqf4bAIWQGRl0GcwMojmdI4W/Z20wTEgDL+STe5PIX2VyOgNt+FicoVQqOqZluisvk++cniL2 X-Received: by 2002:a63:5fd6:0:b0:477:bdb5:878f with SMTP id t205-20020a635fd6000000b00477bdb5878fmr7830117pgb.61.1669332355087; Thu, 24 Nov 2022 15:25:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332355; cv=none; d=google.com; s=arc-20160816; b=jvMFcuB84BoKTXMbi+vJLFtyPd4TcQu7elN9wOmVeTZXvfFxC3Df3QZ0iOOgn2Zkzn TcZIxMysVIPff62bKB526Glk/HOKCYqd/IicBC/z5R7F6blh6AiNjOjHG0YuYEQoif1H i8TdlcNdM7YpdNIgHG39YuCcyh4Jav9w78ilXSXqeR3C97jEqgZiW0MSW38NZPCyuG8l qWh9FbVfM+Q+noke2+IkInZ1+FcBsZWLPGgPy0Zq/cmNGt30OJfZLu8PwllxJdK+Wcqy udasasyahpUibZWDGTJhpFy5SudfuKvVMccOQjnziQH5qPxCc/D4QvpY9llOcUj9+zzE sB0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=BJi5dwk0jz30HETfOkPgoRQ1A7CjonfRPPdcMlCUzKw=; b=Jw6cUQUwVSPaLCuQgGBOV/giZxgFkh8oA/W1Qg/nQsnCjl8mbFEAYZ43kmyiuI0v8w WogZbf0IjeoIIUxUngVTx/yDp0RD6I89RYro3nXvgwA0ZSnq/JKkiWuJThqp80LbGRTI f0tiOkFN1MO4zoatz6w6LwjanAJHCB5YP24Ouy0xnFiRHxb+voPfAZABmaONFeaUcJsj hYqR0i9bvRxcN8WvNosG+96k+2li6wANYGVwiikSy21sWqRdg4g+lSWO4rGqI0EX7C9p /G7cdN6/PY5vt4OWib9Az/HWuGKN/kq66VMrrEWMS2GpHmVIgtpJRx6LEuOsKIv+MyDZ Ky3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=uLgPamwA; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h7-20020a632107000000b00476d18b0d24si2602492pgh.742.2022.11.24.15.25.41; Thu, 24 Nov 2022 15:25:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=uLgPamwA; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229746AbiKXXYy (ORCPT + 99 others); Thu, 24 Nov 2022 18:24:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229675AbiKXXYg (ORCPT ); Thu, 24 Nov 2022 18:24:36 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49CD2898E7; Thu, 24 Nov 2022 15:24:25 -0800 (PST) Message-ID: <20221124230313.923860399@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332263; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=BJi5dwk0jz30HETfOkPgoRQ1A7CjonfRPPdcMlCUzKw=; b=uLgPamwAoH81d9p92Z4MvAAxOEMhoJZOWImWf5FEq+5V3Ijf8p76AW3Nw3JFmC5GyqgOmr TPmp2X8s9K3byzhNqiNgFjhAZhf9HV9jaobBYFF6F13rkY7UJHAqpeZPNQognmqwZPVFlT xMfHKWq4o2GG3QOlZk33G3WS/ZOzBn3qR2ON0xKB2k1kMVUlaRhJmih8alHRdsF0nRAFHm xcOBE08nQX12IrtDg3ljaoAv0iaHS1x8GGCOtpqJlqHl7JYTpRPO37QLHeQaXt67fWiqOD VABP5ArGjHB4xfT6W+ROLgxz0wQgM04LjNW3AInXpr1PRD0e4Dk0VKXuVuwO4w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332263; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=BJi5dwk0jz30HETfOkPgoRQ1A7CjonfRPPdcMlCUzKw=; b=Y20fQzYqd/z4lG+KIf0OGav7Y3ngbWHVqg57QE1AR96VzM/FCX387MoEHp7ID8y8EaurlY UtWJUhyaV7oWFbCw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 09/22] genirq/msi: Add pointers for per device irq domains References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:22 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421843634986057?= X-GMAIL-MSGID: =?utf-8?q?1750421843634986057?= With the upcoming per device MSI interrupt domain support it is necessary to store the domain pointers per device. Instead of delegating that storage to device drivers or subsystems add a domain pointer to the msi_dev_domain array in struct msi_device_data. This pointer is also used to take care of tearing down the irq domains when msi_device_data is cleaned up via devres. The interfaces into the MSI core will be changed from irqdomain pointer based interfaces to domain id based interfaces to support multiple MSI domains on a single device (e.g. PCI/MSI[-X] and PCI/IMS. Once the per device domain support is complete the irq domain pointer in struct device::msi.domain will not longer contain a pointer to the "global" MSI domain. It will contain a pointer to the MSI parent domain instead. It would be a horrible maze of conditionals to evaluate all over the place which domain pointer should be used, i.e. the "global" one in device::msi::domain or one from the internal pointer array. To avoid this evaluate in msi_setup_device_data() whether the irq domain which is associated to a device is a "global" or a parent MSI domain. If it is global then copy the pointer into the first entry of the msi_dev_domain array. This allows to convert interfaces and implementation to domain ids while keeping everything existing working. Signed-off-by: Thomas Gleixner --- V3: Adopt to the domain/xarray storage change --- include/linux/msi.h | 3 +++ kernel/irq/msi.c | 9 +++++++++ 2 files changed, 12 insertions(+) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -77,6 +77,7 @@ struct msi_desc; struct pci_dev; struct platform_msi_priv_data; struct device_attribute; +struct irq_domain; void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg); #ifdef CONFIG_GENERIC_MSI_IRQ @@ -177,9 +178,11 @@ enum msi_desc_filter { /** * struct msi_dev_domain - The internals of MSI domain info per device * @store: Xarray for storing MSI descriptor pointers + * @irqdomain: Pointer to a per device interrupt domain */ struct msi_dev_domain { struct xarray store; + struct irq_domain *domain; }; /** --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -220,6 +220,15 @@ int msi_setup_device_data(struct device for (i = 0; i < MSI_MAX_DEVICE_IRQDOMAINS; i++) xa_init(&md->__domains[i].store); + /* + * If @dev::msi::domain is set and is a global MSI domain, copy the + * pointer into the domain array so all code can operate on domain + * ids. The NULL pointer check is required to keep the legacy + * architecture specific PCI/MSI support working. + */ + if (dev->msi.domain && !irq_domain_is_msi_parent(dev->msi.domain)) + md->__domains[MSI_DEFAULT_DOMAIN].domain = dev->msi.domain; + mutex_init(&md->mutex); dev->msi.data = md; devres_add(dev, md); From patchwork Thu Nov 24 23:24:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25727 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659788wrr; Thu, 24 Nov 2022 15:26:01 -0800 (PST) X-Google-Smtp-Source: AA0mqf59gUiQXEcYccPtXfaiXKon9e1Q8ihffSzV12liZVmoMPLfHbKLVeVdzeuIWdXebome2ev4 X-Received: by 2002:a17:903:1311:b0:189:1e5:8422 with SMTP id iy17-20020a170903131100b0018901e58422mr15698243plb.17.1669332361683; Thu, 24 Nov 2022 15:26:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332361; cv=none; d=google.com; s=arc-20160816; b=QeJk4YkA0BUZRWcchPKpumku1JKAMuLqwhQgGjuPdnCZj1y9xdh8qy8dMSVKFvf+vO psUU6Zy1DlwsxkvHzPpflajvb2S+NWILEDrnLCOZShnjdhxFcBIxaUFiS7YvW3yEveOa L8y2KR/lVrtbzL1ERWFXmiAB4sigVz8Y0/WMc/g6UK/14nscWldKIdD60yiaf2vh1aFr bnXKZKz3SURK6ezdoZkqSq2ReT6dIpSTgUebSsEjQpoo5tEWmgB+RAP2RPSd7YfaRZNS +AihWlGZfbGCjF/5JEJ3p7imTOxDJ+tIxefrXVXOBNx4exmw+mKZVPjKgX0D+m0DBJnQ PHSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=H4LgR27rxWvowkqduv+44wQH1yKk935seCxATvwOx3U=; b=gVyHhLjN/DxwgRJLNUDv4Gl13CFegV0MIiFv2sabuelUjeURTaG83v/bMP4O+JHHax b9Y4wboT1hU7KZpN+40G1oCSR0HK3S+EE/oWmdat++Xf+quF+o9TyOIridVubRndLiTx WU+dCitDMpK94SwQUPoe/S0yArcdowIODsmD4LfLbaer0Gc05HiS1gzqcy0383IRQua/ JO6s+lmeK12qhTom+Kg6opnZIdP8vElmsPu9r9a2TnRWf1yIfc0f8nUs2V2rQCuP4UBH 1X9yGsEznrtOFMXHi5moDZ/qv44fTDWntYys1sWvtbRuYs7dJYX4EwhN1dokAQQKAJXG npqQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Zpb6D8Gi; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=UHT4mxiD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x4-20020a656aa4000000b0046efd09c4f2si1130963pgu.440.2022.11.24.15.25.48; Thu, 24 Nov 2022 15:26:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Zpb6D8Gi; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=UHT4mxiD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229538AbiKXXY7 (ORCPT + 99 others); Thu, 24 Nov 2022 18:24:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229755AbiKXXYi (ORCPT ); Thu, 24 Nov 2022 18:24:38 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55AE38A158; Thu, 24 Nov 2022 15:24:26 -0800 (PST) Message-ID: <20221124230313.985498981@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332264; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=H4LgR27rxWvowkqduv+44wQH1yKk935seCxATvwOx3U=; b=Zpb6D8GiMXq+Hbac5EKd7HZxAaZ1f16BYQtjxy+TNJ041MURdG3QxWOhCE1e4HVsyIZKzF gmcTxUpcgEQCSzWYVri/vpDfsZDbs2j11eERMVVdRPMig1geQTtUiXmbY8GMYm4Qh8JI76 xKu28jHNkF8fWTc9xOeMFfoxLZByiOvuBFFsM7VmKtz+b5efE7dS3Feny1do38AQzXY0U1 HL3KxpHDJZkKlgZXa4l+t33xdNR14muOGdaNkoQ9jWFtZiVe2lxN9Xxj4yu2cmSNfn3ilH 6uPMzEiqmiR+Ww1tCh7Dv3xknjM0r57XjoIrjxR7RmKtlnVOlwe9XD9S8/bNfA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332264; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=H4LgR27rxWvowkqduv+44wQH1yKk935seCxATvwOx3U=; b=UHT4mxiDh70tN1igdVL2dT88X6PGfKDYxSHMCHNQIqOwNb9rUpyd5t1ALKspooR41O108O 1Z8dS9iROL7TgyCQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 10/22] genirq/msi: Make MSI descriptor iterators device domain aware References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:24 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421850113035379?= X-GMAIL-MSGID: =?utf-8?q?1750421850113035379?= To support multiple MSI interrupt domains per device it is necessary to segment the xarray MSI descriptor storage. Each domain gets up to MSI_MAX_INDEX entries. Change the iterators so they operate with domain ids and take the domain offsets into account. The publicly available iterators which are mostly used in legacy implementations and the PCI/MSI core default to MSI_DEFAULT_DOMAIN (0) which is the id for the existing "global" domains. No functional change. Signed-off-by: Thomas Gleixner --- V2: Fix the off by one so the index space is including MSI_MAX_INDEX (Kevin) V3: Adopt to the domain/xarray storage change --- include/linux/msi.h | 48 ++++++++++++++++++++++++++++++++++++++++++------ kernel/irq/msi.c | 35 +++++++++++++++++++++++------------ 2 files changed, 65 insertions(+), 18 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -206,11 +206,48 @@ int msi_setup_device_data(struct device void msi_lock_descs(struct device *dev); void msi_unlock_descs(struct device *dev); -struct msi_desc *msi_first_desc(struct device *dev, enum msi_desc_filter filter); -struct msi_desc *msi_next_desc(struct device *dev, enum msi_desc_filter filter); +struct msi_desc *msi_domain_first_desc(struct device *dev, unsigned int domid, + enum msi_desc_filter filter); /** - * msi_for_each_desc - Iterate the MSI descriptors + * msi_first_desc - Get the first MSI descriptor of the default irqdomain + * @dev: Device to operate on + * @filter: Descriptor state filter + * + * Must be called with the MSI descriptor mutex held, i.e. msi_lock_descs() + * must be invoked before the call. + * + * Return: Pointer to the first MSI descriptor matching the search + * criteria, NULL if none found. + */ +static inline struct msi_desc *msi_first_desc(struct device *dev, + enum msi_desc_filter filter) +{ + return msi_domain_first_desc(dev, MSI_DEFAULT_DOMAIN, filter); +} + +struct msi_desc *msi_next_desc(struct device *dev, unsigned int domid, + enum msi_desc_filter filter); + +/** + * msi_domain_for_each_desc - Iterate the MSI descriptors in a specific domain + * + * @desc: struct msi_desc pointer used as iterator + * @dev: struct device pointer - device to iterate + * @domid: The id of the interrupt domain which should be walked. + * @filter: Filter for descriptor selection + * + * Notes: + * - The loop must be protected with a msi_lock_descs()/msi_unlock_descs() + * pair. + * - It is safe to remove a retrieved MSI descriptor in the loop. + */ +#define msi_domain_for_each_desc(desc, dev, domid, filter) \ + for ((desc) = msi_domain_first_desc((dev), (domid), (filter)); (desc); \ + (desc) = msi_next_desc((dev), (domid), (filter))) + +/** + * msi_for_each_desc - Iterate the MSI descriptors in the default irqdomain * * @desc: struct msi_desc pointer used as iterator * @dev: struct device pointer - device to iterate @@ -221,9 +258,8 @@ struct msi_desc *msi_next_desc(struct de * pair. * - It is safe to remove a retrieved MSI descriptor in the loop. */ -#define msi_for_each_desc(desc, dev, filter) \ - for ((desc) = msi_first_desc((dev), (filter)); (desc); \ - (desc) = msi_next_desc((dev), (filter))) +#define msi_for_each_desc(desc, dev, filter) \ + msi_domain_for_each_desc((desc), (dev), MSI_DEFAULT_DOMAIN, (filter)) #define msi_desc_to_dev(desc) ((desc)->dev) --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -19,8 +19,14 @@ #include "internals.h" +/* Invalid Xarray index which is outside of any searchable range */ +#define MSI_XA_MAX_INDEX (ULONG_MAX - 1) +/* The maximum domain size */ +#define MSI_XA_DOMAIN_SIZE (MSI_MAX_INDEX + 1) + static inline int msi_sysfs_create_group(struct device *dev); + /** * msi_alloc_desc - Allocate an initialized msi_desc * @dev: Pointer to the device for which this is allocated @@ -252,27 +258,29 @@ EXPORT_SYMBOL_GPL(msi_lock_descs); void msi_unlock_descs(struct device *dev) { /* Invalidate the index which was cached by the iterator */ - dev->msi.data->__iter_idx = MSI_MAX_INDEX; + dev->msi.data->__iter_idx = MSI_XA_MAX_INDEX; mutex_unlock(&dev->msi.data->mutex); } EXPORT_SYMBOL_GPL(msi_unlock_descs); -static struct msi_desc *msi_find_desc(struct msi_device_data *md, enum msi_desc_filter filter) +static struct msi_desc *msi_find_desc(struct msi_device_data *md, unsigned int domid, + enum msi_desc_filter filter) { - struct xarray *xa = &md->__domains[MSI_DEFAULT_DOMAIN].store; + struct xarray *xa = &md->__domains[domid].store; struct msi_desc *desc; xa_for_each_start(xa, md->__iter_idx, desc, md->__iter_idx) { if (msi_desc_match(desc, filter)) return desc; } - md->__iter_idx = MSI_MAX_INDEX; + md->__iter_idx = MSI_XA_MAX_INDEX; return NULL; } /** - * msi_first_desc - Get the first MSI descriptor of a device + * msi_domain_first_desc - Get the first MSI descriptor of an irqdomain associated to a device * @dev: Device to operate on + * @domid: The id of the interrupt domain which should be walked. * @filter: Descriptor state filter * * Must be called with the MSI descriptor mutex held, i.e. msi_lock_descs() @@ -281,23 +289,25 @@ static struct msi_desc *msi_find_desc(st * Return: Pointer to the first MSI descriptor matching the search * criteria, NULL if none found. */ -struct msi_desc *msi_first_desc(struct device *dev, enum msi_desc_filter filter) +struct msi_desc *msi_domain_first_desc(struct device *dev, unsigned int domid, + enum msi_desc_filter filter) { struct msi_device_data *md = dev->msi.data; - if (WARN_ON_ONCE(!md)) + if (WARN_ON_ONCE(!md || domid >= MSI_MAX_DEVICE_IRQDOMAINS)) return NULL; lockdep_assert_held(&md->mutex); md->__iter_idx = 0; - return msi_find_desc(md, filter); + return msi_find_desc(md, domid, filter); } -EXPORT_SYMBOL_GPL(msi_first_desc); +EXPORT_SYMBOL_GPL(msi_domain_first_desc); /** * msi_next_desc - Get the next MSI descriptor of a device * @dev: Device to operate on + * @domid: The id of the interrupt domain which should be walked. * @filter: Descriptor state filter * * The first invocation of msi_next_desc() has to be preceeded by a @@ -308,11 +318,12 @@ EXPORT_SYMBOL_GPL(msi_first_desc); * Return: Pointer to the next MSI descriptor matching the search * criteria, NULL if none found. */ -struct msi_desc *msi_next_desc(struct device *dev, enum msi_desc_filter filter) +struct msi_desc *msi_next_desc(struct device *dev, unsigned int domid, + enum msi_desc_filter filter) { struct msi_device_data *md = dev->msi.data; - if (WARN_ON_ONCE(!md)) + if (WARN_ON_ONCE(!md || domid >= MSI_MAX_DEVICE_IRQDOMAINS)) return NULL; lockdep_assert_held(&md->mutex); @@ -321,7 +332,7 @@ struct msi_desc *msi_next_desc(struct de return NULL; md->__iter_idx++; - return msi_find_desc(md, filter); + return msi_find_desc(md, domid, filter); } EXPORT_SYMBOL_GPL(msi_next_desc); From patchwork Thu Nov 24 23:24:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25728 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659796wrr; Thu, 24 Nov 2022 15:26:04 -0800 (PST) X-Google-Smtp-Source: AA0mqf4hDMru5/wdJ+3iR/pPDR2n8kXtsi6sbeLz156hxjubnp2rid2cRFTb1j1h2nTeY/X9Ky0P X-Received: by 2002:a17:902:e415:b0:179:f94a:6fda with SMTP id m21-20020a170902e41500b00179f94a6fdamr29083970ple.118.1669332364123; Thu, 24 Nov 2022 15:26:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332364; cv=none; d=google.com; s=arc-20160816; b=n7aH6kQVidjwP1QISUskCGtreolcZMFHF1C3hBkTIJz5At+mCAb5mGW2k72vUqsamv Bn+kRx+ZzfcB8kri32TPVieff1+eho4Odcj2KOXmRa2YSTrj3hlyN0VmCK8qQjnZ9s6j WZF/q+enSD+ZiYfhUrlTsx733Us3pKMWsUrcyYD28UDnn33VP2urdGEQopn4YspYFmkb 3DV8gH4CbigbtSS8D9tex4BRtdog9U9EALUwPJEdDhWeNAvgO99KmL98TVpaDXK7SHTQ 6IT7DtveHfTQ2vfHa9Aw95sk+j+Vd6QDPUreROBdLtUEwE94CE7uUHvsVU6f62Psd4hn lKUg== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id o20-20020a056a0015d400b005397c4ad9e1si2470655pfu.134.2022.11.24.15.25.49; Thu, 24 Nov 2022 15:26:04 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=fSdVbg+u; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229766AbiKXXZG (ORCPT + 99 others); Thu, 24 Nov 2022 18:25:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43120 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229610AbiKXXYj (ORCPT ); Thu, 24 Nov 2022 18:24:39 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FA11898CB; Thu, 24 Nov 2022 15:24:28 -0800 (PST) Message-ID: <20221124230314.044613697@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332266; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=x2FLCuF8Xx8AySp9OHgOheEghQq8ehPfwhiGfgwepSM=; b=fSdVbg+u/TWqJfbPCEQESo8FLiGMdEKgTWQub3f7agTq3Eg+So028TFvzEddwh7jLwS9cE /q15t8aieHFexWg2CqZolhQAXhrs+juCOajxl4rmjue6Ehtvw3qGSmcmta9av8HgCG0w7+ HANaj/SFfLBG9//yUJLmtWNcgocyJnnmRce6QMcmNljPwnJ66gd7At6Nkqp+1qrxB6l1XI AR2UrY8ypKxwjj0wKEHVy43qgN0ecBsZBHrz0J/4gVCW1Et/Si2xAFdvNS3tKFlpzZmLTm ZdDpL6ObTmsGALslVk3rhyGJwwf0vWGYgEzxY94uVJMr1Do9SnQmhNRo5+zyvQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332266; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=x2FLCuF8Xx8AySp9OHgOheEghQq8ehPfwhiGfgwepSM=; b=hJ/ILqaggPKEbceqhzx7lHfxS10XTJZTdjXuLEcMMEAShh3J70ripCmsMbLriR4qyZfKvo kXej1vPYj58UKPCA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" Subject: [patch V3 11/22] genirq/msi: Make msi_get_virq() device domain aware References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:25 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421853033308178?= X-GMAIL-MSGID: =?utf-8?q?1750421853033308178?= From: Ahmed S. Darwish In preparation of the upcoming per device multi MSI domain support, change the interface to support lookups based on domain id and zero based index within the domain. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner --- V2: Fix the locking leak and the operator precedence issue (kernel robot) V3: Adopt to the domain/xarray storage change --- include/linux/msi_api.h | 14 +++++++++++++- kernel/irq/msi.c | 19 +++++++++++++------ 2 files changed, 26 insertions(+), 7 deletions(-) --- a/include/linux/msi_api.h +++ b/include/linux/msi_api.h @@ -18,6 +18,18 @@ enum msi_domain_ids { MSI_MAX_DEVICE_IRQDOMAINS, }; -unsigned int msi_get_virq(struct device *dev, unsigned int index); +unsigned int msi_domain_get_virq(struct device *dev, unsigned int domid, unsigned int index); + +/** + * msi_get_virq - Lookup the Linux interrupt number for a MSI index on the default interrupt domain + * @dev: Device for which the lookup happens + * @index: The MSI index to lookup + * + * Return: The Linux interrupt number on success (> 0), 0 if not found + */ +static inline unsigned int msi_get_virq(struct device *dev, unsigned int index) +{ + return msi_domain_get_virq(dev, MSI_DEFAULT_DOMAIN, index); +} #endif --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -338,26 +338,32 @@ struct msi_desc *msi_next_desc(struct de EXPORT_SYMBOL_GPL(msi_next_desc); /** - * msi_get_virq - Return Linux interrupt number of a MSI interrupt + * msi_domain_get_virq - Lookup the Linux interrupt number for a MSI index on a interrupt domain * @dev: Device to operate on + * @domid: Domain ID of the interrupt domain associated to the device * @index: MSI interrupt index to look for (0-based) * * Return: The Linux interrupt number on success (> 0), 0 if not found */ -unsigned int msi_get_virq(struct device *dev, unsigned int index) +unsigned int msi_domain_get_virq(struct device *dev, unsigned int domid, unsigned int index) { struct msi_desc *desc; unsigned int ret = 0; + bool pcimsi = false; struct xarray *xa; - bool pcimsi; if (!dev->msi.data) return 0; - pcimsi = dev_is_pci(dev) ? to_pci_dev(dev)->msi_enabled : false; + if (WARN_ON_ONCE(index > MSI_MAX_INDEX || domid >= MSI_MAX_DEVICE_IRQDOMAINS)) + return 0; + + /* This check is only valid for the PCI default MSI domain */ + if (dev_is_pci(dev) && domid == MSI_DEFAULT_DOMAIN) + pcimsi = to_pci_dev(dev)->msi_enabled; msi_lock_descs(dev); - xa = &dev->msi.data->__domains[MSI_DEFAULT_DOMAIN].store; + xa = &dev->msi.data->__domains[domid].store; desc = xa_load(xa, pcimsi ? 0 : index); if (desc && desc->irq) { /* @@ -372,10 +378,11 @@ unsigned int msi_get_virq(struct device ret = desc->irq; } } + msi_unlock_descs(dev); return ret; } -EXPORT_SYMBOL_GPL(msi_get_virq); +EXPORT_SYMBOL_GPL(msi_domain_get_virq); #ifdef CONFIG_SYSFS static struct attribute *msi_dev_attrs[] = { From patchwork Thu Nov 24 23:24:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25729 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659812wrr; Thu, 24 Nov 2022 15:26:06 -0800 (PST) X-Google-Smtp-Source: AA0mqf7wRzNXYKtF0Bo+CccB+6uXC3pmmgUGvjDOCGLzyvnJufzjYJ+AkN7LWU+wFTrBoJB3tljC X-Received: by 2002:a17:90a:d58a:b0:20d:48bc:6666 with SMTP id v10-20020a17090ad58a00b0020d48bc6666mr37302396pju.98.1669332365906; Thu, 24 Nov 2022 15:26:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332365; cv=none; d=google.com; s=arc-20160816; b=qyqZWtPW4WHh5td5RCeiO6GTTRp8mv1GoqJ00kaVRiNtelPw9bhYXRBzLaFkusybbO d0097A81viG4JSKyoFmfN2ymdv+EdlFvlmLEXCFa16r/gH5stJ+Zes/SLB7s4rh4+gU7 ae5PEXk+pLa/GNgz8KgEi4CUSEp4jWPDlXApbzrfMRMNjclsGvU7WExEmjrm43r9i2QD H+xRFFZ7DyvKczsZm1YSOKsCUq267MQmvgUXnhhMHb5RHtO/x20lcAFArVbuTnOiZA/R AdJA0IZHI7vCYv+HoiVqkY88isuAe7LGgNU8ECpI9BXZ6bWvoV6ASVuz8NRF6Pkcbfd4 6e3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=v72U6H3iTWuz/IqCNF13LsAnXWC/DLWNYziPDjdb8uU=; b=Xq7bJepV26I17cYi0k7qZ0QlZv9UK1Fc9K2Tfgf67GY6+siHbIb8qsbGKkIif/nV33 csxOwPdJJcPJqsgOsSZXceTRqCb2sKgLSYw/tX1dkoALX+VEac+g1V2oBBlKihZ73Q+Y TRC0QjrF/RKTGDVQFtmN3yq/sml8uGpO2re+fYD6ORVoOOLieJ5ePsmHpSiWx2FI5dzS u1CtL8OQkbUBTjUPWTcUFw6YYvf+uWsYN8G9ldByofHzyf/acuxfEmAyF4xp32OY+bkM oy52WHWgMJnH7AOjtbPn1lMzOgLBDprlw2t5pMqrdyTFio9hewSY7E3aRI9x0elhQym+ t4ng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=hsX7yIID; dkim=neutral (no key) header.i=@linutronix.de header.b=H5tOgcaK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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No functional change. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/msi.c | 4 ++-- drivers/soc/ti/ti_sci_inta_msi.c | 4 ++-- include/linux/msi.h | 2 +- kernel/irq/msi.c | 6 ++++-- 4 files changed, 9 insertions(+), 7 deletions(-) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -308,7 +308,7 @@ static int msi_setup_msi_desc(struct pci if (desc.pci.msi_attrib.can_mask) pci_read_config_dword(dev, desc.pci.mask_pos, &desc.pci.msi_mask); - return msi_add_msi_desc(&dev->dev, &desc); + return msi_insert_msi_desc(&dev->dev, &desc); } static int msi_verify_entries(struct pci_dev *dev) @@ -591,7 +591,7 @@ static int msix_setup_msi_descs(struct p desc.pci.msix_ctrl = readl(addr + PCI_MSIX_ENTRY_VECTOR_CTRL); } - ret = msi_add_msi_desc(&dev->dev, &desc); + ret = msi_insert_msi_desc(&dev->dev, &desc); if (ret) break; } --- a/drivers/soc/ti/ti_sci_inta_msi.c +++ b/drivers/soc/ti/ti_sci_inta_msi.c @@ -73,13 +73,13 @@ static int ti_sci_inta_msi_alloc_descs(s for (set = 0; set < res->sets; set++) { for (i = 0; i < res->desc[set].num; i++, count++) { msi_desc.msi_index = res->desc[set].start + i; - if (msi_add_msi_desc(dev, &msi_desc)) + if (msi_insert_msi_desc(dev, &msi_desc)) goto fail; } for (i = 0; i < res->desc[set].num_sec; i++, count++) { msi_desc.msi_index = res->desc[set].start_sec + i; - if (msi_add_msi_desc(dev, &msi_desc)) + if (msi_insert_msi_desc(dev, &msi_desc)) goto fail; } } --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -286,7 +286,7 @@ static inline void msi_desc_set_iommu_co } #endif -int msi_add_msi_desc(struct device *dev, struct msi_desc *init_desc); +int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc); void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index); /** --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -77,13 +77,15 @@ static int msi_insert_desc(struct msi_de } /** - * msi_add_msi_desc - Allocate and initialize a MSI descriptor + * msi_insert_msi_desc - Allocate and initialize a MSI descriptor and + * insert it at @init_desc->msi_index + * * @dev: Pointer to the device for which the descriptor is allocated * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor * * Return: 0 on success or an appropriate failure code. */ -int msi_add_msi_desc(struct device *dev, struct msi_desc *init_desc) +int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc) { struct msi_desc *desc; From patchwork Thu Nov 24 23:24:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25731 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659880wrr; Thu, 24 Nov 2022 15:26:16 -0800 (PST) X-Google-Smtp-Source: AA0mqf7eC1jT29sWcQobcuWP3B0zpQIu3BmXji9wD5FheEoQJg6QPuz0H9k8BCLeUJOn7OwYQN/c X-Received: by 2002:a63:de01:0:b0:476:32a2:253 with SMTP id f1-20020a63de01000000b0047632a20253mr16451130pgg.133.1669332376374; Thu, 24 Nov 2022 15:26:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332376; cv=none; d=google.com; s=arc-20160816; b=hOcC9+QS6zRECf61grjbEvdmPHyYjvgyIk/kmFQovV2vQT3PDdMXW2NcRpZEGphY9q WM45MeNGY86AJ9n6u4Em1wMFqy6S9PZK0cpGWzMvyO4j3jCZBv+mmjaHTPhZVTzvg/rn sP3AWeiJbwZRZ/Ecy/QeAGZIHxY4B0D8HuypfXpU/hpTEFHKWoZF+Er6SL7SZfnYvUde FBNakiHCL9XLGppVuOzwJxWVIAV825tHjgj3RJ1wG145RF6UYGA0ZS9gIGuRIKEYHgGO wJwBL1X5phnQgX9jQR7as8iKYJJygUN+pgA5KakGYpllYO9ADRAwHltpR0P56/G/bw5c cvmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=1/0X92agTvjRjQzuL4lsTq7huP6SoYkhEuMMwl1ZamE=; b=kvA3pvF2EZXzDYsQ9c0tA66XDR89UFYrMzFelM9mGz9yO1XCI3qnKu03SBujkTa86j SCR+VuXj2P8V1J/t9+ei6qSkNxQadcCPJ+8MrAt2ImANmJtd1EpWtfCP+Q3xqp2TrBLA lLaMPyn2F+U5Uk+3qx5nWNEmndKs9zmatT0A6fTbCo9aftn4ayP7JGlNmlcuzC7VXFvI jzKNTsR67K3/1E411H0fKeo+gHbfQWtahTV2BZLpLTUYfX7CKljuLHPY6oIgDSSHQQpD XtGEK1Cl6ea9C5hiXk0FR0z+FDNbPzFBBogha185jcysbfS+NcF/SIKfgpKQlHP32aTl aYlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=hwD5d3aq; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Thomas Gleixner --- V3: Adopt to the domain/xarray storage change --- include/linux/msi.h | 16 +++++++++++++++- kernel/irq/msi.c | 20 ++++++++++++-------- 2 files changed, 27 insertions(+), 9 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -286,7 +286,21 @@ static inline void msi_desc_set_iommu_co } #endif -int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc); +int msi_domain_insert_msi_desc(struct device *dev, unsigned int domid, + struct msi_desc *init_desc); +/** + * msi_insert_msi_desc - Allocate and initialize a MSI descriptor in the + * default irqdomain and insert it at @init_desc->msi_index + * @dev: Pointer to the device for which the descriptor is allocated + * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor + * + * Return: 0 on success or an appropriate failure code. + */ +static inline int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc) +{ + return msi_domain_insert_msi_desc(dev, MSI_DEFAULT_DOMAIN, init_desc); +} + void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index); /** --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -39,7 +39,7 @@ static inline int msi_sysfs_create_group * Return: pointer to allocated &msi_desc on success or %NULL on failure */ static struct msi_desc *msi_alloc_desc(struct device *dev, int nvec, - const struct irq_affinity_desc *affinity) + const struct irq_affinity_desc *affinity) { struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL); @@ -64,9 +64,10 @@ static void msi_free_desc(struct msi_des kfree(desc); } -static int msi_insert_desc(struct msi_device_data *md, struct msi_desc *desc, unsigned int index) +static int msi_insert_desc(struct msi_device_data *md, struct msi_desc *desc, + unsigned int domid, unsigned int index) { - struct xarray *xa = &md->__domains[MSI_DEFAULT_DOMAIN].store; + struct xarray *xa = &md->__domains[domid].store; int ret; desc->msi_index = index; @@ -77,15 +78,17 @@ static int msi_insert_desc(struct msi_de } /** - * msi_insert_msi_desc - Allocate and initialize a MSI descriptor and - * insert it at @init_desc->msi_index + * msi_domain_insert_msi_desc - Allocate and initialize a MSI descriptor and + * insert it at @init_desc->msi_index * * @dev: Pointer to the device for which the descriptor is allocated + * @domid: The id of the interrupt domain to which the desriptor is added * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor * * Return: 0 on success or an appropriate failure code. */ -int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc) +int msi_domain_insert_msi_desc(struct device *dev, unsigned int domid, + struct msi_desc *init_desc) { struct msi_desc *desc; @@ -97,7 +100,8 @@ int msi_insert_msi_desc(struct device *d /* Copy type specific data to the new descriptor. */ desc->pci = init_desc->pci; - return msi_insert_desc(dev->msi.data, desc, init_desc->msi_index); + + return msi_insert_desc(dev->msi.data, desc, domid, init_desc->msi_index); } /** @@ -120,7 +124,7 @@ static int msi_add_simple_msi_descs(stru desc = msi_alloc_desc(dev, 1, NULL); if (!desc) goto fail_mem; - ret = msi_insert_desc(dev->msi.data, desc, idx); + ret = msi_insert_desc(dev->msi.data, desc, MSI_DEFAULT_DOMAIN, idx); if (ret) goto fail; } From patchwork Thu Nov 24 23:24:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25738 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3660269wrr; Thu, 24 Nov 2022 15:27:34 -0800 (PST) X-Google-Smtp-Source: AA0mqf5V+aqhlcFvCllhaLyXSSW3rWKpyd1Y/kKoEWNbSH+8qg6w942b1fYCUMzZjGQurXo6Tj3P X-Received: by 2002:aa7:d5c4:0:b0:46a:af31:7c4f with SMTP id d4-20020aa7d5c4000000b0046aaf317c4fmr914740eds.320.1669332454158; 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To avoid changing and extending the interfaces over and over use an core internal control struct and hand the pointer through the various functions. Signed-off-by: Thomas Gleixner --- V3: Adopt to the domain/xarray storage change --- include/linux/msi.h | 19 +++++++++++++++-- kernel/irq/msi.c | 58 +++++++++++++++++++++++++++++++++++++++++++--------- 2 files changed, 65 insertions(+), 12 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -301,10 +301,25 @@ static inline int msi_insert_msi_desc(st return msi_domain_insert_msi_desc(dev, MSI_DEFAULT_DOMAIN, init_desc); } -void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index); +void msi_domain_free_msi_descs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); /** - * msi_free_msi_descs - Free MSI descriptors of a device + * msi_free_msi_descs_range - Free a range of MSI descriptors of a device + * in the default irqdomain + * + * @dev: Device for which to free the descriptors + * @first: Index to start freeing from (inclusive) + * @last: Last index to be freed (inclusive) + */ +static inline void msi_free_msi_descs_range(struct device *dev, unsigned int first, + unsigned int last) +{ + msi_domain_free_msi_descs_range(dev, MSI_DEFAULT_DOMAIN, first, last); +} + +/** + * msi_free_msi_descs - Free all MSI descriptors of a device in the default irqdomain * @dev: Device to free the descriptors */ static inline void msi_free_msi_descs(struct device *dev) --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -19,6 +19,18 @@ #include "internals.h" +/** + * struct msi_ctrl - MSI internal management control structure + * @domid: ID of the domain on which management operations should be done + * @first: First (hardware) slot index to operate on + * @last: Last (hardware) slot index to operate on + */ +struct msi_ctrl { + unsigned int domid; + unsigned int first; + unsigned int last; +}; + /* Invalid Xarray index which is outside of any searchable range */ #define MSI_XA_MAX_INDEX (ULONG_MAX - 1) /* The maximum domain size */ @@ -151,22 +163,29 @@ static bool msi_desc_match(struct msi_de return false; } -/** - * msi_free_msi_descs_range - Free MSI descriptors of a device - * @dev: Device to free the descriptors - * @first_index: Index to start freeing from - * @last_index: Last index to be freed - */ -void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, - unsigned int last_index) +static bool msi_ctrl_valid(struct device *dev, struct msi_ctrl *ctrl) +{ + if (WARN_ON_ONCE(ctrl->domid >= MSI_MAX_DEVICE_IRQDOMAINS || + ctrl->first > ctrl->last || + ctrl->first > MSI_MAX_INDEX || + ctrl->last > MSI_MAX_INDEX)) + return false; + return true; +} + +static void msi_domain_free_descs(struct device *dev, struct msi_ctrl *ctrl) { - struct xarray *xa = &dev->msi.data->__domains[MSI_DEFAULT_DOMAIN].store; struct msi_desc *desc; + struct xarray *xa; unsigned long idx; lockdep_assert_held(&dev->msi.data->mutex); - xa_for_each_range(xa, idx, desc, first_index, last_index) { + if (!msi_ctrl_valid(dev, ctrl)) + return; + + xa = &dev->msi.data->__domains[ctrl->domid].store; + xa_for_each_range(xa, idx, desc, ctrl->first, ctrl->last) { xa_erase(xa, idx); /* Leak the descriptor when it is still referenced */ @@ -176,6 +195,25 @@ void msi_free_msi_descs_range(struct dev } } +/** + * msi_domain_free_msi_descs_range - Free a range of MSI descriptors of a device in an irqdomain + * @dev: Device for which to free the descriptors + * @domid: Id of the domain to operate on + * @first: Index to start freeing from (inclusive) + * @last: Last index to be freed (inclusive) + */ +void msi_domain_free_msi_descs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) +{ + struct msi_ctrl ctrl = { + .domid = domid, + .first = first, + .last = last, + }; + + msi_domain_free_descs(dev, &ctrl); +} + void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { *msg = entry->msg; From patchwork Thu Nov 24 23:24:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25732 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659893wrr; Thu, 24 Nov 2022 15:26:20 -0800 (PST) X-Google-Smtp-Source: AA0mqf79tdaiUXJEbCy76U5rmhxsQOIGp5A6qYSntxQZrImaPztK5t2SXQG0varDNBJIE85rrMNs X-Received: by 2002:a63:230e:0:b0:43b:f03d:b0fe with SMTP id j14-20020a63230e000000b0043bf03db0femr13401363pgj.338.1669332379958; Thu, 24 Nov 2022 15:26:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332379; cv=none; d=google.com; s=arc-20160816; b=x427gVt1PwWPfdJ73h+4W6nRB4o/uGcbBA3Zkj/9qW8LDm+vE3BuHLgsuKpi2KqOTz UiD2vj2RZOFOuOHyztesggmq2MOCHT0jMVb4FSjHWaW5pzlAz0wtPTazK+NqHQDV5Tah 2aeGbp18QTTUfbwwlpcLp4WbPbE62KsTsvq++sckiQrLgDATgX4K+coo05gCnxzmZ3t4 ZcTV0i35daMsaE9//8TFFa/M34XXUcJ/9sytZ44D8BZt9NHwXgBZKL2qF1ynzILxAr8Z PvbSoEz3WgtwPnX7oi5yaXLq2A7snGdTkyJjxnMl8dwolWi0U7pDIbGjD8DpU8MoOiaC fncg== ARC-Message-Signature: i=1; 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Change the interfaces to take a domain id into account. Use the internal control struct for transport of arguments. Signed-off-by: Thomas Gleixner --- V3: Adopt to the domain/xarray storage change --- kernel/irq/msi.c | 98 +++++++++++++++++++++++++++++++------------------------ 1 file changed, 57 insertions(+), 41 deletions(-) --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -116,39 +116,6 @@ int msi_domain_insert_msi_desc(struct de return msi_insert_desc(dev->msi.data, desc, domid, init_desc->msi_index); } -/** - * msi_add_simple_msi_descs - Allocate and initialize MSI descriptors - * @dev: Pointer to the device for which the descriptors are allocated - * @index: Index for the first MSI descriptor - * @ndesc: Number of descriptors to allocate - * - * Return: 0 on success or an appropriate failure code. - */ -static int msi_add_simple_msi_descs(struct device *dev, unsigned int index, unsigned int ndesc) -{ - unsigned int idx, last = index + ndesc - 1; - struct msi_desc *desc; - int ret; - - lockdep_assert_held(&dev->msi.data->mutex); - - for (idx = index; idx <= last; idx++) { - desc = msi_alloc_desc(dev, 1, NULL); - if (!desc) - goto fail_mem; - ret = msi_insert_desc(dev->msi.data, desc, MSI_DEFAULT_DOMAIN, idx); - if (ret) - goto fail; - } - return 0; - -fail_mem: - ret = -ENOMEM; -fail: - msi_free_msi_descs_range(dev, index, last); - return ret; -} - static bool msi_desc_match(struct msi_desc *desc, enum msi_desc_filter filter) { switch (filter) { @@ -166,6 +133,7 @@ static bool msi_desc_match(struct msi_de static bool msi_ctrl_valid(struct device *dev, struct msi_ctrl *ctrl) { if (WARN_ON_ONCE(ctrl->domid >= MSI_MAX_DEVICE_IRQDOMAINS || + !dev->msi.data->__domains[ctrl->domid].domain || ctrl->first > ctrl->last || ctrl->first > MSI_MAX_INDEX || ctrl->last > MSI_MAX_INDEX)) @@ -214,6 +182,41 @@ void msi_domain_free_msi_descs_range(str msi_domain_free_descs(dev, &ctrl); } +/** + * msi_domain_add_simple_msi_descs - Allocate and initialize MSI descriptors + * @dev: Pointer to the device for which the descriptors are allocated + * @ctrl: Allocation control struct + * + * Return: 0 on success or an appropriate failure code. + */ +static int msi_domain_add_simple_msi_descs(struct device *dev, struct msi_ctrl *ctrl) +{ + struct msi_desc *desc; + unsigned int idx; + int ret; + + lockdep_assert_held(&dev->msi.data->mutex); + + if (!msi_ctrl_valid(dev, ctrl)) + return -EINVAL; + + for (idx = ctrl->first; idx <= ctrl->last; idx++) { + desc = msi_alloc_desc(dev, 1, NULL); + if (!desc) + goto fail_mem; + ret = msi_insert_desc(dev->msi.data, desc, ctrl->domid, idx); + if (ret) + goto fail; + } + return 0; + +fail_mem: + ret = -ENOMEM; +fail: + msi_domain_free_descs(dev, ctrl); + return ret; +} + void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { *msg = entry->msg; @@ -787,16 +790,24 @@ int msi_domain_populate_irqs(struct irq_ { struct msi_domain_info *info = domain->host_data; struct msi_domain_ops *ops = info->ops; + struct msi_ctrl ctrl = { + .domid = MSI_DEFAULT_DOMAIN, + .first = virq_base, + .last = virq_base + nvec - 1, + }; struct msi_desc *desc; struct xarray *xa; int ret, virq; + if (!msi_ctrl_valid(dev, &ctrl)) + return -EINVAL; + msi_lock_descs(dev); - ret = msi_add_simple_msi_descs(dev, virq_base, nvec); + ret = msi_domain_add_simple_msi_descs(dev, &ctrl); if (ret) goto unlock; - xa = &dev->msi.data->__domains[MSI_DEFAULT_DOMAIN].store; + xa = &dev->msi.data->__domains[ctrl.domid].store; for (virq = virq_base; virq < virq_base + nvec; virq++) { desc = xa_load(xa, virq); @@ -815,7 +826,7 @@ int msi_domain_populate_irqs(struct irq_ fail: for (--virq; virq >= virq_base; virq--) irq_domain_free_irqs_common(domain, virq, 1); - msi_free_msi_descs_range(dev, virq_base, virq_base + nvec - 1); + msi_domain_free_descs(dev, &ctrl); unlock: msi_unlock_descs(dev); return ret; @@ -989,14 +1000,19 @@ static int __msi_domain_alloc_irqs(struc return 0; } -static int msi_domain_add_simple_msi_descs(struct msi_domain_info *info, - struct device *dev, - unsigned int num_descs) +static int msi_domain_alloc_simple_msi_descs(struct device *dev, + struct msi_domain_info *info, + unsigned int num_descs) { + struct msi_ctrl ctrl = { + .domid = MSI_DEFAULT_DOMAIN, + .last = num_descs - 1, + }; + if (!(info->flags & MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS)) return 0; - return msi_add_simple_msi_descs(dev, 0, num_descs); + return msi_domain_add_simple_msi_descs(dev, &ctrl); } /** @@ -1027,7 +1043,7 @@ int msi_domain_alloc_irqs_descs_locked(s } /* Frees allocated descriptors in case of failure. */ - ret = msi_domain_add_simple_msi_descs(info, dev, nvec); + ret = msi_domain_alloc_simple_msi_descs(dev, info, nvec); if (ret) goto free; From patchwork Thu Nov 24 23:24:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25733 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659911wrr; Thu, 24 Nov 2022 15:26:23 -0800 (PST) X-Google-Smtp-Source: AA0mqf5gg18ZkZn+OuXNoaYmmvg7piD+rPbpY1M8t10kzUqXLglSr6FDfoumXCnDgbLLbt3VELYs X-Received: by 2002:a17:902:9889:b0:182:e9dd:936d with SMTP id s9-20020a170902988900b00182e9dd936dmr16073020plp.6.1669332382767; Thu, 24 Nov 2022 15:26:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b34-20020a631b22000000b0046ec381a28bsi2686755pgb.25.2022.11.24.15.26.09; Thu, 24 Nov 2022 15:26:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=DbBZYL0Q; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229723AbiKXXZs (ORCPT + 99 others); Thu, 24 Nov 2022 18:25:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229487AbiKXXZW (ORCPT ); Thu, 24 Nov 2022 18:25:22 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DC1488F85; Thu, 24 Nov 2022 15:24:45 -0800 (PST) Message-ID: <20221124230314.337844751@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332274; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=67OGZC8axSEDPn2rlV5x6izoKNtu7urmnWWgBzBXHVc=; b=DbBZYL0Q0GQ+tQgfRWgE/vjOIeZWl9niVNp3SznXG4/5+n6HOnetAqvyb2R9hIb/bR8gDf 4GDeCXVxHQUJV0RXqaF8nR4C50dhqumvwMywPmFj4o/Qh3l9a06g+EOs/GYUZcYO5hEWai z+L82XKWJe60KuaYviK56pK3FcacSd7HO67YK3YDOTJd23TL3YbJIIGqyL/PL1C+pT77LT FTl8xOIPrAEiMCwvBsHuYF/r2xsoH4F9e4F94UC1XsnZy7+GJuh4foek9eLXlKRliuJFdC fNkpLuYSWQGsY8rteJVOiwNaJSZ4n9PXkovpopQi0TAPS9n3NWWHqethJXwyaw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332274; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=67OGZC8axSEDPn2rlV5x6izoKNtu7urmnWWgBzBXHVc=; b=DIOzksTq6+h/1dGe9UyuYXA2mhb7m7wEhz9KXefxrvg8xqLQtcLwNP9lTUZPCen3K2Uop9 rqQw099kgFGoClBA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 16/22] genirq/msi: Provide new domain id based interfaces for freeing interrupts References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:33 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421872772288382?= X-GMAIL-MSGID: =?utf-8?q?1750421872772288382?= Provide two sorts of interfaces to handle the different use cases: - msi_domain_free_irqs_range(): Handles a caller defined precise range - msi_domain_free_irqs_all(): Frees all interrupts associated to a domain The latter is useful for device teardown and to handle the legacy MSI support which does not have any range information available. Signed-off-by: Thomas Gleixner Signed-off-by: David Woodhouse Tested-by: David Woodhouse --- V3: Adopt to the domain/xarray storage change --- include/linux/msi.h | 9 +++ kernel/irq/msi.c | 142 +++++++++++++++++++++++++++++++++++++++++++--------- 2 files changed, 129 insertions(+), 22 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -498,6 +498,15 @@ int msi_domain_alloc_irqs(struct irq_dom int nvec); void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev); void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); + +void msi_domain_free_irqs_range_locked(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); +void msi_domain_free_irqs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); + +void msi_domain_free_irqs_all_locked(struct device *dev, unsigned int domid); +void msi_domain_free_irqs_all(struct device *dev, unsigned int domid); + struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain); struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode, --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -546,7 +546,25 @@ static inline void msi_sysfs_remove_desc #endif /* !CONFIG_SYSFS */ static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); -static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); + +static struct irq_domain *msi_get_device_domain(struct device *dev, unsigned int domid) +{ + struct irq_domain *domain; + + lockdep_assert_held(&dev->msi.data->mutex); + + if (WARN_ON_ONCE(domid >= MSI_MAX_DEVICE_IRQDOMAINS)) + return NULL; + + domain = dev->msi.data->__domains[domid].domain; + if (!domain) + return NULL; + + if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) + return NULL; + + return domain; +} static inline void irq_chip_write_msi_msg(struct irq_data *data, struct msi_msg *msg) @@ -707,7 +725,6 @@ static struct msi_domain_ops msi_domain_ .msi_prepare = msi_domain_ops_prepare, .set_desc = msi_domain_ops_set_desc, .domain_alloc_irqs = __msi_domain_alloc_irqs, - .domain_free_irqs = __msi_domain_free_irqs, }; static void msi_domain_update_dom_ops(struct msi_domain_info *info) @@ -721,8 +738,6 @@ static void msi_domain_update_dom_ops(st if (ops->domain_alloc_irqs == NULL) ops->domain_alloc_irqs = msi_domain_ops_default.domain_alloc_irqs; - if (ops->domain_free_irqs == NULL) - ops->domain_free_irqs = msi_domain_ops_default.domain_free_irqs; if (!(info->flags & MSI_FLAG_USE_DEF_DOM_OPS)) return; @@ -1074,15 +1089,21 @@ int msi_domain_alloc_irqs(struct irq_dom return ret; } -static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) +static void __msi_domain_free_irqs(struct device *dev, struct irq_domain *domain, + struct msi_ctrl *ctrl) { + struct xarray *xa = &dev->msi.data->__domains[ctrl->domid].store; struct msi_domain_info *info = domain->host_data; struct irq_data *irqd; struct msi_desc *desc; + unsigned long idx; int i; - /* Only handle MSI entries which have an interrupt associated */ - msi_for_each_desc(desc, dev, MSI_DESC_ASSOCIATED) { + xa_for_each_range(xa, idx, desc, ctrl->first, ctrl->last) { + /* Only handle MSI entries which have an interrupt associated */ + if (!msi_desc_match(desc, MSI_DESC_ASSOCIATED)) + continue; + /* Make sure all interrupts are deactivated */ for (i = 0; i < desc->nvec_used; i++) { irqd = irq_domain_get_irq_data(domain, desc->irq + i); @@ -1097,11 +1118,99 @@ static void __msi_domain_free_irqs(struc } } -static void msi_domain_free_msi_descs(struct msi_domain_info *info, - struct device *dev) +static void msi_domain_free_locked(struct device *dev, struct msi_ctrl *ctrl) { + struct msi_domain_info *info; + struct msi_domain_ops *ops; + struct irq_domain *domain; + + if (!msi_ctrl_valid(dev, ctrl)) + return; + + domain = msi_get_device_domain(dev, ctrl->domid); + if (!domain) + return; + + info = domain->host_data; + ops = info->ops; + + if (ops->domain_free_irqs) + ops->domain_free_irqs(domain, dev); + else + __msi_domain_free_irqs(dev, domain, ctrl); + + if (ops->msi_post_free) + ops->msi_post_free(domain, dev); + if (info->flags & MSI_FLAG_FREE_MSI_DESCS) - msi_free_msi_descs(dev); + msi_domain_free_descs(dev, ctrl); +} + +/** + * msi_domain_free_irqs_range_locked - Free a range of interrupts from a MSI interrupt domain + * associated to @dev with msi_lock held + * @dev: Pointer to device struct of the device for which the interrupts + * are freed + * @domid: Id of the interrupt domain to operate on + * @first: First index to free (inclusive) + * @last: Last index to free (inclusive) + */ +void msi_domain_free_irqs_range_locked(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) +{ + struct msi_ctrl ctrl = { + .domid = domid, + .first = first, + .last = last, + }; + msi_domain_free_locked(dev, &ctrl); +} + +/** + * msi_domain_free_irqs_range - Free a range of interrupts from a MSI interrupt domain + * associated to @dev + * @dev: Pointer to device struct of the device for which the interrupts + * are freed + * @domid: Id of the interrupt domain to operate on + * @first: First index to free (inclusive) + * @last: Last index to free (inclusive) + */ +void msi_domain_free_irqs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) +{ + msi_lock_descs(dev); + msi_domain_free_irqs_range_locked(dev, domid, first, last); + msi_unlock_descs(dev); +} + +/** + * msi_domain_free_irqs_all_locked - Free all interrupts from a MSI interrupt domain + * associated to a device + * @dev: Pointer to device struct of the device for which the interrupts + * are freed + * @domid: The id of the domain to operate on + * + * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() + * pair. Use this for MSI irqdomains which implement their own vector + * allocation. + */ +void msi_domain_free_irqs_all_locked(struct device *dev, unsigned int domid) +{ + msi_domain_free_irqs_range_locked(dev, domid, 0, MSI_MAX_INDEX); +} + +/** + * msi_domain_free_irqs_all - Free all interrupts from a MSI interrupt domain + * associated to a device + * @dev: Pointer to device struct of the device for which the interrupts + * are freed + * @domid: The id of the domain to operate on + */ +void msi_domain_free_irqs_all(struct device *dev, unsigned int domid) +{ + msi_lock_descs(dev); + msi_domain_free_irqs_all_locked(dev, domid); + msi_unlock_descs(dev); } /** @@ -1116,18 +1225,7 @@ static void msi_domain_free_msi_descs(st */ void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev) { - struct msi_domain_info *info = domain->host_data; - struct msi_domain_ops *ops = info->ops; - - lockdep_assert_held(&dev->msi.data->mutex); - - if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) - return; - - ops->domain_free_irqs(domain, dev); - if (ops->msi_post_free) - ops->msi_post_free(domain, dev); - msi_domain_free_msi_descs(info, dev); + msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, 0, MSI_MAX_INDEX); } /** From patchwork Thu Nov 24 23:24:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25734 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659952wrr; Thu, 24 Nov 2022 15:26:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf6dEPvhleAqgh6PjfOTrlgZ0SR94UymL2HfzxbjBG5ZxkSJeDOQVVsHmAEHLOxMfnFyqySU X-Received: by 2002:a17:90a:c903:b0:212:fb7e:54c7 with SMTP id v3-20020a17090ac90300b00212fb7e54c7mr37421735pjt.124.1669332393559; Thu, 24 Nov 2022 15:26:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332393; cv=none; d=google.com; s=arc-20160816; b=B/lg8oW+re+tMJ5vzplmpq7kcM2k4Q7+9uiImJv9D4rrKTzqwlfTisfiaJiatgUpiQ DIVGeTguJ1VxdxMGJmDjNIJnyxjshtlN0Y7zj97rHEN8VYzX9PtgKDS9LVXVeysqSIBh fwV0kViQm5AvLHdHc27AQSZf8xwz+szf24JX9XYm8S+qXOcvX+0ivhTl1poAREJbQrIl Dxscrmkhl9Otupior2r7TqP2PbOrlCepg7Ncs/bRlBDA2R3Gg+4s41MYZcAuN950OKZb abIHBZ6u7aL6axJHmFDgKrZKI6/WiJ5FaDbH3BVEpqeYm8y/L4x1WsYyPuefw6RqrkSx rqGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=ZN7Mrkp+AsC5F1RVev604XGTYRQ0ynVNtuLxMenrwqI=; b=rVOFURpa96pZVaNv7f4hCthoxqkc1RvZCt+UknmzKLJzxunKl8mIgppWnoWw1jKLSa bVACUlP/sAPr25pUUQZODaKQYVx/SCbrVedhC9AgPESP3PWNQc+MIt/9s11cylEcfInJ lpKbwGtldfhTBYq36g7VYQXNf/y+lQ2ZRSy/VzZAi7SVs5Y5sRn88BvaR6s1ScbXTNc4 j8TUNyDu6s9r2S1PVaKV4nmu72TF9NDNMlsZ/HYTlBfXh3yijD00nDTUI4Fd0whtUQjF FAiS3137W7TfxbZPjsZol8KTacoMu/kR67uqPbFyd7dEtU5qYCIp7eyGN1mlA4/Lkcws WNCg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=HRda7I00; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j15-20020a056a00234f00b0055fa098c388si2509295pfj.259.2022.11.24.15.26.21; Thu, 24 Nov 2022 15:26:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=HRda7I00; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229881AbiKXXZx (ORCPT + 99 others); Thu, 24 Nov 2022 18:25:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229732AbiKXXZ3 (ORCPT ); Thu, 24 Nov 2022 18:25:29 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34AA688FA0; Thu, 24 Nov 2022 15:24:49 -0800 (PST) Message-ID: <20221124230314.396497163@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332275; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ZN7Mrkp+AsC5F1RVev604XGTYRQ0ynVNtuLxMenrwqI=; b=HRda7I00bFAs7GwD5vhZbX7txK6TdSGeF3dVEwqNBI0V52PH18CcGzfTFoWRGh3ikbNIPM qmbUGOFcdUuT1Tk6pNjpNXjb0I0fJW9xurIqYKA9wfCK9WKTzv9dtLMDUYv3wYjjzvTg0J kLJLtNLE5ek4l9+j/xjhXhnsORMW27zewW0ezOhVtTf7lekiMecv4b/bQvlUltrtSeIu4o fGPlg7OEXrWwJjuQHXOyJ7bIsii67l2Ig0R/7u/a/8vbzvgFGHmY87FBhvhOOrzzykgN4E Mx4DvWcpW/vDGMNhk2RuiXHozZbStbj6qM+gEOTpAF6p0wSyCkivCD7xUg9M7A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332275; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ZN7Mrkp+AsC5F1RVev604XGTYRQ0ynVNtuLxMenrwqI=; b=sWYQkcptell3o1XtRZyBNlm/eOlSze64O53684C7x+Mj32nRGKJsMt1+n45TMiDsbi8r9k i4U7lO/kGPEBouDg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 17/22] genirq/msi: Provide new domain id allocation functions References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:35 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421884226417663?= X-GMAIL-MSGID: =?utf-8?q?1750421884226417663?= Provide two sorts of interfaces to handle the different use cases: - msi_domain_alloc_irqs_range(): Handles a caller defined precise range - msi_domain_alloc_irqs_all(): Allocates all interrupts associated to a domain by scanning the allocated MSI descriptors The latter is useful for the existing PCI/MSI support which does not have range information available. Signed-off-by: Thomas Gleixner --- V3: Adopt to the domain/xarray storage change --- include/linux/msi.h | 18 ++--- kernel/irq/msi.c | 179 ++++++++++++++++++++++++++++++++++++++++------------ 2 files changed, 149 insertions(+), 48 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -383,8 +383,8 @@ struct msi_domain_info; * @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying * irqdomain. * - * @msi_check, @msi_prepare and @set_desc are callbacks used by - * msi_domain_alloc/free_irqs(). + * @msi_check, @msi_prepare and @set_desc are callbacks used by the + * msi_domain_alloc/free_irqs*() variants. * * @domain_alloc_irqs, @domain_free_irqs can be used to override the * default allocation/free functions (__msi_domain_alloc/free_irqs). This @@ -392,11 +392,6 @@ struct msi_domain_info; * be wrapped into the regular irq domains concepts by mere mortals. This * allows to universally use msi_domain_alloc/free_irqs without having to * special case XEN all over the place. - * - * Contrary to other operations @domain_alloc_irqs and @domain_free_irqs - * are set to the default implementation if NULL and even when - * MSI_FLAG_USE_DEF_DOM_OPS is not set to avoid breaking existing users and - * because these callbacks are obviously mandatory. */ struct msi_domain_ops { irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info, @@ -496,14 +491,21 @@ int msi_domain_alloc_irqs_descs_locked(s int nvec); int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); + void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev); void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); +int msi_domain_alloc_irqs_range_locked(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); +int msi_domain_alloc_irqs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); +int msi_domain_alloc_irqs_all_locked(struct device *dev, unsigned int domid, int nirqs); + + void msi_domain_free_irqs_range_locked(struct device *dev, unsigned int domid, unsigned int first, unsigned int last); void msi_domain_free_irqs_range(struct device *dev, unsigned int domid, unsigned int first, unsigned int last); - void msi_domain_free_irqs_all_locked(struct device *dev, unsigned int domid); void msi_domain_free_irqs_all(struct device *dev, unsigned int domid); --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -24,11 +24,14 @@ * @domid: ID of the domain on which management operations should be done * @first: First (hardware) slot index to operate on * @last: Last (hardware) slot index to operate on + * @nirqs: The number of Linux interrupts to allocate. Can be larger + * than the range due to PCI/multi-MSI. */ struct msi_ctrl { unsigned int domid; unsigned int first; unsigned int last; + unsigned int nirqs; }; /* Invalid Xarray index which is outside of any searchable range */ @@ -36,6 +39,7 @@ struct msi_ctrl { /* The maximum domain size */ #define MSI_XA_DOMAIN_SIZE (MSI_MAX_INDEX + 1) +static void msi_domain_free_locked(struct device *dev, struct msi_ctrl *ctrl); static inline int msi_sysfs_create_group(struct device *dev); @@ -545,8 +549,6 @@ static inline int msi_sysfs_populate_des static inline void msi_sysfs_remove_desc(struct device *dev, struct msi_desc *desc) { } #endif /* !CONFIG_SYSFS */ -static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); - static struct irq_domain *msi_get_device_domain(struct device *dev, unsigned int domid) { struct irq_domain *domain; @@ -724,7 +726,6 @@ static struct msi_domain_ops msi_domain_ .msi_init = msi_domain_ops_init, .msi_prepare = msi_domain_ops_prepare, .set_desc = msi_domain_ops_set_desc, - .domain_alloc_irqs = __msi_domain_alloc_irqs, }; static void msi_domain_update_dom_ops(struct msi_domain_info *info) @@ -736,9 +737,6 @@ static void msi_domain_update_dom_ops(st return; } - if (ops->domain_alloc_irqs == NULL) - ops->domain_alloc_irqs = msi_domain_ops_default.domain_alloc_irqs; - if (!(info->flags & MSI_FLAG_USE_DEF_DOM_OPS)) return; @@ -952,18 +950,19 @@ static int msi_init_virq(struct irq_doma return 0; } -static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, - int nvec) +static int __msi_domain_alloc_irqs(struct device *dev, struct irq_domain *domain, + struct msi_ctrl *ctrl) { + struct xarray *xa = &dev->msi.data->__domains[ctrl->domid].store; struct msi_domain_info *info = domain->host_data; struct msi_domain_ops *ops = info->ops; + unsigned int vflags = 0, allocated = 0; msi_alloc_info_t arg = { }; - unsigned int vflags = 0; + int i, ret, virq, base; struct msi_desc *desc; - int allocated = 0; - int i, ret, virq; + unsigned long idx; - ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg); + ret = msi_domain_prepare_irqs(domain, dev, ctrl->nirqs, &arg); if (ret) return ret; @@ -989,7 +988,16 @@ static int __msi_domain_alloc_irqs(struc vflags |= VIRQ_NOMASK_QUIRK; } - msi_for_each_desc(desc, dev, MSI_DESC_NOTASSOCIATED) { + base = ctrl->domid * MSI_XA_DOMAIN_SIZE; + + xa_for_each_range(xa, idx, desc, ctrl->first + base, ctrl->last + base) { + if (!msi_desc_match(desc, MSI_DESC_NOTASSOCIATED)) + continue; + + /* This should return -ECONFUSED... */ + if (WARN_ON_ONCE(allocated >= ctrl->nirqs)) + return -EINVAL; + ops->set_desc(&arg, desc); virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used, @@ -1017,17 +1025,122 @@ static int __msi_domain_alloc_irqs(struc static int msi_domain_alloc_simple_msi_descs(struct device *dev, struct msi_domain_info *info, - unsigned int num_descs) + struct msi_ctrl *ctrl) +{ + if (!(info->flags & MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS)) + return 0; + + return msi_domain_add_simple_msi_descs(dev, ctrl); +} + +static int __msi_domain_alloc_locked(struct device *dev, struct msi_ctrl *ctrl) +{ + struct msi_domain_info *info; + struct msi_domain_ops *ops; + struct irq_domain *domain; + int ret; + + if (!msi_ctrl_valid(dev, ctrl)) + return -EINVAL; + + domain = msi_get_device_domain(dev, ctrl->domid); + if (!domain) + return -ENODEV; + + info = domain->host_data; + + ret = msi_domain_alloc_simple_msi_descs(dev, info, ctrl); + if (ret) + return ret; + + ops = info->ops; + if (ops->domain_alloc_irqs) + return ops->domain_alloc_irqs(domain, dev, ctrl->nirqs); + + return __msi_domain_alloc_irqs(dev, domain, ctrl); +} + +static int msi_domain_alloc_locked(struct device *dev, struct msi_ctrl *ctrl) +{ + int ret = __msi_domain_alloc_locked(dev, ctrl); + + if (ret) + msi_domain_free_locked(dev, ctrl); + return ret; +} + +/** + * msi_domain_alloc_irqs_range_locked - Allocate interrupts from a MSI interrupt domain + * @dev: Pointer to device struct of the device for which the interrupts + * are allocated + * @domid: Id of the interrupt domain to operate on + * @first: First index to allocate (inclusive) + * @last: Last index to allocate (inclusive) + * + * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() + * pair. Use this for MSI irqdomains which implement their own descriptor + * allocation/free. + * + * Return: %0 on success or an error code. + */ +int msi_domain_alloc_irqs_range_locked(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) { struct msi_ctrl ctrl = { - .domid = MSI_DEFAULT_DOMAIN, - .last = num_descs - 1, + .domid = domid, + .first = first, + .last = last, + .nirqs = last + 1 - first, }; - if (!(info->flags & MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS)) - return 0; + return msi_domain_alloc_locked(dev, &ctrl); +} + +/** + * msi_domain_alloc_irqs_range - Allocate interrupts from a MSI interrupt domain + * @dev: Pointer to device struct of the device for which the interrupts + * are allocated + * @domid: Id of the interrupt domain to operate on + * @first: First index to allocate (inclusive) + * @last: Last index to allocate (inclusive) + * + * Return: %0 on success or an error code. + */ +int msi_domain_alloc_irqs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) +{ + int ret; + + msi_lock_descs(dev); + ret = msi_domain_alloc_irqs_range_locked(dev, domid, first, last); + msi_unlock_descs(dev); + return ret; +} + +/** + * msi_domain_alloc_irqs_all_locked - Allocate all interrupts from a MSI interrupt domain + * + * @dev: Pointer to device struct of the device for which the interrupts + * are allocated + * @domid: Id of the interrupt domain to operate on + * @nirqs: The number of interrupts to allocate + * + * This function scans all MSI descriptors of the MSI domain and allocates interrupts + * for all unassigned ones. That function is to be used for MSI domain usage where + * the descriptor allocation is handled at the call site, e.g. PCI/MSI[X]. + * + * Return: %0 on success or an error code. + */ +int msi_domain_alloc_irqs_all_locked(struct device *dev, unsigned int domid, int nirqs) +{ + struct msi_ctrl ctrl = { + .domid = domid, + .first = 0, + .last = MSI_MAX_INDEX, + .nirqs = nirqs, + }; - return msi_domain_add_simple_msi_descs(dev, &ctrl); + return msi_domain_alloc_locked(dev, &ctrl); } /** @@ -1046,28 +1159,14 @@ static int msi_domain_alloc_simple_msi_d int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, int nvec) { - struct msi_domain_info *info = domain->host_data; - struct msi_domain_ops *ops = info->ops; - int ret; - - lockdep_assert_held(&dev->msi.data->mutex); - - if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) { - ret = -EINVAL; - goto free; - } - - /* Frees allocated descriptors in case of failure. */ - ret = msi_domain_alloc_simple_msi_descs(dev, info, nvec); - if (ret) - goto free; + struct msi_ctrl ctrl = { + .domid = MSI_DEFAULT_DOMAIN, + .first = 0, + .last = MSI_MAX_INDEX, + .nirqs = nvec, + }; - ret = ops->domain_alloc_irqs(domain, dev, nvec); - if (!ret) - return 0; -free: - msi_domain_free_irqs_descs_locked(domain, dev); - return ret; + return msi_domain_alloc_locked(dev, &ctrl); } /** From patchwork Thu Nov 24 23:24:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25735 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3659968wrr; Thu, 24 Nov 2022 15:26:38 -0800 (PST) X-Google-Smtp-Source: AA0mqf6bF+RVt1wHjLmrR5Xirx2zRK/S0uztPioLbegh84OvzEFNh4MTJJrFKnoGbQItaT+J4YJg X-Received: by 2002:a17:902:6b8b:b0:188:a40b:47c9 with SMTP id p11-20020a1709026b8b00b00188a40b47c9mr15662482plk.75.1669332398128; Thu, 24 Nov 2022 15:26:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332398; cv=none; d=google.com; s=arc-20160816; b=g73sgRWX4DJU8zX5KBGkEiGN+iYaVeLDxcD1oZ16ZT+I8kl9OA7+hBUs4TJKaNJIgU sDF1PSgb5m69br2/aqV5hsTeX3RIKrKg9SzfoftOPT2NrUKAUawC/Mak69xynkniL3d/ TnRx4XyzGjje6D+HeFHm+rmxEXEjstsQFQ7DFThKKTTU8QM5BIyYdtNePwC6vPZzGri6 wnqnZIPknU0MvrttRz6+nKzYWU7FGxbC9lqNTCCc2AAKLfiutNyMM88rckKa6H+pzoza 0lykdJtfAozTgYA7DbzcXxp8FETaREeLvkDc216+88jmjPIMrtTnsaB1HL/iyn4HulTB 8GmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=LT/xfniXCBDF3W+A4foNyGvk9ZyzT/mpsXze/X+JW0Q=; b=c2C4MwBE5YII/tEjlBuemJexHSYy8pKMYn+x4So9bTiJy4GEwVyy5zOTzfIziFtPoI rB4dWHucI4r5Otz/oGUqVKZUSMtc6sHEtzCPaEDLmXxHjyq7zMf82VIVwZlg0uQux7A/ pLjLNqBlV3Sz2hZFYJ39Bj7lNFSgx3gBG2gwKk75uvoiD+DyzIa/e3l3AaSGp570Oc54 VT/DtOUhIYm/VeciQEL139MGRjFi7cGPI5NPq2B1a4aFK6GKefuCK/lf8rpC6MOrA35m uscQZfJCJbXwbp0xJfNeMLaXJnJU+C8IUKkkd360Eyb/NwBhEsIAgul0+Vn53ufrynHy 5N9Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=qcOhB+B7; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x9-20020a17090abc8900b00212d699c686si2323579pjr.125.2022.11.24.15.26.25; Thu, 24 Nov 2022 15:26:38 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=qcOhB+B7; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229847AbiKXX0C (ORCPT + 99 others); Thu, 24 Nov 2022 18:26:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229751AbiKXXZb (ORCPT ); Thu, 24 Nov 2022 18:25:31 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F41CAB0CB; Thu, 24 Nov 2022 15:24:51 -0800 (PST) Message-ID: <20221124230314.455168748@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332277; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=LT/xfniXCBDF3W+A4foNyGvk9ZyzT/mpsXze/X+JW0Q=; b=qcOhB+B721EZTDMg7sUemBtDSq5G0ITFsKHACA2gN0eag+8RbO7qHyC/gj8+IRIT6TeWDT 3xHYVYzFggERk9O9xshbu/FmVmhses6PrEP/BG1WRtY+7ARuUo61AQPMnSV9luzY1f2jcB /aCyUokCRDzCTrx6HYOLwldN7u3dK2D+RqgE2fN2zEpWBtHzs49eUqDRCTn4NRfmQssXoC 6ktjncqcc6aRpuEBjv74pGEIGQLquw/ZOVUNhEFJp7BfQ4Mq7n9v6bLvzo9P/GVEZHc7cq Hu5NwMIBEhqF/hvbzpCuTctGHe+gxH+NHsPRRzfBS8azd5BMj11fXZbx/1bP1A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332277; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=LT/xfniXCBDF3W+A4foNyGvk9ZyzT/mpsXze/X+JW0Q=; b=9lRbnldfUMF5p9cb7nNI6GsFFsVTaBJm97LFYJQ0ABmA24Ogto1JixNzlycS1tvjrpmHsB o9CqOp9ZBEdoE1AQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 18/22] PCI/MSI: Use msi_domain_alloc/free_irqs_all_locked() References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:36 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421888871854236?= X-GMAIL-MSGID: =?utf-8?q?1750421888871854236?= Switch to the new domain id aware interfaces to phase out the previous ones. No functional change. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/irqdomain.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -14,7 +14,7 @@ int pci_msi_setup_msi_irqs(struct pci_de domain = dev_get_msi_domain(&dev->dev); if (domain && irq_domain_is_hierarchy(domain)) - return msi_domain_alloc_irqs_descs_locked(domain, &dev->dev, nvec); + return msi_domain_alloc_irqs_all_locked(&dev->dev, MSI_DEFAULT_DOMAIN, nvec); return pci_msi_legacy_setup_msi_irqs(dev, nvec, type); } @@ -25,7 +25,7 @@ void pci_msi_teardown_msi_irqs(struct pc domain = dev_get_msi_domain(&dev->dev); if (domain && irq_domain_is_hierarchy(domain)) { - msi_domain_free_irqs_descs_locked(domain, &dev->dev); + msi_domain_free_irqs_all_locked(&dev->dev, MSI_DEFAULT_DOMAIN); } else { pci_msi_legacy_teardown_msi_irqs(dev); msi_free_msi_descs(&dev->dev); From patchwork Thu Nov 24 23:24:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25736 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3660238wrr; Thu, 24 Nov 2022 15:27:29 -0800 (PST) X-Google-Smtp-Source: AA0mqf5mwAjQwv7iqx4C9ovXWqFVceGUrcN/EAc/LcID8R2Mfn1ie27TyXos3JPy+xmXOlxMsZZT X-Received: by 2002:a17:90b:2392:b0:218:8576:82eb with SMTP id mr18-20020a17090b239200b00218857682ebmr32871620pjb.101.1669332449405; Thu, 24 Nov 2022 15:27:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332449; cv=none; d=google.com; s=arc-20160816; b=kP6hIrQOUZtpoNiNkUSctv4dkc1I/BtYbm4RYKMrqJpnhKapLj+7+o5NN0x9wupcdF 43pfQBhXmlV/464OluVI4TTD11JI+QtJiORjXk6iD7vRLcBvGYjwLWVs5V5vl9rNbhRJ FghPYfFsIHGzbFO3zNE9Kxi94I15BKZfSvOexEGa4cd/oKxaXdU6iBoHuMX2w1tyR6QT UbgrLbg/cuiSO+ElIwZa9pxwptIDenSVmamFfF+i6DuFbvQBgSIDVnKNPSZSLuAy2djq sYcYgJOasTmPn/M9eD8/slmdmGfCezyucJkstq09ar7WABl1xhiAvbZLvO/4b5bHbRyR uZXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=7CXvgfTszY3LslvHbPboJUjb59ZlVQ1XORNlFYSydbs=; b=Or7m9O0O8pBanODQYrRCp2UvCSscVQQwfQwMxRa1bnXGF1AXcXZ6R25NYjvH9WwP0g HYlILJSkgsxTq66ViEwQqyIjAhThopIbAiNop7lq9fXtM6bGZHdg6d+6IlZ9993EUhfD hGOWwwcevdlUxlw2TfmjAz6aFOsauHJm7aMvSooBQx4RfeTvUD/GcPxaFtLFbqTeZkOH TkoiMbEaEazl/Ej1lYdbFQZiFJqDKtUcUAcVewM3W5iXj8U4IsUkUZb+2tq8m/Kj6QQm IoRpNJvBlRYKd3vJc6OZmJ3YWRrfGFwE0QNno9NoVLdAekNADhZBD6B8RIgue0FJ4uAg actQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=N8JY1Bop; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" Subject: [patch V3 19/22] platform-msi: Switch to the domain id aware MSI interfaces References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:38 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421942776305349?= X-GMAIL-MSGID: =?utf-8?q?1750421942776305349?= From: Ahmed S. Darwish Switch to the new domain id aware interfaces to phase out the previous ones. No functional change. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner --- drivers/base/platform-msi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/base/platform-msi.c +++ b/drivers/base/platform-msi.c @@ -213,7 +213,7 @@ int platform_msi_domain_alloc_irqs(struc if (err) return err; - err = msi_domain_alloc_irqs(dev->msi.domain, dev, nvec); + err = msi_domain_alloc_irqs_range(dev, MSI_DEFAULT_DOMAIN, 0, nvec - 1); if (err) platform_msi_free_priv_data(dev); @@ -227,7 +227,7 @@ EXPORT_SYMBOL_GPL(platform_msi_domain_al */ void platform_msi_domain_free_irqs(struct device *dev) { - msi_domain_free_irqs(dev->msi.domain, dev); + msi_domain_free_irqs_all(dev, MSI_DEFAULT_DOMAIN); platform_msi_free_priv_data(dev); } EXPORT_SYMBOL_GPL(platform_msi_domain_free_irqs); From patchwork Thu Nov 24 23:24:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25740 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3660459wrr; Thu, 24 Nov 2022 15:28:11 -0800 (PST) X-Google-Smtp-Source: AA0mqf76sAkvsHvvrZ4ILjtUuKknl0jOHVUSCVG5a6AF7WJWQMQnS6qrzwSfxw6RbJMh82u5hrHL X-Received: by 2002:a50:ed90:0:b0:461:4e7b:9808 with SMTP id h16-20020a50ed90000000b004614e7b9808mr33497487edr.198.1669332491457; Thu, 24 Nov 2022 15:28:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332491; cv=none; d=google.com; s=arc-20160816; b=vOvioJG3J3KiQwvdrs7ZwzJS08s/Yze2Cb30QXixzsyG5hr9mJGmS7Ef4mhe2NUAX2 TIedw5DSFPTHyCD4DeVBN3eNFvOaZikCjzR1vHOmnOyCkPBJuyrt7jtbC0zysQVuO98D qOhTickMMCpUgAMYy3L/8XZrALE6PMK2TsdXC6pSKQPslR4k0SERonB2RyfGeH7bJP1V roQxe5uNZMcrQStoRkHmc+r706oZcgBqjFREEZmhuR1Dayrw1HGlgFWkTZFhPwKo7mPg S/DDD0O39815pHi4ePFKBnnbiB+21wOdsUC4eFSJ80kfEfmHchObfxKSymJEii9sMfzV vjiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=Dc0ZFlk2JAPmF0v24u3+k7yycgC6/ipKg9qXDEwD/vU=; b=DAf0NQuzQ02NvHD2esE20NqZqM4V/rEKLlzWE8R59mYssmaEzJLpI9c2coAx5MNP+O YVgaOAtL+PQwL+taZDg/tzl2nQ46hU89kpkTg/bZpGAuNTFUUvl+KNKruEqYCTbs1y5r cL/+LFDyginAhMV1O0JnjTY8tdWoVTLlgZIVS/MvzP+TV9p0IKaVT2QXc7efObNklMbU Avr9cv+0biWnjC+on+tG+nYuX9LZJyfZkdmRPJtRx8f4F9yqdRCj37QMe0X0m2ywH7NX IoCncrME2oBbvoSSHNOS5n8pl/GviKPbSxAQIyS6zYSsgRG5GxE1lr7stiLJHTFHfPwC tMIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=tlGaFyfm; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r7-20020a05640251c700b0046aa7121b8csi1224591edd.232.2022.11.24.15.27.48; Thu, 24 Nov 2022 15:28:11 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=tlGaFyfm; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229920AbiKXX0U (ORCPT + 99 others); Thu, 24 Nov 2022 18:26:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43366 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229786AbiKXXZn (ORCPT ); Thu, 24 Nov 2022 18:25:43 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABEC4ACEB9; Thu, 24 Nov 2022 15:25:00 -0800 (PST) Message-ID: <20221124230314.575538524@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332280; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Dc0ZFlk2JAPmF0v24u3+k7yycgC6/ipKg9qXDEwD/vU=; b=tlGaFyfmoSWtxrbIaA3s+d+wnKpP7mQ4yRhQcybarPjr5OegK+K7smE0Hbatt2ieqeY3RW WCxjo9c/yL9TSxl/2KDHh8lQE5duMTcbuLAjctZ+Ef33m30ozqEbP9GnSVCETtE/OTa0Mj MNWrE4wOgK0DWppsLvxXGYA8K4WJGrAYZeqD45fuNZhnq7SO4pV+VN1zIWwCOhMt8AZrWc NxoUTqqLZ4yBohmcQg+pwVghGmHf4Guf+d9N/GwFsKNcVMDHE/sKSoNTJWfV+/efwRgXBq 7Cj6bG4uf1NfGByjJ1NKrIK/w3wHd9c5p2uh1lx6IR2Zc6xkfVnUtLLn7tzKaA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332280; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Dc0ZFlk2JAPmF0v24u3+k7yycgC6/ipKg9qXDEwD/vU=; b=GOSmbtRqp/P2x6kEtLkClRK2HxyuTC3wPsoNowCef52M508oqahOf/VIDdBSB2+7qQ4bMn MwTiaHHGrsimdDDw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 20/22] bus: fsl-mc-msi: Switch to domain id aware interfaces References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:40 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421986544486538?= X-GMAIL-MSGID: =?utf-8?q?1750421986544486538?= Switch to the new domain id aware interfaces to phase out the previous ones. Get rid of the MSI descriptor and domain checks as the core code detects these issues anyway. No functional change. Signed-off-by: Thomas Gleixner --- drivers/bus/fsl-mc/fsl-mc-msi.c | 25 +++---------------------- 1 file changed, 3 insertions(+), 22 deletions(-) --- a/drivers/bus/fsl-mc/fsl-mc-msi.c +++ b/drivers/bus/fsl-mc/fsl-mc-msi.c @@ -213,21 +213,8 @@ struct irq_domain *fsl_mc_find_msi_domai int fsl_mc_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count) { - struct irq_domain *msi_domain; - int error; + int error = msi_setup_device_data(dev); - msi_domain = dev_get_msi_domain(dev); - if (!msi_domain) - return -EINVAL; - - error = msi_setup_device_data(dev); - if (error) - return error; - - msi_lock_descs(dev); - if (msi_first_desc(dev, MSI_DESC_ALL)) - error = -EINVAL; - msi_unlock_descs(dev); if (error) return error; @@ -235,7 +222,7 @@ int fsl_mc_msi_domain_alloc_irqs(struct * NOTE: Calling this function will trigger the invocation of the * its_fsl_mc_msi_prepare() callback */ - error = msi_domain_alloc_irqs(msi_domain, dev, irq_count); + error = msi_domain_alloc_irqs_range(dev, MSI_DEFAULT_DOMAIN, 0, irq_count - 1); if (error) dev_err(dev, "Failed to allocate IRQs\n"); @@ -244,11 +231,5 @@ int fsl_mc_msi_domain_alloc_irqs(struct void fsl_mc_msi_domain_free_irqs(struct device *dev) { - struct irq_domain *msi_domain; - - msi_domain = dev_get_msi_domain(dev); - if (!msi_domain) - return; - - msi_domain_free_irqs(msi_domain, dev); + msi_domain_free_irqs_all(dev, MSI_DEFAULT_DOMAIN); } From patchwork Thu Nov 24 23:24:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25737 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3660265wrr; Thu, 24 Nov 2022 15:27:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf4LiuWBeuc/t76J2XcCgtuurx1qG3RpYWWdOD5KotgkJ/ImSAdOtapS+Z7i7UQKdJicvgmp X-Received: by 2002:a63:485e:0:b0:476:f43d:ed4f with SMTP id x30-20020a63485e000000b00476f43ded4fmr32618847pgk.16.1669332453578; Thu, 24 Nov 2022 15:27:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332453; cv=none; d=google.com; s=arc-20160816; b=MHZS5X1UGf57IIaDczqkxKbbxtGTbYaAGshh5SdoY0gKiMRzcMKtVkSuVZ8xfzZa/N ovt3EmC+sJ68G4HtxpPNcTQZH7MQWwew3pacvwkmtQE2wGR3Y3GyXEXS0r7Vsv3GwDtQ /bOh1iHlzroOQOAXnqyeMLdCszJoCfHkhPARLO4XfMDdQrunS0EGO7cvCZi6a7n1b2dy aA2sb77lMrjDhrBydyVr+HZPm3QH5Id1pFpaf4GE6v9vxEC5s8dSjEwtAGc5QdHUAiCt sVer06QGAjjn1L8C6AFTh+Y8Ejn6OpSdmoOLaoyPwOWIA5TD0136Z//HZ/Sp1UHIvuai VA4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=/bVC6uqxnLqu0Y//SpNf+743RFr9freD3IllzYYvzRs=; b=oqpXAA43Zbf9D9+l5aavxBUxhw87WCTx1ztzOx6ccb1rhUYxLsF/2Nc6NI2l+tZ5N/ n+vGsNjgowOJ07qOF9k4hx0RQoMPhDPiV9jVzlRBWOGvP8boXOkEg6DT8hlX/gv++O9/ hrPJ7xXfgMVuTT2K2DdIV2UExP3dWbJoYUbWVuNodvmHrDecnVOQb5JLfEuyIBgaWTrE CtZzTGBeTgqPDogK5DhImT9JTVXVR7DzyW4449vmK+JVF5y53WZAuShhG6jaow5c/xE0 XhJLx/tAYX85qyKiNqzJy41AGgVjRg4vJHtu/fJzE60+V4kegOI4ZKa0Tj1f6EQjS5Iv xK8Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=LpPOaaDw; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x20-20020a17090300d400b001867ea919bdsi1975499plc.25.2022.11.24.15.27.20; Thu, 24 Nov 2022 15:27:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=LpPOaaDw; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229907AbiKXX0H (ORCPT + 99 others); Thu, 24 Nov 2022 18:26:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229852AbiKXXZc (ORCPT ); Thu, 24 Nov 2022 18:25:32 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B52487A4B; Thu, 24 Nov 2022 15:24:53 -0800 (PST) Message-ID: <20221124230314.634800247@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332282; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=/bVC6uqxnLqu0Y//SpNf+743RFr9freD3IllzYYvzRs=; b=LpPOaaDwHZYwDoWrBh78D3zUIwxSjimPtAOu/tPF0S2oh5sXnZx2Tr4YLd+qSpkfZOnt0e G4UoAjBSKWdvJ9L+YHyjjlWqk6o+l/KXbXb3PRfSPTeHXhX2gg7XFSvXirYvWjxpJMTGjz qFHK6xcw0vi2Plsr4yHAj5VELdqIJhqNgt8cTe9Kup9LnTDHuaG6POcJrCcAvEd3ftvGKT 37pGD8DFVFtfgRlkaLR/rEP1W10Kmu6D657LZkWrd2BHWdKRM/GnSsrdG3EX0+KrsWbeg2 vp40fCdG4bNacUn5vrqA4VXrhp/wcvJm0Fs1jndHfjO+tw4CtwzqYkV+MiFoEg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332282; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=/bVC6uqxnLqu0Y//SpNf+743RFr9freD3IllzYYvzRs=; b=CTcoM8EiN7ZY3uGsPfrf0GylpUS86RJuoIsAyua/PJdMTJcQWZnGJAas2rjz5gUZxmerYJ L1gwxV0XFWtF79Dg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" Subject: [patch V3 21/22] oc: ti: ti_sci_inta_msi: Switch to domain id aware MSI functions References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:41 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421946644672165?= X-GMAIL-MSGID: =?utf-8?q?1750421946644672165?= From: Ahmed S. Darwish Switch to the new domain id aware interfaces to phase out the previous ones. Remove the domain check as it happens in the core code now. No functional change. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner --- drivers/soc/ti/ti_sci_inta_msi.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) --- a/drivers/soc/ti/ti_sci_inta_msi.c +++ b/drivers/soc/ti/ti_sci_inta_msi.c @@ -93,13 +93,8 @@ int ti_sci_inta_msi_domain_alloc_irqs(st struct ti_sci_resource *res) { struct platform_device *pdev = to_platform_device(dev); - struct irq_domain *msi_domain; int ret, nvec; - msi_domain = dev_get_msi_domain(dev); - if (!msi_domain) - return -EINVAL; - if (pdev->id < 0) return -ENODEV; @@ -114,7 +109,8 @@ int ti_sci_inta_msi_domain_alloc_irqs(st goto unlock; } - ret = msi_domain_alloc_irqs_descs_locked(msi_domain, dev, nvec); + /* Use alloc ALL as it's unclear whether there are gaps in the indices */ + ret = msi_domain_alloc_irqs_all_locked(dev, MSI_DEFAULT_DOMAIN, nvec); if (ret) dev_err(dev, "Failed to allocate IRQs %d\n", ret); unlock: From patchwork Thu Nov 24 23:24:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 25741 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3660485wrr; Thu, 24 Nov 2022 15:28:14 -0800 (PST) X-Google-Smtp-Source: AA0mqf4UNUFMvN0B5G3AMWbD3eW+tjKesdVUyad8E0J1wrzyVEz9TUVxebfryUvvsga0KnnL4RW+ X-Received: by 2002:aa7:c7c4:0:b0:467:4a80:719b with SMTP id o4-20020aa7c7c4000000b004674a80719bmr15485382eds.174.1669332494430; Thu, 24 Nov 2022 15:28:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669332494; cv=none; d=google.com; s=arc-20160816; b=uVQfEIRHPlNATtmcxaQ2KjvXyhDSYTQiVMuyV5Lr2xjKPJgq6vtoJwAIDySBH3GYfQ 9J4yIjpsZooFCR57mUFj+S3fPu/2Kbm0cqBMb7FKnT1lpzbqXON4LUmXdBqO78uPTiYA +ub0djHZJN8WQlizkj72IpsaHj1KbxaEmC4w1PoGaO08W3L963plReOKv/ph9xnboFXK 4+TpuMgpB/ir5YfeaOIQ2dF4Mo9UMIVRJ7LG2u/+JpTHP9eO+ebExUTJ0pPmtAqczxtA FcijfS3gq8jvciS85Ds8Q15LpP/+4IwEd10md1OIB4Z3tjcFFJUAfLAIO4DHp+aT8tW7 cBmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=bf5av9l//y7oowGJ6eQBesu1F3liOY0q9r9aUAN4lbw=; b=coHfE2FzccZ4pXy1UZIQLTwdVEX27vgbXgmL9F7RG+O1AusTtjq8zbh19115ydEFO/ yzReskoQ4de2BCq7LMEbDh/kavmsSQpmA0zQlKOkWFsEcC+nAwybj/CUKGBBl7u+7n9m euKtzfyVKCtMqHbCpgCHhSWDmDy5RVOv7kYqWPli+NY6ZHtoGwkErBvUDwT8QzKbv7rE lS0wjahDikdzY2LNq+FK8a1nYNqt9vesE46mYVFRhQJo2MG8RisB8++fnkJmj6C/sYOh pbsh2IX0Sp5G0uWg/2/izUP/ZgLAFkm2v9DW7T2t3wGf1luwGZub3VcphalUc2G3CCY6 ASRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ivOz0V2y; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b="vXnHI/Px"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l17-20020a056402255100b00461c5846e1asi1918355edb.371.2022.11.24.15.27.51; Thu, 24 Nov 2022 15:28:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ivOz0V2y; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b="vXnHI/Px"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229878AbiKXX0X (ORCPT + 99 others); Thu, 24 Nov 2022 18:26:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229840AbiKXXZu (ORCPT ); Thu, 24 Nov 2022 18:25:50 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9709F88B51; Thu, 24 Nov 2022 15:25:03 -0800 (PST) Message-ID: <20221124230314.694291814@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669332283; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=bf5av9l//y7oowGJ6eQBesu1F3liOY0q9r9aUAN4lbw=; b=ivOz0V2yzDCsYPo27vDjm7HsbVozSSQqtTuUh57wNLOf/AfuG8KS31VYVmVGaKYt5N/Tc+ w8ZuJY8TnJmeMK9OaIsbbBnPhjuUnYJP9aJq0obT+e73emUNgsOuK5Qd/R8YQ+Y2eaYceD nBXiMj0Ja4TcLlRG1k7Eh6+OqxrkPFQO6GYQ8MJ7hytsvUeTpkLcvNLboBS+ISuypYQgQR ts9bjc9NlMTXOhHS0WrWOnuyr1BQlXjcNONrPwJ2/4jjuggW6ibDo/t4jxAmZqegvxJQUH t5x2cB7lV+46WBB/ooyxa9bS4d88nK+rQsVwXVLWnCC7trN+FiJNCrQiFcbPiA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669332283; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=bf5av9l//y7oowGJ6eQBesu1F3liOY0q9r9aUAN4lbw=; b=vXnHI/Px0MdF3reiMkVo3OU4HNGCfg0iyJFd9CS7uvalynqX2sPQg1Ljo5iW08y/xGgGgq pyDh0AV1RQ4gDAAw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V3 22/22] genirq/msi: Remove unused alloc/free interfaces References: <20221124225331.464480443@linutronix.de> MIME-Version: 1.0 Date: Fri, 25 Nov 2022 00:24:43 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750421989826808306?= X-GMAIL-MSGID: =?utf-8?q?1750421989826808306?= Now that all users are converted remove the old interfaces. Signed-off-by: Thomas Gleixner --- include/linux/msi.h | 7 ---- kernel/irq/msi.c | 73 ---------------------------------------------------- 2 files changed, 80 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -487,13 +487,6 @@ int msi_domain_set_affinity(struct irq_d struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode, struct msi_domain_info *info, struct irq_domain *parent); -int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, - int nvec); -int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, - int nvec); - -void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev); -void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); int msi_domain_alloc_irqs_range_locked(struct device *dev, unsigned int domid, unsigned int first, unsigned int last); --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -1143,51 +1143,6 @@ int msi_domain_alloc_irqs_all_locked(str return msi_domain_alloc_locked(dev, &ctrl); } -/** - * msi_domain_alloc_irqs_descs_locked - Allocate interrupts from a MSI interrupt domain - * @domain: The domain to allocate from - * @dev: Pointer to device struct of the device for which the interrupts - * are allocated - * @nvec: The number of interrupts to allocate - * - * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() - * pair. Use this for MSI irqdomains which implement their own vector - * allocation/free. - * - * Return: %0 on success or an error code. - */ -int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, - int nvec) -{ - struct msi_ctrl ctrl = { - .domid = MSI_DEFAULT_DOMAIN, - .first = 0, - .last = MSI_MAX_INDEX, - .nirqs = nvec, - }; - - return msi_domain_alloc_locked(dev, &ctrl); -} - -/** - * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain - * @domain: The domain to allocate from - * @dev: Pointer to device struct of the device for which the interrupts - * are allocated - * @nvec: The number of interrupts to allocate - * - * Return: %0 on success or an error code. - */ -int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec) -{ - int ret; - - msi_lock_descs(dev); - ret = msi_domain_alloc_irqs_descs_locked(domain, dev, nvec); - msi_unlock_descs(dev); - return ret; -} - static void __msi_domain_free_irqs(struct device *dev, struct irq_domain *domain, struct msi_ctrl *ctrl) { @@ -1312,34 +1267,6 @@ void msi_domain_free_irqs_all(struct dev msi_unlock_descs(dev); } -/** - * msi_domain_free_irqs_descs_locked - Free interrupts from a MSI interrupt @domain associated to @dev - * @domain: The domain to managing the interrupts - * @dev: Pointer to device struct of the device for which the interrupts - * are free - * - * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() - * pair. Use this for MSI irqdomains which implement their own vector - * allocation. - */ -void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev) -{ - msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, 0, MSI_MAX_INDEX); -} - -/** - * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated to @dev - * @domain: The domain to managing the interrupts - * @dev: Pointer to device struct of the device for which the interrupts - * are free - */ -void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) -{ - msi_lock_descs(dev); - msi_domain_free_irqs_descs_locked(domain, dev); - msi_unlock_descs(dev); -} - /** * msi_get_domain_info - Get the MSI interrupt domain info for @domain * @domain: The interrupt domain to retrieve data from