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Thu, 24 Nov 2022 09:16:45 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1031542045; Thu, 24 Nov 2022 09:16:45 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0EFE74203F; Thu, 24 Nov 2022 09:16:44 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:16:43 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 1/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p1 Date: Thu, 24 Nov 2022 03:15:49 -0600 Message-Id: <20221124091557.514727-2-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: TMWSeFyQLLKJO82sq6Nr7fGCiZpM57LK X-Proofpoint-ORIG-GUID: VZSd3TZIcHwYJi3WMBrdcJ9rCF6TrEdX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_05,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=999 phishscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 mlxscore=0 adultscore=0 malwarescore=0 impostorscore=0 suspectscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368618186738599?= X-GMAIL-MSGID: =?utf-8?q?1750368618186738599?= All kinds of vector float comparison operators have been supported in a rtl comparison pattern as vector.md, we can just emit an rtx comparison insn with the given comparison operator in function rs6000_emit_vector_compare instead of checking and handling the reverse condition cases. This is part 1, it only handles the operators which are already emitted with an rtx comparison previously in function rs6000_emit_vector_compare_inner, they are EQ/GT/GE/ORDERED/ UNORDERED/UNEQ/LTGT. There is no functionality change. With this change, rs6000_emit_vector_compare_inner would only work for vector integer comparison handling, it would be cleaned up later in vector integer comparison rework. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare_inner): Move MODE_VECTOR_FLOAT handlings out. (rs6000_emit_vector_compare): Emit rtx comparison for operators EQ/GT/ GE/UNORDERED/ORDERED/UNEQ/LTGT of MODE_VECTOR_FLOAT directly, and adjust one call site of rs6000_emit_vector_compare_inner to rs6000_emit_vector_compare. --- gcc/config/rs6000/rs6000.cc | 47 ++++++++++++++++++++++++------------- 1 file changed, 31 insertions(+), 16 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index d2743f7bce6..5a8f7ff3bf8 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15644,7 +15644,6 @@ output_cbranch (rtx op, const char *label, int reversed, rtx_insn *insn) static rtx rs6000_emit_vector_compare_inner (enum rtx_code code, rtx op0, rtx op1) { - rtx mask; machine_mode mode = GET_MODE (op0); switch (code) @@ -15652,19 +15651,11 @@ rs6000_emit_vector_compare_inner (enum rtx_code code, rtx op0, rtx op1) default: break; - case GE: - if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT) - return NULL_RTX; - /* FALLTHRU */ - case EQ: case GT: case GTU: - case ORDERED: - case UNORDERED: - case UNEQ: - case LTGT: - mask = gen_reg_rtx (mode); + gcc_assert (GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT); + rtx mask = gen_reg_rtx (mode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, mode, op0, op1))); return mask; } @@ -15680,18 +15671,42 @@ rs6000_emit_vector_compare (enum rtx_code rcode, rtx op0, rtx op1, machine_mode dmode) { - rtx mask; - bool swap_operands = false; - bool try_again = false; - gcc_assert (VECTOR_UNIT_ALTIVEC_OR_VSX_P (dmode)); gcc_assert (GET_MODE (op0) == GET_MODE (op1)); + rtx mask; + + /* In vector.md, we support all kinds of vector float point + comparison operators in a comparison rtl pattern, we can + just emit the comparison rtx insn directly here. Besides, + we should have a centralized place to handle the possibility + of raising invalid exception. As the first step, only check + operators EQ/GT/GE/UNORDERED/ORDERED/LTGT/UNEQ for now, they + are handled equivalently as before. + + FIXME: Handle the remaining vector float comparison operators + here. */ + if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT + && (rcode == EQ + || rcode == GT + || rcode == GE + || rcode == UNORDERED + || rcode == ORDERED + || rcode == LTGT + || rcode == UNEQ)) + { + mask = gen_reg_rtx (dmode); + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); + return mask; + } /* See if the comparison works as is. */ mask = rs6000_emit_vector_compare_inner (rcode, op0, op1); if (mask) return mask; + bool swap_operands = false; + bool try_again = false; + switch (rcode) { case LT: @@ -15791,7 +15806,7 @@ rs6000_emit_vector_compare (enum rtx_code rcode, if (swap_operands) std::swap (op0, op1); - mask = rs6000_emit_vector_compare_inner (rcode, op0, op1); + mask = rs6000_emit_vector_compare (rcode, op0, op1, dmode); if (mask) return mask; } From patchwork Thu Nov 24 09:15:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kewen.Lin" X-Patchwork-Id: 25398 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3282618wrr; Thu, 24 Nov 2022 01:20:50 -0800 (PST) X-Google-Smtp-Source: AA0mqf57eC01FXYhs2MEm4YzRjJTIS/fA4JXHDkq01mxuNbIM4J/JIA5TenwRxvxc4gDslxVWZfC X-Received: by 2002:a17:906:8455:b0:7aa:97c7:2c04 with SMTP id e21-20020a170906845500b007aa97c72c04mr13345605ejy.191.1669281650153; Thu, 24 Nov 2022 01:20:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669281650; cv=none; d=google.com; s=arc-20160816; b=NM6XlZnawLPcjTwR0ipW73vFX0g4OIrIJ1ToAeva/+iu7C+L20dFVvy9XitLKcgIWR 3qGYDuLPiXYG1KUOpbZnoq3L9wRlSqbOm1+Pjm5MgIj88tdockij3FDRTunSk3kFPmc6 04jVPpcOLhUduNpFILxkt6CzRSjFt2XLAGje8KjNt4HtXz/ORQT1AYaSdaRVFWt4psKM A07bk4W5Tjv3ff9D8pzt3k9Ohdu52SNDo5/RpeYeCsMxgoR9vNpMPPWDZRexjgOtUv1g kFqNX5aOiC1nGcjlapU9txguouXtL2Kk42iBQqh3qLXOciRNl665ROGfkU+EmvEbFHT3 9g9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=az6JbKzX5PQheF3IFvPx9GBFNKXk4ANe1OtURBIzo90=; b=tls3OQSxq+9R26ELtekYYnK4eKl+hGLwev8qmoIx6lZAJSu/5xvClRkcuvTLcmBeoQ i8cExG0JxfenOHutj173KGSiuHEnpQ0zZObDvBKr7f+nUxG/knczM/e0mKsTaVmhkb02 mHc/D6Nf5d7aBOmd3iSi0Ll85SpVJPyXzn1m+03ZokiBctjKPKNyM72gbmYqPA3gBIUQ 861Ix1aqwNcyY4bFArinkdMThBrud3iVhTs6AbbJ2QUjd8/eAjV8hD2M4Al/0Rv53jqc 06R/VsgKEMcNGv9h0xpHQU6CzHyWIc9sCtlbVsq2UiV9ZAevIWOlgWxM1h+EfAoCSaJW xL0w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="jvUM5/t6"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. 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Thu, 24 Nov 2022 09:16:52 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 304AB4204B; Thu, 24 Nov 2022 09:16:52 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 306B642045; Thu, 24 Nov 2022 09:16:51 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:16:51 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 2/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p2 Date: Thu, 24 Nov 2022 03:15:50 -0600 Message-Id: <20221124091557.514727-3-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ZR5brlidjxTGMxVK4TkuH7ybhLQg_7Jx X-Proofpoint-ORIG-GUID: Gwo1kyFYzR0U8TLHO8Thiqggw1poU2LT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_06,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 bulkscore=0 malwarescore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368675462397798?= X-GMAIL-MSGID: =?utf-8?q?1750368675462397798?= All kinds of vector float comparison operators have been supported in a rtl comparison pattern as vector.md, we can just emit an rtx comparison insn with the given comparison operator in function rs6000_emit_vector_compare instead of checking and handling the reverse condition cases. This is part 2, it further checks for comparison opeators NE/UNLE/UNLT. In rs6000_emit_vector_compare, they are handled with reversed code which is queried from function reverse_condition_maybe_unordered and inverting with one_cmpl_optab. It's the same as what we have in vector.md: ; ne(a,b) = ~eq(a,b) ; unle(a,b) = ~gt(a,b) ; unlt(a,b) = ~ge(a,b) The operators on the right side have been supported in part 1. This patch should not have any functionality change too. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare): Emit rtx comparison for operators NE/UNLE/UNLT of MODE_VECTOR_FLOAT directly. --- gcc/config/rs6000/rs6000.cc | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 5a8f7ff3bf8..09299bef6a2 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15679,20 +15679,18 @@ rs6000_emit_vector_compare (enum rtx_code rcode, comparison operators in a comparison rtl pattern, we can just emit the comparison rtx insn directly here. Besides, we should have a centralized place to handle the possibility - of raising invalid exception. As the first step, only check - operators EQ/GT/GE/UNORDERED/ORDERED/LTGT/UNEQ for now, they - are handled equivalently as before. + of raising invalid exception. For EQ/GT/GE/UNORDERED/ + ORDERED/LTGT/UNEQ, they are handled equivalently as before; + for NE/UNLE/UNLT, they are handled with reversed code + and inverting, it's the same as before. FIXME: Handle the remaining vector float comparison operators here. */ if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT - && (rcode == EQ - || rcode == GT - || rcode == GE - || rcode == UNORDERED - || rcode == ORDERED - || rcode == LTGT - || rcode == UNEQ)) + && rcode != LT + && rcode != LE + && rcode != UNGE + && rcode != UNGT) { mask = gen_reg_rtx (dmode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); @@ -15720,8 +15718,6 @@ rs6000_emit_vector_compare (enum rtx_code rcode, try_again = true; break; case NE: - case UNLE: - case UNLT: case UNGE: case UNGT: /* Invert condition and try again. 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Thu, 24 Nov 2022 09:17:36 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 99E0742045; Thu, 24 Nov 2022 09:16:54 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 99D5E4203F; Thu, 24 Nov 2022 09:16:53 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:16:53 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 3/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p3 Date: Thu, 24 Nov 2022 03:15:51 -0600 Message-Id: <20221124091557.514727-4-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: HI8CePGvgEABI1GRbu7yrBlPDddpcm80 X-Proofpoint-GUID: bQsfvsl3gQ2s1pHU5kHk_y8Q3Um0sCkv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_06,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 mlxscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 phishscore=0 impostorscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368546836584988?= X-GMAIL-MSGID: =?utf-8?q?1750368546836584988?= All kinds of vector float comparison operators have been supported in a rtl comparison pattern as vector.md, we can just emit an rtx comparison insn with the given comparison operator in function rs6000_emit_vector_compare instead of checking and handling the reverse condition cases. This is part 3, it further checks for comparison opeators LE/UNGT. In rs6000_emit_vector_compare, UNGT is handled with reversed code LE and inverting with one_cmpl_optab, LE is handled with LT ior EQ, while in vector.md, we have the support: ; le(a,b) = ge(b,a) ; ungt(a,b) = ~le(a,b) The associated test case shows it's an improvement. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare): Emit rtx comparison for operators LE/UNGT of MODE_VECTOR_FLOAT directly. gcc/testsuite/ChangeLog: * gcc.target/powerpc/vcond-fp.c: New test. --- gcc/config/rs6000/rs6000.cc | 9 ++++---- gcc/testsuite/gcc.target/powerpc/vcond-fp.c | 25 +++++++++++++++++++++ 2 files changed, 29 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/vcond-fp.c diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 09299bef6a2..98754805bd2 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15682,15 +15682,15 @@ rs6000_emit_vector_compare (enum rtx_code rcode, of raising invalid exception. For EQ/GT/GE/UNORDERED/ ORDERED/LTGT/UNEQ, they are handled equivalently as before; for NE/UNLE/UNLT, they are handled with reversed code - and inverting, it's the same as before. + and inverting, it's the same as before; for LE/UNGT, they + are handled with LE ior EQ previously, emitting directly + here will make use of GE later, it's slightly better; FIXME: Handle the remaining vector float comparison operators here. */ if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT && rcode != LT - && rcode != LE - && rcode != UNGE - && rcode != UNGT) + && rcode != UNGE) { mask = gen_reg_rtx (dmode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); @@ -15719,7 +15719,6 @@ rs6000_emit_vector_compare (enum rtx_code rcode, break; case NE: case UNGE: - case UNGT: /* Invert condition and try again. e.g., A != B becomes ~(A==B). */ { diff --git a/gcc/testsuite/gcc.target/powerpc/vcond-fp.c b/gcc/testsuite/gcc.target/powerpc/vcond-fp.c new file mode 100644 index 00000000000..b71861d3588 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vcond-fp.c @@ -0,0 +1,25 @@ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -mpower8-vector" } */ + +/* Test we use xvcmpge[sd]p rather than xvcmpeq[sd]p and xvcmpgt[sd]p + for UNGT and LE handlings. */ + +#define UNGT(a, b) (!__builtin_islessequal ((a), (b))) +#define LE(a, b) (((a) <= (b))) + +#define TEST_VECT(NAME, TYPE) \ + __attribute__ ((noipa)) void test_##NAME##_##TYPE (TYPE *x, TYPE *y, \ + int *res, int n) \ + { \ + for (int i = 0; i < n; i++) \ + res[i] = NAME (x[i], y[i]); \ + } + +#define TEST(TYPE) \ + TEST_VECT (UNGT, TYPE) \ + TEST_VECT (LE, TYPE) + +TEST (float) +TEST (double) + +/* { dg-final { scan-assembler-not {\mxvcmp(gt|eq)[sd]p\M} } } */ From patchwork Thu Nov 24 09:15:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kewen.Lin" X-Patchwork-Id: 25399 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3282805wrr; Thu, 24 Nov 2022 01:21:24 -0800 (PST) X-Google-Smtp-Source: AA0mqf7F4q2lT7mKLxlKGZqYXPa1u4eiMj0ejq9QX6aE8xFNAaQn3BnKru3C9TK2KOnlTxWYG8a2 X-Received: by 2002:a17:906:8994:b0:7ae:ea4:583c with SMTP id gg20-20020a170906899400b007ae0ea4583cmr26462114ejc.587.1669281684611; Thu, 24 Nov 2022 01:21:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669281684; cv=none; d=google.com; s=arc-20160816; b=OTlfvgFOC73u+zA0ANImhbaumkbx5mR8Tn1YlnSxRwe231EnesRVNrtoemKYhPzJPM 7OwPzvFeMKXSBczvrFTgITLZi87j/sOR7AG3LTfTDlfTjG6UkJEXfD8SNv5De6pyv988 +9T6TQXSi3/XV+IOYXb58+7v2BJpZ1KQ+oaYk96g5fYcufAoVsIZ/wrNOeYF6Ct1Fo+s x9Q3MvnEroJGkT0PUZL9UJwVjTdoGtWiacHQizCljw8OMEWgUTVzpDvFfNVhR+UN3NuC 9BXvRKanfK8b5bx8d03T/NMqGDU1BLgcJL1DaUPMb4EIxa5xR5fWWGaFypdoeVuRxUIZ 3VFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=MTmnMzk7nWXwLlmvkYpD/X1iUw0q88vavdSX4v2IdAs=; b=XlI+sSDY19I5oUMQ3drXNdtJORNWwig51EddP2iJR//ZibryHb448RkB2OgCOhiALj Dd+1VZAifibNQb50fm+UVfxIRctwfkZxj0NaN96MRl8Rk9anNspyxv1bKkv7aGPTCZK8 Vqt3wiLt2PqnFswqPevJyLtvQrQUTea58rt5q/KhT8ev0w2jLubaIDlE+8iVWK6eMhPy YO9ZnlxhQrf9LkL2eW1btdbPxanRFotjMy2fdRVHNMF+E8LNtXn9NUgImJvRjsfsSTwi FPWvy4Kdc9MaQvb4Kx2sQacVsT2pAsIEeiauScoQpgpIAP+HRt95X8PafJ2wResRtafH M/cg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="q25aXNe/"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. 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Thu, 24 Nov 2022 09:16:57 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DEB9D42041; Thu, 24 Nov 2022 09:16:56 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DF2D94203F; Thu, 24 Nov 2022 09:16:55 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:16:55 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 4/9] rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p4 Date: Thu, 24 Nov 2022 03:15:52 -0600 Message-Id: <20221124091557.514727-5-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 1be5JGENicuoZmHIz53vpBgZq1fS2HXJ X-Proofpoint-GUID: uNA_bIOz9sUWsCc8HQZSw4INBZghHRkA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_06,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 adultscore=0 suspectscore=0 spamscore=0 mlxscore=0 bulkscore=0 phishscore=0 malwarescore=0 mlxlogscore=999 lowpriorityscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368712024078849?= X-GMAIL-MSGID: =?utf-8?q?1750368712024078849?= All kinds of vector float comparison operators have been supported in a rtl comparison pattern as vector.md, we can just emit an rtx comparison insn with the given comparison operator in function rs6000_emit_vector_compare instead of checking and handling the reverse condition cases. This is part 4, it further checks for comparison opeators LT/UNGE. In rs6000_emit_vector_compare, for the handling of LT, it switches to use code GT, swaps operands and try again, it's exactly the same as what we have in vector.md: ; lt(a,b) = gt(b,a) As to UNGE, in rs6000_emit_vector_compare, it uses reversed code LT and further operates on the result with one_cmpl, it's also the same as what's in vector.md: ; unge(a,b) = ~lt(a,b) This patch should not have any functionality change too. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare_inner): Emit rtx comparison for operators LT/UNGE of MODE_VECTOR_FLOAT directly. (rs6000_emit_vector_compare): Move assertion of no MODE_VECTOR_FLOAT to function beginning. --- gcc/config/rs6000/rs6000.cc | 24 ++++-------------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 98754805bd2..94e039649f5 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15645,6 +15645,7 @@ static rtx rs6000_emit_vector_compare_inner (enum rtx_code code, rtx op0, rtx op1) { machine_mode mode = GET_MODE (op0); + gcc_assert (GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT); switch (code) { @@ -15654,7 +15655,6 @@ rs6000_emit_vector_compare_inner (enum rtx_code code, rtx op0, rtx op1) case EQ: case GT: case GTU: - gcc_assert (GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT); rtx mask = gen_reg_rtx (mode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, mode, op0, op1))); return mask; @@ -15679,18 +15679,8 @@ rs6000_emit_vector_compare (enum rtx_code rcode, comparison operators in a comparison rtl pattern, we can just emit the comparison rtx insn directly here. Besides, we should have a centralized place to handle the possibility - of raising invalid exception. For EQ/GT/GE/UNORDERED/ - ORDERED/LTGT/UNEQ, they are handled equivalently as before; - for NE/UNLE/UNLT, they are handled with reversed code - and inverting, it's the same as before; for LE/UNGT, they - are handled with LE ior EQ previously, emitting directly - here will make use of GE later, it's slightly better; - - FIXME: Handle the remaining vector float comparison operators - here. */ - if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT - && rcode != LT - && rcode != UNGE) + of raising invalid exception. */ + if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT) { mask = gen_reg_rtx (dmode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); @@ -15718,23 +15708,17 @@ rs6000_emit_vector_compare (enum rtx_code rcode, try_again = true; break; case NE: - case UNGE: /* Invert condition and try again. e.g., A != B becomes ~(A==B). */ { - enum rtx_code rev_code; enum insn_code nor_code; rtx mask2; - rev_code = reverse_condition_maybe_unordered (rcode); - if (rev_code == UNKNOWN) - return NULL_RTX; - nor_code = optab_handler (one_cmpl_optab, dmode); if (nor_code == CODE_FOR_nothing) return NULL_RTX; - mask2 = rs6000_emit_vector_compare (rev_code, op0, op1, dmode); + mask2 = rs6000_emit_vector_compare (EQ, op0, op1, dmode); if (!mask2) return NULL_RTX; From patchwork Thu Nov 24 09:15:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kewen.Lin" X-Patchwork-Id: 25401 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3283139wrr; Thu, 24 Nov 2022 01:22:28 -0800 (PST) X-Google-Smtp-Source: AA0mqf6OQQNQucwtT5cmzy06Icgc8LbhkVGRTnMqqXvls6iec01cr8ZuJ8Y+y4qA7hqacMCMRBUH X-Received: by 2002:a17:907:7e94:b0:7ba:e547:4d83 with SMTP id qb20-20020a1709077e9400b007bae5474d83mr2852109ejc.163.1669281748441; Thu, 24 Nov 2022 01:22:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669281748; cv=none; d=google.com; s=arc-20160816; b=sikBI5qx+s+DhQwuVYefMvLey6eeFKZZAJJ4h5acfXU1bm1q6cjhxV9n5b1c1GAZFk UU9YotAEZXxqAUMuUvX5fkdtGihnXdhD1xzOPp1LihC8JCRJZjtxLDglJK7d/BlifToX ETIhKFTUx9uoR/7sl5zNi3BidanPhGfzLhh75PeS6iB2TQYmoaa0PueFK1IlUjbkjJ21 tYoz62QuTGKkNx1xzbv6bUo0kUeYY2f5vM/4LGIbCjy7TIEMrx5TJIENMMDI66ekufL6 vAZKR4JLLqX4Kjf2b2xgelutZhU8ns/0g0sfYhuehirU3DEOWWw+e5pB8X4iSHCsWvDM Ng8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=1+agegWTa5CTeOXgA6CnJPKsD02XCnDCzmuqy604vgQ=; b=DlVI8ptwGhp38wGREEL1/x2EPWyfEB563naatoqwpQPutP/J9OQWRl2mq9AYhIIt7G vDZTQKLxNMb4C45oO/crzRTsvCHQJOw3nDRI1bmSkR1HGvoDCysyzLcmnIo9vOKUIMol gRJaiNFRd1EG76XV6/dYk7uSCN09/uSk+cqjw7h0+BFi+J6i1Gxs0XJI+TLfk/bWdNVr mPa1jF4tF8gE3Uz7aPlM1ig79VlqIlzMuqF3tD2L89uwztieMDOhf2EpzR/3xvhkzb0T zd1C7Q47VEmP92poNzBVHcf5sv+c/hh4oiVeBVuVflmI3Ls01IdZv0JnO75kYcDt6GmX x0gg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=n2WCQ7jg; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. 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Thu, 24 Nov 2022 09:16:59 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 66F4F42045; Thu, 24 Nov 2022 09:16:59 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6652D4203F; Thu, 24 Nov 2022 09:16:58 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:16:58 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 5/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p1 Date: Thu, 24 Nov 2022 03:15:53 -0600 Message-Id: <20221124091557.514727-6-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ck5cMGeg7nQdL-LX4jg7NOtD8sG9Z_Pw X-Proofpoint-ORIG-GUID: nBWeT86z-EqUMBArUkgMFN2Dd3dd3wxl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_05,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=999 phishscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 mlxscore=0 adultscore=0 malwarescore=0 impostorscore=0 suspectscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368778385060327?= X-GMAIL-MSGID: =?utf-8?q?1750368778385060327?= The current handlings in rs6000_emit_vector_compare is a bit complicated to me, especially after we emit vector float comparison insn with the given code directly. So it's better to refactor the handlings of vector integer comparison here. This is part 1, it's to remove the helper function rs6000_emit_vector_compare_inner and move the logics into rs6000_emit_vector_compare. This patch doesn't introduce any functionality change. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare_inner): Remove. (rs6000_emit_vector_compare): Emit rtx comparison for operators EQ/ GT/GTU directly. --- gcc/config/rs6000/rs6000.cc | 37 +++++++++---------------------------- 1 file changed, 9 insertions(+), 28 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 94e039649f5..0a5826800c5 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15639,30 +15639,6 @@ output_cbranch (rtx op, const char *label, int reversed, rtx_insn *insn) return string; } -/* Return insn for VSX or Altivec comparisons. */ - -static rtx -rs6000_emit_vector_compare_inner (enum rtx_code code, rtx op0, rtx op1) -{ - machine_mode mode = GET_MODE (op0); - gcc_assert (GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT); - - switch (code) - { - default: - break; - - case EQ: - case GT: - case GTU: - rtx mask = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, mode, op0, op1))); - return mask; - } - - return NULL_RTX; -} - /* Emit vector compare for operands OP0 and OP1 using code RCODE. DMODE is expected destination mode. This is a recursive function. */ @@ -15687,10 +15663,15 @@ rs6000_emit_vector_compare (enum rtx_code rcode, return mask; } - /* See if the comparison works as is. */ - mask = rs6000_emit_vector_compare_inner (rcode, op0, op1); - if (mask) - return mask; + /* For any of vector integer comparison operators for which we + have direct hardware instructions, just emit it directly + here. */ + if (rcode == EQ || rcode == GT || rcode == GTU) + { + mask = gen_reg_rtx (dmode); + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); + return mask; + } bool swap_operands = false; bool try_again = false; From patchwork Thu Nov 24 09:15:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kewen.Lin" X-Patchwork-Id: 25392 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3282020wrr; Thu, 24 Nov 2022 01:19:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf6fNIL+41Tw37uSfqct7AWHnKkPfQuD2UIJf/dnqyyPs1n+H9gsRR2gG7CBBOhcxuPoHock X-Received: by 2002:a17:907:6d12:b0:7b2:bb8c:5398 with SMTP id sa18-20020a1709076d1200b007b2bb8c5398mr16575851ejc.573.1669281540731; Thu, 24 Nov 2022 01:19:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669281540; cv=none; d=google.com; s=arc-20160816; b=yRELJary0BMeLdWDIDH85CZLNR82OA/o3wmol3JqiMdYEYzfbdSexXkkSKRdPNkbWe 2Iz01gAjs9jEgAViz7CSerp99KtvoFp+DIKVkjOxYO9yR5lUEj6m3hOe7HajesPxzdVH uwh5mHB6M9fZjqKY7kfhecgr6SE9aMFufZjbg4Mnq1mS/IbWAoJS5mNk4vz9cGzzg/uj VZY7irK1nhV+u/HPZIqOWyKKNAYHFIZsdym6obRzyVh52t0J857dXw8j90N4LL6hdqOB vs0PaC2BHHmy4+OeWMgkBntqSmmXV0+10Lt+SvXx4ioMGi/d2mjr5NbbiIldxku+8bo8 QF3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=2jD+DuXs4PEYRFcLqESybRk2qz6wZuCfRr22fk3IVSU=; b=CnmjUFbO0GzzLQEn5dDZCiZqDL6nuybzaVPmkx7kBt3lSH8XupcPNLUxZWNNiWc/4J RRCUBydxeIJj4qbVR/MlIQFYl+or1OpdUaIB93lIUOWSQgOyCkjRdvvzqiskEMeTzUTg VGoFJZKARn/sUTLXGlHEfOGIS8IBPEubiwT8buW6J3bjo+aqw30l2QYIrLoIpYrgn97g /q29zUCVGFtMxiSBBiau3ixGKkQF2bvzcxYStq1USojAv+LGuYtqQOtCzJA1w2hGPfvm 1Q4n5LEu7QXREqGw05D2bY5vHM/adiI/fyONvKg0XMkoPOxEn6RCxOmSu4xrxuAWeCBw qmEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=dArYzPgS; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (ip-8-43-85-97.sourceware.org. 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Thu, 24 Nov 2022 09:17:43 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 98C2E42045; Thu, 24 Nov 2022 09:17:01 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 98DD54203F; Thu, 24 Nov 2022 09:17:00 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:17:00 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 6/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p2 Date: Thu, 24 Nov 2022 03:15:54 -0600 Message-Id: <20221124091557.514727-7-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: KLeHAdRlxKFRO37fv3ajWQq9dlLHk-SJ X-Proofpoint-GUID: QVD-AYfxwpFlsYqyf0hZ0uvp112AHYcl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_06,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 adultscore=0 spamscore=0 phishscore=0 mlxscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 clxscore=1015 impostorscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368560961313433?= X-GMAIL-MSGID: =?utf-8?q?1750368560961313433?= The current handlings in rs6000_emit_vector_compare is a bit complicated to me, especially after we emit vector float comparison insn with the given code directly. So it's better to refactor the handlings of vector integer comparison here. This is part 2, it's to refactor the handlings on LT and LTU. This patch doesn't introduce any functionality change. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare): Refine the handlings for operators LT and LTU. --- gcc/config/rs6000/rs6000.cc | 32 +++++++++----------------------- 1 file changed, 9 insertions(+), 23 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 0a5826800c5..c1aebbb5c03 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15672,22 +15672,18 @@ rs6000_emit_vector_compare (enum rtx_code rcode, emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); return mask; } - - bool swap_operands = false; - bool try_again = false; + else if (rcode == LT || rcode == LTU) + { + /* lt{,u}(a,b) = gt{,u}(b,a) */ + enum rtx_code code = swap_condition (rcode); + std::swap (op0, op1); + mask = gen_reg_rtx (dmode); + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); + return mask; + } switch (rcode) { - case LT: - rcode = GT; - swap_operands = true; - try_again = true; - break; - case LTU: - rcode = GTU; - swap_operands = true; - try_again = true; - break; case NE: /* Invert condition and try again. e.g., A != B becomes ~(A==B). */ @@ -15761,16 +15757,6 @@ rs6000_emit_vector_compare (enum rtx_code rcode, return NULL_RTX; } - if (try_again) - { - if (swap_operands) - std::swap (op0, op1); - - mask = rs6000_emit_vector_compare (rcode, op0, op1, dmode); - if (mask) - return mask; - } - /* You only get two chances. */ return NULL_RTX; } From patchwork Thu Nov 24 09:15:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kewen.Lin" X-Patchwork-Id: 25397 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3282430wrr; Thu, 24 Nov 2022 01:20:19 -0800 (PST) X-Google-Smtp-Source: AA0mqf5STGslmpVxoxSuPLdsFUM+klDdHg4hcDpeto6fVIrfykXf1WWX8p7MFpn20NrnCLKl27Yq X-Received: by 2002:a05:6402:512:b0:46a:6e7f:5f10 with SMTP id m18-20020a056402051200b0046a6e7f5f10mr3458830edv.152.1669281619365; Thu, 24 Nov 2022 01:20:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669281619; cv=none; d=google.com; s=arc-20160816; b=lgsG3Fb4cD85t8rVNC9RiSQfsjZoe7Py76yKhDv7XvohMQiy6ZP4EWZCsWVIYNnTqE 5ASArriCOf2za+0z44rCfQxv4BT178swi5bDKuIL+lPnt2fa81YTqHEvorJG+IOdKg7z 3yGWWI3goOs+b+I/yU05WbtFAgkrZyU9KSCz2fUbRMitZB+ts96nGdcYK7uExBt+eiXK 21akSKM/XoV2OtNj/QHbqOVy/dxSsLKLG7JPh9fHUSYGo58KnfmTyaydgCl3wb7UHbXd XeB9UTwar6AAhtIdfIdpsYWy/9zhY1V+t5zGhSI5GEAR9x1AH0UIPFVYxCna58XTv5vg /HVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=/mKTPTeYxlZbDpKrgAKjLPH5b8pDaBipyZDPev8LVPM=; b=HoXLeGG2pwpCTqMX09G8ve19GMrXiKRTyMGmrYfivWOH8bPdcbq4alv50aB4tKFaXl 8ZkYJuFS1RC2594U3JfDDEe5OoUmc9YxYpuVa40lFWNebAwggP+2U9GylOkX4Je8Szhe O8I0XARyB1FFGdDd9s2CoCfqOXS/r6c3Wx1oyh8RBKyDkRigkNghHtQhRqXWagXg+7pG /SNK1+avac3gCoxzZRHd7ZfbjFI2GPUQRL99Y4Pd6sjolufUSqYaxF0jskZRMwUjrJLn EHJysxdEL0Vlyazjq5EN9cXiNNGvpc3ail42JavgIaAb8VlOuBpA8JisBmLZbKVl3HDw K1lg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=Xxxb56HN; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. 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Thu, 24 Nov 2022 09:17:03 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D222242049; Thu, 24 Nov 2022 09:17:03 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D126A4203F; Thu, 24 Nov 2022 09:17:02 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:17:02 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 7/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p3 Date: Thu, 24 Nov 2022 03:15:55 -0600 Message-Id: <20221124091557.514727-8-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: wCMEgEiG8PjYLk8nqhbjjoeaHpz0pLDW X-Proofpoint-GUID: mI47Tr2Uklr_-RJsim2lAx77oJBJlHcE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_06,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 adultscore=0 spamscore=0 phishscore=0 mlxscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 clxscore=1015 impostorscore=0 mlxlogscore=961 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368642883753748?= X-GMAIL-MSGID: =?utf-8?q?1750368642883753748?= The current handlings in rs6000_emit_vector_compare is a bit complicated to me, especially after we emit vector float comparison insn with the given code directly. So it's better to refactor the handlings of vector integer comparison here. This is part 3, it's to refactor the handlings on NE. This patch doesn't introduce any functionality change. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare): Refactor the handlings for operator NE. --- gcc/config/rs6000/rs6000.cc | 30 ++++++++++-------------------- 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index c1aebbb5c03..b4ca7b3d1b1 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15681,29 +15681,19 @@ rs6000_emit_vector_compare (enum rtx_code rcode, emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); return mask; } + else if (rcode == NE) + { + /* ne(a,b) = ~eq(a,b) */ + mask = gen_reg_rtx (dmode); + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (EQ, dmode, op0, op1))); + enum insn_code nor_code = optab_handler (one_cmpl_optab, dmode); + gcc_assert (nor_code != CODE_FOR_nothing); + emit_insn (GEN_FCN (nor_code) (mask, mask)); + return mask; + } switch (rcode) { - case NE: - /* Invert condition and try again. - e.g., A != B becomes ~(A==B). */ - { - enum insn_code nor_code; - rtx mask2; - - nor_code = optab_handler (one_cmpl_optab, dmode); - if (nor_code == CODE_FOR_nothing) - return NULL_RTX; - - mask2 = rs6000_emit_vector_compare (EQ, op0, op1, dmode); - if (!mask2) - return NULL_RTX; - - mask = gen_reg_rtx (dmode); - emit_insn (GEN_FCN (nor_code) (mask, mask2)); - return mask; - } - break; case GE: case GEU: case LE: From patchwork Thu Nov 24 09:15:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kewen.Lin" X-Patchwork-Id: 25402 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3283337wrr; Thu, 24 Nov 2022 01:23:04 -0800 (PST) X-Google-Smtp-Source: AA0mqf5FDtSf7s50XlmmbfAJ3Ul0XqNlD6J91bafg1w+N4FTJxgfhuxIEuyemUqG8A9mqWcbkSG5 X-Received: by 2002:a17:906:c30a:b0:7ae:e592:fce5 with SMTP id s10-20020a170906c30a00b007aee592fce5mr26625457ejz.390.1669281784754; Thu, 24 Nov 2022 01:23:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669281784; cv=none; d=google.com; s=arc-20160816; b=MG2oujGKshFvE9BWDhVrjPyw4E0mvTuUKqvYRpG06lCDo7UPzZU9k4wBjPIRZ11P96 XO3tdODjuxV/EksCDxMbt6DBf+qBPWq1mENezD7kpE+/P99I0hIAoPIdD0k0hrCJtF4q kHUrhgq+OAgxhy+RvD7BxNWnAo0d3DVC2Ao25YCLQ5EAiRbxsojy0WMhK76NZ61aobrH ppBN5ydTHjA0OlivxINDH+QcRDFIdn/aEiAUG1+xUOVACtVuVSkh5+h02JBi1p77atPS EnK/rVo+w2qWCIg193Mm869+LtqUeyCyFtAkNSXwtEQ7tOEu5014AqEyJV90zrIx+jLY q00Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=qB0+HfQ+JMj5to1VWAljuJ4rvlfo8Gzc236hg+VsEew=; b=pzS3SWeqDQZhuoWuS7lIRZGWoSrc6COXKo1wXVfw1iyQUxKO+hZ98AKj6zbPU9+04Z fgpMqU0KsytuXf0//lGNHYVICdBSlcrOthfQTmaFWtN6A4uDdX5Y+y5SIMe3bcrPjlIJ u+Zb6x/w92CBAeV0f8j4zpApcOKB9fcB/PXiIQuivmAZzkE67Mjh911WSVXZGSTZgcds maLrqWZc1OzyHNzkR9SrMgLoDqoIHFKOVhvlShd0nWel0WPY7Z+HuT7/7Ar/knuKAY+0 5/WIvnP+vs60+0QUxn35d37v4i7XuD1PWrUj5WNZ5efxoSlimcJTYXNCOykEWejDo7PL PuUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=sTF1052v; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. 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Thu, 24 Nov 2022 09:17:06 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E376242041; Thu, 24 Nov 2022 09:17:05 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E22C84203F; Thu, 24 Nov 2022 09:17:04 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:17:04 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 8/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p4 Date: Thu, 24 Nov 2022 03:15:56 -0600 Message-Id: <20221124091557.514727-9-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: AjK7Q46A6r-mqBdw0xabqGAl9nQ5pRp8 X-Proofpoint-GUID: PhDCEgRvcIyifK2G-SrOb4MLPqOlILrL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_05,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 spamscore=0 clxscore=1015 lowpriorityscore=0 bulkscore=0 suspectscore=0 impostorscore=0 malwarescore=0 mlxscore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368816440066719?= X-GMAIL-MSGID: =?utf-8?q?1750368816440066719?= The current handlings in rs6000_emit_vector_compare is a bit complicated to me, especially after we emit vector float comparison insn with the given code directly. So it's better to refactor the handlings of vector integer comparison here. This is part 4, it's to rework the handlings on GE/GEU/LE/LEU, also make the function not recursive any more. This patch doesn't introduce any functionality change. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare): Refine the handlings for operators GE/GEU/LE/LEU. --- gcc/config/rs6000/rs6000.cc | 87 ++++++++----------------------------- 1 file changed, 17 insertions(+), 70 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index b4ca7b3d1b1..a3645e321a7 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15640,7 +15640,7 @@ output_cbranch (rtx op, const char *label, int reversed, rtx_insn *insn) } /* Emit vector compare for operands OP0 and OP1 using code RCODE. - DMODE is expected destination mode. This is a recursive function. */ + DMODE is expected destination mode. */ static rtx rs6000_emit_vector_compare (enum rtx_code rcode, @@ -15649,7 +15649,7 @@ rs6000_emit_vector_compare (enum rtx_code rcode, { gcc_assert (VECTOR_UNIT_ALTIVEC_OR_VSX_P (dmode)); gcc_assert (GET_MODE (op0) == GET_MODE (op1)); - rtx mask; + rtx mask = gen_reg_rtx (dmode); /* In vector.md, we support all kinds of vector float point comparison operators in a comparison rtl pattern, we can @@ -15658,7 +15658,6 @@ rs6000_emit_vector_compare (enum rtx_code rcode, of raising invalid exception. */ if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT) { - mask = gen_reg_rtx (dmode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); return mask; } @@ -15667,11 +15666,7 @@ rs6000_emit_vector_compare (enum rtx_code rcode, have direct hardware instructions, just emit it directly here. */ if (rcode == EQ || rcode == GT || rcode == GTU) - { - mask = gen_reg_rtx (dmode); - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); - return mask; - } + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); else if (rcode == LT || rcode == LTU) { /* lt{,u}(a,b) = gt{,u}(b,a) */ @@ -15679,76 +15674,28 @@ rs6000_emit_vector_compare (enum rtx_code rcode, std::swap (op0, op1); mask = gen_reg_rtx (dmode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); - return mask; } - else if (rcode == NE) + else if (rcode == NE || rcode == LE || rcode == LEU) { - /* ne(a,b) = ~eq(a,b) */ + /* ne(a,b) = ~eq(a,b); le{,u}(a,b) = ~gt{,u}(a,b) */ + enum rtx_code code = reverse_condition (rcode); mask = gen_reg_rtx (dmode); - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (EQ, dmode, op0, op1))); + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); + enum insn_code nor_code = optab_handler (one_cmpl_optab, dmode); + gcc_assert (nor_code != CODE_FOR_nothing); + emit_insn (GEN_FCN (nor_code) (mask, mask)); + } else { + /* ge{,u}(a,b) = ~gt{,u}(b,a) */ + gcc_assert (rcode == GE || rcode == GEU); + enum rtx_code code = rcode == GE ? GT : GTU; + mask = gen_reg_rtx (dmode); + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); enum insn_code nor_code = optab_handler (one_cmpl_optab, dmode); gcc_assert (nor_code != CODE_FOR_nothing); emit_insn (GEN_FCN (nor_code) (mask, mask)); - return mask; - } - - switch (rcode) - { - case GE: - case GEU: - case LE: - case LEU: - /* Try GT/GTU/LT/LTU OR EQ */ - { - rtx c_rtx, eq_rtx; - enum insn_code ior_code; - enum rtx_code new_code; - - switch (rcode) - { - case GE: - new_code = GT; - break; - - case GEU: - new_code = GTU; - break; - - case LE: - new_code = LT; - break; - - case LEU: - new_code = LTU; - break; - - default: - gcc_unreachable (); - } - - ior_code = optab_handler (ior_optab, dmode); - if (ior_code == CODE_FOR_nothing) - return NULL_RTX; - - c_rtx = rs6000_emit_vector_compare (new_code, op0, op1, dmode); - if (!c_rtx) - return NULL_RTX; - - eq_rtx = rs6000_emit_vector_compare (EQ, op0, op1, dmode); - if (!eq_rtx) - return NULL_RTX; - - mask = gen_reg_rtx (dmode); - emit_insn (GEN_FCN (ior_code) (mask, c_rtx, eq_rtx)); - return mask; - } - break; - default: - return NULL_RTX; } - /* You only get two chances. */ - return NULL_RTX; + return mask; } /* Emit vector conditional expression. DEST is destination. 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Thu, 24 Nov 2022 09:17:50 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 74DF34203F; Thu, 24 Nov 2022 09:17:08 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6DDD542041; Thu, 24 Nov 2022 09:17:07 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:17:07 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 9/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p5 Date: Thu, 24 Nov 2022 03:15:57 -0600 Message-Id: <20221124091557.514727-10-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: GmTVno1Ciz2sJsEePT1lWr_8W0YvQ5mv X-Proofpoint-GUID: bBKbvvbaSJF1mlkzsbRZy_UzqfPL8meI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_06,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 mlxscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 phishscore=0 impostorscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368576779318694?= X-GMAIL-MSGID: =?utf-8?q?1750368576779318694?= The current handlings in rs6000_emit_vector_compare is a bit complicated to me, especially after we emit vector float comparison insn with the given code directly. So it's better to refactor the handlings of vector integer comparison here. This is part 5, it's to refactor all the handlings of vector integer comparison to make it neat. This patch doesn't introduce any functionality change. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare): Refactor the handlings of vector integer comparison. --- gcc/config/rs6000/rs6000.cc | 68 ++++++++++++++++++++++++------------- 1 file changed, 44 insertions(+), 24 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index a3645e321a7..b694080840a 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15662,34 +15662,54 @@ rs6000_emit_vector_compare (enum rtx_code rcode, return mask; } - /* For any of vector integer comparison operators for which we - have direct hardware instructions, just emit it directly - here. */ - if (rcode == EQ || rcode == GT || rcode == GTU) - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); - else if (rcode == LT || rcode == LTU) + bool swap_operands = false; + bool need_invert = false; + enum rtx_code code = rcode; + + switch (rcode) { + case EQ: + case GT: + case GTU: + /* Emit directly with native hardware insn. */ + break; + case LT: + case LTU: /* lt{,u}(a,b) = gt{,u}(b,a) */ - enum rtx_code code = swap_condition (rcode); - std::swap (op0, op1); - mask = gen_reg_rtx (dmode); - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); + code = swap_condition (rcode); + swap_operands = true; + break; + case NE: + case LE: + case LEU: + /* ne(a,b) = ~eq(a,b); le{,u}(a,b) = ~gt{,u}(a,b) */ + code = reverse_condition (rcode); + need_invert = true; + break; + case GE: + /* ge(a,b) = ~gt(b,a) */ + code = GT; + swap_operands = true; + need_invert = true; + break; + case GEU: + /* geu(a,b) = ~gtu(b,a) */ + code = GTU; + swap_operands = true; + need_invert = true; + break; + default: + gcc_unreachable (); + break; } - else if (rcode == NE || rcode == LE || rcode == LEU) + + if (swap_operands) + std::swap (op0, op1); + + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); + + if (need_invert) { - /* ne(a,b) = ~eq(a,b); le{,u}(a,b) = ~gt{,u}(a,b) */ - enum rtx_code code = reverse_condition (rcode); - mask = gen_reg_rtx (dmode); - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); - enum insn_code nor_code = optab_handler (one_cmpl_optab, dmode); - gcc_assert (nor_code != CODE_FOR_nothing); - emit_insn (GEN_FCN (nor_code) (mask, mask)); - } else { - /* ge{,u}(a,b) = ~gt{,u}(b,a) */ - gcc_assert (rcode == GE || rcode == GEU); - enum rtx_code code = rcode == GE ? GT : GTU; - mask = gen_reg_rtx (dmode); - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); enum insn_code nor_code = optab_handler (one_cmpl_optab, dmode); gcc_assert (nor_code != CODE_FOR_nothing); emit_insn (GEN_FCN (nor_code) (mask, mask));